Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge branch 'treewide/cleanup' into next/multiplatform

The realview multiplatform series has a trivial conflict with
one of the treewide cleanups, let's just merge that in to
avoid having to resolve this later.

* treewide/cleanup:
ARM: use "depends on" for SoC configs instead of "if" after prompt
ARM/clocksource: use automatic DT probing for ux500 PRCMU
ARM: use const and __initconst for smp_operations
ARM: hisi: do not export smp_operations structures

Conflicts:
arch/arm/mach-integrator/Kconfig

+181 -203
+2 -1
arch/arm/Kconfig
··· 697 697 endmenu 698 698 699 699 config ARCH_VIRT 700 - bool "Dummy Virtual Machine" if ARCH_MULTI_V7 700 + bool "Dummy Virtual Machine" 701 + depends on ARCH_MULTI_V7 701 702 select ARM_AMBA 702 703 select ARM_GIC 703 704 select ARM_GIC_V3
+1 -1
arch/arm/common/mcpm_platsmp.c
··· 83 83 84 84 #endif 85 85 86 - static struct smp_operations __initdata mcpm_smp_ops = { 86 + static const struct smp_operations mcpm_smp_ops __initconst = { 87 87 .smp_boot_secondary = mcpm_boot_secondary, 88 88 .smp_secondary_init = mcpm_secondary_init, 89 89 #ifdef CONFIG_HOTPLUG_CPU
+1 -1
arch/arm/include/asm/psci.h
··· 14 14 #ifndef __ASM_ARM_PSCI_H 15 15 #define __ASM_ARM_PSCI_H 16 16 17 - extern struct smp_operations psci_smp_ops; 17 + extern const struct smp_operations psci_smp_ops; 18 18 19 19 #ifdef CONFIG_ARM_PSCI 20 20 bool psci_smp_available(void);
+1 -1
arch/arm/kernel/psci_smp.c
··· 120 120 return (psci_ops.cpu_on != NULL); 121 121 } 122 122 123 - struct smp_operations __initdata psci_smp_ops = { 123 + const struct smp_operations psci_smp_ops __initconst = { 124 124 .smp_boot_secondary = psci_boot_secondary, 125 125 #ifdef CONFIG_HOTPLUG_CPU 126 126 .cpu_disable = psci_cpu_disable,
+2 -1
arch/arm/mach-alpine/Kconfig
··· 1 1 config ARCH_ALPINE 2 - bool "Annapurna Labs Alpine platform" if ARCH_MULTI_V7 2 + bool "Annapurna Labs Alpine platform" 3 + depends on ARCH_MULTI_V7 3 4 select ARM_AMBA 4 5 select ARM_GIC 5 6 select GENERIC_IRQ_CHIP
+1 -1
arch/arm/mach-alpine/platsmp.c
··· 42 42 alpine_cpu_pm_init(); 43 43 } 44 44 45 - static struct smp_operations alpine_smp_ops __initdata = { 45 + static const struct smp_operations alpine_smp_ops __initconst = { 46 46 .smp_prepare_cpus = alpine_smp_prepare_cpus, 47 47 .smp_boot_secondary = alpine_boot_secondary, 48 48 };
+10 -5
arch/arm/mach-at91/Kconfig
··· 8 8 9 9 if ARCH_AT91 10 10 config SOC_SAMA5D2 11 - bool "SAMA5D2 family" if ARCH_MULTI_V7 11 + bool "SAMA5D2 family" 12 + depends on ARCH_MULTI_V7 12 13 select SOC_SAMA5 13 14 select CACHE_L2X0 14 15 select HAVE_FB_ATMEL ··· 22 21 Select this if ou are using one of Atmel's SAMA5D2 family SoC. 23 22 24 23 config SOC_SAMA5D3 25 - bool "SAMA5D3 family" if ARCH_MULTI_V7 24 + bool "SAMA5D3 family" 25 + depends on ARCH_MULTI_V7 26 26 select SOC_SAMA5 27 27 select HAVE_FB_ATMEL 28 28 select HAVE_AT91_UTMI ··· 35 33 This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35, SAMA5D36. 36 34 37 35 config SOC_SAMA5D4 38 - bool "SAMA5D4 family" if ARCH_MULTI_V7 36 + bool "SAMA5D4 family" 37 + depends on ARCH_MULTI_V7 39 38 select SOC_SAMA5 40 39 select CACHE_L2X0 41 40 select HAVE_FB_ATMEL ··· 49 46 Select this if you are using one of Atmel's SAMA5D4 family SoC. 50 47 51 48 config SOC_AT91RM9200 52 - bool "AT91RM9200" if ARCH_MULTI_V4T 49 + bool "AT91RM9200" 50 + depends on ARCH_MULTI_V4T 53 51 select ATMEL_AIC_IRQ 54 52 select ATMEL_ST 55 53 select CPU_ARM920T ··· 63 59 Select this if you are using Atmel's AT91RM9200 SoC. 64 60 65 61 config SOC_AT91SAM9 66 - bool "AT91SAM9" if ARCH_MULTI_V5 62 + bool "AT91SAM9" 63 + depends on ARCH_MULTI_V5 67 64 select ATMEL_AIC_IRQ 68 65 select ATMEL_SDRAMC 69 66 select CPU_ARM926T
+2 -1
arch/arm/mach-axxia/Kconfig
··· 1 1 config ARCH_AXXIA 2 - bool "LSI Axxia platforms" if (ARCH_MULTI_V7 && ARM_LPAE) 2 + bool "LSI Axxia platforms" 3 + depends on ARCH_MULTI_V7 && ARM_LPAE 3 4 select ARCH_DMA_ADDR_T_64BIT 4 5 select ARM_AMBA 5 6 select ARM_GIC
+1 -1
arch/arm/mach-axxia/platsmp.c
··· 82 82 } 83 83 } 84 84 85 - static struct smp_operations axxia_smp_ops __initdata = { 85 + static const struct smp_operations axxia_smp_ops __initconst = { 86 86 .smp_prepare_cpus = axxia_smp_prepare_cpus, 87 87 .smp_boot_secondary = axxia_boot_secondary, 88 88 };
+18 -9
arch/arm/mach-bcm/Kconfig
··· 1 1 menuconfig ARCH_BCM 2 - bool "Broadcom SoC Support" if ARCH_MULTI_V6_V7 2 + bool "Broadcom SoC Support" 3 + depends on ARCH_MULTI_V6_V7 3 4 help 4 5 This enables support for Broadcom ARM based SoC chips 5 6 ··· 28 27 Currently supported SoCs are Cygnus. 29 28 30 29 config ARCH_BCM_CYGNUS 31 - bool "Broadcom Cygnus Support" if ARCH_MULTI_V7 30 + bool "Broadcom Cygnus Support" 31 + depends on ARCH_MULTI_V7 32 32 select ARCH_BCM_IPROC 33 33 help 34 34 Enable support for the Cygnus family, ··· 38 36 BCM58300, BCM58302, BCM58303, BCM58305. 39 37 40 38 config ARCH_BCM_NSP 41 - bool "Broadcom Northstar Plus SoC Support" if ARCH_MULTI_V7 39 + bool "Broadcom Northstar Plus SoC Support" 40 + depends on ARCH_MULTI_V7 42 41 select ARCH_BCM_IPROC 43 42 select ARM_ERRATA_754322 44 43 select ARM_ERRATA_775420 ··· 53 50 NAND flash, SATA and several other IO controllers. 54 51 55 52 config ARCH_BCM_5301X 56 - bool "Broadcom BCM470X / BCM5301X ARM SoC" if ARCH_MULTI_V7 53 + bool "Broadcom BCM470X / BCM5301X ARM SoC" 54 + depends on ARCH_MULTI_V7 57 55 select ARCH_BCM_IPROC 58 56 help 59 57 Support for Broadcom BCM470X and BCM5301X SoCs with ARM CPU cores. ··· 86 82 This enables support for systems based on Broadcom mobile SoCs. 87 83 88 84 config ARCH_BCM_281XX 89 - bool "Broadcom BCM281XX SoC family" if ARCH_MULTI_V7 85 + bool "Broadcom BCM281XX SoC family" 86 + depends on ARCH_MULTI_V7 90 87 select ARCH_BCM_MOBILE 91 88 select HAVE_SMP 92 89 help ··· 96 91 variants. 97 92 98 93 config ARCH_BCM_21664 99 - bool "Broadcom BCM21664 SoC family" if ARCH_MULTI_V7 94 + bool "Broadcom BCM21664 SoC family" 95 + depends on ARCH_MULTI_V7 100 96 select ARCH_BCM_MOBILE 101 97 select HAVE_SMP 102 98 help ··· 128 122 comment "Other Architectures" 129 123 130 124 config ARCH_BCM2835 131 - bool "Broadcom BCM2835 family" if ARCH_MULTI_V6 125 + bool "Broadcom BCM2835 family" 126 + depends on ARCH_MULTI_V6 132 127 select ARCH_REQUIRE_GPIOLIB 133 128 select ARM_AMBA 134 129 select ARM_ERRATA_411920 ··· 142 135 used in the Raspberry Pi and Roku 2 devices. 143 136 144 137 config ARCH_BCM_63XX 145 - bool "Broadcom BCM63xx DSL SoC" if ARCH_MULTI_V7 138 + bool "Broadcom BCM63xx DSL SoC" 139 + depends on ARCH_MULTI_V7 146 140 depends on MMU 147 141 select ARM_ERRATA_754322 148 142 select ARM_ERRATA_764369 if SMP ··· 160 152 the BCM63138 variant. 161 153 162 154 config ARCH_BRCMSTB 163 - bool "Broadcom BCM7XXX based boards" if ARCH_MULTI_V7 155 + bool "Broadcom BCM7XXX based boards" 156 + depends on ARCH_MULTI_V7 164 157 select ARM_GIC 165 158 select ARM_ERRATA_798181 if SMP 166 159 select HAVE_ARM_ARCH_TIMER
+1 -1
arch/arm/mach-bcm/bcm63xx_smp.c
··· 161 161 } 162 162 } 163 163 164 - struct smp_operations bcm63138_smp_ops __initdata = { 164 + static const struct smp_operations bcm63138_smp_ops __initconst = { 165 165 .smp_prepare_cpus = bcm63138_smp_prepare_cpus, 166 166 .smp_boot_secondary = bcm63138_smp_boot_secondary, 167 167 };
+1 -1
arch/arm/mach-bcm/kona_smp.c
··· 194 194 return -ENOSYS; 195 195 } 196 196 197 - static struct smp_operations bcm_smp_ops __initdata = { 197 + static const struct smp_operations bcm_smp_ops __initconst = { 198 198 .smp_prepare_cpus = bcm_smp_prepare_cpus, 199 199 .smp_boot_secondary = bcm_boot_secondary, 200 200 };
+1 -1
arch/arm/mach-bcm/platsmp-brcmstb.c
··· 356 356 return 0; 357 357 } 358 358 359 - static struct smp_operations brcmstb_smp_ops __initdata = { 359 + static const struct smp_operations brcmstb_smp_ops __initconst = { 360 360 .smp_prepare_cpus = brcmstb_cpu_ctrl_setup, 361 361 .smp_boot_secondary = brcmstb_boot_secondary, 362 362 #ifdef CONFIG_HOTPLUG_CPU
+2 -1
arch/arm/mach-berlin/Kconfig
··· 1 1 menuconfig ARCH_BERLIN 2 - bool "Marvell Berlin SoCs" if ARCH_MULTI_V7 2 + bool "Marvell Berlin SoCs" 3 + depends on ARCH_MULTI_V7 3 4 select ARCH_HAS_RESET_CONTROLLER 4 5 select ARCH_REQUIRE_GPIOLIB 5 6 select ARM_GIC
+1 -1
arch/arm/mach-berlin/platsmp.c
··· 119 119 } 120 120 #endif 121 121 122 - static struct smp_operations berlin_smp_ops __initdata = { 122 + static const struct smp_operations berlin_smp_ops __initconst = { 123 123 .smp_prepare_cpus = berlin_smp_prepare_cpus, 124 124 .smp_boot_secondary = berlin_boot_secondary, 125 125 #ifdef CONFIG_HOTPLUG_CPU
+2 -1
arch/arm/mach-cns3xxx/Kconfig
··· 1 1 menuconfig ARCH_CNS3XXX 2 - bool "Cavium Networks CNS3XXX family" if ARCH_MULTI_V6 2 + bool "Cavium Networks CNS3XXX family" 3 + depends on ARCH_MULTI_V6 3 4 select ARM_GIC 4 5 select PCI_DOMAINS if PCI 5 6 help
+2 -1
arch/arm/mach-exynos/Kconfig
··· 8 8 # Configuration options for the EXYNOS4 9 9 10 10 menuconfig ARCH_EXYNOS 11 - bool "Samsung EXYNOS" if ARCH_MULTI_V7 11 + bool "Samsung EXYNOS" 12 + depends on ARCH_MULTI_V7 12 13 select ARCH_HAS_BANDGAP 13 14 select ARCH_HAS_HOLES_MEMORYMODEL 14 15 select ARCH_REQUIRE_GPIOLIB
+1 -1
arch/arm/mach-exynos/common.h
··· 149 149 extern void exynos_cpu_resume(void); 150 150 extern void exynos_cpu_resume_ns(void); 151 151 152 - extern struct smp_operations exynos_smp_ops; 152 + extern const struct smp_operations exynos_smp_ops; 153 153 154 154 extern void exynos_cpu_power_down(int cpu); 155 155 extern void exynos_cpu_power_up(int cpu);
+1 -1
arch/arm/mach-exynos/platsmp.c
··· 479 479 } 480 480 #endif /* CONFIG_HOTPLUG_CPU */ 481 481 482 - struct smp_operations exynos_smp_ops __initdata = { 482 + const struct smp_operations exynos_smp_ops __initconst = { 483 483 .smp_init_cpus = exynos_smp_init_cpus, 484 484 .smp_prepare_cpus = exynos_smp_prepare_cpus, 485 485 .smp_secondary_init = exynos_secondary_init,
+2 -1
arch/arm/mach-highbank/Kconfig
··· 1 1 config ARCH_HIGHBANK 2 - bool "Calxeda ECX-1000/2000 (Highbank/Midway)" if ARCH_MULTI_V7 2 + bool "Calxeda ECX-1000/2000 (Highbank/Midway)" 3 + depends on ARCH_MULTI_V7 3 4 select ARCH_DMA_ADDR_T_64BIT if ARM_LPAE 4 5 select ARCH_HAS_HOLES_MEMORYMODEL 5 6 select ARCH_SUPPORTS_BIG_ENDIAN
+8 -4
arch/arm/mach-hisi/Kconfig
··· 13 13 menu "Hisilicon platform type" 14 14 15 15 config ARCH_HI3xxx 16 - bool "Hisilicon Hi36xx family" if ARCH_MULTI_V7 16 + bool "Hisilicon Hi36xx family" 17 + depends on ARCH_MULTI_V7 17 18 select CACHE_L2X0 18 19 select HAVE_ARM_SCU if SMP 19 20 select HAVE_ARM_TWD if SMP ··· 24 23 Support for Hisilicon Hi36xx SoC family 25 24 26 25 config ARCH_HIP01 27 - bool "Hisilicon HIP01 family" if ARCH_MULTI_V7 26 + bool "Hisilicon HIP01 family" 27 + depends on ARCH_MULTI_V7 28 28 select HAVE_ARM_SCU if SMP 29 29 select HAVE_ARM_TWD if SMP 30 30 select ARM_GLOBAL_TIMER ··· 33 31 Support for Hisilicon HIP01 SoC family 34 32 35 33 config ARCH_HIP04 36 - bool "Hisilicon HiP04 Cortex A15 family" if ARCH_MULTI_V7 34 + bool "Hisilicon HiP04 Cortex A15 family" 35 + depends on ARCH_MULTI_V7 37 36 select ARM_ERRATA_798181 if SMP 38 37 select HAVE_ARM_ARCH_TIMER 39 38 select MCPM if SMP ··· 43 40 Support for Hisilicon HiP04 SoC family 44 41 45 42 config ARCH_HIX5HD2 46 - bool "Hisilicon X5HD2 family" if ARCH_MULTI_V7 43 + bool "Hisilicon X5HD2 family" 44 + depends on ARCH_MULTI_V7 47 45 select CACHE_L2X0 48 46 select HAVE_ARM_SCU if SMP 49 47 select HAVE_ARM_TWD if SMP
-3
arch/arm/mach-hisi/core.h
··· 6 6 extern void hi3xxx_set_cpu_jump(int cpu, void *jump_addr); 7 7 extern int hi3xxx_get_cpu_jump(int cpu); 8 8 extern void secondary_startup(void); 9 - extern struct smp_operations hi3xxx_smp_ops; 10 9 11 10 extern void hi3xxx_cpu_die(unsigned int cpu); 12 11 extern int hi3xxx_cpu_kill(unsigned int cpu); 13 12 extern void hi3xxx_set_cpu(int cpu, bool enable); 14 13 15 - extern struct smp_operations hix5hd2_smp_ops; 16 14 extern void hix5hd2_set_cpu(int cpu, bool enable); 17 15 extern void hix5hd2_cpu_die(unsigned int cpu); 18 16 19 - extern struct smp_operations hip01_smp_ops; 20 17 extern void hip01_set_cpu(int cpu, bool enable); 21 18 extern void hip01_cpu_die(unsigned int cpu); 22 19 #endif
+1 -1
arch/arm/mach-hisi/platmcpm.c
··· 239 239 } 240 240 #endif 241 241 242 - static struct smp_operations __initdata hip04_smp_ops = { 242 + static const struct smp_operations hip04_smp_ops __initconst = { 243 243 .smp_boot_secondary = hip04_boot_secondary, 244 244 #ifdef CONFIG_HOTPLUG_CPU 245 245 .cpu_die = hip04_cpu_die,
+3 -3
arch/arm/mach-hisi/platsmp.c
··· 89 89 return 0; 90 90 } 91 91 92 - struct smp_operations hi3xxx_smp_ops __initdata = { 92 + static const struct smp_operations hi3xxx_smp_ops __initconst = { 93 93 .smp_prepare_cpus = hi3xxx_smp_prepare_cpus, 94 94 .smp_boot_secondary = hi3xxx_boot_secondary, 95 95 #ifdef CONFIG_HOTPLUG_CPU ··· 126 126 } 127 127 128 128 129 - struct smp_operations hix5hd2_smp_ops __initdata = { 129 + static const struct smp_operations hix5hd2_smp_ops __initconst = { 130 130 .smp_prepare_cpus = hisi_common_smp_prepare_cpus, 131 131 .smp_boot_secondary = hix5hd2_boot_secondary, 132 132 #ifdef CONFIG_HOTPLUG_CPU ··· 176 176 return 0; 177 177 } 178 178 179 - struct smp_operations hip01_smp_ops __initdata = { 179 + static const struct smp_operations hip01_smp_ops __initconst = { 180 180 .smp_prepare_cpus = hisi_common_smp_prepare_cpus, 181 181 .smp_boot_secondary = hip01_boot_secondary, 182 182 };
+4 -2
arch/arm/mach-imx/Kconfig
··· 1 1 menuconfig ARCH_MXC 2 - bool "Freescale i.MX family" if ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7 || ARM_SINGLE_ARMV7M 2 + bool "Freescale i.MX family" 3 + depends on ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7 || ARM_SINGLE_ARMV7M 3 4 select ARCH_REQUIRE_GPIOLIB 4 5 select ARM_CPU_SUSPEND if PM 5 6 select CLKSRC_IMX_GPT ··· 597 596 default VF_USE_ARM_GLOBAL_TIMER 598 597 599 598 config VF_USE_ARM_GLOBAL_TIMER 600 - bool "Use ARM Global Timer" if ARCH_MULTI_V7 599 + bool "Use ARM Global Timer" 600 + depends on ARCH_MULTI_V7 601 601 select ARM_GLOBAL_TIMER 602 602 select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK 603 603 help
+2 -2
arch/arm/mach-imx/common.h
··· 153 153 static inline void imx_init_l2cache(void) {} 154 154 #endif 155 155 156 - extern struct smp_operations imx_smp_ops; 157 - extern struct smp_operations ls1021a_smp_ops; 156 + extern const struct smp_operations imx_smp_ops; 157 + extern const struct smp_operations ls1021a_smp_ops; 158 158 159 159 #endif
+2 -2
arch/arm/mach-imx/platsmp.c
··· 88 88 sync_cache_w(&g_diag_reg); 89 89 } 90 90 91 - struct smp_operations imx_smp_ops __initdata = { 91 + const struct smp_operations imx_smp_ops __initconst = { 92 92 .smp_init_cpus = imx_smp_init_cpus, 93 93 .smp_prepare_cpus = imx_smp_prepare_cpus, 94 94 .smp_boot_secondary = imx_boot_secondary, ··· 123 123 iounmap(dcfg_base); 124 124 } 125 125 126 - struct smp_operations ls1021a_smp_ops __initdata = { 126 + const struct smp_operations ls1021a_smp_ops __initconst = { 127 127 .smp_prepare_cpus = ls1021a_smp_prepare_cpus, 128 128 .smp_boot_secondary = ls1021a_boot_secondary, 129 129 };
+2 -1
arch/arm/mach-integrator/Kconfig
··· 1 1 menuconfig ARCH_INTEGRATOR 2 - bool "ARM Ltd. Integrator family" if (ARCH_MULTI_V4T || ARCH_MULTI_V5 || ARCH_MULTI_V6) 2 + bool "ARM Ltd. Integrator family" 3 + depends on ARCH_MULTI_V4T || ARCH_MULTI_V5 || ARCH_MULTI_V6 3 4 select ARM_AMBA 4 5 select ARM_PATCH_PHYS_VIRT if MMU 5 6 select AUTO_ZRELADDR
+1 -1
arch/arm/mach-keystone/keystone.h
··· 15 15 16 16 #ifndef __ASSEMBLER__ 17 17 18 - extern struct smp_operations keystone_smp_ops; 18 + extern const struct smp_operations keystone_smp_ops; 19 19 extern void secondary_startup(void); 20 20 extern u32 keystone_cpu_smc(u32 command, u32 cpu, u32 addr); 21 21 extern int keystone_pm_runtime_init(void);
+1 -1
arch/arm/mach-keystone/platsmp.c
··· 39 39 return error; 40 40 } 41 41 42 - struct smp_operations keystone_smp_ops __initdata = { 42 + const struct smp_operations keystone_smp_ops __initconst = { 43 43 .smp_boot_secondary = keystone_smp_boot_secondary, 44 44 };
+2 -1
arch/arm/mach-mediatek/Kconfig
··· 1 1 menuconfig ARCH_MEDIATEK 2 - bool "Mediatek MT65xx & MT81xx SoC" if ARCH_MULTI_V7 2 + bool "Mediatek MT65xx & MT81xx SoC" 3 + depends on ARCH_MULTI_V7 3 4 select ARM_GIC 4 5 select PINCTRL 5 6 select MTK_TIMER
+2 -2
arch/arm/mach-mediatek/platsmp.c
··· 128 128 __mtk_smp_prepare_cpus(max_cpus, 0); 129 129 } 130 130 131 - static struct smp_operations mt81xx_tz_smp_ops __initdata = { 131 + static const struct smp_operations mt81xx_tz_smp_ops __initconst = { 132 132 .smp_prepare_cpus = mtk_tz_smp_prepare_cpus, 133 133 .smp_boot_secondary = mtk_boot_secondary, 134 134 }; 135 135 CPU_METHOD_OF_DECLARE(mt81xx_tz_smp, "mediatek,mt81xx-tz-smp", &mt81xx_tz_smp_ops); 136 136 137 - static struct smp_operations mt6589_smp_ops __initdata = { 137 + static const struct smp_operations mt6589_smp_ops __initconst = { 138 138 .smp_prepare_cpus = mtk_smp_prepare_cpus, 139 139 .smp_boot_secondary = mtk_boot_secondary, 140 140 };
+2 -1
arch/arm/mach-meson/Kconfig
··· 1 1 menuconfig ARCH_MESON 2 - bool "Amlogic Meson SoCs" if ARCH_MULTI_V7 2 + bool "Amlogic Meson SoCs" 3 + depends on ARCH_MULTI_V7 3 4 select ARCH_REQUIRE_GPIOLIB 4 5 select GENERIC_IRQ_CHIP 5 6 select ARM_GIC
+2 -1
arch/arm/mach-moxart/Kconfig
··· 1 1 menuconfig ARCH_MOXART 2 - bool "MOXA ART SoC" if ARCH_MULTI_V4 2 + bool "MOXA ART SoC" 3 + depends on ARCH_MULTI_V4 3 4 select CPU_FA526 4 5 select ARM_DMA_MEM_BUFFERABLE 5 6 select CLKSRC_MMIO
+16 -8
arch/arm/mach-mvebu/Kconfig
··· 1 1 menuconfig ARCH_MVEBU 2 - bool "Marvell Engineering Business Unit (MVEBU) SoCs" if (ARCH_MULTI_V7 || ARCH_MULTI_V5) 2 + bool "Marvell Engineering Business Unit (MVEBU) SoCs" 3 + depends on ARCH_MULTI_V7 || ARCH_MULTI_V5 3 4 select ARCH_SUPPORTS_BIG_ENDIAN 4 5 select CLKSRC_MMIO 5 6 select GENERIC_IRQ_CHIP ··· 26 25 select MACH_MVEBU_ANY 27 26 28 27 config MACH_ARMADA_370 29 - bool "Marvell Armada 370 boards" if ARCH_MULTI_V7 28 + bool "Marvell Armada 370 boards" 29 + depends on ARCH_MULTI_V7 30 30 select ARMADA_370_CLK 31 31 select CPU_PJ4B 32 32 select MACH_MVEBU_V7 ··· 37 35 on the Marvell Armada 370 SoC with device tree. 38 36 39 37 config MACH_ARMADA_375 40 - bool "Marvell Armada 375 boards" if ARCH_MULTI_V7 38 + bool "Marvell Armada 375 boards" 39 + depends on ARCH_MULTI_V7 41 40 select ARM_ERRATA_720789 42 41 select ARM_ERRATA_753970 43 42 select ARM_GIC ··· 53 50 on the Marvell Armada 375 SoC with device tree. 54 51 55 52 config MACH_ARMADA_38X 56 - bool "Marvell Armada 380/385 boards" if ARCH_MULTI_V7 53 + bool "Marvell Armada 380/385 boards" 54 + depends on ARCH_MULTI_V7 57 55 select ARM_ERRATA_720789 58 56 select ARM_ERRATA_753970 59 57 select ARM_GIC ··· 69 65 on the Marvell Armada 380/385 SoC with device tree. 70 66 71 67 config MACH_ARMADA_39X 72 - bool "Marvell Armada 39x boards" if ARCH_MULTI_V7 68 + bool "Marvell Armada 39x boards" 69 + depends on ARCH_MULTI_V7 73 70 select ARM_GIC 74 71 select ARMADA_39X_CLK 75 72 select CACHE_L2X0 ··· 84 79 on the Marvell Armada 39x SoC with device tree. 85 80 86 81 config MACH_ARMADA_XP 87 - bool "Marvell Armada XP boards" if ARCH_MULTI_V7 82 + bool "Marvell Armada XP boards" 83 + depends on ARCH_MULTI_V7 88 84 select ARMADA_XP_CLK 89 85 select CPU_PJ4B 90 86 select MACH_MVEBU_V7 ··· 95 89 on the Marvell Armada XP SoC with device tree. 96 90 97 91 config MACH_DOVE 98 - bool "Marvell Dove boards" if ARCH_MULTI_V7 92 + bool "Marvell Dove boards" 93 + depends on ARCH_MULTI_V7 99 94 select CACHE_L2X0 100 95 select CPU_PJ4 101 96 select DOVE_CLK ··· 110 103 Marvell Dove using flattened device tree. 111 104 112 105 config MACH_KIRKWOOD 113 - bool "Marvell Kirkwood boards" if ARCH_MULTI_V5 106 + bool "Marvell Kirkwood boards" 107 + depends on ARCH_MULTI_V5 114 108 select ARCH_REQUIRE_GPIOLIB 115 109 select CPU_FEROCEON 116 110 select KIRKWOOD_CLK
+1 -1
arch/arm/mach-mvebu/armada-370-xp.h
··· 17 17 18 18 #ifdef CONFIG_SMP 19 19 void armada_xp_secondary_startup(void); 20 - extern struct smp_operations armada_xp_smp_ops; 20 + extern const struct smp_operations armada_xp_smp_ops; 21 21 #endif 22 22 23 23 #endif /* __MACH_ARMADA_370_XP_H */
+2 -2
arch/arm/mach-mvebu/platsmp-a9.c
··· 93 93 } 94 94 #endif 95 95 96 - static struct smp_operations mvebu_cortex_a9_smp_ops __initdata = { 96 + static const struct smp_operations mvebu_cortex_a9_smp_ops __initconst = { 97 97 .smp_boot_secondary = mvebu_cortex_a9_boot_secondary, 98 98 }; 99 99 100 - static struct smp_operations armada_38x_smp_ops __initdata = { 100 + static const struct smp_operations armada_38x_smp_ops __initconst = { 101 101 .smp_boot_secondary = mvebu_cortex_a9_boot_secondary, 102 102 .smp_secondary_init = armada_38x_secondary_init, 103 103 #ifdef CONFIG_HOTPLUG_CPU
+1 -1
arch/arm/mach-mvebu/platsmp.c
··· 170 170 } 171 171 #endif 172 172 173 - struct smp_operations armada_xp_smp_ops __initdata = { 173 + const struct smp_operations armada_xp_smp_ops __initconst = { 174 174 .smp_init_cpus = armada_xp_smp_init_cpus, 175 175 .smp_prepare_cpus = armada_xp_smp_prepare_cpus, 176 176 .smp_boot_secondary = armada_xp_boot_secondary,
+1 -1
arch/arm/mach-omap2/common.h
··· 270 270 271 271 extern void omap4_cpu_die(unsigned int cpu); 272 272 273 - extern struct smp_operations omap4_smp_ops; 273 + extern const struct smp_operations omap4_smp_ops; 274 274 275 275 extern void omap5_secondary_startup(void); 276 276 extern void omap5_secondary_hyp_startup(void);
+1 -1
arch/arm/mach-omap2/omap-smp.c
··· 241 241 242 242 } 243 243 244 - struct smp_operations omap4_smp_ops __initdata = { 244 + const struct smp_operations omap4_smp_ops __initconst = { 245 245 .smp_init_cpus = omap4_smp_init_cpus, 246 246 .smp_prepare_cpus = omap4_smp_prepare_cpus, 247 247 .smp_secondary_init = omap4_secondary_init,
+2 -1
arch/arm/mach-picoxcell/Kconfig
··· 1 1 config ARCH_PICOXCELL 2 - bool "Picochip PicoXcell" if ARCH_MULTI_V6 2 + bool "Picochip PicoXcell" 3 + depends on ARCH_MULTI_V6 3 4 select ARCH_REQUIRE_GPIOLIB 4 5 select ARM_VIC 5 6 select DW_APB_TIMER_OF
+2 -1
arch/arm/mach-prima2/Kconfig
··· 1 1 menuconfig ARCH_SIRF 2 - bool "CSR SiRF" if ARCH_MULTI_V7 2 + bool "CSR SiRF" 3 + depends on ARCH_MULTI_V7 3 4 select ARCH_HAS_RESET_CONTROLLER 4 5 select ARCH_REQUIRE_GPIOLIB 5 6 select GENERIC_IRQ_CHIP
+1 -1
arch/arm/mach-prima2/common.h
··· 15 15 #include <asm/mach/time.h> 16 16 #include <asm/exception.h> 17 17 18 - extern struct smp_operations sirfsoc_smp_ops; 18 + extern const struct smp_operations sirfsoc_smp_ops; 19 19 extern void sirfsoc_secondary_startup(void); 20 20 extern void sirfsoc_cpu_die(unsigned int cpu); 21 21
+1 -1
arch/arm/mach-prima2/platsmp.c
··· 112 112 return pen_release != -1 ? -ENOSYS : 0; 113 113 } 114 114 115 - struct smp_operations sirfsoc_smp_ops __initdata = { 115 + const struct smp_operations sirfsoc_smp_ops __initconst = { 116 116 .smp_secondary_init = sirfsoc_secondary_init, 117 117 .smp_boot_secondary = sirfsoc_boot_secondary, 118 118 #ifdef CONFIG_HOTPLUG_CPU
+2 -1
arch/arm/mach-qcom/Kconfig
··· 1 1 menuconfig ARCH_QCOM 2 - bool "Qualcomm Support" if ARCH_MULTI_V7 2 + bool "Qualcomm Support" 3 + depends on ARCH_MULTI_V7 3 4 select ARCH_SUPPORTS_BIG_ENDIAN 4 5 select ARM_GIC 5 6 select ARM_AMBA
+3 -3
arch/arm/mach-qcom/platsmp.c
··· 332 332 } 333 333 } 334 334 335 - static struct smp_operations smp_msm8660_ops __initdata = { 335 + static const struct smp_operations smp_msm8660_ops __initconst = { 336 336 .smp_prepare_cpus = qcom_smp_prepare_cpus, 337 337 .smp_secondary_init = qcom_secondary_init, 338 338 .smp_boot_secondary = msm8660_boot_secondary, ··· 342 342 }; 343 343 CPU_METHOD_OF_DECLARE(qcom_smp, "qcom,gcc-msm8660", &smp_msm8660_ops); 344 344 345 - static struct smp_operations qcom_smp_kpssv1_ops __initdata = { 345 + static const struct smp_operations qcom_smp_kpssv1_ops __initconst = { 346 346 .smp_prepare_cpus = qcom_smp_prepare_cpus, 347 347 .smp_secondary_init = qcom_secondary_init, 348 348 .smp_boot_secondary = kpssv1_boot_secondary, ··· 352 352 }; 353 353 CPU_METHOD_OF_DECLARE(qcom_smp_kpssv1, "qcom,kpss-acc-v1", &qcom_smp_kpssv1_ops); 354 354 355 - static struct smp_operations qcom_smp_kpssv2_ops __initdata = { 355 + static const struct smp_operations qcom_smp_kpssv2_ops __initconst = { 356 356 .smp_prepare_cpus = qcom_smp_prepare_cpus, 357 357 .smp_secondary_init = qcom_secondary_init, 358 358 .smp_boot_secondary = kpssv2_boot_secondary,
+1 -1
arch/arm/mach-realview/core.h
··· 52 52 extern void realview_init_early(void); 53 53 extern void realview_fixup(struct tag *tags, char **from); 54 54 55 - extern struct smp_operations realview_smp_ops; 55 + extern const struct smp_operations realview_smp_ops; 56 56 extern void realview_cpu_die(unsigned int cpu); 57 57 58 58 #endif
+1 -1
arch/arm/mach-realview/platsmp.c
··· 75 75 __io_address(REALVIEW_SYS_FLAGSSET)); 76 76 } 77 77 78 - struct smp_operations realview_smp_ops __initdata = { 78 + const struct smp_operations realview_smp_ops __initconst = { 79 79 .smp_init_cpus = realview_smp_init_cpus, 80 80 .smp_prepare_cpus = realview_smp_prepare_cpus, 81 81 .smp_secondary_init = versatile_secondary_init,
+2 -1
arch/arm/mach-rockchip/Kconfig
··· 1 1 config ARCH_ROCKCHIP 2 - bool "Rockchip RK2928 and RK3xxx SOCs" if ARCH_MULTI_V7 2 + bool "Rockchip RK2928 and RK3xxx SOCs" 3 + depends on ARCH_MULTI_V7 3 4 select PINCTRL 4 5 select PINCTRL_ROCKCHIP 5 6 select ARCH_HAS_RESET_CONTROLLER
+1 -1
arch/arm/mach-rockchip/platsmp.c
··· 340 340 } 341 341 #endif 342 342 343 - static struct smp_operations rockchip_smp_ops __initdata = { 343 + static const struct smp_operations rockchip_smp_ops __initconst = { 344 344 .smp_prepare_cpus = rockchip_smp_prepare_cpus, 345 345 .smp_boot_secondary = rockchip_boot_secondary, 346 346 #ifdef CONFIG_HOTPLUG_CPU
+2 -1
arch/arm/mach-s5pv210/Kconfig
··· 8 8 # Configuration options for the S5PV210/S5PC110 9 9 10 10 config ARCH_S5PV210 11 - bool "Samsung S5PV210/S5PC110" if ARCH_MULTI_V7 11 + bool "Samsung S5PV210/S5PC110" 12 + depends on ARCH_MULTI_V7 12 13 select ARCH_HAS_HOLES_MEMORYMODEL 13 14 select ARCH_REQUIRE_GPIOLIB 14 15 select ARM_VIC
+2 -2
arch/arm/mach-shmobile/Kconfig
··· 30 30 select SYS_SUPPORTS_SH_TMU 31 31 32 32 menuconfig ARCH_SHMOBILE_MULTI 33 - bool "Renesas ARM SoCs" if ARCH_MULTI_V7 34 - depends on MMU 33 + bool "Renesas ARM SoCs" 34 + depends on ARCH_MULTI_V7 && MMU 35 35 select ARCH_SHMOBILE 36 36 select HAVE_ARM_SCU if SMP 37 37 select HAVE_ARM_TWD if SMP
+1 -1
arch/arm/mach-shmobile/r8a7779.h
··· 3 3 4 4 extern void r8a7779_pm_init(void); 5 5 6 - extern struct smp_operations r8a7779_smp_ops; 6 + extern const struct smp_operations r8a7779_smp_ops; 7 7 8 8 #endif /* __ASM_R8A7779_H__ */
+1 -1
arch/arm/mach-shmobile/r8a7790.h
··· 1 1 #ifndef __ASM_R8A7790_H__ 2 2 #define __ASM_R8A7790_H__ 3 3 4 - extern struct smp_operations r8a7790_smp_ops; 4 + extern const struct smp_operations r8a7790_smp_ops; 5 5 6 6 #endif /* __ASM_R8A7790_H__ */
+1 -1
arch/arm/mach-shmobile/r8a7791.h
··· 1 1 #ifndef __ASM_R8A7791_H__ 2 2 #define __ASM_R8A7791_H__ 3 3 4 - extern struct smp_operations r8a7791_smp_ops; 4 + extern const struct smp_operations r8a7791_smp_ops; 5 5 6 6 #endif /* __ASM_R8A7791_H__ */
+1 -1
arch/arm/mach-shmobile/setup-emev2.c
··· 42 42 NULL, 43 43 }; 44 44 45 - extern struct smp_operations emev2_smp_ops; 45 + extern const struct smp_operations emev2_smp_ops; 46 46 47 47 DT_MACHINE_START(EMEV2_DT, "Generic Emma Mobile EV2 (Flattened Device Tree)") 48 48 .smp = smp_ops(emev2_smp_ops),
+1 -1
arch/arm/mach-shmobile/sh73a0.h
··· 1 1 #ifndef __ASM_SH73A0_H__ 2 2 #define __ASM_SH73A0_H__ 3 3 4 - extern struct smp_operations sh73a0_smp_ops; 4 + extern const struct smp_operations sh73a0_smp_ops; 5 5 6 6 #endif /* __ASM_SH73A0_H__ */
+1 -1
arch/arm/mach-shmobile/smp-emev2.c
··· 49 49 shmobile_smp_scu_prepare_cpus(max_cpus); 50 50 } 51 51 52 - struct smp_operations emev2_smp_ops __initdata = { 52 + const struct smp_operations emev2_smp_ops __initconst = { 53 53 .smp_prepare_cpus = emev2_smp_prepare_cpus, 54 54 .smp_boot_secondary = emev2_boot_secondary, 55 55 };
+1 -1
arch/arm/mach-shmobile/smp-r8a7779.c
··· 117 117 } 118 118 #endif /* CONFIG_HOTPLUG_CPU */ 119 119 120 - struct smp_operations r8a7779_smp_ops __initdata = { 120 + const struct smp_operations r8a7779_smp_ops __initconst = { 121 121 .smp_prepare_cpus = r8a7779_smp_prepare_cpus, 122 122 .smp_boot_secondary = r8a7779_boot_secondary, 123 123 #ifdef CONFIG_HOTPLUG_CPU
+1 -1
arch/arm/mach-shmobile/smp-r8a7790.c
··· 60 60 rcar_sysc_power_up(&r8a7790_ca7_scu); 61 61 } 62 62 63 - struct smp_operations r8a7790_smp_ops __initdata = { 63 + const struct smp_operations r8a7790_smp_ops __initconst = { 64 64 .smp_prepare_cpus = r8a7790_smp_prepare_cpus, 65 65 .smp_boot_secondary = shmobile_smp_apmu_boot_secondary, 66 66 #ifdef CONFIG_HOTPLUG_CPU
+1 -1
arch/arm/mach-shmobile/smp-r8a7791.c
··· 54 54 return shmobile_smp_apmu_boot_secondary(cpu, idle); 55 55 } 56 56 57 - struct smp_operations r8a7791_smp_ops __initdata = { 57 + const struct smp_operations r8a7791_smp_ops __initconst = { 58 58 .smp_prepare_cpus = r8a7791_smp_prepare_cpus, 59 59 .smp_boot_secondary = r8a7791_smp_boot_secondary, 60 60 #ifdef CONFIG_HOTPLUG_CPU
+1 -1
arch/arm/mach-shmobile/smp-sh73a0.c
··· 56 56 shmobile_smp_scu_prepare_cpus(max_cpus); 57 57 } 58 58 59 - struct smp_operations sh73a0_smp_ops __initdata = { 59 + const struct smp_operations sh73a0_smp_ops __initconst = { 60 60 .smp_prepare_cpus = sh73a0_smp_prepare_cpus, 61 61 .smp_boot_secondary = sh73a0_boot_secondary, 62 62 #ifdef CONFIG_HOTPLUG_CPU
+2 -1
arch/arm/mach-socfpga/Kconfig
··· 1 1 menuconfig ARCH_SOCFPGA 2 - bool "Altera SOCFPGA family" if ARCH_MULTI_V7 2 + bool "Altera SOCFPGA family" 3 + depends on ARCH_MULTI_V7 3 4 select ARCH_SUPPORTS_BIG_ENDIAN 4 5 select ARM_AMBA 5 6 select ARM_GIC
+2 -2
arch/arm/mach-socfpga/platsmp.c
··· 117 117 return 1; 118 118 } 119 119 120 - static struct smp_operations socfpga_smp_ops __initdata = { 120 + static const struct smp_operations socfpga_smp_ops __initconst = { 121 121 .smp_prepare_cpus = socfpga_smp_prepare_cpus, 122 122 .smp_boot_secondary = socfpga_boot_secondary, 123 123 #ifdef CONFIG_HOTPLUG_CPU ··· 126 126 #endif 127 127 }; 128 128 129 - static struct smp_operations socfpga_a10_smp_ops __initdata = { 129 + static const struct smp_operations socfpga_a10_smp_ops __initconst = { 130 130 .smp_prepare_cpus = socfpga_smp_prepare_cpus, 131 131 .smp_boot_secondary = socfpga_a10_boot_secondary, 132 132 #ifdef CONFIG_HOTPLUG_CPU
+2 -1
arch/arm/mach-spear/Kconfig
··· 3 3 # 4 4 5 5 menuconfig PLAT_SPEAR 6 - bool "ST SPEAr Family" if ARCH_MULTI_V7 || ARCH_MULTI_V5 6 + bool "ST SPEAr Family" 7 + depends on ARCH_MULTI_V7 || ARCH_MULTI_V5 7 8 select ARCH_REQUIRE_GPIOLIB 8 9 select ARM_AMBA 9 10 select CLKSRC_MMIO
+1 -1
arch/arm/mach-spear/generic.h
··· 39 39 void spear13xx_secondary_startup(void); 40 40 void spear13xx_cpu_die(unsigned int cpu); 41 41 42 - extern struct smp_operations spear13xx_smp_ops; 42 + extern const struct smp_operations spear13xx_smp_ops; 43 43 44 44 #ifdef CONFIG_MACH_SPEAR1310 45 45 void __init spear1310_clk_init(void __iomem *misc_base, void __iomem *ras_base);
+1 -1
arch/arm/mach-spear/platsmp.c
··· 120 120 __raw_writel(virt_to_phys(spear13xx_secondary_startup), SYS_LOCATION); 121 121 } 122 122 123 - struct smp_operations spear13xx_smp_ops __initdata = { 123 + const struct smp_operations spear13xx_smp_ops __initconst = { 124 124 .smp_init_cpus = spear13xx_smp_init_cpus, 125 125 .smp_prepare_cpus = spear13xx_smp_prepare_cpus, 126 126 .smp_secondary_init = spear13xx_secondary_init,
+2 -1
arch/arm/mach-sti/Kconfig
··· 1 1 menuconfig ARCH_STI 2 - bool "STMicroelectronics Consumer Electronics SOCs" if ARCH_MULTI_V7 2 + bool "STMicroelectronics Consumer Electronics SOCs" 3 + depends on ARCH_MULTI_V7 3 4 select ARM_GIC 4 5 select ST_IRQCHIP 5 6 select ARM_GLOBAL_TIMER
+1 -1
arch/arm/mach-sti/platsmp.c
··· 156 156 } 157 157 } 158 158 159 - struct smp_operations __initdata sti_smp_ops = { 159 + const struct smp_operations sti_smp_ops __initconst = { 160 160 .smp_prepare_cpus = sti_smp_prepare_cpus, 161 161 .smp_secondary_init = sti_secondary_init, 162 162 .smp_boot_secondary = sti_boot_secondary,
+1 -1
arch/arm/mach-sti/smp.h
··· 12 12 #ifndef __MACH_STI_SMP_H 13 13 #define __MACH_STI_SMP_H 14 14 15 - extern struct smp_operations sti_smp_ops; 15 + extern const struct smp_operations sti_smp_ops; 16 16 17 17 void sti_secondary_startup(void); 18 18
+2 -1
arch/arm/mach-sunxi/Kconfig
··· 1 1 menuconfig ARCH_SUNXI 2 - bool "Allwinner SoCs" if ARCH_MULTI_V7 2 + bool "Allwinner SoCs" 3 + depends on ARCH_MULTI_V7 3 4 select ARCH_REQUIRE_GPIOLIB 4 5 select ARCH_HAS_RESET_CONTROLLER 5 6 select CLKSRC_MMIO
+2 -2
arch/arm/mach-sunxi/platsmp.c
··· 116 116 return 0; 117 117 } 118 118 119 - static struct smp_operations sun6i_smp_ops __initdata = { 119 + static const struct smp_operations sun6i_smp_ops __initconst = { 120 120 .smp_prepare_cpus = sun6i_smp_prepare_cpus, 121 121 .smp_boot_secondary = sun6i_smp_boot_secondary, 122 122 }; ··· 185 185 return 0; 186 186 } 187 187 188 - struct smp_operations sun8i_smp_ops __initdata = { 188 + static const struct smp_operations sun8i_smp_ops __initconst = { 189 189 .smp_prepare_cpus = sun8i_smp_prepare_cpus, 190 190 .smp_boot_secondary = sun8i_smp_boot_secondary, 191 191 };
+2 -1
arch/arm/mach-tegra/Kconfig
··· 1 1 menuconfig ARCH_TEGRA 2 - bool "NVIDIA Tegra" if ARCH_MULTI_V7 2 + bool "NVIDIA Tegra" 3 + depends on ARCH_MULTI_V7 3 4 select ARCH_REQUIRE_GPIOLIB 4 5 select ARCH_SUPPORTS_TRUSTED_FOUNDATIONS 5 6 select ARM_AMBA
+1 -1
arch/arm/mach-tegra/common.h
··· 1 - extern struct smp_operations tegra_smp_ops; 1 + extern const struct smp_operations tegra_smp_ops; 2 2 3 3 extern int tegra_cpu_kill(unsigned int cpu); 4 4 extern void tegra_cpu_die(unsigned int cpu);
+1 -1
arch/arm/mach-tegra/platsmp.c
··· 192 192 scu_enable(IO_ADDRESS(scu_a9_get_base())); 193 193 } 194 194 195 - struct smp_operations tegra_smp_ops __initdata = { 195 + const struct smp_operations tegra_smp_ops __initconst = { 196 196 .smp_prepare_cpus = tegra_smp_prepare_cpus, 197 197 .smp_secondary_init = tegra_secondary_init, 198 198 .smp_boot_secondary = tegra_boot_secondary,
+2 -2
arch/arm/mach-u300/Kconfig
··· 1 1 menuconfig ARCH_U300 2 - bool "ST-Ericsson U300 Series" if ARCH_MULTI_V5 3 - depends on MMU 2 + bool "ST-Ericsson U300 Series" 3 + depends on ARCH_MULTI_V5 && MMU 4 4 select ARCH_REQUIRE_GPIOLIB 5 5 select ARM_AMBA 6 6 select ARM_VIC
+1 -1
arch/arm/mach-uniphier/platsmp.c
··· 201 201 return 0; 202 202 } 203 203 204 - static struct smp_operations uniphier_smp_ops __initdata = { 204 + static const struct smp_operations uniphier_smp_ops __initconst = { 205 205 .smp_prepare_cpus = uniphier_smp_prepare_cpus, 206 206 .smp_boot_secondary = uniphier_smp_boot_secondary, 207 207 };
+2 -2
arch/arm/mach-ux500/Kconfig
··· 1 1 menuconfig ARCH_U8500 2 - bool "ST-Ericsson U8500 Series" if ARCH_MULTI_V7 3 - depends on MMU 2 + bool "ST-Ericsson U8500 Series" 3 + depends on ARCH_MULTI_V7 && MMU 4 4 select AB8500_CORE 5 5 select ABX500_CORE 6 6 select ARCH_REQUIRE_GPIOLIB
+1 -1
arch/arm/mach-ux500/Makefile
··· 2 2 # Makefile for the linux kernel, U8500 machine. 3 3 # 4 4 5 - obj-y := cpu.o id.o timer.o pm.o 5 + obj-y := cpu.o id.o pm.o 6 6 obj-$(CONFIG_CACHE_L2X0) += cache-l2x0.o 7 7 obj-$(CONFIG_UX500_SOC_DB8500) += cpu-db8500.o 8 8 obj-$(CONFIG_MACH_MOP500) += board-mop500-regulators.o \
-2
arch/arm/mach-ux500/cpu-db8500.c
··· 156 156 DT_MACHINE_START(U8500_DT, "ST-Ericsson Ux5x0 platform (Device Tree Support)") 157 157 .map_io = u8500_map_io, 158 158 .init_irq = ux500_init_irq, 159 - /* we re-use nomadik timer here */ 160 - .init_time = ux500_timer_init, 161 159 .init_machine = u8500_init_machine, 162 160 .init_late = NULL, 163 161 .dt_compat = stericsson_dt_platform_compat,
-1
arch/arm/mach-ux500/cpu.c
··· 9 9 #include <linux/platform_device.h> 10 10 #include <linux/io.h> 11 11 #include <linux/mfd/dbx500-prcmu.h> 12 - #include <linux/clksrc-dbx500-prcmu.h> 13 12 #include <linux/sys_soc.h> 14 13 #include <linux/err.h> 15 14 #include <linux/slab.h>
+1 -1
arch/arm/mach-ux500/platsmp.c
··· 98 98 return 0; 99 99 } 100 100 101 - struct smp_operations ux500_smp_ops __initdata = { 101 + static const struct smp_operations ux500_smp_ops __initconst = { 102 102 .smp_prepare_cpus = ux500_smp_prepare_cpus, 103 103 .smp_boot_secondary = ux500_boot_secondary, 104 104 #ifdef CONFIG_HOTPLUG_CPU
-3
arch/arm/mach-ux500/setup.h
··· 12 12 #define __ASM_ARCH_SETUP_H 13 13 14 14 #include <asm/mach/arch.h> 15 - #include <asm/mach/time.h> 16 15 #include <linux/init.h> 17 16 #include <linux/mfd/abx500/ab8500.h> 18 17 ··· 22 23 extern void __init ux500_init_irq(void); 23 24 24 25 extern struct device *ux500_soc_device_init(const char *soc_id); 25 - 26 - extern void ux500_timer_init(void); 27 26 28 27 extern void ux500_cpu_die(unsigned int cpu); 29 28
-48
arch/arm/mach-ux500/timer.c
··· 1 - /* 2 - * Copyright (C) ST-Ericsson SA 2011 3 - * 4 - * License Terms: GNU General Public License v2 5 - * Author: Mattias Wallin <mattias.wallin@stericsson.com> for ST-Ericsson 6 - */ 7 - #include <linux/io.h> 8 - #include <linux/errno.h> 9 - #include <linux/clksrc-dbx500-prcmu.h> 10 - #include <linux/clocksource.h> 11 - #include <linux/of.h> 12 - #include <linux/of_address.h> 13 - 14 - #include "setup.h" 15 - 16 - #include "db8500-regs.h" 17 - #include "id.h" 18 - 19 - static const struct of_device_id prcmu_timer_of_match[] __initconst = { 20 - { .compatible = "stericsson,db8500-prcmu-timer-4", }, 21 - { }, 22 - }; 23 - 24 - void __init ux500_timer_init(void) 25 - { 26 - void __iomem *prcmu_timer_base; 27 - void __iomem *tmp_base; 28 - struct device_node *np; 29 - 30 - if (cpu_is_u8500_family() || cpu_is_ux540_family()) 31 - prcmu_timer_base = __io_address(U8500_PRCMU_TIMER_4_BASE); 32 - else 33 - ux500_unknown_soc(); 34 - 35 - np = of_find_matching_node(NULL, prcmu_timer_of_match); 36 - if (!np) 37 - goto dt_fail; 38 - 39 - tmp_base = of_iomap(np, 0); 40 - if (!tmp_base) 41 - goto dt_fail; 42 - 43 - prcmu_timer_base = tmp_base; 44 - 45 - dt_fail: 46 - clksrc_dbx500_prcmu_init(prcmu_timer_base); 47 - clocksource_probe(); 48 - }
+2 -1
arch/arm/mach-vexpress/Kconfig
··· 1 1 menuconfig ARCH_VEXPRESS 2 - bool "ARM Ltd. Versatile Express family" if ARCH_MULTI_V7 2 + bool "ARM Ltd. Versatile Express family" 3 + depends on ARCH_MULTI_V7 3 4 select ARCH_REQUIRE_GPIOLIB 4 5 select ARCH_SUPPORTS_BIG_ENDIAN 5 6 select ARM_AMBA
+1 -1
arch/arm/mach-vexpress/core.h
··· 1 1 bool vexpress_smp_init_ops(void); 2 2 3 - extern struct smp_operations vexpress_smp_dt_ops; 3 + extern const struct smp_operations vexpress_smp_dt_ops; 4 4 5 5 extern void vexpress_cpu_die(unsigned int cpu);
+1 -1
arch/arm/mach-vexpress/platsmp.c
··· 64 64 vexpress_flags_set(virt_to_phys(versatile_secondary_startup)); 65 65 } 66 66 67 - struct smp_operations __initdata vexpress_smp_dt_ops = { 67 + const struct smp_operations vexpress_smp_dt_ops __initconst = { 68 68 .smp_prepare_cpus = vexpress_smp_dt_prepare_cpus, 69 69 .smp_secondary_init = versatile_secondary_init, 70 70 .smp_boot_secondary = versatile_boot_secondary,
+2 -1
arch/arm/mach-zx/Kconfig
··· 1 1 menuconfig ARCH_ZX 2 - bool "ZTE ZX family" if ARCH_MULTI_V7 2 + bool "ZTE ZX family" 3 + depends on ARCH_MULTI_V7 3 4 help 4 5 Support for ZTE ZX-based family of processors. TV 5 6 set-top-box processor is supported. More will be
+1 -1
arch/arm/mach-zx/platsmp.c
··· 176 176 scu_power_mode(scu_base, SCU_PM_NORMAL); 177 177 } 178 178 179 - struct smp_operations zx_smp_ops __initdata = { 179 + static const struct smp_operations zx_smp_ops __initconst = { 180 180 .smp_prepare_cpus = zx_smp_prepare_cpus, 181 181 .smp_secondary_init = zx_secondary_init, 182 182 .smp_boot_secondary = zx_boot_secondary,
+2 -1
arch/arm/mach-zynq/Kconfig
··· 1 1 config ARCH_ZYNQ 2 - bool "Xilinx Zynq ARM Cortex A9 Platform" if ARCH_MULTI_V7 2 + bool "Xilinx Zynq ARM Cortex A9 Platform" 3 + depends on ARCH_MULTI_V7 3 4 select ARCH_SUPPORTS_BIG_ENDIAN 4 5 select ARM_AMBA 5 6 select ARM_GIC
+1 -1
arch/arm/mach-zynq/common.h
··· 30 30 extern char zynq_secondary_trampoline_jump; 31 31 extern char zynq_secondary_trampoline_end; 32 32 extern int zynq_cpun_start(u32 address, int cpu); 33 - extern struct smp_operations zynq_smp_ops __initdata; 33 + extern const struct smp_operations zynq_smp_ops; 34 34 #endif 35 35 36 36 extern void __iomem *zynq_scu_base;
+1 -1
arch/arm/mach-zynq/platsmp.c
··· 157 157 } 158 158 #endif 159 159 160 - struct smp_operations zynq_smp_ops __initdata = { 160 + const struct smp_operations zynq_smp_ops __initconst = { 161 161 .smp_init_cpus = zynq_smp_init_cpus, 162 162 .smp_prepare_cpus = zynq_smp_prepare_cpus, 163 163 .smp_boot_secondary = zynq_boot_secondary,
+6 -3
drivers/clocksource/clksrc-dbx500-prcmu.c
··· 12 12 * power domain. We use the Timer 4 for our always-on clock 13 13 * source on DB8500. 14 14 */ 15 + #include <linux/of.h> 16 + #include <linux/of_address.h> 15 17 #include <linux/clockchips.h> 16 - #include <linux/clksrc-dbx500-prcmu.h> 17 18 #include <linux/sched_clock.h> 18 19 19 20 #define RATE_32K 32768 ··· 64 63 65 64 #endif 66 65 67 - void __init clksrc_dbx500_prcmu_init(void __iomem *base) 66 + static void __init clksrc_dbx500_prcmu_init(struct device_node *node) 68 67 { 69 - clksrc_dbx500_timer_base = base; 68 + clksrc_dbx500_timer_base = of_iomap(node, 0); 70 69 71 70 /* 72 71 * The A9 sub system expects the timer to be configured as ··· 86 85 #endif 87 86 clocksource_register_hz(&clocksource_dbx500_prcmu, RATE_32K); 88 87 } 88 + CLOCKSOURCE_OF_DECLARE(dbx500_prcmu, "stericsson,db8500-prcmu-timer-4", 89 + clksrc_dbx500_prcmu_init);
-20
include/linux/clksrc-dbx500-prcmu.h
··· 1 - /* 2 - * Copyright (C) ST-Ericsson SA 2011 3 - * 4 - * License Terms: GNU General Public License v2 5 - * Author: Mattias Wallin <mattias.wallin@stericsson.com> 6 - * 7 - */ 8 - #ifndef __CLKSRC_DBX500_PRCMU_H 9 - #define __CLKSRC_DBX500_PRCMU_H 10 - 11 - #include <linux/init.h> 12 - #include <linux/io.h> 13 - 14 - #ifdef CONFIG_CLKSRC_DBX500_PRCMU 15 - void __init clksrc_dbx500_prcmu_init(void __iomem *base); 16 - #else 17 - static inline void __init clksrc_dbx500_prcmu_init(void __iomem *base) {} 18 - #endif 19 - 20 - #endif