[ARM] 4517/1: S3C: Fix debug macros for ARM926 output

Check for ARM926 based S3C24XX based devices as these
only have 64 byte FIFOs, and do not have the model
detection refisters in the same place as the ARM920
based CPUs

Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

authored by Ben Dooks and committed by Russell King 1197b4cd 5c49218a

+7
+7
include/asm-arm/arch-s3c2410/debug-macro.S
··· 58 58 /* fifo level reading */ 59 59 60 60 .macro fifo_level_s3c24xx rd, rx 61 + @ check for arm920 vs arm926. currently assume all arm926 62 + @ devices have an 64 byte FIFO identical to the s3c2440 63 + mrc p15, 0, \rd, c0, c0 64 + and \rd, \rd, #0xff0 65 + teq \rd, #0x260 66 + beq 10000f 61 67 mrc p15, 0, \rd, c1, c0 62 68 tst \rd, #1 63 69 addeq \rd, \rx, #(S3C24XX_PA_GPIO - S3C24XX_PA_UART) ··· 73 67 and \rd, \rd, #0x00ff0000 74 68 teq \rd, #0x00440000 @ is it 2440? 75 69 70 + 10000: 76 71 ldr \rd, [ \rx, # S3C2410_UFSTAT ] 77 72 andne \rd, \rd, #S3C2410_UFSTAT_TXMASK 78 73 andeq \rd, \rd, #S3C2440_UFSTAT_TXMASK