tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
gpio: loongson1: use new generic GPIO chip API
Convert the driver to using the new generic GPIO chip interfaces from
linux/gpio/generic.h.
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20250910-gpio-mmio-gpio-conv-part4-v2-2-f3d1a4c57124@linaro.org
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
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drivers/gpio/gpio-loongson1.c
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drivers/gpio/gpio-loongson1.c
···
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* Copyright (C) 2015-2023 Keguang Zhang <keguang.zhang@gmail.com>
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*/
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#include <linux/bitops.h>
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#include <linux/module.h>
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#include <linux/gpio/driver.h>
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#include <linux/gpio/generic.h>
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#include <linux/platform_device.h>
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#include <linux/bitops.h>
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/* Loongson 1 GPIO Register Definitions */
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#define GPIO_CFG 0x0
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#define GPIO_OUTPUT 0x30
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struct ls1x_gpio_chip {
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struct gpio_chip gc;
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struct gpio_generic_chip chip;
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void __iomem *reg_base;
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};
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static int ls1x_gpio_request(struct gpio_chip *gc, unsigned int offset)
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{
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struct ls1x_gpio_chip *ls1x_gc = gpiochip_get_data(gc);
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unsigned long flags;
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raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
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guard(gpio_generic_lock_irqsave)(&ls1x_gc->chip);
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__raw_writel(__raw_readl(ls1x_gc->reg_base + GPIO_CFG) | BIT(offset),
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ls1x_gc->reg_base + GPIO_CFG);
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raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
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return 0;
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}
···
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static void ls1x_gpio_free(struct gpio_chip *gc, unsigned int offset)
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{
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struct ls1x_gpio_chip *ls1x_gc = gpiochip_get_data(gc);
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unsigned long flags;
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raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
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guard(gpio_generic_lock_irqsave)(&ls1x_gc->chip);
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__raw_writel(__raw_readl(ls1x_gc->reg_base + GPIO_CFG) & ~BIT(offset),
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ls1x_gc->reg_base + GPIO_CFG);
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raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
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}
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static int ls1x_gpio_probe(struct platform_device *pdev)
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{
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struct gpio_generic_chip_config config;
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struct device *dev = &pdev->dev;
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struct ls1x_gpio_chip *ls1x_gc;
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int ret;
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if (IS_ERR(ls1x_gc->reg_base))
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return PTR_ERR(ls1x_gc->reg_base);
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ret = bgpio_init(&ls1x_gc->gc, dev, 4, ls1x_gc->reg_base + GPIO_DATA,
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ls1x_gc->reg_base + GPIO_OUTPUT, NULL,
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NULL, ls1x_gc->reg_base + GPIO_DIR, 0);
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config = (struct gpio_generic_chip_config) {
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.dev = dev,
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.sz = 4,
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.dat = ls1x_gc->reg_base + GPIO_DATA,
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.set = ls1x_gc->reg_base + GPIO_OUTPUT,
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.dirin = ls1x_gc->reg_base + GPIO_DIR,
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};
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ret = gpio_generic_chip_init(&ls1x_gc->chip, &config);
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if (ret)
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goto err;
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ls1x_gc->gc.owner = THIS_MODULE;
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ls1x_gc->gc.request = ls1x_gpio_request;
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ls1x_gc->gc.free = ls1x_gpio_free;
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ls1x_gc->chip.gc.owner = THIS_MODULE;
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ls1x_gc->chip.gc.request = ls1x_gpio_request;
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ls1x_gc->chip.gc.free = ls1x_gpio_free;
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/*
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* Clear ngpio to let gpiolib get the correct number
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* by reading ngpios property
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*/
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ls1x_gc->gc.ngpio = 0;
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ls1x_gc->chip.gc.ngpio = 0;
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ret = devm_gpiochip_add_data(dev, &ls1x_gc->gc, ls1x_gc);
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ret = devm_gpiochip_add_data(dev, &ls1x_gc->chip.gc, ls1x_gc);
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if (ret)
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goto err;
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platform_set_drvdata(pdev, ls1x_gc);
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dev_info(dev, "GPIO controller registered with %d pins\n",
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ls1x_gc->gc.ngpio);
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ls1x_gc->chip.gc.ngpio);
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return 0;
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err: