Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'rproc-v6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux

Pull remoteproc updates from Bjorn Andersson:

- Make the Xilinx remoteproc driver support running on only a single
core, disable still unsupported remoteproc features, and stop the
remoteproc on shutdown to facilitate kexec.

- Conclude the renaming of the Qualcomm ADSP driver to "PAS" that was
started many years ago.

* tag 'rproc-v6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/remoteproc/linux:
remoteproc: xlnx: Fix kernel-doc warnings
remoteproc: xlnx: Disable unsupported features
remoteproc: xlnx: Add shutdown callback
remoteproc: xlnx: Allow single core use in split mode
dt-bindings: remoteproc: qcom,sa8775p-pas: Correct the interrupt number
remoteproc: Don't use %pK through printk
dt-bindings: remoteproc: qcom,sm8150-pas: Document QCS615 remoteproc
remoteproc: qcom: pas: Conclude the rename from adsp

+418 -367
+1 -1
Documentation/devicetree/bindings/remoteproc/qcom,sa8775p-pas.yaml
··· 144 144 145 145 interrupts-extended = <&pdc 6 IRQ_TYPE_EDGE_RISING>, 146 146 <&smp2p_adsp_in 0 IRQ_TYPE_EDGE_RISING>, 147 - <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, 148 147 <&smp2p_adsp_in 1 IRQ_TYPE_EDGE_RISING>, 148 + <&smp2p_adsp_in 2 IRQ_TYPE_EDGE_RISING>, 149 149 <&smp2p_adsp_in 3 IRQ_TYPE_EDGE_RISING>; 150 150 interrupt-names = "wdog", "fatal", "ready", "handover", "stop-ack"; 151 151
+38 -27
Documentation/devicetree/bindings/remoteproc/qcom,sm8150-pas.yaml
··· 15 15 16 16 properties: 17 17 compatible: 18 - enum: 19 - - qcom,sc8180x-adsp-pas 20 - - qcom,sc8180x-cdsp-pas 21 - - qcom,sc8180x-slpi-pas 22 - - qcom,sm8150-adsp-pas 23 - - qcom,sm8150-cdsp-pas 24 - - qcom,sm8150-mpss-pas 25 - - qcom,sm8150-slpi-pas 26 - - qcom,sm8250-adsp-pas 27 - - qcom,sm8250-cdsp-pas 28 - - qcom,sm8250-slpi-pas 18 + oneOf: 19 + - items: 20 + - enum: 21 + - qcom,qcs615-adsp-pas 22 + - const: qcom,sm8150-adsp-pas 23 + - items: 24 + - enum: 25 + - qcom,qcs615-cdsp-pas 26 + - const: qcom,sm8150-cdsp-pas 27 + - enum: 28 + - qcom,sc8180x-adsp-pas 29 + - qcom,sc8180x-cdsp-pas 30 + - qcom,sc8180x-slpi-pas 31 + - qcom,sm8150-adsp-pas 32 + - qcom,sm8150-cdsp-pas 33 + - qcom,sm8150-mpss-pas 34 + - qcom,sm8150-slpi-pas 35 + - qcom,sm8250-adsp-pas 36 + - qcom,sm8250-cdsp-pas 37 + - qcom,sm8250-slpi-pas 29 38 30 39 reg: 31 40 maxItems: 1 ··· 71 62 - if: 72 63 properties: 73 64 compatible: 74 - enum: 75 - - qcom,sc8180x-adsp-pas 76 - - qcom,sc8180x-cdsp-pas 77 - - qcom,sc8180x-slpi-pas 78 - - qcom,sm8150-adsp-pas 79 - - qcom,sm8150-cdsp-pas 80 - - qcom,sm8150-slpi-pas 81 - - qcom,sm8250-adsp-pas 82 - - qcom,sm8250-cdsp-pas 83 - - qcom,sm8250-slpi-pas 65 + contains: 66 + enum: 67 + - qcom,sc8180x-adsp-pas 68 + - qcom,sc8180x-cdsp-pas 69 + - qcom,sc8180x-slpi-pas 70 + - qcom,sm8150-adsp-pas 71 + - qcom,sm8150-cdsp-pas 72 + - qcom,sm8150-slpi-pas 73 + - qcom,sm8250-adsp-pas 74 + - qcom,sm8250-cdsp-pas 75 + - qcom,sm8250-slpi-pas 84 76 then: 85 77 properties: 86 78 interrupts: ··· 98 88 - if: 99 89 properties: 100 90 compatible: 101 - enum: 102 - - qcom,sc8180x-adsp-pas 103 - - qcom,sc8180x-cdsp-pas 104 - - qcom,sm8150-adsp-pas 105 - - qcom,sm8150-cdsp-pas 106 - - qcom,sm8250-cdsp-pas 91 + contains: 92 + enum: 93 + - qcom,sc8180x-adsp-pas 94 + - qcom,sc8180x-cdsp-pas 95 + - qcom,sm8150-adsp-pas 96 + - qcom,sm8150-cdsp-pas 97 + - qcom,sm8250-cdsp-pas 107 98 then: 108 99 properties: 109 100 power-domains:
+5 -6
drivers/remoteproc/Kconfig
··· 214 214 handled by QCOM_Q6V5_PAS driver. 215 215 216 216 config QCOM_Q6V5_PAS 217 - tristate "Qualcomm Hexagon v5 Peripheral Authentication Service support" 217 + tristate "Qualcomm Peripheral Authentication Service support" 218 218 depends on OF && ARCH_QCOM 219 219 depends on QCOM_SMEM 220 220 depends on RPMSG_QCOM_SMD || RPMSG_QCOM_SMD=n ··· 229 229 select QCOM_RPROC_COMMON 230 230 select QCOM_SCM 231 231 help 232 - Say y here to support the TrustZone based Peripheral Image Loader 233 - for the Qualcomm Hexagon v5 based remote processors. This is commonly 234 - used to control subsystems such as ADSP (Audio DSP), 235 - CDSP (Compute DSP), MPSS (Modem Peripheral SubSystem), and 236 - SLPI (Sensor Low Power Island). 232 + Say y here to support the TrustZone based Peripheral Image Loader for 233 + the Qualcomm remote processors. This is commonly used to control 234 + subsystems such as ADSP (Audio DSP), CDSP (Compute DSP), MPSS (Modem 235 + Peripheral SubSystem), and SLPI (Sensor Low Power Island). 237 236 238 237 config QCOM_Q6V5_WCSS 239 238 tristate "Qualcomm Hexagon based WCSS Peripheral Image Loader"
+1 -1
drivers/remoteproc/omap_remoteproc.c
··· 1211 1211 oproc->mem[i].dev_addr = data->mems[i].dev_addr; 1212 1212 oproc->mem[i].size = resource_size(res); 1213 1213 1214 - dev_dbg(dev, "memory %8s: bus addr %pa size 0x%x va %pK da 0x%x\n", 1214 + dev_dbg(dev, "memory %8s: bus addr %pa size 0x%x va %p da 0x%x\n", 1215 1215 data->mems[i].name, &oproc->mem[i].bus_addr, 1216 1216 oproc->mem[i].size, oproc->mem[i].cpu_addr, 1217 1217 oproc->mem[i].dev_addr);
+1 -1
drivers/remoteproc/pru_rproc.c
··· 1055 1055 pru->mem_regions[i].pa = res->start; 1056 1056 pru->mem_regions[i].size = resource_size(res); 1057 1057 1058 - dev_dbg(dev, "memory %8s: pa %pa size 0x%zx va %pK\n", 1058 + dev_dbg(dev, "memory %8s: pa %pa size 0x%zx va %p\n", 1059 1059 mem_names[i], &pru->mem_regions[i].pa, 1060 1060 pru->mem_regions[i].size, pru->mem_regions[i].va); 1061 1061 }
+305 -310
drivers/remoteproc/qcom_q6v5_pas.c
··· 1 1 // SPDX-License-Identifier: GPL-2.0-only 2 2 /* 3 - * Qualcomm ADSP/SLPI Peripheral Image Loader for MSM8974 and MSM8996 3 + * Qualcomm Peripheral Authentication Service remoteproc driver 4 4 * 5 5 * Copyright (C) 2016 Linaro Ltd 6 6 * Copyright (C) 2014 Sony Mobile Communications AB ··· 31 31 #include "qcom_q6v5.h" 32 32 #include "remoteproc_internal.h" 33 33 34 - #define ADSP_DECRYPT_SHUTDOWN_DELAY_MS 100 34 + #define QCOM_PAS_DECRYPT_SHUTDOWN_DELAY_MS 100 35 35 36 36 #define MAX_ASSIGN_COUNT 3 37 37 38 - struct adsp_data { 38 + struct qcom_pas_data { 39 39 int crash_reason_smem; 40 40 const char *firmware_name; 41 41 const char *dtb_firmware_name; ··· 60 60 int region_assign_vmid; 61 61 }; 62 62 63 - struct qcom_adsp { 63 + struct qcom_pas { 64 64 struct device *dev; 65 65 struct rproc *rproc; 66 66 ··· 119 119 struct qcom_scm_pas_metadata dtb_pas_metadata; 120 120 }; 121 121 122 - static void adsp_segment_dump(struct rproc *rproc, struct rproc_dump_segment *segment, 123 - void *dest, size_t offset, size_t size) 122 + static void qcom_pas_segment_dump(struct rproc *rproc, 123 + struct rproc_dump_segment *segment, 124 + void *dest, size_t offset, size_t size) 124 125 { 125 - struct qcom_adsp *adsp = rproc->priv; 126 + struct qcom_pas *pas = rproc->priv; 126 127 int total_offset; 127 128 128 - total_offset = segment->da + segment->offset + offset - adsp->mem_phys; 129 - if (total_offset < 0 || total_offset + size > adsp->mem_size) { 130 - dev_err(adsp->dev, 129 + total_offset = segment->da + segment->offset + offset - pas->mem_phys; 130 + if (total_offset < 0 || total_offset + size > pas->mem_size) { 131 + dev_err(pas->dev, 131 132 "invalid copy request for segment %pad with offset %zu and size %zu)\n", 132 133 &segment->da, offset, size); 133 134 memset(dest, 0xff, size); 134 135 return; 135 136 } 136 137 137 - memcpy_fromio(dest, adsp->mem_region + total_offset, size); 138 + memcpy_fromio(dest, pas->mem_region + total_offset, size); 138 139 } 139 140 140 - static void adsp_minidump(struct rproc *rproc) 141 + static void qcom_pas_minidump(struct rproc *rproc) 141 142 { 142 - struct qcom_adsp *adsp = rproc->priv; 143 + struct qcom_pas *pas = rproc->priv; 143 144 144 145 if (rproc->dump_conf == RPROC_COREDUMP_DISABLED) 145 146 return; 146 147 147 - qcom_minidump(rproc, adsp->minidump_id, adsp_segment_dump); 148 + qcom_minidump(rproc, pas->minidump_id, qcom_pas_segment_dump); 148 149 } 149 150 150 - static int adsp_pds_enable(struct qcom_adsp *adsp, struct device **pds, 151 - size_t pd_count) 151 + static int qcom_pas_pds_enable(struct qcom_pas *pas, struct device **pds, 152 + size_t pd_count) 152 153 { 153 154 int ret; 154 155 int i; ··· 175 174 return ret; 176 175 }; 177 176 178 - static void adsp_pds_disable(struct qcom_adsp *adsp, struct device **pds, 179 - size_t pd_count) 177 + static void qcom_pas_pds_disable(struct qcom_pas *pas, struct device **pds, 178 + size_t pd_count) 180 179 { 181 180 int i; 182 181 ··· 186 185 } 187 186 } 188 187 189 - static int adsp_shutdown_poll_decrypt(struct qcom_adsp *adsp) 188 + static int qcom_pas_shutdown_poll_decrypt(struct qcom_pas *pas) 190 189 { 191 190 unsigned int retry_num = 50; 192 191 int ret; 193 192 194 193 do { 195 - msleep(ADSP_DECRYPT_SHUTDOWN_DELAY_MS); 196 - ret = qcom_scm_pas_shutdown(adsp->pas_id); 194 + msleep(QCOM_PAS_DECRYPT_SHUTDOWN_DELAY_MS); 195 + ret = qcom_scm_pas_shutdown(pas->pas_id); 197 196 } while (ret == -EINVAL && --retry_num); 198 197 199 198 return ret; 200 199 } 201 200 202 - static int adsp_unprepare(struct rproc *rproc) 201 + static int qcom_pas_unprepare(struct rproc *rproc) 203 202 { 204 - struct qcom_adsp *adsp = rproc->priv; 203 + struct qcom_pas *pas = rproc->priv; 205 204 206 205 /* 207 - * adsp_load() did pass pas_metadata to the SCM driver for storing 206 + * qcom_pas_load() did pass pas_metadata to the SCM driver for storing 208 207 * metadata context. It might have been released already if 209 208 * auth_and_reset() was successful, but in other cases clean it up 210 209 * here. 211 210 */ 212 - qcom_scm_pas_metadata_release(&adsp->pas_metadata); 213 - if (adsp->dtb_pas_id) 214 - qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata); 211 + qcom_scm_pas_metadata_release(&pas->pas_metadata); 212 + if (pas->dtb_pas_id) 213 + qcom_scm_pas_metadata_release(&pas->dtb_pas_metadata); 215 214 216 215 return 0; 217 216 } 218 217 219 - static int adsp_load(struct rproc *rproc, const struct firmware *fw) 218 + static int qcom_pas_load(struct rproc *rproc, const struct firmware *fw) 220 219 { 221 - struct qcom_adsp *adsp = rproc->priv; 220 + struct qcom_pas *pas = rproc->priv; 222 221 int ret; 223 222 224 - /* Store firmware handle to be used in adsp_start() */ 225 - adsp->firmware = fw; 223 + /* Store firmware handle to be used in qcom_pas_start() */ 224 + pas->firmware = fw; 226 225 227 - if (adsp->lite_pas_id) 228 - ret = qcom_scm_pas_shutdown(adsp->lite_pas_id); 226 + if (pas->lite_pas_id) 227 + ret = qcom_scm_pas_shutdown(pas->lite_pas_id); 229 228 230 - if (adsp->dtb_pas_id) { 231 - ret = request_firmware(&adsp->dtb_firmware, adsp->dtb_firmware_name, adsp->dev); 229 + if (pas->dtb_pas_id) { 230 + ret = request_firmware(&pas->dtb_firmware, pas->dtb_firmware_name, pas->dev); 232 231 if (ret) { 233 - dev_err(adsp->dev, "request_firmware failed for %s: %d\n", 234 - adsp->dtb_firmware_name, ret); 232 + dev_err(pas->dev, "request_firmware failed for %s: %d\n", 233 + pas->dtb_firmware_name, ret); 235 234 return ret; 236 235 } 237 236 238 - ret = qcom_mdt_pas_init(adsp->dev, adsp->dtb_firmware, adsp->dtb_firmware_name, 239 - adsp->dtb_pas_id, adsp->dtb_mem_phys, 240 - &adsp->dtb_pas_metadata); 237 + ret = qcom_mdt_pas_init(pas->dev, pas->dtb_firmware, pas->dtb_firmware_name, 238 + pas->dtb_pas_id, pas->dtb_mem_phys, 239 + &pas->dtb_pas_metadata); 241 240 if (ret) 242 241 goto release_dtb_firmware; 243 242 244 - ret = qcom_mdt_load_no_init(adsp->dev, adsp->dtb_firmware, adsp->dtb_firmware_name, 245 - adsp->dtb_pas_id, adsp->dtb_mem_region, 246 - adsp->dtb_mem_phys, adsp->dtb_mem_size, 247 - &adsp->dtb_mem_reloc); 243 + ret = qcom_mdt_load_no_init(pas->dev, pas->dtb_firmware, pas->dtb_firmware_name, 244 + pas->dtb_pas_id, pas->dtb_mem_region, 245 + pas->dtb_mem_phys, pas->dtb_mem_size, 246 + &pas->dtb_mem_reloc); 248 247 if (ret) 249 248 goto release_dtb_metadata; 250 249 } ··· 252 251 return 0; 253 252 254 253 release_dtb_metadata: 255 - qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata); 254 + qcom_scm_pas_metadata_release(&pas->dtb_pas_metadata); 256 255 257 256 release_dtb_firmware: 258 - release_firmware(adsp->dtb_firmware); 257 + release_firmware(pas->dtb_firmware); 259 258 260 259 return ret; 261 260 } 262 261 263 - static int adsp_start(struct rproc *rproc) 262 + static int qcom_pas_start(struct rproc *rproc) 264 263 { 265 - struct qcom_adsp *adsp = rproc->priv; 264 + struct qcom_pas *pas = rproc->priv; 266 265 int ret; 267 266 268 - ret = qcom_q6v5_prepare(&adsp->q6v5); 267 + ret = qcom_q6v5_prepare(&pas->q6v5); 269 268 if (ret) 270 269 return ret; 271 270 272 - ret = adsp_pds_enable(adsp, adsp->proxy_pds, adsp->proxy_pd_count); 271 + ret = qcom_pas_pds_enable(pas, pas->proxy_pds, pas->proxy_pd_count); 273 272 if (ret < 0) 274 273 goto disable_irqs; 275 274 276 - ret = clk_prepare_enable(adsp->xo); 275 + ret = clk_prepare_enable(pas->xo); 277 276 if (ret) 278 277 goto disable_proxy_pds; 279 278 280 - ret = clk_prepare_enable(adsp->aggre2_clk); 279 + ret = clk_prepare_enable(pas->aggre2_clk); 281 280 if (ret) 282 281 goto disable_xo_clk; 283 282 284 - if (adsp->cx_supply) { 285 - ret = regulator_enable(adsp->cx_supply); 283 + if (pas->cx_supply) { 284 + ret = regulator_enable(pas->cx_supply); 286 285 if (ret) 287 286 goto disable_aggre2_clk; 288 287 } 289 288 290 - if (adsp->px_supply) { 291 - ret = regulator_enable(adsp->px_supply); 289 + if (pas->px_supply) { 290 + ret = regulator_enable(pas->px_supply); 292 291 if (ret) 293 292 goto disable_cx_supply; 294 293 } 295 294 296 - if (adsp->dtb_pas_id) { 297 - ret = qcom_scm_pas_auth_and_reset(adsp->dtb_pas_id); 295 + if (pas->dtb_pas_id) { 296 + ret = qcom_scm_pas_auth_and_reset(pas->dtb_pas_id); 298 297 if (ret) { 299 - dev_err(adsp->dev, 298 + dev_err(pas->dev, 300 299 "failed to authenticate dtb image and release reset\n"); 301 300 goto disable_px_supply; 302 301 } 303 302 } 304 303 305 - ret = qcom_mdt_pas_init(adsp->dev, adsp->firmware, rproc->firmware, adsp->pas_id, 306 - adsp->mem_phys, &adsp->pas_metadata); 304 + ret = qcom_mdt_pas_init(pas->dev, pas->firmware, rproc->firmware, pas->pas_id, 305 + pas->mem_phys, &pas->pas_metadata); 307 306 if (ret) 308 307 goto disable_px_supply; 309 308 310 - ret = qcom_mdt_load_no_init(adsp->dev, adsp->firmware, rproc->firmware, adsp->pas_id, 311 - adsp->mem_region, adsp->mem_phys, adsp->mem_size, 312 - &adsp->mem_reloc); 309 + ret = qcom_mdt_load_no_init(pas->dev, pas->firmware, rproc->firmware, pas->pas_id, 310 + pas->mem_region, pas->mem_phys, pas->mem_size, 311 + &pas->mem_reloc); 313 312 if (ret) 314 313 goto release_pas_metadata; 315 314 316 - qcom_pil_info_store(adsp->info_name, adsp->mem_phys, adsp->mem_size); 315 + qcom_pil_info_store(pas->info_name, pas->mem_phys, pas->mem_size); 317 316 318 - ret = qcom_scm_pas_auth_and_reset(adsp->pas_id); 317 + ret = qcom_scm_pas_auth_and_reset(pas->pas_id); 319 318 if (ret) { 320 - dev_err(adsp->dev, 319 + dev_err(pas->dev, 321 320 "failed to authenticate image and release reset\n"); 322 321 goto release_pas_metadata; 323 322 } 324 323 325 - ret = qcom_q6v5_wait_for_start(&adsp->q6v5, msecs_to_jiffies(5000)); 324 + ret = qcom_q6v5_wait_for_start(&pas->q6v5, msecs_to_jiffies(5000)); 326 325 if (ret == -ETIMEDOUT) { 327 - dev_err(adsp->dev, "start timed out\n"); 328 - qcom_scm_pas_shutdown(adsp->pas_id); 326 + dev_err(pas->dev, "start timed out\n"); 327 + qcom_scm_pas_shutdown(pas->pas_id); 329 328 goto release_pas_metadata; 330 329 } 331 330 332 - qcom_scm_pas_metadata_release(&adsp->pas_metadata); 333 - if (adsp->dtb_pas_id) 334 - qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata); 331 + qcom_scm_pas_metadata_release(&pas->pas_metadata); 332 + if (pas->dtb_pas_id) 333 + qcom_scm_pas_metadata_release(&pas->dtb_pas_metadata); 335 334 336 - /* Remove pointer to the loaded firmware, only valid in adsp_load() & adsp_start() */ 337 - adsp->firmware = NULL; 335 + /* firmware is used to pass reference from qcom_pas_start(), drop it now */ 336 + pas->firmware = NULL; 338 337 339 338 return 0; 340 339 341 340 release_pas_metadata: 342 - qcom_scm_pas_metadata_release(&adsp->pas_metadata); 343 - if (adsp->dtb_pas_id) 344 - qcom_scm_pas_metadata_release(&adsp->dtb_pas_metadata); 341 + qcom_scm_pas_metadata_release(&pas->pas_metadata); 342 + if (pas->dtb_pas_id) 343 + qcom_scm_pas_metadata_release(&pas->dtb_pas_metadata); 345 344 disable_px_supply: 346 - if (adsp->px_supply) 347 - regulator_disable(adsp->px_supply); 345 + if (pas->px_supply) 346 + regulator_disable(pas->px_supply); 348 347 disable_cx_supply: 349 - if (adsp->cx_supply) 350 - regulator_disable(adsp->cx_supply); 348 + if (pas->cx_supply) 349 + regulator_disable(pas->cx_supply); 351 350 disable_aggre2_clk: 352 - clk_disable_unprepare(adsp->aggre2_clk); 351 + clk_disable_unprepare(pas->aggre2_clk); 353 352 disable_xo_clk: 354 - clk_disable_unprepare(adsp->xo); 353 + clk_disable_unprepare(pas->xo); 355 354 disable_proxy_pds: 356 - adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count); 355 + qcom_pas_pds_disable(pas, pas->proxy_pds, pas->proxy_pd_count); 357 356 disable_irqs: 358 - qcom_q6v5_unprepare(&adsp->q6v5); 357 + qcom_q6v5_unprepare(&pas->q6v5); 359 358 360 - /* Remove pointer to the loaded firmware, only valid in adsp_load() & adsp_start() */ 361 - adsp->firmware = NULL; 359 + /* firmware is used to pass reference from qcom_pas_start(), drop it now */ 360 + pas->firmware = NULL; 362 361 363 362 return ret; 364 363 } 365 364 366 365 static void qcom_pas_handover(struct qcom_q6v5 *q6v5) 367 366 { 368 - struct qcom_adsp *adsp = container_of(q6v5, struct qcom_adsp, q6v5); 367 + struct qcom_pas *pas = container_of(q6v5, struct qcom_pas, q6v5); 369 368 370 - if (adsp->px_supply) 371 - regulator_disable(adsp->px_supply); 372 - if (adsp->cx_supply) 373 - regulator_disable(adsp->cx_supply); 374 - clk_disable_unprepare(adsp->aggre2_clk); 375 - clk_disable_unprepare(adsp->xo); 376 - adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count); 369 + if (pas->px_supply) 370 + regulator_disable(pas->px_supply); 371 + if (pas->cx_supply) 372 + regulator_disable(pas->cx_supply); 373 + clk_disable_unprepare(pas->aggre2_clk); 374 + clk_disable_unprepare(pas->xo); 375 + qcom_pas_pds_disable(pas, pas->proxy_pds, pas->proxy_pd_count); 377 376 } 378 377 379 - static int adsp_stop(struct rproc *rproc) 378 + static int qcom_pas_stop(struct rproc *rproc) 380 379 { 381 - struct qcom_adsp *adsp = rproc->priv; 380 + struct qcom_pas *pas = rproc->priv; 382 381 int handover; 383 382 int ret; 384 383 385 - ret = qcom_q6v5_request_stop(&adsp->q6v5, adsp->sysmon); 384 + ret = qcom_q6v5_request_stop(&pas->q6v5, pas->sysmon); 386 385 if (ret == -ETIMEDOUT) 387 - dev_err(adsp->dev, "timed out on wait\n"); 386 + dev_err(pas->dev, "timed out on wait\n"); 388 387 389 - ret = qcom_scm_pas_shutdown(adsp->pas_id); 390 - if (ret && adsp->decrypt_shutdown) 391 - ret = adsp_shutdown_poll_decrypt(adsp); 388 + ret = qcom_scm_pas_shutdown(pas->pas_id); 389 + if (ret && pas->decrypt_shutdown) 390 + ret = qcom_pas_shutdown_poll_decrypt(pas); 392 391 393 392 if (ret) 394 - dev_err(adsp->dev, "failed to shutdown: %d\n", ret); 393 + dev_err(pas->dev, "failed to shutdown: %d\n", ret); 395 394 396 - if (adsp->dtb_pas_id) { 397 - ret = qcom_scm_pas_shutdown(adsp->dtb_pas_id); 395 + if (pas->dtb_pas_id) { 396 + ret = qcom_scm_pas_shutdown(pas->dtb_pas_id); 398 397 if (ret) 399 - dev_err(adsp->dev, "failed to shutdown dtb: %d\n", ret); 398 + dev_err(pas->dev, "failed to shutdown dtb: %d\n", ret); 400 399 } 401 400 402 - handover = qcom_q6v5_unprepare(&adsp->q6v5); 401 + handover = qcom_q6v5_unprepare(&pas->q6v5); 403 402 if (handover) 404 - qcom_pas_handover(&adsp->q6v5); 403 + qcom_pas_handover(&pas->q6v5); 405 404 406 - if (adsp->smem_host_id) 407 - ret = qcom_smem_bust_hwspin_lock_by_host(adsp->smem_host_id); 405 + if (pas->smem_host_id) 406 + ret = qcom_smem_bust_hwspin_lock_by_host(pas->smem_host_id); 408 407 409 408 return ret; 410 409 } 411 410 412 - static void *adsp_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem) 411 + static void *qcom_pas_da_to_va(struct rproc *rproc, u64 da, size_t len, bool *is_iomem) 413 412 { 414 - struct qcom_adsp *adsp = rproc->priv; 413 + struct qcom_pas *pas = rproc->priv; 415 414 int offset; 416 415 417 - offset = da - adsp->mem_reloc; 418 - if (offset < 0 || offset + len > adsp->mem_size) 416 + offset = da - pas->mem_reloc; 417 + if (offset < 0 || offset + len > pas->mem_size) 419 418 return NULL; 420 419 421 420 if (is_iomem) 422 421 *is_iomem = true; 423 422 424 - return adsp->mem_region + offset; 423 + return pas->mem_region + offset; 425 424 } 426 425 427 - static unsigned long adsp_panic(struct rproc *rproc) 426 + static unsigned long qcom_pas_panic(struct rproc *rproc) 428 427 { 429 - struct qcom_adsp *adsp = rproc->priv; 428 + struct qcom_pas *pas = rproc->priv; 430 429 431 - return qcom_q6v5_panic(&adsp->q6v5); 430 + return qcom_q6v5_panic(&pas->q6v5); 432 431 } 433 432 434 - static const struct rproc_ops adsp_ops = { 435 - .unprepare = adsp_unprepare, 436 - .start = adsp_start, 437 - .stop = adsp_stop, 438 - .da_to_va = adsp_da_to_va, 433 + static const struct rproc_ops qcom_pas_ops = { 434 + .unprepare = qcom_pas_unprepare, 435 + .start = qcom_pas_start, 436 + .stop = qcom_pas_stop, 437 + .da_to_va = qcom_pas_da_to_va, 439 438 .parse_fw = qcom_register_dump_segments, 440 - .load = adsp_load, 441 - .panic = adsp_panic, 439 + .load = qcom_pas_load, 440 + .panic = qcom_pas_panic, 442 441 }; 443 442 444 - static const struct rproc_ops adsp_minidump_ops = { 445 - .unprepare = adsp_unprepare, 446 - .start = adsp_start, 447 - .stop = adsp_stop, 448 - .da_to_va = adsp_da_to_va, 443 + static const struct rproc_ops qcom_pas_minidump_ops = { 444 + .unprepare = qcom_pas_unprepare, 445 + .start = qcom_pas_start, 446 + .stop = qcom_pas_stop, 447 + .da_to_va = qcom_pas_da_to_va, 449 448 .parse_fw = qcom_register_dump_segments, 450 - .load = adsp_load, 451 - .panic = adsp_panic, 452 - .coredump = adsp_minidump, 449 + .load = qcom_pas_load, 450 + .panic = qcom_pas_panic, 451 + .coredump = qcom_pas_minidump, 453 452 }; 454 453 455 - static int adsp_init_clock(struct qcom_adsp *adsp) 454 + static int qcom_pas_init_clock(struct qcom_pas *pas) 456 455 { 457 - adsp->xo = devm_clk_get(adsp->dev, "xo"); 458 - if (IS_ERR(adsp->xo)) 459 - return dev_err_probe(adsp->dev, PTR_ERR(adsp->xo), 456 + pas->xo = devm_clk_get(pas->dev, "xo"); 457 + if (IS_ERR(pas->xo)) 458 + return dev_err_probe(pas->dev, PTR_ERR(pas->xo), 460 459 "failed to get xo clock"); 461 460 462 - 463 - adsp->aggre2_clk = devm_clk_get_optional(adsp->dev, "aggre2"); 464 - if (IS_ERR(adsp->aggre2_clk)) 465 - return dev_err_probe(adsp->dev, PTR_ERR(adsp->aggre2_clk), 461 + pas->aggre2_clk = devm_clk_get_optional(pas->dev, "aggre2"); 462 + if (IS_ERR(pas->aggre2_clk)) 463 + return dev_err_probe(pas->dev, PTR_ERR(pas->aggre2_clk), 466 464 "failed to get aggre2 clock"); 467 465 468 466 return 0; 469 467 } 470 468 471 - static int adsp_init_regulator(struct qcom_adsp *adsp) 469 + static int qcom_pas_init_regulator(struct qcom_pas *pas) 472 470 { 473 - adsp->cx_supply = devm_regulator_get_optional(adsp->dev, "cx"); 474 - if (IS_ERR(adsp->cx_supply)) { 475 - if (PTR_ERR(adsp->cx_supply) == -ENODEV) 476 - adsp->cx_supply = NULL; 471 + pas->cx_supply = devm_regulator_get_optional(pas->dev, "cx"); 472 + if (IS_ERR(pas->cx_supply)) { 473 + if (PTR_ERR(pas->cx_supply) == -ENODEV) 474 + pas->cx_supply = NULL; 477 475 else 478 - return PTR_ERR(adsp->cx_supply); 476 + return PTR_ERR(pas->cx_supply); 479 477 } 480 478 481 - if (adsp->cx_supply) 482 - regulator_set_load(adsp->cx_supply, 100000); 479 + if (pas->cx_supply) 480 + regulator_set_load(pas->cx_supply, 100000); 483 481 484 - adsp->px_supply = devm_regulator_get_optional(adsp->dev, "px"); 485 - if (IS_ERR(adsp->px_supply)) { 486 - if (PTR_ERR(adsp->px_supply) == -ENODEV) 487 - adsp->px_supply = NULL; 482 + pas->px_supply = devm_regulator_get_optional(pas->dev, "px"); 483 + if (IS_ERR(pas->px_supply)) { 484 + if (PTR_ERR(pas->px_supply) == -ENODEV) 485 + pas->px_supply = NULL; 488 486 else 489 - return PTR_ERR(adsp->px_supply); 487 + return PTR_ERR(pas->px_supply); 490 488 } 491 489 492 490 return 0; 493 491 } 494 492 495 - static int adsp_pds_attach(struct device *dev, struct device **devs, 496 - char **pd_names) 493 + static int qcom_pas_pds_attach(struct device *dev, struct device **devs, char **pd_names) 497 494 { 498 495 size_t num_pds = 0; 499 496 int ret; ··· 527 528 return ret; 528 529 }; 529 530 530 - static void adsp_pds_detach(struct qcom_adsp *adsp, struct device **pds, 531 - size_t pd_count) 531 + static void qcom_pas_pds_detach(struct qcom_pas *pas, struct device **pds, size_t pd_count) 532 532 { 533 - struct device *dev = adsp->dev; 533 + struct device *dev = pas->dev; 534 534 int i; 535 535 536 536 /* Handle single power domain */ ··· 542 544 dev_pm_domain_detach(pds[i], false); 543 545 } 544 546 545 - static int adsp_alloc_memory_region(struct qcom_adsp *adsp) 547 + static int qcom_pas_alloc_memory_region(struct qcom_pas *pas) 546 548 { 547 549 struct reserved_mem *rmem; 548 550 struct device_node *node; 549 551 550 - node = of_parse_phandle(adsp->dev->of_node, "memory-region", 0); 552 + node = of_parse_phandle(pas->dev->of_node, "memory-region", 0); 551 553 if (!node) { 552 - dev_err(adsp->dev, "no memory-region specified\n"); 554 + dev_err(pas->dev, "no memory-region specified\n"); 553 555 return -EINVAL; 554 556 } 555 557 556 558 rmem = of_reserved_mem_lookup(node); 557 559 of_node_put(node); 558 560 if (!rmem) { 559 - dev_err(adsp->dev, "unable to resolve memory-region\n"); 561 + dev_err(pas->dev, "unable to resolve memory-region\n"); 560 562 return -EINVAL; 561 563 } 562 564 563 - adsp->mem_phys = adsp->mem_reloc = rmem->base; 564 - adsp->mem_size = rmem->size; 565 - adsp->mem_region = devm_ioremap_wc(adsp->dev, adsp->mem_phys, adsp->mem_size); 566 - if (!adsp->mem_region) { 567 - dev_err(adsp->dev, "unable to map memory region: %pa+%zx\n", 568 - &rmem->base, adsp->mem_size); 565 + pas->mem_phys = pas->mem_reloc = rmem->base; 566 + pas->mem_size = rmem->size; 567 + pas->mem_region = devm_ioremap_wc(pas->dev, pas->mem_phys, pas->mem_size); 568 + if (!pas->mem_region) { 569 + dev_err(pas->dev, "unable to map memory region: %pa+%zx\n", 570 + &rmem->base, pas->mem_size); 569 571 return -EBUSY; 570 572 } 571 573 572 - if (!adsp->dtb_pas_id) 574 + if (!pas->dtb_pas_id) 573 575 return 0; 574 576 575 - node = of_parse_phandle(adsp->dev->of_node, "memory-region", 1); 577 + node = of_parse_phandle(pas->dev->of_node, "memory-region", 1); 576 578 if (!node) { 577 - dev_err(adsp->dev, "no dtb memory-region specified\n"); 579 + dev_err(pas->dev, "no dtb memory-region specified\n"); 578 580 return -EINVAL; 579 581 } 580 582 581 583 rmem = of_reserved_mem_lookup(node); 582 584 of_node_put(node); 583 585 if (!rmem) { 584 - dev_err(adsp->dev, "unable to resolve dtb memory-region\n"); 586 + dev_err(pas->dev, "unable to resolve dtb memory-region\n"); 585 587 return -EINVAL; 586 588 } 587 589 588 - adsp->dtb_mem_phys = adsp->dtb_mem_reloc = rmem->base; 589 - adsp->dtb_mem_size = rmem->size; 590 - adsp->dtb_mem_region = devm_ioremap_wc(adsp->dev, adsp->dtb_mem_phys, adsp->dtb_mem_size); 591 - if (!adsp->dtb_mem_region) { 592 - dev_err(adsp->dev, "unable to map dtb memory region: %pa+%zx\n", 593 - &rmem->base, adsp->dtb_mem_size); 590 + pas->dtb_mem_phys = pas->dtb_mem_reloc = rmem->base; 591 + pas->dtb_mem_size = rmem->size; 592 + pas->dtb_mem_region = devm_ioremap_wc(pas->dev, pas->dtb_mem_phys, pas->dtb_mem_size); 593 + if (!pas->dtb_mem_region) { 594 + dev_err(pas->dev, "unable to map dtb memory region: %pa+%zx\n", 595 + &rmem->base, pas->dtb_mem_size); 594 596 return -EBUSY; 595 597 } 596 598 597 599 return 0; 598 600 } 599 601 600 - static int adsp_assign_memory_region(struct qcom_adsp *adsp) 602 + static int qcom_pas_assign_memory_region(struct qcom_pas *pas) 601 603 { 602 604 struct qcom_scm_vmperm perm[MAX_ASSIGN_COUNT]; 603 605 struct device_node *node; ··· 605 607 int offset; 606 608 int ret; 607 609 608 - if (!adsp->region_assign_idx) 610 + if (!pas->region_assign_idx) 609 611 return 0; 610 612 611 - for (offset = 0; offset < adsp->region_assign_count; ++offset) { 613 + for (offset = 0; offset < pas->region_assign_count; ++offset) { 612 614 struct reserved_mem *rmem = NULL; 613 615 614 - node = of_parse_phandle(adsp->dev->of_node, "memory-region", 615 - adsp->region_assign_idx + offset); 616 + node = of_parse_phandle(pas->dev->of_node, "memory-region", 617 + pas->region_assign_idx + offset); 616 618 if (node) 617 619 rmem = of_reserved_mem_lookup(node); 618 620 of_node_put(node); 619 621 if (!rmem) { 620 - dev_err(adsp->dev, "unable to resolve shareable memory-region index %d\n", 622 + dev_err(pas->dev, "unable to resolve shareable memory-region index %d\n", 621 623 offset); 622 624 return -EINVAL; 623 625 } 624 626 625 - if (adsp->region_assign_shared) { 627 + if (pas->region_assign_shared) { 626 628 perm[0].vmid = QCOM_SCM_VMID_HLOS; 627 629 perm[0].perm = QCOM_SCM_PERM_RW; 628 - perm[1].vmid = adsp->region_assign_vmid; 630 + perm[1].vmid = pas->region_assign_vmid; 629 631 perm[1].perm = QCOM_SCM_PERM_RW; 630 632 perm_size = 2; 631 633 } else { 632 - perm[0].vmid = adsp->region_assign_vmid; 634 + perm[0].vmid = pas->region_assign_vmid; 633 635 perm[0].perm = QCOM_SCM_PERM_RW; 634 636 perm_size = 1; 635 637 } 636 638 637 - adsp->region_assign_phys[offset] = rmem->base; 638 - adsp->region_assign_size[offset] = rmem->size; 639 - adsp->region_assign_owners[offset] = BIT(QCOM_SCM_VMID_HLOS); 639 + pas->region_assign_phys[offset] = rmem->base; 640 + pas->region_assign_size[offset] = rmem->size; 641 + pas->region_assign_owners[offset] = BIT(QCOM_SCM_VMID_HLOS); 640 642 641 - ret = qcom_scm_assign_mem(adsp->region_assign_phys[offset], 642 - adsp->region_assign_size[offset], 643 - &adsp->region_assign_owners[offset], 643 + ret = qcom_scm_assign_mem(pas->region_assign_phys[offset], 644 + pas->region_assign_size[offset], 645 + &pas->region_assign_owners[offset], 644 646 perm, perm_size); 645 647 if (ret < 0) { 646 - dev_err(adsp->dev, "assign memory %d failed\n", offset); 648 + dev_err(pas->dev, "assign memory %d failed\n", offset); 647 649 return ret; 648 650 } 649 651 } ··· 651 653 return 0; 652 654 } 653 655 654 - static void adsp_unassign_memory_region(struct qcom_adsp *adsp) 656 + static void qcom_pas_unassign_memory_region(struct qcom_pas *pas) 655 657 { 656 658 struct qcom_scm_vmperm perm; 657 659 int offset; 658 660 int ret; 659 661 660 - if (!adsp->region_assign_idx || adsp->region_assign_shared) 662 + if (!pas->region_assign_idx || pas->region_assign_shared) 661 663 return; 662 664 663 - for (offset = 0; offset < adsp->region_assign_count; ++offset) { 665 + for (offset = 0; offset < pas->region_assign_count; ++offset) { 664 666 perm.vmid = QCOM_SCM_VMID_HLOS; 665 667 perm.perm = QCOM_SCM_PERM_RW; 666 668 667 - ret = qcom_scm_assign_mem(adsp->region_assign_phys[offset], 668 - adsp->region_assign_size[offset], 669 - &adsp->region_assign_owners[offset], 669 + ret = qcom_scm_assign_mem(pas->region_assign_phys[offset], 670 + pas->region_assign_size[offset], 671 + &pas->region_assign_owners[offset], 670 672 &perm, 1); 671 673 if (ret < 0) 672 - dev_err(adsp->dev, "unassign memory %d failed\n", offset); 674 + dev_err(pas->dev, "unassign memory %d failed\n", offset); 673 675 } 674 676 } 675 677 676 - static int adsp_probe(struct platform_device *pdev) 678 + static int qcom_pas_probe(struct platform_device *pdev) 677 679 { 678 - const struct adsp_data *desc; 679 - struct qcom_adsp *adsp; 680 + const struct qcom_pas_data *desc; 681 + struct qcom_pas *pas; 680 682 struct rproc *rproc; 681 683 const char *fw_name, *dtb_fw_name = NULL; 682 - const struct rproc_ops *ops = &adsp_ops; 684 + const struct rproc_ops *ops = &qcom_pas_ops; 683 685 int ret; 684 686 685 687 desc = of_device_get_match_data(&pdev->dev); ··· 704 706 } 705 707 706 708 if (desc->minidump_id) 707 - ops = &adsp_minidump_ops; 709 + ops = &qcom_pas_minidump_ops; 708 710 709 - rproc = devm_rproc_alloc(&pdev->dev, desc->sysmon_name, ops, fw_name, sizeof(*adsp)); 711 + rproc = devm_rproc_alloc(&pdev->dev, desc->sysmon_name, ops, fw_name, sizeof(*pas)); 710 712 711 713 if (!rproc) { 712 714 dev_err(&pdev->dev, "unable to allocate remoteproc\n"); ··· 716 718 rproc->auto_boot = desc->auto_boot; 717 719 rproc_coredump_set_elf_info(rproc, ELFCLASS32, EM_NONE); 718 720 719 - adsp = rproc->priv; 720 - adsp->dev = &pdev->dev; 721 - adsp->rproc = rproc; 722 - adsp->minidump_id = desc->minidump_id; 723 - adsp->pas_id = desc->pas_id; 724 - adsp->lite_pas_id = desc->lite_pas_id; 725 - adsp->info_name = desc->sysmon_name; 726 - adsp->smem_host_id = desc->smem_host_id; 727 - adsp->decrypt_shutdown = desc->decrypt_shutdown; 728 - adsp->region_assign_idx = desc->region_assign_idx; 729 - adsp->region_assign_count = min_t(int, MAX_ASSIGN_COUNT, desc->region_assign_count); 730 - adsp->region_assign_vmid = desc->region_assign_vmid; 731 - adsp->region_assign_shared = desc->region_assign_shared; 721 + pas = rproc->priv; 722 + pas->dev = &pdev->dev; 723 + pas->rproc = rproc; 724 + pas->minidump_id = desc->minidump_id; 725 + pas->pas_id = desc->pas_id; 726 + pas->lite_pas_id = desc->lite_pas_id; 727 + pas->info_name = desc->sysmon_name; 728 + pas->smem_host_id = desc->smem_host_id; 729 + pas->decrypt_shutdown = desc->decrypt_shutdown; 730 + pas->region_assign_idx = desc->region_assign_idx; 731 + pas->region_assign_count = min_t(int, MAX_ASSIGN_COUNT, desc->region_assign_count); 732 + pas->region_assign_vmid = desc->region_assign_vmid; 733 + pas->region_assign_shared = desc->region_assign_shared; 732 734 if (dtb_fw_name) { 733 - adsp->dtb_firmware_name = dtb_fw_name; 734 - adsp->dtb_pas_id = desc->dtb_pas_id; 735 + pas->dtb_firmware_name = dtb_fw_name; 736 + pas->dtb_pas_id = desc->dtb_pas_id; 735 737 } 736 - platform_set_drvdata(pdev, adsp); 738 + platform_set_drvdata(pdev, pas); 737 739 738 - ret = device_init_wakeup(adsp->dev, true); 740 + ret = device_init_wakeup(pas->dev, true); 739 741 if (ret) 740 742 goto free_rproc; 741 743 742 - ret = adsp_alloc_memory_region(adsp); 744 + ret = qcom_pas_alloc_memory_region(pas); 743 745 if (ret) 744 746 goto free_rproc; 745 747 746 - ret = adsp_assign_memory_region(adsp); 748 + ret = qcom_pas_assign_memory_region(pas); 747 749 if (ret) 748 750 goto free_rproc; 749 751 750 - ret = adsp_init_clock(adsp); 752 + ret = qcom_pas_init_clock(pas); 751 753 if (ret) 752 754 goto unassign_mem; 753 755 754 - ret = adsp_init_regulator(adsp); 756 + ret = qcom_pas_init_regulator(pas); 755 757 if (ret) 756 758 goto unassign_mem; 757 759 758 - ret = adsp_pds_attach(&pdev->dev, adsp->proxy_pds, 759 - desc->proxy_pd_names); 760 + ret = qcom_pas_pds_attach(&pdev->dev, pas->proxy_pds, desc->proxy_pd_names); 760 761 if (ret < 0) 761 762 goto unassign_mem; 762 - adsp->proxy_pd_count = ret; 763 + pas->proxy_pd_count = ret; 763 764 764 - ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem, desc->load_state, 765 - qcom_pas_handover); 765 + ret = qcom_q6v5_init(&pas->q6v5, pdev, rproc, desc->crash_reason_smem, 766 + desc->load_state, qcom_pas_handover); 766 767 if (ret) 767 768 goto detach_proxy_pds; 768 769 769 - qcom_add_glink_subdev(rproc, &adsp->glink_subdev, desc->ssr_name); 770 - qcom_add_smd_subdev(rproc, &adsp->smd_subdev); 771 - qcom_add_pdm_subdev(rproc, &adsp->pdm_subdev); 772 - adsp->sysmon = qcom_add_sysmon_subdev(rproc, 773 - desc->sysmon_name, 774 - desc->ssctl_id); 775 - if (IS_ERR(adsp->sysmon)) { 776 - ret = PTR_ERR(adsp->sysmon); 770 + qcom_add_glink_subdev(rproc, &pas->glink_subdev, desc->ssr_name); 771 + qcom_add_smd_subdev(rproc, &pas->smd_subdev); 772 + qcom_add_pdm_subdev(rproc, &pas->pdm_subdev); 773 + pas->sysmon = qcom_add_sysmon_subdev(rproc, desc->sysmon_name, desc->ssctl_id); 774 + if (IS_ERR(pas->sysmon)) { 775 + ret = PTR_ERR(pas->sysmon); 777 776 goto deinit_remove_pdm_smd_glink; 778 777 } 779 778 780 - qcom_add_ssr_subdev(rproc, &adsp->ssr_subdev, desc->ssr_name); 779 + qcom_add_ssr_subdev(rproc, &pas->ssr_subdev, desc->ssr_name); 781 780 ret = rproc_add(rproc); 782 781 if (ret) 783 782 goto remove_ssr_sysmon; ··· 782 787 return 0; 783 788 784 789 remove_ssr_sysmon: 785 - qcom_remove_ssr_subdev(rproc, &adsp->ssr_subdev); 786 - qcom_remove_sysmon_subdev(adsp->sysmon); 790 + qcom_remove_ssr_subdev(rproc, &pas->ssr_subdev); 791 + qcom_remove_sysmon_subdev(pas->sysmon); 787 792 deinit_remove_pdm_smd_glink: 788 - qcom_remove_pdm_subdev(rproc, &adsp->pdm_subdev); 789 - qcom_remove_smd_subdev(rproc, &adsp->smd_subdev); 790 - qcom_remove_glink_subdev(rproc, &adsp->glink_subdev); 791 - qcom_q6v5_deinit(&adsp->q6v5); 793 + qcom_remove_pdm_subdev(rproc, &pas->pdm_subdev); 794 + qcom_remove_smd_subdev(rproc, &pas->smd_subdev); 795 + qcom_remove_glink_subdev(rproc, &pas->glink_subdev); 796 + qcom_q6v5_deinit(&pas->q6v5); 792 797 detach_proxy_pds: 793 - adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count); 798 + qcom_pas_pds_detach(pas, pas->proxy_pds, pas->proxy_pd_count); 794 799 unassign_mem: 795 - adsp_unassign_memory_region(adsp); 800 + qcom_pas_unassign_memory_region(pas); 796 801 free_rproc: 797 - device_init_wakeup(adsp->dev, false); 802 + device_init_wakeup(pas->dev, false); 798 803 799 804 return ret; 800 805 } 801 806 802 - static void adsp_remove(struct platform_device *pdev) 807 + static void qcom_pas_remove(struct platform_device *pdev) 803 808 { 804 - struct qcom_adsp *adsp = platform_get_drvdata(pdev); 809 + struct qcom_pas *pas = platform_get_drvdata(pdev); 805 810 806 - rproc_del(adsp->rproc); 811 + rproc_del(pas->rproc); 807 812 808 - qcom_q6v5_deinit(&adsp->q6v5); 809 - adsp_unassign_memory_region(adsp); 810 - qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev); 811 - qcom_remove_sysmon_subdev(adsp->sysmon); 812 - qcom_remove_smd_subdev(adsp->rproc, &adsp->smd_subdev); 813 - qcom_remove_pdm_subdev(adsp->rproc, &adsp->pdm_subdev); 814 - qcom_remove_ssr_subdev(adsp->rproc, &adsp->ssr_subdev); 815 - adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count); 816 - device_init_wakeup(adsp->dev, false); 813 + qcom_q6v5_deinit(&pas->q6v5); 814 + qcom_pas_unassign_memory_region(pas); 815 + qcom_remove_glink_subdev(pas->rproc, &pas->glink_subdev); 816 + qcom_remove_sysmon_subdev(pas->sysmon); 817 + qcom_remove_smd_subdev(pas->rproc, &pas->smd_subdev); 818 + qcom_remove_pdm_subdev(pas->rproc, &pas->pdm_subdev); 819 + qcom_remove_ssr_subdev(pas->rproc, &pas->ssr_subdev); 820 + qcom_pas_pds_detach(pas, pas->proxy_pds, pas->proxy_pd_count); 821 + device_init_wakeup(pas->dev, false); 817 822 } 818 823 819 - static const struct adsp_data adsp_resource_init = { 824 + static const struct qcom_pas_data adsp_resource_init = { 820 825 .crash_reason_smem = 423, 821 826 .firmware_name = "adsp.mdt", 822 827 .pas_id = 1, ··· 826 831 .ssctl_id = 0x14, 827 832 }; 828 833 829 - static const struct adsp_data sa8775p_adsp_resource = { 834 + static const struct qcom_pas_data sa8775p_adsp_resource = { 830 835 .crash_reason_smem = 423, 831 836 .firmware_name = "adsp.mbn", 832 837 .pas_id = 1, ··· 843 848 .ssctl_id = 0x14, 844 849 }; 845 850 846 - static const struct adsp_data sdm845_adsp_resource_init = { 851 + static const struct qcom_pas_data sdm845_adsp_resource_init = { 847 852 .crash_reason_smem = 423, 848 853 .firmware_name = "adsp.mdt", 849 854 .pas_id = 1, ··· 854 859 .ssctl_id = 0x14, 855 860 }; 856 861 857 - static const struct adsp_data sm6350_adsp_resource = { 862 + static const struct qcom_pas_data sm6350_adsp_resource = { 858 863 .crash_reason_smem = 423, 859 864 .firmware_name = "adsp.mdt", 860 865 .pas_id = 1, ··· 870 875 .ssctl_id = 0x14, 871 876 }; 872 877 873 - static const struct adsp_data sm6375_mpss_resource = { 878 + static const struct qcom_pas_data sm6375_mpss_resource = { 874 879 .crash_reason_smem = 421, 875 880 .firmware_name = "modem.mdt", 876 881 .pas_id = 4, ··· 885 890 .ssctl_id = 0x12, 886 891 }; 887 892 888 - static const struct adsp_data sm8150_adsp_resource = { 893 + static const struct qcom_pas_data sm8150_adsp_resource = { 889 894 .crash_reason_smem = 423, 890 895 .firmware_name = "adsp.mdt", 891 896 .pas_id = 1, ··· 900 905 .ssctl_id = 0x14, 901 906 }; 902 907 903 - static const struct adsp_data sm8250_adsp_resource = { 908 + static const struct qcom_pas_data sm8250_adsp_resource = { 904 909 .crash_reason_smem = 423, 905 910 .firmware_name = "adsp.mdt", 906 911 .pas_id = 1, ··· 917 922 .ssctl_id = 0x14, 918 923 }; 919 924 920 - static const struct adsp_data sm8350_adsp_resource = { 925 + static const struct qcom_pas_data sm8350_adsp_resource = { 921 926 .crash_reason_smem = 423, 922 927 .firmware_name = "adsp.mdt", 923 928 .pas_id = 1, ··· 933 938 .ssctl_id = 0x14, 934 939 }; 935 940 936 - static const struct adsp_data msm8996_adsp_resource = { 941 + static const struct qcom_pas_data msm8996_adsp_resource = { 937 942 .crash_reason_smem = 423, 938 943 .firmware_name = "adsp.mdt", 939 944 .pas_id = 1, ··· 947 952 .ssctl_id = 0x14, 948 953 }; 949 954 950 - static const struct adsp_data cdsp_resource_init = { 955 + static const struct qcom_pas_data cdsp_resource_init = { 951 956 .crash_reason_smem = 601, 952 957 .firmware_name = "cdsp.mdt", 953 958 .pas_id = 18, ··· 957 962 .ssctl_id = 0x17, 958 963 }; 959 964 960 - static const struct adsp_data sa8775p_cdsp0_resource = { 965 + static const struct qcom_pas_data sa8775p_cdsp0_resource = { 961 966 .crash_reason_smem = 601, 962 967 .firmware_name = "cdsp0.mbn", 963 968 .pas_id = 18, ··· 975 980 .ssctl_id = 0x17, 976 981 }; 977 982 978 - static const struct adsp_data sa8775p_cdsp1_resource = { 983 + static const struct qcom_pas_data sa8775p_cdsp1_resource = { 979 984 .crash_reason_smem = 633, 980 985 .firmware_name = "cdsp1.mbn", 981 986 .pas_id = 30, ··· 993 998 .ssctl_id = 0x20, 994 999 }; 995 1000 996 - static const struct adsp_data sdm845_cdsp_resource_init = { 1001 + static const struct qcom_pas_data sdm845_cdsp_resource_init = { 997 1002 .crash_reason_smem = 601, 998 1003 .firmware_name = "cdsp.mdt", 999 1004 .pas_id = 18, ··· 1004 1009 .ssctl_id = 0x17, 1005 1010 }; 1006 1011 1007 - static const struct adsp_data sm6350_cdsp_resource = { 1012 + static const struct qcom_pas_data sm6350_cdsp_resource = { 1008 1013 .crash_reason_smem = 601, 1009 1014 .firmware_name = "cdsp.mdt", 1010 1015 .pas_id = 18, ··· 1020 1025 .ssctl_id = 0x17, 1021 1026 }; 1022 1027 1023 - static const struct adsp_data sm8150_cdsp_resource = { 1028 + static const struct qcom_pas_data sm8150_cdsp_resource = { 1024 1029 .crash_reason_smem = 601, 1025 1030 .firmware_name = "cdsp.mdt", 1026 1031 .pas_id = 18, ··· 1035 1040 .ssctl_id = 0x17, 1036 1041 }; 1037 1042 1038 - static const struct adsp_data sm8250_cdsp_resource = { 1043 + static const struct qcom_pas_data sm8250_cdsp_resource = { 1039 1044 .crash_reason_smem = 601, 1040 1045 .firmware_name = "cdsp.mdt", 1041 1046 .pas_id = 18, ··· 1050 1055 .ssctl_id = 0x17, 1051 1056 }; 1052 1057 1053 - static const struct adsp_data sc8280xp_nsp0_resource = { 1058 + static const struct qcom_pas_data sc8280xp_nsp0_resource = { 1054 1059 .crash_reason_smem = 601, 1055 1060 .firmware_name = "cdsp.mdt", 1056 1061 .pas_id = 18, ··· 1064 1069 .ssctl_id = 0x17, 1065 1070 }; 1066 1071 1067 - static const struct adsp_data sc8280xp_nsp1_resource = { 1072 + static const struct qcom_pas_data sc8280xp_nsp1_resource = { 1068 1073 .crash_reason_smem = 633, 1069 1074 .firmware_name = "cdsp.mdt", 1070 1075 .pas_id = 30, ··· 1078 1083 .ssctl_id = 0x20, 1079 1084 }; 1080 1085 1081 - static const struct adsp_data x1e80100_adsp_resource = { 1086 + static const struct qcom_pas_data x1e80100_adsp_resource = { 1082 1087 .crash_reason_smem = 423, 1083 1088 .firmware_name = "adsp.mdt", 1084 1089 .dtb_firmware_name = "adsp_dtb.mdt", ··· 1098 1103 .ssctl_id = 0x14, 1099 1104 }; 1100 1105 1101 - static const struct adsp_data x1e80100_cdsp_resource = { 1106 + static const struct qcom_pas_data x1e80100_cdsp_resource = { 1102 1107 .crash_reason_smem = 601, 1103 1108 .firmware_name = "cdsp.mdt", 1104 1109 .dtb_firmware_name = "cdsp_dtb.mdt", ··· 1118 1123 .ssctl_id = 0x17, 1119 1124 }; 1120 1125 1121 - static const struct adsp_data sm8350_cdsp_resource = { 1126 + static const struct qcom_pas_data sm8350_cdsp_resource = { 1122 1127 .crash_reason_smem = 601, 1123 1128 .firmware_name = "cdsp.mdt", 1124 1129 .pas_id = 18, ··· 1135 1140 .ssctl_id = 0x17, 1136 1141 }; 1137 1142 1138 - static const struct adsp_data sa8775p_gpdsp0_resource = { 1143 + static const struct qcom_pas_data sa8775p_gpdsp0_resource = { 1139 1144 .crash_reason_smem = 640, 1140 1145 .firmware_name = "gpdsp0.mbn", 1141 1146 .pas_id = 39, ··· 1152 1157 .ssctl_id = 0x21, 1153 1158 }; 1154 1159 1155 - static const struct adsp_data sa8775p_gpdsp1_resource = { 1160 + static const struct qcom_pas_data sa8775p_gpdsp1_resource = { 1156 1161 .crash_reason_smem = 641, 1157 1162 .firmware_name = "gpdsp1.mbn", 1158 1163 .pas_id = 40, ··· 1169 1174 .ssctl_id = 0x22, 1170 1175 }; 1171 1176 1172 - static const struct adsp_data mpss_resource_init = { 1177 + static const struct qcom_pas_data mpss_resource_init = { 1173 1178 .crash_reason_smem = 421, 1174 1179 .firmware_name = "modem.mdt", 1175 1180 .pas_id = 4, ··· 1186 1191 .ssctl_id = 0x12, 1187 1192 }; 1188 1193 1189 - static const struct adsp_data sc8180x_mpss_resource = { 1194 + static const struct qcom_pas_data sc8180x_mpss_resource = { 1190 1195 .crash_reason_smem = 421, 1191 1196 .firmware_name = "modem.mdt", 1192 1197 .pas_id = 4, ··· 1201 1206 .ssctl_id = 0x12, 1202 1207 }; 1203 1208 1204 - static const struct adsp_data msm8996_slpi_resource_init = { 1209 + static const struct qcom_pas_data msm8996_slpi_resource_init = { 1205 1210 .crash_reason_smem = 424, 1206 1211 .firmware_name = "slpi.mdt", 1207 1212 .pas_id = 12, ··· 1215 1220 .ssctl_id = 0x16, 1216 1221 }; 1217 1222 1218 - static const struct adsp_data sdm845_slpi_resource_init = { 1223 + static const struct qcom_pas_data sdm845_slpi_resource_init = { 1219 1224 .crash_reason_smem = 424, 1220 1225 .firmware_name = "slpi.mdt", 1221 1226 .pas_id = 12, ··· 1231 1236 .ssctl_id = 0x16, 1232 1237 }; 1233 1238 1234 - static const struct adsp_data wcss_resource_init = { 1239 + static const struct qcom_pas_data wcss_resource_init = { 1235 1240 .crash_reason_smem = 421, 1236 1241 .firmware_name = "wcnss.mdt", 1237 1242 .pas_id = 6, ··· 1241 1246 .ssctl_id = 0x12, 1242 1247 }; 1243 1248 1244 - static const struct adsp_data sdx55_mpss_resource = { 1249 + static const struct qcom_pas_data sdx55_mpss_resource = { 1245 1250 .crash_reason_smem = 421, 1246 1251 .firmware_name = "modem.mdt", 1247 1252 .pas_id = 4, ··· 1256 1261 .ssctl_id = 0x22, 1257 1262 }; 1258 1263 1259 - static const struct adsp_data sm8450_mpss_resource = { 1264 + static const struct qcom_pas_data sm8450_mpss_resource = { 1260 1265 .crash_reason_smem = 421, 1261 1266 .firmware_name = "modem.mdt", 1262 1267 .pas_id = 4, ··· 1274 1279 .ssctl_id = 0x12, 1275 1280 }; 1276 1281 1277 - static const struct adsp_data sm8550_adsp_resource = { 1282 + static const struct qcom_pas_data sm8550_adsp_resource = { 1278 1283 .crash_reason_smem = 423, 1279 1284 .firmware_name = "adsp.mdt", 1280 1285 .dtb_firmware_name = "adsp_dtb.mdt", ··· 1294 1299 .smem_host_id = 2, 1295 1300 }; 1296 1301 1297 - static const struct adsp_data sm8550_cdsp_resource = { 1302 + static const struct qcom_pas_data sm8550_cdsp_resource = { 1298 1303 .crash_reason_smem = 601, 1299 1304 .firmware_name = "cdsp.mdt", 1300 1305 .dtb_firmware_name = "cdsp_dtb.mdt", ··· 1315 1320 .smem_host_id = 5, 1316 1321 }; 1317 1322 1318 - static const struct adsp_data sm8550_mpss_resource = { 1323 + static const struct qcom_pas_data sm8550_mpss_resource = { 1319 1324 .crash_reason_smem = 421, 1320 1325 .firmware_name = "modem.mdt", 1321 1326 .dtb_firmware_name = "modem_dtb.mdt", ··· 1339 1344 .region_assign_vmid = QCOM_SCM_VMID_MSS_MSA, 1340 1345 }; 1341 1346 1342 - static const struct adsp_data sc7280_wpss_resource = { 1347 + static const struct qcom_pas_data sc7280_wpss_resource = { 1343 1348 .crash_reason_smem = 626, 1344 1349 .firmware_name = "wpss.mdt", 1345 1350 .pas_id = 6, ··· 1356 1361 .ssctl_id = 0x19, 1357 1362 }; 1358 1363 1359 - static const struct adsp_data sm8650_cdsp_resource = { 1364 + static const struct qcom_pas_data sm8650_cdsp_resource = { 1360 1365 .crash_reason_smem = 601, 1361 1366 .firmware_name = "cdsp.mdt", 1362 1367 .dtb_firmware_name = "cdsp_dtb.mdt", ··· 1381 1386 .region_assign_vmid = QCOM_SCM_VMID_CDSP, 1382 1387 }; 1383 1388 1384 - static const struct adsp_data sm8650_mpss_resource = { 1389 + static const struct qcom_pas_data sm8650_mpss_resource = { 1385 1390 .crash_reason_smem = 421, 1386 1391 .firmware_name = "modem.mdt", 1387 1392 .dtb_firmware_name = "modem_dtb.mdt", ··· 1405 1410 .region_assign_vmid = QCOM_SCM_VMID_MSS_MSA, 1406 1411 }; 1407 1412 1408 - static const struct adsp_data sm8750_mpss_resource = { 1413 + static const struct qcom_pas_data sm8750_mpss_resource = { 1409 1414 .crash_reason_smem = 421, 1410 1415 .firmware_name = "modem.mdt", 1411 1416 .dtb_firmware_name = "modem_dtb.mdt", ··· 1429 1434 .region_assign_vmid = QCOM_SCM_VMID_MSS_MSA, 1430 1435 }; 1431 1436 1432 - static const struct of_device_id adsp_of_match[] = { 1437 + static const struct of_device_id qcom_pas_of_match[] = { 1433 1438 { .compatible = "qcom,msm8226-adsp-pil", .data = &msm8996_adsp_resource}, 1434 1439 { .compatible = "qcom,msm8953-adsp-pil", .data = &msm8996_adsp_resource}, 1435 1440 { .compatible = "qcom,msm8974-adsp-pil", .data = &adsp_resource_init}, ··· 1499 1504 { .compatible = "qcom,x1e80100-cdsp-pas", .data = &x1e80100_cdsp_resource}, 1500 1505 { }, 1501 1506 }; 1502 - MODULE_DEVICE_TABLE(of, adsp_of_match); 1507 + MODULE_DEVICE_TABLE(of, qcom_pas_of_match); 1503 1508 1504 - static struct platform_driver adsp_driver = { 1505 - .probe = adsp_probe, 1506 - .remove = adsp_remove, 1509 + static struct platform_driver qcom_pas_driver = { 1510 + .probe = qcom_pas_probe, 1511 + .remove = qcom_pas_remove, 1507 1512 .driver = { 1508 1513 .name = "qcom_q6v5_pas", 1509 - .of_match_table = adsp_of_match, 1514 + .of_match_table = qcom_pas_of_match, 1510 1515 }, 1511 1516 }; 1512 1517 1513 - module_platform_driver(adsp_driver); 1514 - MODULE_DESCRIPTION("Qualcomm Hexagon v5 Peripheral Authentication Service driver"); 1518 + module_platform_driver(qcom_pas_driver); 1519 + MODULE_DESCRIPTION("Qualcomm Peripheral Authentication Service remoteproc driver"); 1515 1520 MODULE_LICENSE("GPL v2");
+1 -1
drivers/remoteproc/remoteproc_core.c
··· 699 699 return -ENOMEM; 700 700 } 701 701 702 - dev_dbg(dev, "carveout va %pK, dma %pad, len 0x%zx\n", 702 + dev_dbg(dev, "carveout va %p, dma %pad, len 0x%zx\n", 703 703 va, &dma, mem->len); 704 704 705 705 if (mem->da != FW_RSC_ADDR_ANY && !rproc->domain) {
+1 -1
drivers/remoteproc/remoteproc_virtio.c
··· 136 136 size = vring_size(num, rvring->align); 137 137 memset(addr, 0, size); 138 138 139 - dev_dbg(dev, "vring%d: va %pK qsz %d notifyid %d\n", 139 + dev_dbg(dev, "vring%d: va %p qsz %d notifyid %d\n", 140 140 id, addr, num, rvring->notifyid); 141 141 142 142 /*
+1 -1
drivers/remoteproc/st_slim_rproc.c
··· 190 190 } 191 191 } 192 192 193 - dev_dbg(&rproc->dev, "da = 0x%llx len = 0x%zx va = 0x%pK\n", 193 + dev_dbg(&rproc->dev, "da = 0x%llx len = 0x%zx va = 0x%p\n", 194 194 da, len, va); 195 195 196 196 return va;
+2 -2
drivers/remoteproc/ti_k3_common.c
··· 450 450 kproc->mem[i].dev_addr = data->mems[i].dev_addr; 451 451 kproc->mem[i].size = resource_size(res); 452 452 453 - dev_dbg(dev, "memory %8s: bus addr %pa size 0x%zx va %pK da 0x%x\n", 453 + dev_dbg(dev, "memory %8s: bus addr %pa size 0x%zx va %p da 0x%x\n", 454 454 data->mems[i].name, &kproc->mem[i].bus_addr, 455 455 kproc->mem[i].size, kproc->mem[i].cpu_addr, 456 456 kproc->mem[i].dev_addr); ··· 528 528 return -ENOMEM; 529 529 } 530 530 531 - dev_dbg(dev, "reserved memory%d: bus addr %pa size 0x%zx va %pK da 0x%x\n", 531 + dev_dbg(dev, "reserved memory%d: bus addr %pa size 0x%zx va %p da 0x%x\n", 532 532 i + 1, &kproc->rmem[i].bus_addr, 533 533 kproc->rmem[i].size, kproc->rmem[i].cpu_addr, 534 534 kproc->rmem[i].dev_addr);
+1 -1
drivers/remoteproc/ti_k3_r5_remoteproc.c
··· 1007 1007 return -ENOMEM; 1008 1008 } 1009 1009 1010 - dev_dbg(dev, "memory sram%d: bus addr %pa size 0x%zx va %pK da 0x%x\n", 1010 + dev_dbg(dev, "memory sram%d: bus addr %pa size 0x%zx va %p da 0x%x\n", 1011 1011 i, &core->sram[i].bus_addr, 1012 1012 core->sram[i].size, core->sram[i].cpu_addr, 1013 1013 core->sram[i].dev_addr);
+60 -14
drivers/remoteproc/xlnx_r5_remoteproc.c
··· 68 68 }; 69 69 70 70 /** 71 - * struct mbox_info 71 + * struct mbox_info - mailbox channel data 72 72 * 73 73 * @rx_mc_buf: to copy data from mailbox rx channel 74 74 * @tx_mc_buf: to copy data to mailbox tx channel ··· 89 89 }; 90 90 91 91 /** 92 - * struct rsc_tbl_data 92 + * struct rsc_tbl_data - resource table metadata 93 93 * 94 94 * Platform specific data structure used to sync resource table address. 95 95 * It's important to maintain order and size of each field on remote side. ··· 128 128 }; 129 129 130 130 /** 131 - * struct zynqmp_r5_core 131 + * struct zynqmp_r5_core - remoteproc core's internal data 132 132 * 133 133 * @rsc_tbl_va: resource table virtual address 134 134 * @sram: Array of sram memories assigned to this core ··· 157 157 }; 158 158 159 159 /** 160 - * struct zynqmp_r5_cluster 160 + * struct zynqmp_r5_cluster - remoteproc cluster's internal data 161 161 * 162 162 * @dev: r5f subsystem cluster device node 163 163 * @mode: cluster mode of type zynqmp_r5_cluster_mode ··· 732 732 } 733 733 734 734 /** 735 - * zynqmp_r5_rproc_prepare() 735 + * zynqmp_r5_rproc_prepare() - prepare core to boot/attach 736 736 * adds carveouts for TCM bank and reserved memory regions 737 737 * 738 738 * @rproc: Device node of each rproc ··· 765 765 } 766 766 767 767 /** 768 - * zynqmp_r5_rproc_unprepare() 768 + * zynqmp_r5_rproc_unprepare() - programming sequence after stop/detach. 769 769 * Turns off TCM banks using power-domain id 770 770 * 771 771 * @rproc: Device node of each rproc ··· 908 908 }; 909 909 910 910 /** 911 - * zynqmp_r5_add_rproc_core() 911 + * zynqmp_r5_add_rproc_core() - Add core data to framework. 912 912 * Allocate and add struct rproc object for each r5f core 913 913 * This is called for each individual r5f core 914 914 * ··· 938 938 939 939 rproc_coredump_set_elf_info(r5_rproc, ELFCLASS32, EM_ARM); 940 940 941 + r5_rproc->recovery_disabled = true; 942 + r5_rproc->has_iommu = false; 941 943 r5_rproc->auto_boot = false; 942 944 r5_core = r5_rproc->priv; 943 945 r5_core->dev = cdev; ··· 1144 1142 } 1145 1143 1146 1144 /** 1147 - * zynqmp_r5_get_tcm_node() 1145 + * zynqmp_r5_get_tcm_node() - Get TCM info 1148 1146 * Ideally this function should parse tcm node and store information 1149 1147 * in r5_core instance. For now, Hardcoded TCM information is used. 1150 1148 * This approach is used as TCM bindings for system-dt is being developed ··· 1331 1329 1332 1330 /* 1333 1331 * Number of cores is decided by number of child nodes of 1334 - * r5f subsystem node in dts. If Split mode is used in dts 1335 - * 2 child nodes are expected. 1332 + * r5f subsystem node in dts. 1333 + * In split mode maximum two child nodes are expected. 1334 + * However, only single core can be enabled too. 1335 + * Driver can handle following configuration in split mode: 1336 + * 1) core0 enabled, core1 disabled 1337 + * 2) core0 disabled, core1 enabled 1338 + * 3) core0 and core1 both are enabled. 1339 + * For now, no more than two cores are expected per cluster 1340 + * in split mode. 1336 1341 * In lockstep mode if two child nodes are available, 1337 1342 * only use first child node and consider it as core0 1338 1343 * and ignore core1 dt node. 1339 1344 */ 1340 1345 core_count = of_get_available_child_count(dev_node); 1341 - if (core_count == 0) { 1346 + if (core_count == 0 || core_count > 2) { 1342 1347 dev_err(dev, "Invalid number of r5 cores %d", core_count); 1343 - return -EINVAL; 1344 - } else if (cluster_mode == SPLIT_MODE && core_count != 2) { 1345 - dev_err(dev, "Invalid number of r5 cores for split mode\n"); 1346 1348 return -EINVAL; 1347 1349 } else if (cluster_mode == LOCKSTEP_MODE && core_count == 2) { 1348 1350 dev_warn(dev, "Only r5 core0 will be used\n"); ··· 1470 1464 } 1471 1465 1472 1466 /* 1467 + * zynqmp_r5_remoteproc_shutdown() 1468 + * Follow shutdown sequence in case of kexec call. 1469 + * 1470 + * @pdev: domain platform device for cluster 1471 + * 1472 + * Return: None. 1473 + */ 1474 + static void zynqmp_r5_remoteproc_shutdown(struct platform_device *pdev) 1475 + { 1476 + const char *rproc_state_str = NULL; 1477 + struct zynqmp_r5_cluster *cluster; 1478 + struct zynqmp_r5_core *r5_core; 1479 + struct rproc *rproc; 1480 + int i, ret = 0; 1481 + 1482 + cluster = platform_get_drvdata(pdev); 1483 + 1484 + for (i = 0; i < cluster->core_count; i++) { 1485 + r5_core = cluster->r5_cores[i]; 1486 + rproc = r5_core->rproc; 1487 + 1488 + if (rproc->state == RPROC_RUNNING) { 1489 + ret = rproc_shutdown(rproc); 1490 + rproc_state_str = "shutdown"; 1491 + } else if (rproc->state == RPROC_ATTACHED) { 1492 + ret = rproc_detach(rproc); 1493 + rproc_state_str = "detach"; 1494 + } else { 1495 + ret = 0; 1496 + } 1497 + 1498 + if (ret) { 1499 + dev_err(cluster->dev, "failed to %s rproc %d\n", 1500 + rproc_state_str, rproc->index); 1501 + } 1502 + } 1503 + } 1504 + 1505 + /* 1473 1506 * zynqmp_r5_remoteproc_probe() 1474 1507 * parse device-tree, initialize hardware and allocate required resources 1475 1508 * and remoteproc ops ··· 1569 1524 .name = "zynqmp_r5_remoteproc", 1570 1525 .of_match_table = zynqmp_r5_remoteproc_match, 1571 1526 }, 1527 + .shutdown = zynqmp_r5_remoteproc_shutdown, 1572 1528 }; 1573 1529 module_platform_driver(zynqmp_r5_remoteproc_driver); 1574 1530
+1 -1
drivers/rpmsg/virtio_rpmsg_bus.c
··· 901 901 goto vqs_del; 902 902 } 903 903 904 - dev_dbg(&vdev->dev, "buffers: va %pK, dma %pad\n", 904 + dev_dbg(&vdev->dev, "buffers: va %p, dma %pad\n", 905 905 bufs_va, &vrp->bufs_dma); 906 906 907 907 /* half of the buffers is dedicated for RX */