Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi

Pull SCSI updates from James Bottomley:
"This is mostly update of the usual drivers: qla2xxx, ufs, smartpqi,
lpfc, hisi_sas, qedf, mpt3sas; plus a whole load of minor updates. The
only core change this time around is the addition of request batching
for virtio. Since batching requires an additional flag to use, it
should be invisible to the rest of the drivers"

* tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: (264 commits)
scsi: hisi_sas: Fix the conflict between device gone and host reset
scsi: hisi_sas: Add BIST support for phy loopback
scsi: hisi_sas: Add hisi_sas_debugfs_alloc() to centralise allocation
scsi: hisi_sas: Remove some unused function arguments
scsi: hisi_sas: Remove redundant work declaration
scsi: hisi_sas: Remove hisi_sas_hw.slot_complete
scsi: hisi_sas: Assign NCQ tag for all NCQ commands
scsi: hisi_sas: Update all the registers after suspend and resume
scsi: hisi_sas: Retry 3 times TMF IO for SAS disks when init device
scsi: hisi_sas: Remove sleep after issue phy reset if sas_smp_phy_control() fails
scsi: hisi_sas: Directly return when running I_T_nexus reset if phy disabled
scsi: hisi_sas: Use true/false as input parameter of sas_phy_reset()
scsi: hisi_sas: add debugfs auto-trigger for internal abort time out
scsi: virtio_scsi: unplug LUNs when events missed
scsi: scsi_dh_rdac: zero cdb in send_mode_select()
scsi: fcoe: fix null-ptr-deref Read in fc_release_transport
scsi: ufs-hisi: use devm_platform_ioremap_resource() to simplify code
scsi: ufshcd: use devm_platform_ioremap_resource() to simplify code
scsi: hisi_sas: use devm_platform_ioremap_resource() to simplify code
scsi: ufs: Use kmemdup in ufshcd_read_string_desc()
...

+5787 -3711
+2
Documentation/devicetree/bindings/ufs/ufshcd-pltfrm.txt
··· 54 54 PHY reset from the UFS controller. 55 55 - resets : reset node register 56 56 - reset-names : describe reset node register, the "rst" corresponds to reset the whole UFS IP. 57 + - reset-gpios : A phandle and gpio specifier denoting the GPIO connected 58 + to the RESET pin of the UFS memory device. 57 59 58 60 Note: If above properties are not defined it can be assumed that the supply 59 61 regulators or clocks are always on.
+2
arch/arm64/boot/dts/qcom/sdm845-db845c.dts
··· 497 497 &ufs_mem_hc { 498 498 status = "okay"; 499 499 500 + reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; 501 + 500 502 vcc-supply = <&vreg_l20a_2p95>; 501 503 vcc-max-microamp = <800000>; 502 504 };
+2
arch/arm64/boot/dts/qcom/sdm845-mtp.dts
··· 388 388 &ufs_mem_hc { 389 389 status = "okay"; 390 390 391 + reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; 392 + 391 393 vcc-supply = <&vreg_l20a_2p95>; 392 394 vcc-max-microamp = <600000>; 393 395 };
+3 -6
drivers/scsi/aic94xx/aic94xx_init.c
··· 565 565 if (asd_ha->hw_prof.scb_ext) 566 566 asd_free_coherent(asd_ha, asd_ha->hw_prof.scb_ext); 567 567 568 - if (asd_ha->hw_prof.ddb_bitmap) 569 - kfree(asd_ha->hw_prof.ddb_bitmap); 568 + kfree(asd_ha->hw_prof.ddb_bitmap); 570 569 asd_ha->hw_prof.ddb_bitmap = NULL; 571 570 572 571 for (i = 0; i < ASD_MAX_PHYS; i++) { ··· 640 641 641 642 static void asd_destroy_global_caches(void) 642 643 { 643 - if (asd_dma_token_cache) 644 - kmem_cache_destroy(asd_dma_token_cache); 644 + kmem_cache_destroy(asd_dma_token_cache); 645 645 asd_dma_token_cache = NULL; 646 646 647 - if (asd_ascb_cache) 648 - kmem_cache_destroy(asd_ascb_cache); 647 + kmem_cache_destroy(asd_ascb_cache); 649 648 asd_ascb_cache = NULL; 650 649 } 651 650
+1 -1
drivers/scsi/bfa/bfad_im.c
··· 536 536 struct device *dev) 537 537 { 538 538 struct bfad_im_port_pointer *im_portp; 539 - int error = 1; 539 + int error; 540 540 541 541 mutex_lock(&bfad_mutex); 542 542 error = idr_alloc(&bfad_im_port_index, im_port, 0, 0, GFP_KERNEL);
-2
drivers/scsi/bnx2fc/bnx2fc_fcoe.c
··· 428 428 struct fc_lport *lport; 429 429 struct bnx2fc_interface *interface; 430 430 struct fcoe_ctlr *ctlr; 431 - struct fc_frame_header *fh; 432 431 struct fcoe_rcv_info *fr; 433 432 struct fcoe_percpu_s *bg; 434 433 struct sk_buff *tmp_skb; ··· 462 463 goto err; 463 464 464 465 skb_set_transport_header(skb, sizeof(struct fcoe_hdr)); 465 - fh = (struct fc_frame_header *) skb_transport_header(skb); 466 466 467 467 fr = fcoe_dev_from_skb(skb); 468 468 fr->fr_dev = lport;
-16
drivers/scsi/bnx2fc/bnx2fc_hwi.c
··· 633 633 u16 xid; 634 634 u32 frame_len, len; 635 635 struct bnx2fc_cmd *io_req = NULL; 636 - struct fcoe_task_ctx_entry *task, *task_page; 637 636 struct bnx2fc_interface *interface = tgt->port->priv; 638 637 struct bnx2fc_hba *hba = interface->hba; 639 638 int task_idx, index; ··· 710 711 711 712 task_idx = xid / BNX2FC_TASKS_PER_PAGE; 712 713 index = xid % BNX2FC_TASKS_PER_PAGE; 713 - task_page = (struct fcoe_task_ctx_entry *) 714 - hba->task_ctx[task_idx]; 715 - task = &(task_page[index]); 716 714 717 715 io_req = (struct bnx2fc_cmd *)hba->cmd_mgr->cmds[xid]; 718 716 if (!io_req) ··· 835 839 836 840 task_idx = xid / BNX2FC_TASKS_PER_PAGE; 837 841 index = xid % BNX2FC_TASKS_PER_PAGE; 838 - task_page = (struct fcoe_task_ctx_entry *) 839 - interface->hba->task_ctx[task_idx]; 840 - task = &(task_page[index]); 841 842 io_req = (struct bnx2fc_cmd *)hba->cmd_mgr->cmds[xid]; 842 843 if (!io_req) 843 844 goto ret_warn_rqe; ··· 1115 1122 struct fcoe_kcqe *ofld_kcqe) 1116 1123 { 1117 1124 struct bnx2fc_rport *tgt; 1118 - struct fcoe_port *port; 1119 1125 struct bnx2fc_interface *interface; 1120 1126 u32 conn_id; 1121 1127 u32 context_id; ··· 1128 1136 } 1129 1137 BNX2FC_TGT_DBG(tgt, "Entered ofld compl - context_id = 0x%x\n", 1130 1138 ofld_kcqe->fcoe_conn_context_id); 1131 - port = tgt->port; 1132 1139 interface = tgt->port->priv; 1133 1140 if (hba != interface->hba) { 1134 1141 printk(KERN_ERR PFX "ERROR:ofld_cmpl: HBA mis-match\n"); ··· 1454 1463 { 1455 1464 struct scsi_cmnd *sc_cmd = orig_io_req->sc_cmd; 1456 1465 struct bnx2fc_rport *tgt = seq_clnp_req->tgt; 1457 - struct bnx2fc_interface *interface = tgt->port->priv; 1458 1466 struct fcoe_bd_ctx *bd = orig_io_req->bd_tbl->bd_tbl; 1459 - struct fcoe_task_ctx_entry *orig_task; 1460 - struct fcoe_task_ctx_entry *task_page; 1461 1467 struct fcoe_ext_mul_sges_ctx *sgl; 1462 1468 u8 task_type = FCOE_TASK_TYPE_SEQUENCE_CLEANUP; 1463 1469 u8 orig_task_type; ··· 1515 1527 } else { 1516 1528 orig_task_idx = orig_xid / BNX2FC_TASKS_PER_PAGE; 1517 1529 index = orig_xid % BNX2FC_TASKS_PER_PAGE; 1518 - 1519 - task_page = (struct fcoe_task_ctx_entry *) 1520 - interface->hba->task_ctx[orig_task_idx]; 1521 - orig_task = &(task_page[index]); 1522 1530 1523 1531 /* Multiple SGEs were used for this IO */ 1524 1532 sgl = &task->rxwr_only.union_ctx.read_info.sgl_ctx.sgl;
-7
drivers/scsi/bnx2fc/bnx2fc_io.c
··· 930 930 int bnx2fc_initiate_seq_cleanup(struct bnx2fc_cmd *orig_io_req, u32 offset, 931 931 enum fc_rctl r_ctl) 932 932 { 933 - struct fc_lport *lport; 934 933 struct bnx2fc_rport *tgt = orig_io_req->tgt; 935 934 struct bnx2fc_interface *interface; 936 935 struct fcoe_port *port; ··· 947 948 948 949 port = orig_io_req->port; 949 950 interface = port->priv; 950 - lport = port->lport; 951 951 952 952 cb_arg = kzalloc(sizeof(struct bnx2fc_els_cb_arg), GFP_ATOMIC); 953 953 if (!cb_arg) { ··· 997 999 998 1000 int bnx2fc_initiate_cleanup(struct bnx2fc_cmd *io_req) 999 1001 { 1000 - struct fc_lport *lport; 1001 1002 struct bnx2fc_rport *tgt = io_req->tgt; 1002 1003 struct bnx2fc_interface *interface; 1003 1004 struct fcoe_port *port; ··· 1012 1015 1013 1016 port = io_req->port; 1014 1017 interface = port->priv; 1015 - lport = port->lport; 1016 1018 1017 1019 cleanup_io_req = bnx2fc_elstm_alloc(tgt, BNX2FC_CLEANUP); 1018 1020 if (!cleanup_io_req) { ··· 1923 1927 struct fcoe_fcp_rsp_payload *fcp_rsp; 1924 1928 struct bnx2fc_rport *tgt = io_req->tgt; 1925 1929 struct scsi_cmnd *sc_cmd; 1926 - struct Scsi_Host *host; 1927 - 1928 1930 1929 1931 /* scsi_cmd_cmpl is called with tgt lock held */ 1930 1932 ··· 1951 1957 /* parse fcp_rsp and obtain sense data from RQ if available */ 1952 1958 bnx2fc_parse_fcp_rsp(io_req, fcp_rsp, num_rq); 1953 1959 1954 - host = sc_cmd->device->host; 1955 1960 if (!sc_cmd->SCp.ptr) { 1956 1961 printk(KERN_ERR PFX "SCp.ptr is NULL\n"); 1957 1962 return;
+2 -6
drivers/scsi/csiostor/csio_wr.c
··· 1316 1316 u32 fl_align = clsz < 32 ? 32 : clsz; 1317 1317 u32 pack_align; 1318 1318 u32 ingpad, ingpack; 1319 - int pcie_cap; 1320 1319 1321 1320 csio_wr_reg32(hw, HOSTPAGESIZEPF0_V(s_hps) | HOSTPAGESIZEPF1_V(s_hps) | 1322 1321 HOSTPAGESIZEPF2_V(s_hps) | HOSTPAGESIZEPF3_V(s_hps) | ··· 1346 1347 * multiple of the Maximum Payload Size. 1347 1348 */ 1348 1349 pack_align = fl_align; 1349 - pcie_cap = pci_find_capability(hw->pdev, PCI_CAP_ID_EXP); 1350 - if (pcie_cap) { 1350 + if (pci_is_pcie(hw->pdev)) { 1351 1351 u32 mps, mps_log; 1352 1352 u16 devctl; 1353 1353 ··· 1354 1356 * [bits 7:5] encodes sizes as powers of 2 starting at 1355 1357 * 128 bytes. 1356 1358 */ 1357 - pci_read_config_word(hw->pdev, 1358 - pcie_cap + PCI_EXP_DEVCTL, 1359 - &devctl); 1359 + pcie_capability_read_word(hw->pdev, PCI_EXP_DEVCTL, &devctl); 1360 1360 mps_log = ((devctl & PCI_EXP_DEVCTL_PAYLOAD) >> 5) + 7; 1361 1361 mps = 1 << mps_log; 1362 1362 if (mps > pack_align)
+10 -2
drivers/scsi/cxlflash/main.c
··· 753 753 /* SISL_MSI_ASYNC_ERROR is setup only for the primary HWQ */ 754 754 if (index == PRIMARY_HWQ) 755 755 cfg->ops->unmap_afu_irq(hwq->ctx_cookie, 3, hwq); 756 + /* fall through */ 756 757 case UNMAP_TWO: 757 758 cfg->ops->unmap_afu_irq(hwq->ctx_cookie, 2, hwq); 759 + /* fall through */ 758 760 case UNMAP_ONE: 759 761 cfg->ops->unmap_afu_irq(hwq->ctx_cookie, 1, hwq); 762 + /* fall through */ 760 763 case FREE_IRQ: 761 764 cfg->ops->free_afu_irqs(hwq->ctx_cookie); 762 765 /* fall through */ ··· 976 973 switch (cfg->init_state) { 977 974 case INIT_STATE_CDEV: 978 975 cxlflash_release_chrdev(cfg); 976 + /* fall through */ 979 977 case INIT_STATE_SCSI: 980 978 cxlflash_term_local_luns(cfg); 981 979 scsi_remove_host(cfg->host); 980 + /* fall through */ 982 981 case INIT_STATE_AFU: 983 982 term_afu(cfg); 983 + /* fall through */ 984 984 case INIT_STATE_PCI: 985 985 cfg->ops->destroy_afu(cfg->afu_cookie); 986 986 pci_disable_device(pdev); 987 + /* fall through */ 987 988 case INIT_STATE_NONE: 988 989 free_mem(cfg); 989 990 scsi_host_put(cfg->host); ··· 2360 2353 cxlflash_schedule_async_reset(cfg); 2361 2354 break; 2362 2355 } 2363 - /* fall through to retry */ 2356 + /* fall through - to retry */ 2364 2357 case -EAGAIN: 2365 2358 if (++nretry < 2) 2366 2359 goto retry; 2367 - /* fall through to exit */ 2360 + /* fall through - to exit */ 2368 2361 default: 2369 2362 break; 2370 2363 } ··· 3024 3017 wait_event(cfg->reset_waitq, cfg->state != STATE_RESET); 3025 3018 if (cfg->state == STATE_NORMAL) 3026 3019 goto retry; 3020 + /* else, fall through */ 3027 3021 default: 3028 3022 /* Ideally should not happen */ 3029 3023 dev_err(dev, "%s: Device is not ready, state=%d\n",
+2
drivers/scsi/device_handler/scsi_dh_rdac.c
··· 546 546 spin_unlock(&ctlr->ms_lock); 547 547 548 548 retry: 549 + memset(cdb, 0, sizeof(cdb)); 550 + 549 551 data_size = rdac_failover_get(ctlr, &list, cdb); 550 552 551 553 RDAC_LOG(RDAC_LOG_FAILOVER, sdev, "array %s, ctlr %d, "
+4 -9
drivers/scsi/esas2r/esas2r_init.c
··· 762 762 763 763 static void esas2r_init_pci_cfg_space(struct esas2r_adapter *a) 764 764 { 765 - int pcie_cap_reg; 766 - 767 - pcie_cap_reg = pci_find_capability(a->pcid, PCI_CAP_ID_EXP); 768 - if (pcie_cap_reg) { 765 + if (pci_is_pcie(a->pcid)) { 769 766 u16 devcontrol; 770 767 771 - pci_read_config_word(a->pcid, pcie_cap_reg + PCI_EXP_DEVCTL, 772 - &devcontrol); 768 + pcie_capability_read_word(a->pcid, PCI_EXP_DEVCTL, &devcontrol); 773 769 774 770 if ((devcontrol & PCI_EXP_DEVCTL_READRQ) > 775 771 PCI_EXP_DEVCTL_READRQ_512B) { ··· 774 778 775 779 devcontrol &= ~PCI_EXP_DEVCTL_READRQ; 776 780 devcontrol |= PCI_EXP_DEVCTL_READRQ_512B; 777 - pci_write_config_word(a->pcid, 778 - pcie_cap_reg + PCI_EXP_DEVCTL, 779 - devcontrol); 781 + pcie_capability_write_word(a->pcid, PCI_EXP_DEVCTL, 782 + devcontrol); 780 783 } 781 784 } 782 785 }
+5 -9
drivers/scsi/esas2r/esas2r_ioctl.c
··· 757 757 758 758 struct atto_hba_get_adapter_info *gai = 759 759 &hi->data.get_adap_info; 760 - int pcie_cap_reg; 761 760 762 761 if (hi->flags & HBAF_TUNNEL) { 763 762 hi->status = ATTO_STS_UNSUPPORTED; ··· 783 784 gai->pci.dev_num = PCI_SLOT(a->pcid->devfn); 784 785 gai->pci.func_num = PCI_FUNC(a->pcid->devfn); 785 786 786 - pcie_cap_reg = pci_find_capability(a->pcid, PCI_CAP_ID_EXP); 787 - if (pcie_cap_reg) { 787 + if (pci_is_pcie(a->pcid)) { 788 788 u16 stat; 789 789 u32 caps; 790 790 791 - pci_read_config_word(a->pcid, 792 - pcie_cap_reg + PCI_EXP_LNKSTA, 793 - &stat); 794 - pci_read_config_dword(a->pcid, 795 - pcie_cap_reg + PCI_EXP_LNKCAP, 796 - &caps); 791 + pcie_capability_read_word(a->pcid, PCI_EXP_LNKSTA, 792 + &stat); 793 + pcie_capability_read_dword(a->pcid, PCI_EXP_LNKCAP, 794 + &caps); 797 795 798 796 gai->pci.link_speed_curr = 799 797 (u8)(stat & PCI_EXP_LNKSTA_CLS);
+11 -6
drivers/scsi/fcoe/fcoe.c
··· 1250 1250 /* attach to scsi transport */ 1251 1251 fcoe_nport_scsi_transport = 1252 1252 fc_attach_transport(&fcoe_nport_fc_functions); 1253 + if (!fcoe_nport_scsi_transport) 1254 + goto err; 1255 + 1253 1256 fcoe_vport_scsi_transport = 1254 1257 fc_attach_transport(&fcoe_vport_fc_functions); 1255 - 1256 - if (!fcoe_nport_scsi_transport) { 1257 - printk(KERN_ERR "fcoe: Failed to attach to the FC transport\n"); 1258 - return -ENODEV; 1259 - } 1258 + if (!fcoe_vport_scsi_transport) 1259 + goto err_vport; 1260 1260 1261 1261 return 0; 1262 + 1263 + err_vport: 1264 + fc_release_transport(fcoe_nport_scsi_transport); 1265 + err: 1266 + printk(KERN_ERR "fcoe: Failed to attach to the FC transport\n"); 1267 + return -ENODEV; 1262 1268 } 1263 1269 1264 1270 /** ··· 1623 1617 else 1624 1618 fr_flags(fp) |= FCPHF_CRC_UNCHECKED; 1625 1619 1626 - fh = (struct fc_frame_header *) skb_transport_header(skb); 1627 1620 fh = fc_frame_header_get(fp); 1628 1621 if (fh->fh_r_ctl == FC_RCTL_DD_SOL_DATA && fh->fh_type == FC_TYPE_FCP) 1629 1622 return 0;
+3 -3
drivers/scsi/fdomain.c
··· 166 166 167 167 static void fdomain_reset(int base) 168 168 { 169 - outb(1, base + REG_BCTL); 169 + outb(BCTL_RST, base + REG_BCTL); 170 170 mdelay(20); 171 171 outb(0, base + REG_BCTL); 172 172 mdelay(1150); ··· 306 306 status = inb(fd->base + REG_BSTAT); 307 307 308 308 if (status & BSTAT_REQ) { 309 - switch (status & 0x0e) { 309 + switch (status & (BSTAT_MSG | BSTAT_CMD | BSTAT_IO)) { 310 310 case BSTAT_CMD: /* COMMAND OUT */ 311 311 outb(cmd->cmnd[cmd->SCp.sent_command++], 312 312 fd->base + REG_SCSI_DATA); ··· 331 331 case BSTAT_MSG | BSTAT_CMD: /* MESSAGE OUT */ 332 332 outb(MESSAGE_REJECT, fd->base + REG_SCSI_DATA); 333 333 break; 334 - case BSTAT_MSG | BSTAT_IO | BSTAT_CMD: /* MESSAGE IN */ 334 + case BSTAT_MSG | BSTAT_CMD | BSTAT_IO: /* MESSAGE IN */ 335 335 cmd->SCp.Message = inb(fd->base + REG_SCSI_DATA); 336 336 if (!cmd->SCp.Message) 337 337 ++done;
+2 -3
drivers/scsi/fdomain_isa.c
··· 131 131 if (!request_region(base, FDOMAIN_REGION_SIZE, "fdomain_isa")) 132 132 return 0; 133 133 134 - irq = irqs[(inb(base + REG_CFG1) & 0x0e) >> 1]; 135 - 134 + irq = irqs[(inb(base + REG_CFG1) & CFG1_IRQ_MASK) >> 1]; 136 135 137 136 if (sig) 138 137 this_id = sig->this_id; ··· 163 164 } 164 165 165 166 if (irq_ <= 0) 166 - irq_ = irqs[(inb(io[ndev] + REG_CFG1) & 0x0e) >> 1]; 167 + irq_ = irqs[(inb(io[ndev] + REG_CFG1) & CFG1_IRQ_MASK) >> 1]; 167 168 168 169 sh = fdomain_create(io[ndev], irq_, scsi_id[ndev], dev); 169 170 if (!sh) {
+1 -3
drivers/scsi/fnic/fnic_debugfs.c
··· 52 52 */ 53 53 int fnic_debugfs_init(void) 54 54 { 55 - int rc = -1; 56 55 fnic_trace_debugfs_root = debugfs_create_dir("fnic", NULL); 57 56 58 57 fnic_stats_debugfs_root = debugfs_create_dir("statistics", ··· 69 70 fc_trc_flag->fc_clear = 4; 70 71 } 71 72 72 - rc = 0; 73 - return rc; 73 + return 0; 74 74 } 75 75 76 76 /*
+10 -4
drivers/scsi/fnic/fnic_fcs.c
··· 52 52 unsigned long flags; 53 53 int old_link_status; 54 54 u32 old_link_down_cnt; 55 + u64 old_port_speed, new_port_speed; 55 56 56 57 spin_lock_irqsave(&fnic->fnic_lock, flags); 57 58 ··· 63 62 64 63 old_link_down_cnt = fnic->link_down_cnt; 65 64 old_link_status = fnic->link_status; 65 + old_port_speed = atomic64_read( 66 + &fnic->fnic_stats.misc_stats.current_port_speed); 67 + 66 68 fnic->link_status = vnic_dev_link_status(fnic->vdev); 67 69 fnic->link_down_cnt = vnic_dev_link_down_cnt(fnic->vdev); 68 70 71 + new_port_speed = vnic_dev_port_speed(fnic->vdev); 69 72 atomic64_set(&fnic->fnic_stats.misc_stats.current_port_speed, 70 - vnic_dev_port_speed(fnic->vdev)); 71 - shost_printk(KERN_INFO, fnic->lport->host, "Current vnic speed set to : %llu\n", 72 - (u64)atomic64_read( 73 - &fnic->fnic_stats.misc_stats.current_port_speed)); 73 + new_port_speed); 74 + if (old_port_speed != new_port_speed) 75 + shost_printk(KERN_INFO, fnic->lport->host, 76 + "Current vnic speed set to : %llu\n", 77 + new_port_speed); 74 78 75 79 switch (vnic_dev_port_speed(fnic->vdev)) { 76 80 case DCEM_PORTSPEED_10G:
+2 -2
drivers/scsi/fnic/fnic_isr.c
··· 254 254 int vecs = n + m + o + 1; 255 255 256 256 if (pci_alloc_irq_vectors(fnic->pdev, vecs, vecs, 257 - PCI_IRQ_MSIX) < 0) { 257 + PCI_IRQ_MSIX) == vecs) { 258 258 fnic->rq_count = n; 259 259 fnic->raw_wq_count = m; 260 260 fnic->wq_copy_count = o; ··· 280 280 fnic->wq_copy_count >= 1 && 281 281 fnic->cq_count >= 3 && 282 282 fnic->intr_count >= 1 && 283 - pci_alloc_irq_vectors(fnic->pdev, 1, 1, PCI_IRQ_MSI) < 0) { 283 + pci_alloc_irq_vectors(fnic->pdev, 1, 1, PCI_IRQ_MSI) == 1) { 284 284 fnic->rq_count = 1; 285 285 fnic->raw_wq_count = 1; 286 286 fnic->wq_copy_count = 1;
+1 -1
drivers/scsi/fnic/fnic_trace.c
··· 453 453 (u64)atomic64_read(&stats->misc_stats.frame_errors)); 454 454 455 455 len += snprintf(debug->debug_buffer + len, buf_size - len, 456 - "Firmware reported port seed: %llu\n", 456 + "Firmware reported port speed: %llu\n", 457 457 (u64)atomic64_read( 458 458 &stats->misc_stats.current_port_speed)); 459 459
+43 -11
drivers/scsi/hisi_sas/hisi_sas.h
··· 31 31 #define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES 32 32 #define HISI_SAS_RESET_BIT 0 33 33 #define HISI_SAS_REJECT_CMD_BIT 1 34 - #define HISI_SAS_RESERVED_IPTT_CNT 96 34 + #define HISI_SAS_MAX_COMMANDS (HISI_SAS_QUEUE_SLOTS) 35 + #define HISI_SAS_RESERVED_IPTT 96 36 + #define HISI_SAS_UNRESERVED_IPTT \ 37 + (HISI_SAS_MAX_COMMANDS - HISI_SAS_RESERVED_IPTT) 38 + 39 + #define HISI_SAS_IOST_ITCT_CACHE_NUM 64 40 + #define HISI_SAS_IOST_ITCT_CACHE_DW_SZ 10 35 41 36 42 #define HISI_SAS_STATUS_BUF_SZ (sizeof(struct hisi_sas_status_buffer)) 37 43 #define HISI_SAS_COMMAND_TABLE_SZ (sizeof(union hisi_sas_command_table)) ··· 134 128 135 129 #define HISI_SAS_DECLARE_RST_WORK_ON_STACK(r) \ 136 130 DECLARE_COMPLETION_ONSTACK(c); \ 137 - DECLARE_WORK(w, hisi_sas_sync_rst_work_handler); \ 138 131 struct hisi_sas_rst r = HISI_SAS_RST_WORK_INIT(r, c) 139 132 140 133 enum hisi_sas_bit_err_type { ··· 254 249 }; 255 250 }; 256 251 252 + struct hisi_sas_iost_itct_cache { 253 + u32 data[HISI_SAS_IOST_ITCT_CACHE_DW_SZ]; 254 + }; 255 + 256 + enum hisi_sas_debugfs_reg_array_member { 257 + DEBUGFS_GLOBAL = 0, 258 + DEBUGFS_AXI, 259 + DEBUGFS_RAS, 260 + DEBUGFS_REGS_NUM 261 + }; 262 + 263 + enum hisi_sas_debugfs_cache_type { 264 + HISI_SAS_ITCT_CACHE, 265 + HISI_SAS_IOST_CACHE, 266 + }; 267 + 257 268 struct hisi_sas_hw { 258 269 int (*hw_init)(struct hisi_hba *hisi_hba); 259 270 void (*setup_itct)(struct hisi_hba *hisi_hba, ··· 278 257 struct domain_device *device); 279 258 struct hisi_sas_device *(*alloc_dev)(struct domain_device *device); 280 259 void (*sl_notify_ssp)(struct hisi_hba *hisi_hba, int phy_no); 281 - int (*get_free_slot)(struct hisi_hba *hisi_hba, struct hisi_sas_dq *dq); 282 260 void (*start_delivery)(struct hisi_sas_dq *dq); 283 261 void (*prep_ssp)(struct hisi_hba *hisi_hba, 284 262 struct hisi_sas_slot *slot); ··· 288 268 void (*prep_abort)(struct hisi_hba *hisi_hba, 289 269 struct hisi_sas_slot *slot, 290 270 int device_id, int abort_flag, int tag_to_abort); 291 - int (*slot_complete)(struct hisi_hba *hisi_hba, 292 - struct hisi_sas_slot *slot); 293 271 void (*phys_init)(struct hisi_hba *hisi_hba); 294 272 void (*phy_start)(struct hisi_hba *hisi_hba, int phy_no); 295 273 void (*phy_disable)(struct hisi_hba *hisi_hba, int phy_no); ··· 306 288 u32 (*get_phys_state)(struct hisi_hba *hisi_hba); 307 289 int (*write_gpio)(struct hisi_hba *hisi_hba, u8 reg_type, 308 290 u8 reg_index, u8 reg_count, u8 *write_data); 309 - int (*wait_cmds_complete_timeout)(struct hisi_hba *hisi_hba, 310 - int delay_ms, int timeout_ms); 291 + void (*wait_cmds_complete_timeout)(struct hisi_hba *hisi_hba, 292 + int delay_ms, int timeout_ms); 311 293 void (*snapshot_prepare)(struct hisi_hba *hisi_hba); 312 294 void (*snapshot_restore)(struct hisi_hba *hisi_hba); 313 - int max_command_entries; 295 + int (*set_bist)(struct hisi_hba *hisi_hba, bool enable); 296 + void (*read_iost_itct_cache)(struct hisi_hba *hisi_hba, 297 + enum hisi_sas_debugfs_cache_type type, 298 + u32 *cache); 314 299 int complete_hdr_size; 315 300 struct scsi_host_template *sht; 316 301 317 - const struct hisi_sas_debugfs_reg *debugfs_reg_global; 302 + const struct hisi_sas_debugfs_reg *debugfs_reg_array[DEBUGFS_REGS_NUM]; 318 303 const struct hisi_sas_debugfs_reg *debugfs_reg_port; 319 304 }; 320 305 ··· 392 371 int cq_nvecs; 393 372 unsigned int *reply_map; 394 373 374 + /* bist */ 375 + enum sas_linkrate debugfs_bist_linkrate; 376 + int debugfs_bist_code_mode; 377 + int debugfs_bist_phy_no; 378 + int debugfs_bist_mode; 379 + u32 debugfs_bist_cnt; 380 + int debugfs_bist_enable; 381 + 395 382 /* debugfs memories */ 396 - u32 *debugfs_global_reg; 383 + /* Put Global AXI and RAS Register into register array */ 384 + u32 *debugfs_regs[DEBUGFS_REGS_NUM]; 397 385 u32 *debugfs_port_reg[HISI_SAS_MAX_PHYS]; 398 386 void *debugfs_complete_hdr[HISI_SAS_MAX_QUEUES]; 399 387 struct hisi_sas_cmd_hdr *debugfs_cmd_hdr[HISI_SAS_MAX_QUEUES]; 400 388 struct hisi_sas_iost *debugfs_iost; 401 389 struct hisi_sas_itct *debugfs_itct; 390 + u64 *debugfs_iost_cache; 391 + u64 *debugfs_itct_cache; 402 392 403 393 struct dentry *debugfs_dir; 404 394 struct dentry *debugfs_dump_dentry; 395 + struct dentry *debugfs_bist_dentry; 405 396 bool debugfs_snapshot; 406 397 }; 407 398 ··· 566 533 extern struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port); 567 534 extern void hisi_sas_sata_done(struct sas_task *task, 568 535 struct hisi_sas_slot *slot); 569 - extern int hisi_sas_get_ncq_tag(struct sas_task *task, u32 *tag); 570 536 extern int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba); 571 537 extern int hisi_sas_probe(struct platform_device *pdev, 572 538 const struct hisi_sas_hw *ops);
+809 -225
drivers/scsi/hisi_sas/hisi_sas_main.c
··· 118 118 } 119 119 EXPORT_SYMBOL_GPL(hisi_sas_sata_done); 120 120 121 - int hisi_sas_get_ncq_tag(struct sas_task *task, u32 *tag) 122 - { 123 - struct ata_queued_cmd *qc = task->uldd_task; 124 - 125 - if (qc) { 126 - if (qc->tf.command == ATA_CMD_FPDMA_WRITE || 127 - qc->tf.command == ATA_CMD_FPDMA_READ) { 128 - *tag = qc->tag; 129 - return 1; 130 - } 131 - } 132 - return 0; 133 - } 134 - EXPORT_SYMBOL_GPL(hisi_sas_get_ncq_tag); 135 - 136 121 /* 137 122 * This function assumes linkrate mask fits in 8 bits, which it 138 123 * does for all HW versions supported. ··· 165 180 { 166 181 unsigned long flags; 167 182 168 - if (hisi_hba->hw->slot_index_alloc || (slot_idx >= 169 - hisi_hba->hw->max_command_entries - HISI_SAS_RESERVED_IPTT_CNT)) { 183 + if (hisi_hba->hw->slot_index_alloc || 184 + slot_idx >= HISI_SAS_UNRESERVED_IPTT) { 170 185 spin_lock_irqsave(&hisi_hba->lock, flags); 171 186 hisi_sas_slot_index_clear(hisi_hba, slot_idx); 172 187 spin_unlock_irqrestore(&hisi_hba->lock, flags); ··· 196 211 if (index >= hisi_hba->slot_index_count) { 197 212 index = find_next_zero_bit(bitmap, 198 213 hisi_hba->slot_index_count, 199 - hisi_hba->hw->max_command_entries - 200 - HISI_SAS_RESERVED_IPTT_CNT); 214 + HISI_SAS_UNRESERVED_IPTT); 201 215 if (index >= hisi_hba->slot_index_count) { 202 216 spin_unlock_irqrestore(&hisi_hba->lock, flags); 203 217 return -SAS_QUEUE_FULL; ··· 285 301 286 302 static void hisi_sas_dma_unmap(struct hisi_hba *hisi_hba, 287 303 struct sas_task *task, int n_elem, 288 - int n_elem_req, int n_elem_resp) 304 + int n_elem_req) 289 305 { 290 306 struct device *dev = hisi_hba->dev; 291 307 ··· 299 315 if (n_elem_req) 300 316 dma_unmap_sg(dev, &task->smp_task.smp_req, 301 317 1, DMA_TO_DEVICE); 302 - if (n_elem_resp) 303 - dma_unmap_sg(dev, &task->smp_task.smp_resp, 304 - 1, DMA_FROM_DEVICE); 305 318 } 306 319 } 307 320 } 308 321 309 322 static int hisi_sas_dma_map(struct hisi_hba *hisi_hba, 310 323 struct sas_task *task, int *n_elem, 311 - int *n_elem_req, int *n_elem_resp) 324 + int *n_elem_req) 312 325 { 313 326 struct device *dev = hisi_hba->dev; 314 327 int rc; ··· 313 332 if (sas_protocol_ata(task->task_proto)) { 314 333 *n_elem = task->num_scatter; 315 334 } else { 316 - unsigned int req_len, resp_len; 335 + unsigned int req_len; 317 336 318 337 if (task->num_scatter) { 319 338 *n_elem = dma_map_sg(dev, task->scatter, ··· 334 353 rc = -EINVAL; 335 354 goto err_out_dma_unmap; 336 355 } 337 - *n_elem_resp = dma_map_sg(dev, &task->smp_task.smp_resp, 338 - 1, DMA_FROM_DEVICE); 339 - if (!*n_elem_resp) { 340 - rc = -ENOMEM; 341 - goto err_out_dma_unmap; 342 - } 343 - resp_len = sg_dma_len(&task->smp_task.smp_resp); 344 - if (resp_len & 0x3) { 345 - rc = -EINVAL; 346 - goto err_out_dma_unmap; 347 - } 348 356 } 349 357 } 350 358 ··· 348 378 err_out_dma_unmap: 349 379 /* It would be better to call dma_unmap_sg() here, but it's messy */ 350 380 hisi_sas_dma_unmap(hisi_hba, task, *n_elem, 351 - *n_elem_req, *n_elem_resp); 381 + *n_elem_req); 352 382 prep_out: 353 383 return rc; 354 384 } ··· 420 450 struct asd_sas_port *sas_port = device->port; 421 451 struct device *dev = hisi_hba->dev; 422 452 int dlvry_queue_slot, dlvry_queue, rc, slot_idx; 423 - int n_elem = 0, n_elem_dif = 0, n_elem_req = 0, n_elem_resp = 0; 453 + int n_elem = 0, n_elem_dif = 0, n_elem_req = 0; 424 454 struct hisi_sas_dq *dq; 425 455 unsigned long flags; 426 456 int wr_q_index; ··· 456 486 } 457 487 458 488 rc = hisi_sas_dma_map(hisi_hba, task, &n_elem, 459 - &n_elem_req, &n_elem_resp); 489 + &n_elem_req); 460 490 if (rc < 0) 461 491 goto prep_out; 462 492 ··· 490 520 slot = &hisi_hba->slot_info[slot_idx]; 491 521 492 522 spin_lock_irqsave(&dq->lock, flags); 493 - wr_q_index = hisi_hba->hw->get_free_slot(hisi_hba, dq); 494 - if (wr_q_index < 0) { 495 - spin_unlock_irqrestore(&dq->lock, flags); 496 - rc = -EAGAIN; 497 - goto err_out_tag; 498 - } 499 - 523 + wr_q_index = dq->wr_point; 524 + dq->wr_point = (dq->wr_point + 1) % HISI_SAS_QUEUE_SLOTS; 500 525 list_add_tail(&slot->delivery, &dq->list); 501 526 spin_unlock_irqrestore(&dq->lock, flags); 502 527 spin_lock_irqsave(&sas_dev->lock, flags); ··· 516 551 517 552 memset(slot->cmd_hdr, 0, sizeof(struct hisi_sas_cmd_hdr)); 518 553 memset(hisi_sas_cmd_hdr_addr_mem(slot), 0, HISI_SAS_COMMAND_TABLE_SZ); 519 - memset(hisi_sas_status_buf_addr_mem(slot), 0, HISI_SAS_STATUS_BUF_SZ); 554 + memset(hisi_sas_status_buf_addr_mem(slot), 0, 555 + sizeof(struct hisi_sas_err_record)); 520 556 521 557 switch (task->task_proto) { 522 558 case SAS_PROTOCOL_SMP: ··· 546 580 547 581 return 0; 548 582 549 - err_out_tag: 550 - hisi_sas_slot_index_free(hisi_hba, slot_idx); 551 583 err_out_dif_dma_unmap: 552 584 if (!sas_protocol_ata(task->task_proto)) 553 585 hisi_sas_dif_dma_unmap(hisi_hba, task, n_elem_dif); 554 586 err_out_dma_unmap: 555 587 hisi_sas_dma_unmap(hisi_hba, task, n_elem, 556 - n_elem_req, n_elem_resp); 588 + n_elem_req); 557 589 prep_out: 558 590 dev_err(dev, "task prep: failed[%d]!\n", rc); 559 591 return rc; ··· 683 719 return sas_dev; 684 720 } 685 721 686 - #define HISI_SAS_SRST_ATA_DISK_CNT 3 722 + #define HISI_SAS_DISK_RECOVER_CNT 3 687 723 static int hisi_sas_init_device(struct domain_device *device) 688 724 { 689 725 int rc = TMF_RESP_FUNC_COMPLETE; 690 726 struct scsi_lun lun; 691 727 struct hisi_sas_tmf_task tmf_task; 692 - int retry = HISI_SAS_SRST_ATA_DISK_CNT; 728 + int retry = HISI_SAS_DISK_RECOVER_CNT; 693 729 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device); 694 730 struct device *dev = hisi_hba->dev; 695 731 struct sas_phy *local_phy; ··· 699 735 int_to_scsilun(0, &lun); 700 736 701 737 tmf_task.tmf = TMF_CLEAR_TASK_SET; 702 - rc = hisi_sas_debug_issue_ssp_tmf(device, lun.scsi_lun, 703 - &tmf_task); 704 - if (rc == TMF_RESP_FUNC_COMPLETE) 705 - hisi_sas_release_task(hisi_hba, device); 738 + while (retry-- > 0) { 739 + rc = hisi_sas_debug_issue_ssp_tmf(device, lun.scsi_lun, 740 + &tmf_task); 741 + if (rc == TMF_RESP_FUNC_COMPLETE) { 742 + hisi_sas_release_task(hisi_hba, device); 743 + break; 744 + } 745 + } 706 746 break; 707 747 case SAS_SATA_DEV: 708 748 case SAS_SATA_PM: ··· 1049 1081 dev_info(dev, "dev[%d:%x] is gone\n", 1050 1082 sas_dev->device_id, sas_dev->dev_type); 1051 1083 1084 + down(&hisi_hba->sem); 1052 1085 if (!test_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags)) { 1053 1086 hisi_sas_internal_task_abort(hisi_hba, device, 1054 1087 HISI_SAS_INT_ABT_DEV, 0); 1055 1088 1056 1089 hisi_sas_dereg_device(hisi_hba, device); 1057 1090 1058 - down(&hisi_hba->sem); 1059 1091 hisi_hba->hw->clear_itct(hisi_hba, sas_dev); 1060 - up(&hisi_hba->sem); 1061 1092 device->lldd_dev = NULL; 1062 1093 } 1063 1094 1064 1095 if (hisi_hba->hw->free_device) 1065 1096 hisi_hba->hw->free_device(sas_dev); 1066 1097 sas_dev->dev_type = SAS_PHY_UNUSED; 1098 + sas_dev->sas_device = NULL; 1099 + up(&hisi_hba->sem); 1067 1100 } 1068 1101 1069 1102 static int hisi_sas_queue_command(struct sas_task *task, gfp_t gfp_flags) ··· 1392 1423 } 1393 1424 } 1394 1425 1395 - static void hisi_sas_rescan_topology(struct hisi_hba *hisi_hba, u32 old_state, 1396 - u32 state) 1426 + static void hisi_sas_rescan_topology(struct hisi_hba *hisi_hba, u32 state) 1397 1427 { 1398 1428 struct sas_ha_struct *sas_ha = &hisi_hba->sha; 1399 1429 struct asd_sas_port *_sas_port = NULL; ··· 1544 1576 msleep(1000); 1545 1577 hisi_sas_refresh_port_id(hisi_hba); 1546 1578 clear_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags); 1547 - up(&hisi_hba->sem); 1548 1579 1549 1580 if (hisi_hba->reject_stp_links_msk) 1550 1581 hisi_sas_terminate_stp_reject(hisi_hba); 1551 1582 hisi_sas_reset_init_all_devices(hisi_hba); 1583 + up(&hisi_hba->sem); 1552 1584 scsi_unblock_requests(shost); 1553 1585 clear_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags); 1554 1586 1555 1587 state = hisi_hba->hw->get_phys_state(hisi_hba); 1556 - hisi_sas_rescan_topology(hisi_hba, hisi_hba->phy_state, state); 1588 + hisi_sas_rescan_topology(hisi_hba, state); 1557 1589 } 1558 1590 EXPORT_SYMBOL_GPL(hisi_sas_controller_reset_done); 1559 1591 ··· 1738 1770 struct hisi_sas_device *sas_dev = device->lldd_dev; 1739 1771 struct hisi_hba *hisi_hba = dev_to_hisi_hba(device); 1740 1772 struct sas_ha_struct *sas_ha = &hisi_hba->sha; 1741 - struct asd_sas_phy *sas_phy = sas_ha->sas_phy[local_phy->number]; 1742 - struct hisi_sas_phy *phy = container_of(sas_phy, 1743 - struct hisi_sas_phy, sas_phy); 1744 1773 DECLARE_COMPLETION_ONSTACK(phyreset); 1745 1774 int rc, reset_type; 1746 1775 1776 + if (!local_phy->enabled) { 1777 + sas_put_local_phy(local_phy); 1778 + return -ENODEV; 1779 + } 1780 + 1747 1781 if (scsi_is_sas_phy_local(local_phy)) { 1782 + struct asd_sas_phy *sas_phy = 1783 + sas_ha->sas_phy[local_phy->number]; 1784 + struct hisi_sas_phy *phy = 1785 + container_of(sas_phy, struct hisi_sas_phy, sas_phy); 1748 1786 phy->in_reset = 1; 1749 1787 phy->reset_completion = &phyreset; 1750 1788 } 1751 1789 1752 1790 reset_type = (sas_dev->dev_status == HISI_SAS_DEV_INIT || 1753 - !dev_is_sata(device)) ? 1 : 0; 1791 + !dev_is_sata(device)) ? true : false; 1754 1792 1755 1793 rc = sas_phy_reset(local_phy, reset_type); 1756 1794 sas_put_local_phy(local_phy); 1757 1795 1758 1796 if (scsi_is_sas_phy_local(local_phy)) { 1797 + struct asd_sas_phy *sas_phy = 1798 + sas_ha->sas_phy[local_phy->number]; 1799 + struct hisi_sas_phy *phy = 1800 + container_of(sas_phy, struct hisi_sas_phy, sas_phy); 1759 1801 int ret = wait_for_completion_timeout(&phyreset, 2 * HZ); 1760 1802 unsigned long flags; 1761 1803 ··· 1780 1802 } else if (sas_dev->dev_status != HISI_SAS_DEV_INIT) { 1781 1803 /* 1782 1804 * If in init state, we rely on caller to wait for link to be 1783 - * ready; otherwise, delay. 1805 + * ready; otherwise, except phy reset is fail, delay. 1784 1806 */ 1785 - msleep(2000); 1807 + if (!rc) 1808 + msleep(2000); 1786 1809 } 1787 1810 1788 1811 return rc; ··· 1824 1845 struct device *dev = hisi_hba->dev; 1825 1846 int rc = TMF_RESP_FUNC_FAILED; 1826 1847 1848 + /* Clear internal IO and then lu reset */ 1849 + rc = hisi_sas_internal_task_abort(hisi_hba, device, 1850 + HISI_SAS_INT_ABT_DEV, 0); 1851 + if (rc < 0) { 1852 + dev_err(dev, "lu_reset: internal abort failed\n"); 1853 + goto out; 1854 + } 1855 + hisi_sas_dereg_device(hisi_hba, device); 1856 + 1827 1857 if (dev_is_sata(device)) { 1828 1858 struct sas_phy *phy; 1829 1859 1830 - /* Clear internal IO and then hardreset */ 1831 - rc = hisi_sas_internal_task_abort(hisi_hba, device, 1832 - HISI_SAS_INT_ABT_DEV, 0); 1833 - if (rc < 0) { 1834 - dev_err(dev, "lu_reset: internal abort failed\n"); 1835 - goto out; 1836 - } 1837 - hisi_sas_dereg_device(hisi_hba, device); 1838 - 1839 1860 phy = sas_get_local_phy(device); 1840 1861 1841 - rc = sas_phy_reset(phy, 1); 1862 + rc = sas_phy_reset(phy, true); 1842 1863 1843 1864 if (rc == 0) 1844 1865 hisi_sas_release_task(hisi_hba, device); 1845 1866 sas_put_local_phy(phy); 1846 1867 } else { 1847 1868 struct hisi_sas_tmf_task tmf_task = { .tmf = TMF_LU_RESET }; 1848 - 1849 - rc = hisi_sas_internal_task_abort(hisi_hba, device, 1850 - HISI_SAS_INT_ABT_DEV, 0); 1851 - if (rc < 0) { 1852 - dev_err(dev, "lu_reset: internal abort failed\n"); 1853 - goto out; 1854 - } 1855 - hisi_sas_dereg_device(hisi_hba, device); 1856 1869 1857 1870 rc = hisi_sas_debug_issue_ssp_tmf(device, lun, &tmf_task); 1858 1871 if (rc == TMF_RESP_FUNC_COMPLETE) ··· 1935 1964 struct asd_sas_port *sas_port = device->port; 1936 1965 struct hisi_sas_cmd_hdr *cmd_hdr_base; 1937 1966 int dlvry_queue_slot, dlvry_queue, n_elem = 0, rc, slot_idx; 1938 - unsigned long flags, flags_dq = 0; 1967 + unsigned long flags; 1939 1968 int wr_q_index; 1940 1969 1941 1970 if (unlikely(test_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags))) ··· 1954 1983 slot_idx = rc; 1955 1984 slot = &hisi_hba->slot_info[slot_idx]; 1956 1985 1957 - spin_lock_irqsave(&dq->lock, flags_dq); 1958 - wr_q_index = hisi_hba->hw->get_free_slot(hisi_hba, dq); 1959 - if (wr_q_index < 0) { 1960 - spin_unlock_irqrestore(&dq->lock, flags_dq); 1961 - rc = -EAGAIN; 1962 - goto err_out_tag; 1963 - } 1986 + spin_lock_irqsave(&dq->lock, flags); 1987 + wr_q_index = dq->wr_point; 1988 + dq->wr_point = (dq->wr_point + 1) % HISI_SAS_QUEUE_SLOTS; 1964 1989 list_add_tail(&slot->delivery, &dq->list); 1965 - spin_unlock_irqrestore(&dq->lock, flags_dq); 1990 + spin_unlock_irqrestore(&dq->lock, flags); 1966 1991 spin_lock_irqsave(&sas_dev->lock, flags); 1967 1992 list_add_tail(&slot->entry, &sas_dev->list); 1968 1993 spin_unlock_irqrestore(&sas_dev->lock, flags); ··· 1979 2012 1980 2013 memset(slot->cmd_hdr, 0, sizeof(struct hisi_sas_cmd_hdr)); 1981 2014 memset(hisi_sas_cmd_hdr_addr_mem(slot), 0, HISI_SAS_COMMAND_TABLE_SZ); 1982 - memset(hisi_sas_status_buf_addr_mem(slot), 0, HISI_SAS_STATUS_BUF_SZ); 2015 + memset(hisi_sas_status_buf_addr_mem(slot), 0, 2016 + sizeof(struct hisi_sas_err_record)); 1983 2017 1984 2018 hisi_sas_task_prep_abort(hisi_hba, slot, device_id, 1985 2019 abort_flag, task_tag); ··· 1996 2028 1997 2029 return 0; 1998 2030 1999 - err_out_tag: 2000 - hisi_sas_slot_index_free(hisi_hba, slot_idx); 2001 2031 err_out: 2002 2032 dev_err(dev, "internal abort task prep: failed[%d]!\n", rc); 2003 2033 ··· 2055 2089 2056 2090 /* Internal abort timed out */ 2057 2091 if ((task->task_state_flags & SAS_TASK_STATE_ABORTED)) { 2092 + if (hisi_sas_debugfs_enable && hisi_hba->debugfs_itct) 2093 + queue_work(hisi_hba->wq, &hisi_hba->debugfs_work); 2094 + 2058 2095 if (!(task->task_state_flags & SAS_TASK_STATE_DONE)) { 2059 2096 struct hisi_sas_slot *slot = task->lldd_task; 2060 2097 ··· 2092 2123 } 2093 2124 2094 2125 exit: 2095 - dev_dbg(dev, "internal task abort: task to dev %016llx task=%p resp: 0x%x sts 0x%x\n", 2126 + dev_dbg(dev, "internal task abort: task to dev %016llx task=%pK resp: 0x%x sts 0x%x\n", 2096 2127 SAS_ADDR(device->sas_addr), task, 2097 2128 task->task_status.resp, /* 0 is complete, -1 is undelivered */ 2098 2129 task->task_status.stat); ··· 2260 2291 2261 2292 void hisi_sas_init_mem(struct hisi_hba *hisi_hba) 2262 2293 { 2263 - int i, s, j, max_command_entries = hisi_hba->hw->max_command_entries; 2294 + int i, s, j, max_command_entries = HISI_SAS_MAX_COMMANDS; 2264 2295 struct hisi_sas_breakpoint *sata_breakpoint = hisi_hba->sata_breakpoint; 2265 2296 2266 2297 for (i = 0; i < hisi_hba->queue_count; i++) { ··· 2297 2328 int hisi_sas_alloc(struct hisi_hba *hisi_hba) 2298 2329 { 2299 2330 struct device *dev = hisi_hba->dev; 2300 - int i, j, s, max_command_entries = hisi_hba->hw->max_command_entries; 2331 + int i, j, s, max_command_entries = HISI_SAS_MAX_COMMANDS; 2301 2332 int max_command_entries_ru, sz_slot_buf_ru; 2302 2333 int blk_cnt, slots_per_blk; 2303 2334 ··· 2348 2379 2349 2380 s = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_itct); 2350 2381 hisi_hba->itct = dmam_alloc_coherent(dev, s, &hisi_hba->itct_dma, 2351 - GFP_KERNEL | __GFP_ZERO); 2382 + GFP_KERNEL); 2352 2383 if (!hisi_hba->itct) 2353 2384 goto err_out; 2354 2385 ··· 2365 2396 else 2366 2397 sz_slot_buf_ru = sizeof(struct hisi_sas_slot_buf_table); 2367 2398 sz_slot_buf_ru = roundup(sz_slot_buf_ru, 64); 2368 - s = lcm(max_command_entries_ru, sz_slot_buf_ru); 2399 + s = max(lcm(max_command_entries_ru, sz_slot_buf_ru), PAGE_SIZE); 2369 2400 blk_cnt = (max_command_entries_ru * sz_slot_buf_ru) / s; 2370 2401 slots_per_blk = s / sz_slot_buf_ru; 2371 2402 ··· 2375 2406 void *buf; 2376 2407 2377 2408 buf = dmam_alloc_coherent(dev, s, &buf_dma, 2378 - GFP_KERNEL | __GFP_ZERO); 2409 + GFP_KERNEL); 2379 2410 if (!buf) 2380 2411 goto err_out; 2381 2412 ··· 2424 2455 GFP_KERNEL); 2425 2456 if (!hisi_hba->sata_breakpoint) 2426 2457 goto err_out; 2427 - hisi_sas_init_mem(hisi_hba); 2428 2458 2429 2459 hisi_sas_slot_index_init(hisi_hba); 2430 - hisi_hba->last_slot_index = hisi_hba->hw->max_command_entries - 2431 - HISI_SAS_RESERVED_IPTT_CNT; 2460 + hisi_hba->last_slot_index = HISI_SAS_UNRESERVED_IPTT; 2432 2461 2433 2462 hisi_hba->wq = create_singlethread_workqueue(dev_name(dev)); 2434 2463 if (!hisi_hba->wq) { ··· 2577 2610 goto err_out; 2578 2611 } 2579 2612 2580 - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2581 - hisi_hba->regs = devm_ioremap_resource(dev, res); 2613 + hisi_hba->regs = devm_platform_ioremap_resource(pdev, 0); 2582 2614 if (IS_ERR(hisi_hba->regs)) 2583 2615 goto err_out; 2584 2616 ··· 2638 2672 shost->max_channel = 1; 2639 2673 shost->max_cmd_len = 16; 2640 2674 if (hisi_hba->hw->slot_index_alloc) { 2641 - shost->can_queue = hisi_hba->hw->max_command_entries; 2642 - shost->cmd_per_lun = hisi_hba->hw->max_command_entries; 2675 + shost->can_queue = HISI_SAS_MAX_COMMANDS; 2676 + shost->cmd_per_lun = HISI_SAS_MAX_COMMANDS; 2643 2677 } else { 2644 - shost->can_queue = hisi_hba->hw->max_command_entries - 2645 - HISI_SAS_RESERVED_IPTT_CNT; 2646 - shost->cmd_per_lun = hisi_hba->hw->max_command_entries - 2647 - HISI_SAS_RESERVED_IPTT_CNT; 2678 + shost->can_queue = HISI_SAS_UNRESERVED_IPTT; 2679 + shost->cmd_per_lun = HISI_SAS_UNRESERVED_IPTT; 2648 2680 } 2649 2681 2650 2682 sha->sas_ha_name = DRV_NAME; ··· 2733 2769 2734 2770 static void hisi_sas_debugfs_snapshot_global_reg(struct hisi_hba *hisi_hba) 2735 2771 { 2736 - u32 *databuf = (u32 *)hisi_hba->debugfs_global_reg; 2772 + u32 *databuf = hisi_hba->debugfs_regs[DEBUGFS_GLOBAL]; 2773 + const struct hisi_sas_hw *hw = hisi_hba->hw; 2737 2774 const struct hisi_sas_debugfs_reg *global = 2738 - hisi_hba->hw->debugfs_reg_global; 2775 + hw->debugfs_reg_array[DEBUGFS_GLOBAL]; 2739 2776 int i; 2740 2777 2741 2778 for (i = 0; i < global->count; i++, databuf++) 2742 2779 *databuf = global->read_global_reg(hisi_hba, 4 * i); 2743 2780 } 2744 2781 2782 + static void hisi_sas_debugfs_snapshot_axi_reg(struct hisi_hba *hisi_hba) 2783 + { 2784 + u32 *databuf = hisi_hba->debugfs_regs[DEBUGFS_AXI]; 2785 + const struct hisi_sas_hw *hw = hisi_hba->hw; 2786 + const struct hisi_sas_debugfs_reg *axi = 2787 + hw->debugfs_reg_array[DEBUGFS_AXI]; 2788 + int i; 2789 + 2790 + for (i = 0; i < axi->count; i++, databuf++) 2791 + *databuf = axi->read_global_reg(hisi_hba, 2792 + 4 * i + axi->base_off); 2793 + } 2794 + 2795 + static void hisi_sas_debugfs_snapshot_ras_reg(struct hisi_hba *hisi_hba) 2796 + { 2797 + u32 *databuf = hisi_hba->debugfs_regs[DEBUGFS_RAS]; 2798 + const struct hisi_sas_hw *hw = hisi_hba->hw; 2799 + const struct hisi_sas_debugfs_reg *ras = 2800 + hw->debugfs_reg_array[DEBUGFS_RAS]; 2801 + int i; 2802 + 2803 + for (i = 0; i < ras->count; i++, databuf++) 2804 + *databuf = ras->read_global_reg(hisi_hba, 2805 + 4 * i + ras->base_off); 2806 + } 2807 + 2745 2808 static void hisi_sas_debugfs_snapshot_itct_reg(struct hisi_hba *hisi_hba) 2746 2809 { 2810 + void *cachebuf = hisi_hba->debugfs_itct_cache; 2747 2811 void *databuf = hisi_hba->debugfs_itct; 2748 2812 struct hisi_sas_itct *itct; 2749 2813 int i; 2814 + 2815 + hisi_hba->hw->read_iost_itct_cache(hisi_hba, HISI_SAS_ITCT_CACHE, 2816 + cachebuf); 2750 2817 2751 2818 itct = hisi_hba->itct; 2752 2819 ··· 2789 2794 2790 2795 static void hisi_sas_debugfs_snapshot_iost_reg(struct hisi_hba *hisi_hba) 2791 2796 { 2792 - int max_command_entries = hisi_hba->hw->max_command_entries; 2797 + int max_command_entries = HISI_SAS_MAX_COMMANDS; 2798 + void *cachebuf = hisi_hba->debugfs_iost_cache; 2793 2799 void *databuf = hisi_hba->debugfs_iost; 2794 2800 struct hisi_sas_iost *iost; 2795 2801 int i; 2802 + 2803 + hisi_hba->hw->read_iost_itct_cache(hisi_hba, HISI_SAS_IOST_CACHE, 2804 + cachebuf); 2796 2805 2797 2806 iost = hisi_hba->iost; 2798 2807 ··· 2844 2845 { 2845 2846 struct hisi_hba *hisi_hba = s->private; 2846 2847 const struct hisi_sas_hw *hw = hisi_hba->hw; 2847 - const struct hisi_sas_debugfs_reg *reg_global = hw->debugfs_reg_global; 2848 + const void *reg_global = hw->debugfs_reg_array[DEBUGFS_GLOBAL]; 2848 2849 2849 - hisi_sas_debugfs_print_reg(hisi_hba->debugfs_global_reg, 2850 + hisi_sas_debugfs_print_reg(hisi_hba->debugfs_regs[DEBUGFS_GLOBAL], 2850 2851 reg_global, s); 2851 2852 2852 2853 return 0; ··· 2860 2861 2861 2862 static const struct file_operations hisi_sas_debugfs_global_fops = { 2862 2863 .open = hisi_sas_debugfs_global_open, 2864 + .read = seq_read, 2865 + .llseek = seq_lseek, 2866 + .release = single_release, 2867 + .owner = THIS_MODULE, 2868 + }; 2869 + 2870 + static int hisi_sas_debugfs_axi_show(struct seq_file *s, void *p) 2871 + { 2872 + struct hisi_hba *hisi_hba = s->private; 2873 + const struct hisi_sas_hw *hw = hisi_hba->hw; 2874 + const void *reg_axi = hw->debugfs_reg_array[DEBUGFS_AXI]; 2875 + 2876 + hisi_sas_debugfs_print_reg(hisi_hba->debugfs_regs[DEBUGFS_AXI], 2877 + reg_axi, s); 2878 + 2879 + return 0; 2880 + } 2881 + 2882 + static int hisi_sas_debugfs_axi_open(struct inode *inode, struct file *filp) 2883 + { 2884 + return single_open(filp, hisi_sas_debugfs_axi_show, 2885 + inode->i_private); 2886 + } 2887 + 2888 + static const struct file_operations hisi_sas_debugfs_axi_fops = { 2889 + .open = hisi_sas_debugfs_axi_open, 2890 + .read = seq_read, 2891 + .llseek = seq_lseek, 2892 + .release = single_release, 2893 + .owner = THIS_MODULE, 2894 + }; 2895 + 2896 + static int hisi_sas_debugfs_ras_show(struct seq_file *s, void *p) 2897 + { 2898 + struct hisi_hba *hisi_hba = s->private; 2899 + const struct hisi_sas_hw *hw = hisi_hba->hw; 2900 + const void *reg_ras = hw->debugfs_reg_array[DEBUGFS_RAS]; 2901 + 2902 + hisi_sas_debugfs_print_reg(hisi_hba->debugfs_regs[DEBUGFS_RAS], 2903 + reg_ras, s); 2904 + 2905 + return 0; 2906 + } 2907 + 2908 + static int hisi_sas_debugfs_ras_open(struct inode *inode, struct file *filp) 2909 + { 2910 + return single_open(filp, hisi_sas_debugfs_ras_show, 2911 + inode->i_private); 2912 + } 2913 + 2914 + static const struct file_operations hisi_sas_debugfs_ras_fops = { 2915 + .open = hisi_sas_debugfs_ras_open, 2863 2916 .read = seq_read, 2864 2917 .llseek = seq_lseek, 2865 2918 .release = single_release, ··· 2944 2893 .owner = THIS_MODULE, 2945 2894 }; 2946 2895 2947 - static int hisi_sas_show_row_64(struct seq_file *s, int index, 2948 - int sz, __le64 *ptr) 2896 + static void hisi_sas_show_row_64(struct seq_file *s, int index, 2897 + int sz, __le64 *ptr) 2949 2898 { 2950 2899 int i; 2951 2900 ··· 2958 2907 } 2959 2908 2960 2909 seq_puts(s, "\n"); 2961 - 2962 - return 0; 2963 2910 } 2964 2911 2965 - static int hisi_sas_show_row_32(struct seq_file *s, int index, 2966 - int sz, __le32 *ptr) 2912 + static void hisi_sas_show_row_32(struct seq_file *s, int index, 2913 + int sz, __le32 *ptr) 2967 2914 { 2968 2915 int i; 2969 2916 ··· 2973 2924 seq_puts(s, "\n\t"); 2974 2925 } 2975 2926 seq_puts(s, "\n"); 2976 - 2977 - return 0; 2978 2927 } 2979 2928 2980 - static int hisi_sas_cq_show_slot(struct seq_file *s, int slot, void *cq_ptr) 2929 + static void hisi_sas_cq_show_slot(struct seq_file *s, int slot, void *cq_ptr) 2981 2930 { 2982 2931 struct hisi_sas_cq *cq = cq_ptr; 2983 2932 struct hisi_hba *hisi_hba = cq->hisi_hba; ··· 2983 2936 __le32 *complete_hdr = complete_queue + 2984 2937 (hisi_hba->hw->complete_hdr_size * slot); 2985 2938 2986 - return hisi_sas_show_row_32(s, slot, 2987 - hisi_hba->hw->complete_hdr_size, 2988 - complete_hdr); 2939 + hisi_sas_show_row_32(s, slot, 2940 + hisi_hba->hw->complete_hdr_size, 2941 + complete_hdr); 2989 2942 } 2990 2943 2991 2944 static int hisi_sas_debugfs_cq_show(struct seq_file *s, void *p) 2992 2945 { 2993 2946 struct hisi_sas_cq *cq = s->private; 2994 - int slot, ret; 2947 + int slot; 2995 2948 2996 2949 for (slot = 0; slot < HISI_SAS_QUEUE_SLOTS; slot++) { 2997 - ret = hisi_sas_cq_show_slot(s, slot, cq); 2998 - if (ret) 2999 - return ret; 2950 + hisi_sas_cq_show_slot(s, slot, cq); 3000 2951 } 3001 2952 return 0; 3002 2953 } ··· 3012 2967 .owner = THIS_MODULE, 3013 2968 }; 3014 2969 3015 - static int hisi_sas_dq_show_slot(struct seq_file *s, int slot, void *dq_ptr) 2970 + static void hisi_sas_dq_show_slot(struct seq_file *s, int slot, void *dq_ptr) 3016 2971 { 3017 2972 struct hisi_sas_dq *dq = dq_ptr; 3018 2973 struct hisi_hba *hisi_hba = dq->hisi_hba; ··· 3020 2975 __le32 *cmd_hdr = cmd_queue + 3021 2976 sizeof(struct hisi_sas_cmd_hdr) * slot; 3022 2977 3023 - return hisi_sas_show_row_32(s, slot, sizeof(struct hisi_sas_cmd_hdr), 3024 - cmd_hdr); 2978 + hisi_sas_show_row_32(s, slot, sizeof(struct hisi_sas_cmd_hdr), cmd_hdr); 3025 2979 } 3026 2980 3027 2981 static int hisi_sas_debugfs_dq_show(struct seq_file *s, void *p) 3028 2982 { 3029 - int slot, ret; 2983 + int slot; 3030 2984 3031 2985 for (slot = 0; slot < HISI_SAS_QUEUE_SLOTS; slot++) { 3032 - ret = hisi_sas_dq_show_slot(s, slot, s->private); 3033 - if (ret) 3034 - return ret; 2986 + hisi_sas_dq_show_slot(s, slot, s->private); 3035 2987 } 3036 2988 return 0; 3037 2989 } ··· 3050 3008 { 3051 3009 struct hisi_hba *hisi_hba = s->private; 3052 3010 struct hisi_sas_iost *debugfs_iost = hisi_hba->debugfs_iost; 3053 - int i, ret, max_command_entries = hisi_hba->hw->max_command_entries; 3054 - __le64 *iost = &debugfs_iost->qw0; 3011 + int i, max_command_entries = HISI_SAS_MAX_COMMANDS; 3055 3012 3056 3013 for (i = 0; i < max_command_entries; i++, debugfs_iost++) { 3057 - ret = hisi_sas_show_row_64(s, i, sizeof(*debugfs_iost), 3058 - iost); 3059 - if (ret) 3060 - return ret; 3014 + __le64 *iost = &debugfs_iost->qw0; 3015 + 3016 + hisi_sas_show_row_64(s, i, sizeof(*debugfs_iost), iost); 3061 3017 } 3062 3018 3063 3019 return 0; ··· 3074 3034 .owner = THIS_MODULE, 3075 3035 }; 3076 3036 3037 + static int hisi_sas_debugfs_iost_cache_show(struct seq_file *s, void *p) 3038 + { 3039 + struct hisi_hba *hisi_hba = s->private; 3040 + struct hisi_sas_iost_itct_cache *iost_cache = 3041 + (struct hisi_sas_iost_itct_cache *)hisi_hba->debugfs_iost_cache; 3042 + u32 cache_size = HISI_SAS_IOST_ITCT_CACHE_DW_SZ * 4; 3043 + int i, tab_idx; 3044 + __le64 *iost; 3045 + 3046 + for (i = 0; i < HISI_SAS_IOST_ITCT_CACHE_NUM; i++, iost_cache++) { 3047 + /* 3048 + * Data struct of IOST cache: 3049 + * Data[1]: BIT0~15: Table index 3050 + * Bit16: Valid mask 3051 + * Data[2]~[9]: IOST table 3052 + */ 3053 + tab_idx = (iost_cache->data[1] & 0xffff); 3054 + iost = (__le64 *)iost_cache; 3055 + 3056 + hisi_sas_show_row_64(s, tab_idx, cache_size, iost); 3057 + } 3058 + 3059 + return 0; 3060 + } 3061 + 3062 + static int hisi_sas_debugfs_iost_cache_open(struct inode *inode, 3063 + struct file *filp) 3064 + { 3065 + return single_open(filp, hisi_sas_debugfs_iost_cache_show, 3066 + inode->i_private); 3067 + } 3068 + 3069 + static const struct file_operations hisi_sas_debugfs_iost_cache_fops = { 3070 + .open = hisi_sas_debugfs_iost_cache_open, 3071 + .read = seq_read, 3072 + .llseek = seq_lseek, 3073 + .release = single_release, 3074 + .owner = THIS_MODULE, 3075 + }; 3076 + 3077 3077 static int hisi_sas_debugfs_itct_show(struct seq_file *s, void *p) 3078 3078 { 3079 - int i, ret; 3079 + int i; 3080 3080 struct hisi_hba *hisi_hba = s->private; 3081 3081 struct hisi_sas_itct *debugfs_itct = hisi_hba->debugfs_itct; 3082 - __le64 *itct = &debugfs_itct->qw0; 3083 3082 3084 3083 for (i = 0; i < HISI_SAS_MAX_ITCT_ENTRIES; i++, debugfs_itct++) { 3085 - ret = hisi_sas_show_row_64(s, i, sizeof(*debugfs_itct), 3086 - itct); 3087 - if (ret) 3088 - return ret; 3084 + __le64 *itct = &debugfs_itct->qw0; 3085 + 3086 + hisi_sas_show_row_64(s, i, sizeof(*debugfs_itct), itct); 3089 3087 } 3090 3088 3091 3089 return 0; ··· 3136 3058 3137 3059 static const struct file_operations hisi_sas_debugfs_itct_fops = { 3138 3060 .open = hisi_sas_debugfs_itct_open, 3061 + .read = seq_read, 3062 + .llseek = seq_lseek, 3063 + .release = single_release, 3064 + .owner = THIS_MODULE, 3065 + }; 3066 + 3067 + static int hisi_sas_debugfs_itct_cache_show(struct seq_file *s, void *p) 3068 + { 3069 + struct hisi_hba *hisi_hba = s->private; 3070 + struct hisi_sas_iost_itct_cache *itct_cache = 3071 + (struct hisi_sas_iost_itct_cache *)hisi_hba->debugfs_itct_cache; 3072 + u32 cache_size = HISI_SAS_IOST_ITCT_CACHE_DW_SZ * 4; 3073 + int i, tab_idx; 3074 + __le64 *itct; 3075 + 3076 + for (i = 0; i < HISI_SAS_IOST_ITCT_CACHE_NUM; i++, itct_cache++) { 3077 + /* 3078 + * Data struct of ITCT cache: 3079 + * Data[1]: BIT0~15: Table index 3080 + * Bit16: Valid mask 3081 + * Data[2]~[9]: ITCT table 3082 + */ 3083 + tab_idx = itct_cache->data[1] & 0xffff; 3084 + itct = (__le64 *)itct_cache; 3085 + 3086 + hisi_sas_show_row_64(s, tab_idx, cache_size, itct); 3087 + } 3088 + 3089 + return 0; 3090 + } 3091 + 3092 + static int hisi_sas_debugfs_itct_cache_open(struct inode *inode, 3093 + struct file *filp) 3094 + { 3095 + return single_open(filp, hisi_sas_debugfs_itct_cache_show, 3096 + inode->i_private); 3097 + } 3098 + 3099 + static const struct file_operations hisi_sas_debugfs_itct_cache_fops = { 3100 + .open = hisi_sas_debugfs_itct_cache_open, 3139 3101 .read = seq_read, 3140 3102 .llseek = seq_lseek, 3141 3103 .release = single_release, ··· 3228 3110 debugfs_create_file("iost", 0400, dump_dentry, hisi_hba, 3229 3111 &hisi_sas_debugfs_iost_fops); 3230 3112 3113 + debugfs_create_file("iost_cache", 0400, dump_dentry, hisi_hba, 3114 + &hisi_sas_debugfs_iost_cache_fops); 3115 + 3231 3116 debugfs_create_file("itct", 0400, dump_dentry, hisi_hba, 3232 3117 &hisi_sas_debugfs_itct_fops); 3118 + 3119 + debugfs_create_file("itct_cache", 0400, dump_dentry, hisi_hba, 3120 + &hisi_sas_debugfs_itct_cache_fops); 3121 + 3122 + debugfs_create_file("axi", 0400, dump_dentry, hisi_hba, 3123 + &hisi_sas_debugfs_axi_fops); 3124 + 3125 + debugfs_create_file("ras", 0400, dump_dentry, hisi_hba, 3126 + &hisi_sas_debugfs_ras_fops); 3233 3127 3234 3128 return; 3235 3129 } ··· 3252 3122 3253 3123 hisi_sas_debugfs_snapshot_global_reg(hisi_hba); 3254 3124 hisi_sas_debugfs_snapshot_port_reg(hisi_hba); 3125 + hisi_sas_debugfs_snapshot_axi_reg(hisi_hba); 3126 + hisi_sas_debugfs_snapshot_ras_reg(hisi_hba); 3255 3127 hisi_sas_debugfs_snapshot_cq_reg(hisi_hba); 3256 3128 hisi_sas_debugfs_snapshot_dq_reg(hisi_hba); 3257 3129 hisi_sas_debugfs_snapshot_itct_reg(hisi_hba); ··· 3294 3162 .owner = THIS_MODULE, 3295 3163 }; 3296 3164 3165 + enum { 3166 + HISI_SAS_BIST_LOOPBACK_MODE_DIGITAL = 0, 3167 + HISI_SAS_BIST_LOOPBACK_MODE_SERDES, 3168 + HISI_SAS_BIST_LOOPBACK_MODE_REMOTE, 3169 + }; 3170 + 3171 + enum { 3172 + HISI_SAS_BIST_CODE_MODE_PRBS7 = 0, 3173 + HISI_SAS_BIST_CODE_MODE_PRBS23, 3174 + HISI_SAS_BIST_CODE_MODE_PRBS31, 3175 + HISI_SAS_BIST_CODE_MODE_JTPAT, 3176 + HISI_SAS_BIST_CODE_MODE_CJTPAT, 3177 + HISI_SAS_BIST_CODE_MODE_SCRAMBED_0, 3178 + HISI_SAS_BIST_CODE_MODE_TRAIN, 3179 + HISI_SAS_BIST_CODE_MODE_TRAIN_DONE, 3180 + HISI_SAS_BIST_CODE_MODE_HFTP, 3181 + HISI_SAS_BIST_CODE_MODE_MFTP, 3182 + HISI_SAS_BIST_CODE_MODE_LFTP, 3183 + HISI_SAS_BIST_CODE_MODE_FIXED_DATA, 3184 + }; 3185 + 3186 + static const struct { 3187 + int value; 3188 + char *name; 3189 + } hisi_sas_debugfs_loop_linkrate[] = { 3190 + { SAS_LINK_RATE_1_5_GBPS, "1.5 Gbit" }, 3191 + { SAS_LINK_RATE_3_0_GBPS, "3.0 Gbit" }, 3192 + { SAS_LINK_RATE_6_0_GBPS, "6.0 Gbit" }, 3193 + { SAS_LINK_RATE_12_0_GBPS, "12.0 Gbit" }, 3194 + }; 3195 + 3196 + static int hisi_sas_debugfs_bist_linkrate_show(struct seq_file *s, void *p) 3197 + { 3198 + struct hisi_hba *hisi_hba = s->private; 3199 + int i; 3200 + 3201 + for (i = 0; i < ARRAY_SIZE(hisi_sas_debugfs_loop_linkrate); i++) { 3202 + int match = (hisi_hba->debugfs_bist_linkrate == 3203 + hisi_sas_debugfs_loop_linkrate[i].value); 3204 + 3205 + seq_printf(s, "%s%s%s ", match ? "[" : "", 3206 + hisi_sas_debugfs_loop_linkrate[i].name, 3207 + match ? "]" : ""); 3208 + } 3209 + seq_puts(s, "\n"); 3210 + 3211 + return 0; 3212 + } 3213 + 3214 + static ssize_t hisi_sas_debugfs_bist_linkrate_write(struct file *filp, 3215 + const char __user *buf, 3216 + size_t count, loff_t *ppos) 3217 + { 3218 + struct seq_file *m = filp->private_data; 3219 + struct hisi_hba *hisi_hba = m->private; 3220 + char kbuf[16] = {}, *pkbuf; 3221 + bool found = false; 3222 + int i; 3223 + 3224 + if (hisi_hba->debugfs_bist_enable) 3225 + return -EPERM; 3226 + 3227 + if (count >= sizeof(kbuf)) 3228 + return -EOVERFLOW; 3229 + 3230 + if (copy_from_user(kbuf, buf, count)) 3231 + return -EINVAL; 3232 + 3233 + pkbuf = strstrip(kbuf); 3234 + 3235 + for (i = 0; i < ARRAY_SIZE(hisi_sas_debugfs_loop_linkrate); i++) { 3236 + if (!strncmp(hisi_sas_debugfs_loop_linkrate[i].name, 3237 + pkbuf, 16)) { 3238 + hisi_hba->debugfs_bist_linkrate = 3239 + hisi_sas_debugfs_loop_linkrate[i].value; 3240 + found = true; 3241 + break; 3242 + } 3243 + } 3244 + 3245 + if (!found) 3246 + return -EINVAL; 3247 + 3248 + return count; 3249 + } 3250 + 3251 + static int hisi_sas_debugfs_bist_linkrate_open(struct inode *inode, 3252 + struct file *filp) 3253 + { 3254 + return single_open(filp, hisi_sas_debugfs_bist_linkrate_show, 3255 + inode->i_private); 3256 + } 3257 + 3258 + static const struct file_operations hisi_sas_debugfs_bist_linkrate_ops = { 3259 + .open = hisi_sas_debugfs_bist_linkrate_open, 3260 + .read = seq_read, 3261 + .write = hisi_sas_debugfs_bist_linkrate_write, 3262 + .llseek = seq_lseek, 3263 + .release = single_release, 3264 + .owner = THIS_MODULE, 3265 + }; 3266 + 3267 + static const struct { 3268 + int value; 3269 + char *name; 3270 + } hisi_sas_debugfs_loop_code_mode[] = { 3271 + { HISI_SAS_BIST_CODE_MODE_PRBS7, "PRBS7" }, 3272 + { HISI_SAS_BIST_CODE_MODE_PRBS23, "PRBS23" }, 3273 + { HISI_SAS_BIST_CODE_MODE_PRBS31, "PRBS31" }, 3274 + { HISI_SAS_BIST_CODE_MODE_JTPAT, "JTPAT" }, 3275 + { HISI_SAS_BIST_CODE_MODE_CJTPAT, "CJTPAT" }, 3276 + { HISI_SAS_BIST_CODE_MODE_SCRAMBED_0, "SCRAMBED_0" }, 3277 + { HISI_SAS_BIST_CODE_MODE_TRAIN, "TRAIN" }, 3278 + { HISI_SAS_BIST_CODE_MODE_TRAIN_DONE, "TRAIN_DONE" }, 3279 + { HISI_SAS_BIST_CODE_MODE_HFTP, "HFTP" }, 3280 + { HISI_SAS_BIST_CODE_MODE_MFTP, "MFTP" }, 3281 + { HISI_SAS_BIST_CODE_MODE_LFTP, "LFTP" }, 3282 + { HISI_SAS_BIST_CODE_MODE_FIXED_DATA, "FIXED_DATA" }, 3283 + }; 3284 + 3285 + static int hisi_sas_debugfs_bist_code_mode_show(struct seq_file *s, void *p) 3286 + { 3287 + struct hisi_hba *hisi_hba = s->private; 3288 + int i; 3289 + 3290 + for (i = 0; i < ARRAY_SIZE(hisi_sas_debugfs_loop_code_mode); i++) { 3291 + int match = (hisi_hba->debugfs_bist_code_mode == 3292 + hisi_sas_debugfs_loop_code_mode[i].value); 3293 + 3294 + seq_printf(s, "%s%s%s ", match ? "[" : "", 3295 + hisi_sas_debugfs_loop_code_mode[i].name, 3296 + match ? "]" : ""); 3297 + } 3298 + seq_puts(s, "\n"); 3299 + 3300 + return 0; 3301 + } 3302 + 3303 + static ssize_t hisi_sas_debugfs_bist_code_mode_write(struct file *filp, 3304 + const char __user *buf, 3305 + size_t count, 3306 + loff_t *ppos) 3307 + { 3308 + struct seq_file *m = filp->private_data; 3309 + struct hisi_hba *hisi_hba = m->private; 3310 + char kbuf[16] = {}, *pkbuf; 3311 + bool found = false; 3312 + int i; 3313 + 3314 + if (hisi_hba->debugfs_bist_enable) 3315 + return -EPERM; 3316 + 3317 + if (count >= sizeof(kbuf)) 3318 + return -EINVAL; 3319 + 3320 + if (copy_from_user(kbuf, buf, count)) 3321 + return -EOVERFLOW; 3322 + 3323 + pkbuf = strstrip(kbuf); 3324 + 3325 + for (i = 0; i < ARRAY_SIZE(hisi_sas_debugfs_loop_code_mode); i++) { 3326 + if (!strncmp(hisi_sas_debugfs_loop_code_mode[i].name, 3327 + pkbuf, 16)) { 3328 + hisi_hba->debugfs_bist_code_mode = 3329 + hisi_sas_debugfs_loop_code_mode[i].value; 3330 + found = true; 3331 + break; 3332 + } 3333 + } 3334 + 3335 + if (!found) 3336 + return -EINVAL; 3337 + 3338 + return count; 3339 + } 3340 + 3341 + static int hisi_sas_debugfs_bist_code_mode_open(struct inode *inode, 3342 + struct file *filp) 3343 + { 3344 + return single_open(filp, hisi_sas_debugfs_bist_code_mode_show, 3345 + inode->i_private); 3346 + } 3347 + 3348 + static const struct file_operations hisi_sas_debugfs_bist_code_mode_ops = { 3349 + .open = hisi_sas_debugfs_bist_code_mode_open, 3350 + .read = seq_read, 3351 + .write = hisi_sas_debugfs_bist_code_mode_write, 3352 + .llseek = seq_lseek, 3353 + .release = single_release, 3354 + .owner = THIS_MODULE, 3355 + }; 3356 + 3357 + static ssize_t hisi_sas_debugfs_bist_phy_write(struct file *filp, 3358 + const char __user *buf, 3359 + size_t count, loff_t *ppos) 3360 + { 3361 + struct seq_file *m = filp->private_data; 3362 + struct hisi_hba *hisi_hba = m->private; 3363 + unsigned int phy_no; 3364 + int val; 3365 + 3366 + if (hisi_hba->debugfs_bist_enable) 3367 + return -EPERM; 3368 + 3369 + val = kstrtouint_from_user(buf, count, 0, &phy_no); 3370 + if (val) 3371 + return val; 3372 + 3373 + if (phy_no >= hisi_hba->n_phy) 3374 + return -EINVAL; 3375 + 3376 + hisi_hba->debugfs_bist_phy_no = phy_no; 3377 + 3378 + return count; 3379 + } 3380 + 3381 + static int hisi_sas_debugfs_bist_phy_show(struct seq_file *s, void *p) 3382 + { 3383 + struct hisi_hba *hisi_hba = s->private; 3384 + 3385 + seq_printf(s, "%d\n", hisi_hba->debugfs_bist_phy_no); 3386 + 3387 + return 0; 3388 + } 3389 + 3390 + static int hisi_sas_debugfs_bist_phy_open(struct inode *inode, 3391 + struct file *filp) 3392 + { 3393 + return single_open(filp, hisi_sas_debugfs_bist_phy_show, 3394 + inode->i_private); 3395 + } 3396 + 3397 + static const struct file_operations hisi_sas_debugfs_bist_phy_ops = { 3398 + .open = hisi_sas_debugfs_bist_phy_open, 3399 + .read = seq_read, 3400 + .write = hisi_sas_debugfs_bist_phy_write, 3401 + .llseek = seq_lseek, 3402 + .release = single_release, 3403 + .owner = THIS_MODULE, 3404 + }; 3405 + 3406 + static const struct { 3407 + int value; 3408 + char *name; 3409 + } hisi_sas_debugfs_loop_modes[] = { 3410 + { HISI_SAS_BIST_LOOPBACK_MODE_DIGITAL, "digial" }, 3411 + { HISI_SAS_BIST_LOOPBACK_MODE_SERDES, "serdes" }, 3412 + { HISI_SAS_BIST_LOOPBACK_MODE_REMOTE, "remote" }, 3413 + }; 3414 + 3415 + static int hisi_sas_debugfs_bist_mode_show(struct seq_file *s, void *p) 3416 + { 3417 + struct hisi_hba *hisi_hba = s->private; 3418 + int i; 3419 + 3420 + for (i = 0; i < ARRAY_SIZE(hisi_sas_debugfs_loop_modes); i++) { 3421 + int match = (hisi_hba->debugfs_bist_mode == 3422 + hisi_sas_debugfs_loop_modes[i].value); 3423 + 3424 + seq_printf(s, "%s%s%s ", match ? "[" : "", 3425 + hisi_sas_debugfs_loop_modes[i].name, 3426 + match ? "]" : ""); 3427 + } 3428 + seq_puts(s, "\n"); 3429 + 3430 + return 0; 3431 + } 3432 + 3433 + static ssize_t hisi_sas_debugfs_bist_mode_write(struct file *filp, 3434 + const char __user *buf, 3435 + size_t count, loff_t *ppos) 3436 + { 3437 + struct seq_file *m = filp->private_data; 3438 + struct hisi_hba *hisi_hba = m->private; 3439 + char kbuf[16] = {}, *pkbuf; 3440 + bool found = false; 3441 + int i; 3442 + 3443 + if (hisi_hba->debugfs_bist_enable) 3444 + return -EPERM; 3445 + 3446 + if (count >= sizeof(kbuf)) 3447 + return -EINVAL; 3448 + 3449 + if (copy_from_user(kbuf, buf, count)) 3450 + return -EOVERFLOW; 3451 + 3452 + pkbuf = strstrip(kbuf); 3453 + 3454 + for (i = 0; i < ARRAY_SIZE(hisi_sas_debugfs_loop_modes); i++) { 3455 + if (!strncmp(hisi_sas_debugfs_loop_modes[i].name, pkbuf, 16)) { 3456 + hisi_hba->debugfs_bist_mode = 3457 + hisi_sas_debugfs_loop_modes[i].value; 3458 + found = true; 3459 + break; 3460 + } 3461 + } 3462 + 3463 + if (!found) 3464 + return -EINVAL; 3465 + 3466 + return count; 3467 + } 3468 + 3469 + static int hisi_sas_debugfs_bist_mode_open(struct inode *inode, 3470 + struct file *filp) 3471 + { 3472 + return single_open(filp, hisi_sas_debugfs_bist_mode_show, 3473 + inode->i_private); 3474 + } 3475 + 3476 + static const struct file_operations hisi_sas_debugfs_bist_mode_ops = { 3477 + .open = hisi_sas_debugfs_bist_mode_open, 3478 + .read = seq_read, 3479 + .write = hisi_sas_debugfs_bist_mode_write, 3480 + .llseek = seq_lseek, 3481 + .release = single_release, 3482 + .owner = THIS_MODULE, 3483 + }; 3484 + 3485 + static ssize_t hisi_sas_debugfs_bist_enable_write(struct file *filp, 3486 + const char __user *buf, 3487 + size_t count, loff_t *ppos) 3488 + { 3489 + struct seq_file *m = filp->private_data; 3490 + struct hisi_hba *hisi_hba = m->private; 3491 + unsigned int enable; 3492 + int val; 3493 + 3494 + val = kstrtouint_from_user(buf, count, 0, &enable); 3495 + if (val) 3496 + return val; 3497 + 3498 + if (enable > 1) 3499 + return -EINVAL; 3500 + 3501 + if (enable == hisi_hba->debugfs_bist_enable) 3502 + return count; 3503 + 3504 + if (!hisi_hba->hw->set_bist) 3505 + return -EPERM; 3506 + 3507 + val = hisi_hba->hw->set_bist(hisi_hba, enable); 3508 + if (val < 0) 3509 + return val; 3510 + 3511 + hisi_hba->debugfs_bist_enable = enable; 3512 + 3513 + return count; 3514 + } 3515 + 3516 + static int hisi_sas_debugfs_bist_enable_show(struct seq_file *s, void *p) 3517 + { 3518 + struct hisi_hba *hisi_hba = s->private; 3519 + 3520 + seq_printf(s, "%d\n", hisi_hba->debugfs_bist_enable); 3521 + 3522 + return 0; 3523 + } 3524 + 3525 + static int hisi_sas_debugfs_bist_enable_open(struct inode *inode, 3526 + struct file *filp) 3527 + { 3528 + return single_open(filp, hisi_sas_debugfs_bist_enable_show, 3529 + inode->i_private); 3530 + } 3531 + 3532 + static const struct file_operations hisi_sas_debugfs_bist_enable_ops = { 3533 + .open = hisi_sas_debugfs_bist_enable_open, 3534 + .read = seq_read, 3535 + .write = hisi_sas_debugfs_bist_enable_write, 3536 + .llseek = seq_lseek, 3537 + .release = single_release, 3538 + .owner = THIS_MODULE, 3539 + }; 3540 + 3297 3541 void hisi_sas_debugfs_work_handler(struct work_struct *work) 3298 3542 { 3299 3543 struct hisi_hba *hisi_hba = ··· 3683 3175 } 3684 3176 EXPORT_SYMBOL_GPL(hisi_sas_debugfs_work_handler); 3685 3177 3178 + void hisi_sas_debugfs_release(struct hisi_hba *hisi_hba) 3179 + { 3180 + struct device *dev = hisi_hba->dev; 3181 + int i; 3182 + 3183 + devm_kfree(dev, hisi_hba->debugfs_iost_cache); 3184 + devm_kfree(dev, hisi_hba->debugfs_itct_cache); 3185 + devm_kfree(dev, hisi_hba->debugfs_iost); 3186 + 3187 + for (i = 0; i < hisi_hba->queue_count; i++) 3188 + devm_kfree(dev, hisi_hba->debugfs_cmd_hdr[i]); 3189 + 3190 + for (i = 0; i < hisi_hba->queue_count; i++) 3191 + devm_kfree(dev, hisi_hba->debugfs_complete_hdr[i]); 3192 + 3193 + for (i = 0; i < DEBUGFS_REGS_NUM; i++) 3194 + devm_kfree(dev, hisi_hba->debugfs_regs[i]); 3195 + 3196 + for (i = 0; i < hisi_hba->n_phy; i++) 3197 + devm_kfree(dev, hisi_hba->debugfs_port_reg[i]); 3198 + } 3199 + 3200 + int hisi_sas_debugfs_alloc(struct hisi_hba *hisi_hba) 3201 + { 3202 + const struct hisi_sas_hw *hw = hisi_hba->hw; 3203 + struct device *dev = hisi_hba->dev; 3204 + int p, c, d; 3205 + size_t sz; 3206 + 3207 + hisi_hba->debugfs_dump_dentry = 3208 + debugfs_create_dir("dump", hisi_hba->debugfs_dir); 3209 + 3210 + sz = hw->debugfs_reg_array[DEBUGFS_GLOBAL]->count * 4; 3211 + hisi_hba->debugfs_regs[DEBUGFS_GLOBAL] = 3212 + devm_kmalloc(dev, sz, GFP_KERNEL); 3213 + 3214 + if (!hisi_hba->debugfs_regs[DEBUGFS_GLOBAL]) 3215 + goto fail; 3216 + 3217 + sz = hw->debugfs_reg_port->count * 4; 3218 + for (p = 0; p < hisi_hba->n_phy; p++) { 3219 + hisi_hba->debugfs_port_reg[p] = 3220 + devm_kmalloc(dev, sz, GFP_KERNEL); 3221 + 3222 + if (!hisi_hba->debugfs_port_reg[p]) 3223 + goto fail; 3224 + } 3225 + 3226 + sz = hw->debugfs_reg_array[DEBUGFS_AXI]->count * 4; 3227 + hisi_hba->debugfs_regs[DEBUGFS_AXI] = 3228 + devm_kmalloc(dev, sz, GFP_KERNEL); 3229 + 3230 + if (!hisi_hba->debugfs_regs[DEBUGFS_AXI]) 3231 + goto fail; 3232 + 3233 + sz = hw->debugfs_reg_array[DEBUGFS_RAS]->count * 4; 3234 + hisi_hba->debugfs_regs[DEBUGFS_RAS] = 3235 + devm_kmalloc(dev, sz, GFP_KERNEL); 3236 + 3237 + if (!hisi_hba->debugfs_regs[DEBUGFS_RAS]) 3238 + goto fail; 3239 + 3240 + sz = hw->complete_hdr_size * HISI_SAS_QUEUE_SLOTS; 3241 + for (c = 0; c < hisi_hba->queue_count; c++) { 3242 + hisi_hba->debugfs_complete_hdr[c] = 3243 + devm_kmalloc(dev, sz, GFP_KERNEL); 3244 + 3245 + if (!hisi_hba->debugfs_complete_hdr[c]) 3246 + goto fail; 3247 + } 3248 + 3249 + sz = sizeof(struct hisi_sas_cmd_hdr) * HISI_SAS_QUEUE_SLOTS; 3250 + for (d = 0; d < hisi_hba->queue_count; d++) { 3251 + hisi_hba->debugfs_cmd_hdr[d] = 3252 + devm_kmalloc(dev, sz, GFP_KERNEL); 3253 + 3254 + if (!hisi_hba->debugfs_cmd_hdr[d]) 3255 + goto fail; 3256 + } 3257 + 3258 + sz = HISI_SAS_MAX_COMMANDS * sizeof(struct hisi_sas_iost); 3259 + 3260 + hisi_hba->debugfs_iost = devm_kmalloc(dev, sz, GFP_KERNEL); 3261 + if (!hisi_hba->debugfs_iost) 3262 + goto fail; 3263 + 3264 + sz = HISI_SAS_IOST_ITCT_CACHE_NUM * 3265 + sizeof(struct hisi_sas_iost_itct_cache); 3266 + 3267 + hisi_hba->debugfs_iost_cache = devm_kmalloc(dev, sz, GFP_KERNEL); 3268 + if (!hisi_hba->debugfs_iost_cache) 3269 + goto fail; 3270 + 3271 + sz = HISI_SAS_IOST_ITCT_CACHE_NUM * 3272 + sizeof(struct hisi_sas_iost_itct_cache); 3273 + 3274 + hisi_hba->debugfs_itct_cache = devm_kmalloc(dev, sz, GFP_KERNEL); 3275 + if (!hisi_hba->debugfs_itct_cache) 3276 + goto fail; 3277 + 3278 + /* New memory allocation must be locate before itct */ 3279 + sz = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_itct); 3280 + 3281 + hisi_hba->debugfs_itct = devm_kmalloc(dev, sz, GFP_KERNEL); 3282 + if (!hisi_hba->debugfs_itct) 3283 + goto fail; 3284 + 3285 + return 0; 3286 + fail: 3287 + hisi_sas_debugfs_release(hisi_hba); 3288 + return -ENOMEM; 3289 + } 3290 + 3291 + void hisi_sas_debugfs_bist_init(struct hisi_hba *hisi_hba) 3292 + { 3293 + hisi_hba->debugfs_bist_dentry = 3294 + debugfs_create_dir("bist", hisi_hba->debugfs_dir); 3295 + debugfs_create_file("link_rate", 0600, 3296 + hisi_hba->debugfs_bist_dentry, hisi_hba, 3297 + &hisi_sas_debugfs_bist_linkrate_ops); 3298 + 3299 + debugfs_create_file("code_mode", 0600, 3300 + hisi_hba->debugfs_bist_dentry, hisi_hba, 3301 + &hisi_sas_debugfs_bist_code_mode_ops); 3302 + 3303 + debugfs_create_file("phy_id", 0600, hisi_hba->debugfs_bist_dentry, 3304 + hisi_hba, &hisi_sas_debugfs_bist_phy_ops); 3305 + 3306 + debugfs_create_u32("cnt", 0600, hisi_hba->debugfs_bist_dentry, 3307 + &hisi_hba->debugfs_bist_cnt); 3308 + 3309 + debugfs_create_file("loopback_mode", 0600, 3310 + hisi_hba->debugfs_bist_dentry, 3311 + hisi_hba, &hisi_sas_debugfs_bist_mode_ops); 3312 + 3313 + debugfs_create_file("enable", 0600, hisi_hba->debugfs_bist_dentry, 3314 + hisi_hba, &hisi_sas_debugfs_bist_enable_ops); 3315 + 3316 + hisi_hba->debugfs_bist_linkrate = SAS_LINK_RATE_1_5_GBPS; 3317 + } 3318 + 3686 3319 void hisi_sas_debugfs_init(struct hisi_hba *hisi_hba) 3687 3320 { 3688 - int max_command_entries = hisi_hba->hw->max_command_entries; 3689 3321 struct device *dev = hisi_hba->dev; 3690 - int p, i, c, d; 3691 - size_t sz; 3692 3322 3693 3323 hisi_hba->debugfs_dir = debugfs_create_dir(dev_name(dev), 3694 3324 hisi_sas_debugfs_dir); ··· 3835 3189 hisi_hba, 3836 3190 &hisi_sas_debugfs_trigger_dump_fops); 3837 3191 3838 - /* Alloc buffer for global */ 3839 - sz = hisi_hba->hw->debugfs_reg_global->count * 4; 3840 - hisi_hba->debugfs_global_reg = 3841 - devm_kmalloc(dev, sz, GFP_KERNEL); 3192 + /* create bist structures */ 3193 + hisi_sas_debugfs_bist_init(hisi_hba); 3842 3194 3843 - if (!hisi_hba->debugfs_global_reg) 3844 - goto fail_global; 3845 - 3846 - /* Alloc buffer for port */ 3847 - sz = hisi_hba->hw->debugfs_reg_port->count * 4; 3848 - for (p = 0; p < hisi_hba->n_phy; p++) { 3849 - hisi_hba->debugfs_port_reg[p] = 3850 - devm_kmalloc(dev, sz, GFP_KERNEL); 3851 - 3852 - if (!hisi_hba->debugfs_port_reg[p]) 3853 - goto fail_port; 3195 + if (hisi_sas_debugfs_alloc(hisi_hba)) { 3196 + debugfs_remove_recursive(hisi_hba->debugfs_dir); 3197 + dev_dbg(dev, "failed to init debugfs!\n"); 3854 3198 } 3855 - 3856 - /* Alloc buffer for cq */ 3857 - sz = hisi_hba->hw->complete_hdr_size * HISI_SAS_QUEUE_SLOTS; 3858 - for (c = 0; c < hisi_hba->queue_count; c++) { 3859 - hisi_hba->debugfs_complete_hdr[c] = 3860 - devm_kmalloc(dev, sz, GFP_KERNEL); 3861 - 3862 - if (!hisi_hba->debugfs_complete_hdr[c]) 3863 - goto fail_cq; 3864 - } 3865 - 3866 - /* Alloc buffer for dq */ 3867 - sz = sizeof(struct hisi_sas_cmd_hdr) * HISI_SAS_QUEUE_SLOTS; 3868 - for (d = 0; d < hisi_hba->queue_count; d++) { 3869 - hisi_hba->debugfs_cmd_hdr[d] = 3870 - devm_kmalloc(dev, sz, GFP_KERNEL); 3871 - 3872 - if (!hisi_hba->debugfs_cmd_hdr[d]) 3873 - goto fail_iost_dq; 3874 - } 3875 - 3876 - /* Alloc buffer for iost */ 3877 - sz = max_command_entries * sizeof(struct hisi_sas_iost); 3878 - 3879 - hisi_hba->debugfs_iost = devm_kmalloc(dev, sz, GFP_KERNEL); 3880 - if (!hisi_hba->debugfs_iost) 3881 - goto fail_iost_dq; 3882 - 3883 - /* Alloc buffer for itct */ 3884 - /* New memory allocation must be locate before itct */ 3885 - sz = HISI_SAS_MAX_ITCT_ENTRIES * sizeof(struct hisi_sas_itct); 3886 - 3887 - hisi_hba->debugfs_itct = devm_kmalloc(dev, sz, GFP_KERNEL); 3888 - if (!hisi_hba->debugfs_itct) 3889 - goto fail_itct; 3890 - 3891 - return; 3892 - fail_itct: 3893 - devm_kfree(dev, hisi_hba->debugfs_iost); 3894 - fail_iost_dq: 3895 - for (i = 0; i < d; i++) 3896 - devm_kfree(dev, hisi_hba->debugfs_cmd_hdr[i]); 3897 - fail_cq: 3898 - for (i = 0; i < c; i++) 3899 - devm_kfree(dev, hisi_hba->debugfs_complete_hdr[i]); 3900 - fail_port: 3901 - for (i = 0; i < p; i++) 3902 - devm_kfree(dev, hisi_hba->debugfs_port_reg[i]); 3903 - devm_kfree(dev, hisi_hba->debugfs_global_reg); 3904 - fail_global: 3905 - debugfs_remove_recursive(hisi_hba->debugfs_dir); 3906 - dev_dbg(dev, "failed to init debugfs!\n"); 3907 3199 } 3908 3200 EXPORT_SYMBOL_GPL(hisi_sas_debugfs_init); 3909 3201
+3 -45
drivers/scsi/hisi_sas/hisi_sas_v1_hw.c
··· 401 401 TRANS_RX_SMP_RESP_TIMEOUT_ERR, /* 0x31a */ 402 402 }; 403 403 404 - #define HISI_SAS_COMMAND_ENTRIES_V1_HW 8192 405 - 406 404 #define HISI_SAS_PHY_MAX_INT_NR (HISI_SAS_PHY_INT_NR * HISI_SAS_MAX_PHYS) 407 405 #define HISI_SAS_CQ_MAX_INT_NR (HISI_SAS_MAX_QUEUES) 408 406 #define HISI_SAS_FATAL_INT_NR (2) ··· 414 416 void __iomem *regs = hisi_hba->regs + off; 415 417 416 418 return readl(regs); 417 - } 418 - 419 - static u32 hisi_sas_read32_relaxed(struct hisi_hba *hisi_hba, u32 off) 420 - { 421 - void __iomem *regs = hisi_hba->regs + off; 422 - 423 - return readl_relaxed(regs); 424 419 } 425 420 426 421 static void hisi_sas_write32(struct hisi_hba *hisi_hba, ··· 857 866 return bitmap; 858 867 } 859 868 860 - /* 861 - * The callpath to this function and upto writing the write 862 - * queue pointer should be safe from interruption. 863 - */ 864 - static int 865 - get_free_slot_v1_hw(struct hisi_hba *hisi_hba, struct hisi_sas_dq *dq) 866 - { 867 - struct device *dev = hisi_hba->dev; 868 - int queue = dq->id; 869 - u32 r, w; 870 - 871 - w = dq->wr_point; 872 - r = hisi_sas_read32_relaxed(hisi_hba, 873 - DLVRY_Q_0_RD_PTR + (queue * 0x14)); 874 - if (r == (w+1) % HISI_SAS_QUEUE_SLOTS) { 875 - dev_warn(dev, "could not find free slot\n"); 876 - return -EAGAIN; 877 - } 878 - 879 - dq->wr_point = (dq->wr_point + 1) % HISI_SAS_QUEUE_SLOTS; 880 - 881 - return w; 882 - } 883 - 884 869 /* DQ lock must be taken here */ 885 870 static void start_delivery_v1_hw(struct hisi_sas_dq *dq) 886 871 { ··· 1275 1308 } 1276 1309 case SAS_PROTOCOL_SMP: 1277 1310 { 1278 - void *to; 1279 1311 struct scatterlist *sg_resp = &task->smp_task.smp_resp; 1312 + void *to = page_address(sg_page(sg_resp)); 1280 1313 1281 1314 ts->stat = SAM_STAT_GOOD; 1282 - to = kmap_atomic(sg_page(sg_resp)); 1283 1315 1284 - dma_unmap_sg(dev, &task->smp_task.smp_resp, 1, 1285 - DMA_FROM_DEVICE); 1286 1316 dma_unmap_sg(dev, &task->smp_task.smp_req, 1, 1287 1317 DMA_TO_DEVICE); 1288 1318 memcpy(to + sg_resp->offset, 1289 1319 hisi_sas_status_buf_addr_mem(slot) + 1290 1320 sizeof(struct hisi_sas_err_record), 1291 - sg_dma_len(sg_resp)); 1292 - kunmap_atomic(to); 1321 + sg_resp->length); 1293 1322 break; 1294 1323 } 1295 1324 case SAS_PROTOCOL_SATA: ··· 1497 1534 struct hisi_sas_complete_v1_hdr *complete_queue = 1498 1535 (struct hisi_sas_complete_v1_hdr *) 1499 1536 hisi_hba->complete_hdr[queue]; 1500 - u32 irq_value, rd_point = cq->rd_point, wr_point; 1537 + u32 rd_point = cq->rd_point, wr_point; 1501 1538 1502 1539 spin_lock(&hisi_hba->lock); 1503 - irq_value = hisi_sas_read32(hisi_hba, OQ_INT_SRC); 1504 - 1505 1540 hisi_sas_write32(hisi_hba, OQ_INT_SRC, 1 << queue); 1506 1541 wr_point = hisi_sas_read32(hisi_hba, 1507 1542 COMPL_Q_0_WR_PTR + (0x14 * queue)); ··· 1781 1820 .clear_itct = clear_itct_v1_hw, 1782 1821 .prep_smp = prep_smp_v1_hw, 1783 1822 .prep_ssp = prep_ssp_v1_hw, 1784 - .get_free_slot = get_free_slot_v1_hw, 1785 1823 .start_delivery = start_delivery_v1_hw, 1786 - .slot_complete = slot_complete_v1_hw, 1787 1824 .phys_init = phys_init_v1_hw, 1788 1825 .phy_start = start_phy_v1_hw, 1789 1826 .phy_disable = disable_phy_v1_hw, ··· 1789 1830 .phy_set_linkrate = phy_set_linkrate_v1_hw, 1790 1831 .phy_get_max_linkrate = phy_get_max_linkrate_v1_hw, 1791 1832 .get_wideport_bitmap = get_wideport_bitmap_v1_hw, 1792 - .max_command_entries = HISI_SAS_COMMAND_ENTRIES_V1_HW, 1793 1833 .complete_hdr_size = sizeof(struct hisi_sas_complete_v1_hdr), 1794 1834 .sht = &sht_v1_hw, 1795 1835 };
+22 -70
drivers/scsi/hisi_sas/hisi_sas_v2_hw.c
··· 1637 1637 return bitmap; 1638 1638 } 1639 1639 1640 - /* 1641 - * The callpath to this function and upto writing the write 1642 - * queue pointer should be safe from interruption. 1643 - */ 1644 - static int 1645 - get_free_slot_v2_hw(struct hisi_hba *hisi_hba, struct hisi_sas_dq *dq) 1646 - { 1647 - struct device *dev = hisi_hba->dev; 1648 - int queue = dq->id; 1649 - u32 r, w; 1650 - 1651 - w = dq->wr_point; 1652 - r = hisi_sas_read32_relaxed(hisi_hba, 1653 - DLVRY_Q_0_RD_PTR + (queue * 0x14)); 1654 - if (r == (w+1) % HISI_SAS_QUEUE_SLOTS) { 1655 - dev_warn(dev, "full queue=%d r=%d w=%d\n", 1656 - queue, r, w); 1657 - return -EAGAIN; 1658 - } 1659 - 1660 - dq->wr_point = (dq->wr_point + 1) % HISI_SAS_QUEUE_SLOTS; 1661 - 1662 - return w; 1663 - } 1664 - 1665 1640 /* DQ lock must be taken here */ 1666 1641 static void start_delivery_v2_hw(struct hisi_sas_dq *dq) 1667 1642 { ··· 2393 2418 slot_err_v2_hw(hisi_hba, task, slot, 2); 2394 2419 2395 2420 if (ts->stat != SAS_DATA_UNDERRUN) 2396 - dev_info(dev, "erroneous completion iptt=%d task=%p dev id=%d CQ hdr: 0x%x 0x%x 0x%x 0x%x Error info: 0x%x 0x%x 0x%x 0x%x\n", 2421 + dev_info(dev, "erroneous completion iptt=%d task=%pK dev id=%d CQ hdr: 0x%x 0x%x 0x%x 0x%x Error info: 0x%x 0x%x 0x%x 0x%x\n", 2397 2422 slot->idx, task, sas_dev->device_id, 2398 2423 complete_hdr->dw0, complete_hdr->dw1, 2399 2424 complete_hdr->act, complete_hdr->dw3, ··· 2419 2444 case SAS_PROTOCOL_SMP: 2420 2445 { 2421 2446 struct scatterlist *sg_resp = &task->smp_task.smp_resp; 2422 - void *to; 2447 + void *to = page_address(sg_page(sg_resp)); 2423 2448 2424 2449 ts->stat = SAM_STAT_GOOD; 2425 - to = kmap_atomic(sg_page(sg_resp)); 2426 2450 2427 - dma_unmap_sg(dev, &task->smp_task.smp_resp, 1, 2428 - DMA_FROM_DEVICE); 2429 2451 dma_unmap_sg(dev, &task->smp_task.smp_req, 1, 2430 2452 DMA_TO_DEVICE); 2431 2453 memcpy(to + sg_resp->offset, 2432 2454 hisi_sas_status_buf_addr_mem(slot) + 2433 2455 sizeof(struct hisi_sas_err_record), 2434 - sg_dma_len(sg_resp)); 2435 - kunmap_atomic(to); 2456 + sg_resp->length); 2436 2457 break; 2437 2458 } 2438 2459 case SAS_PROTOCOL_SATA: ··· 2455 2484 spin_lock_irqsave(&task->task_state_lock, flags); 2456 2485 if (task->task_state_flags & SAS_TASK_STATE_ABORTED) { 2457 2486 spin_unlock_irqrestore(&task->task_state_lock, flags); 2458 - dev_info(dev, "slot complete: task(%p) aborted\n", task); 2487 + dev_info(dev, "slot complete: task(%pK) aborted\n", task); 2459 2488 return SAS_ABORTED_TASK; 2460 2489 } 2461 2490 task->task_state_flags |= SAS_TASK_STATE_DONE; ··· 2466 2495 spin_lock_irqsave(&device->done_lock, flags); 2467 2496 if (test_bit(SAS_HA_FROZEN, &ha->state)) { 2468 2497 spin_unlock_irqrestore(&device->done_lock, flags); 2469 - dev_info(dev, "slot complete: task(%p) ignored\n", 2498 + dev_info(dev, "slot complete: task(%pK) ignored\n", 2470 2499 task); 2471 2500 return sts; 2472 2501 } ··· 2534 2563 hdr->dw1 = cpu_to_le32(dw1); 2535 2564 2536 2565 /* dw2 */ 2537 - if (task->ata_task.use_ncq && hisi_sas_get_ncq_tag(task, &hdr_tag)) { 2566 + if (task->ata_task.use_ncq) { 2567 + struct ata_queued_cmd *qc = task->uldd_task; 2568 + 2569 + hdr_tag = qc->tag; 2538 2570 task->ata_task.fis.sector_count |= (u8) (hdr_tag << 3); 2539 2571 dw2 |= hdr_tag << CMD_HDR_NCQ_TAG_OFF; 2540 2572 } ··· 3307 3333 { 3308 3334 struct platform_device *pdev = hisi_hba->platform_dev; 3309 3335 struct device *dev = &pdev->dev; 3310 - int irq, rc, irq_map[128]; 3311 - int i, phy_no, fatal_no, queue_no, k; 3336 + int irq, rc = 0, irq_map[128]; 3337 + int i, phy_no, fatal_no, queue_no; 3312 3338 3313 3339 for (i = 0; i < 128; i++) 3314 3340 irq_map[i] = platform_get_irq(pdev, i); ··· 3321 3347 dev_err(dev, "irq init: could not request phy interrupt %d, rc=%d\n", 3322 3348 irq, rc); 3323 3349 rc = -ENOENT; 3324 - goto free_phy_int_irqs; 3350 + goto err_out; 3325 3351 } 3326 3352 } 3327 3353 ··· 3335 3361 dev_err(dev, "irq init: could not request sata interrupt %d, rc=%d\n", 3336 3362 irq, rc); 3337 3363 rc = -ENOENT; 3338 - goto free_sata_int_irqs; 3364 + goto err_out; 3339 3365 } 3340 3366 } 3341 3367 ··· 3347 3373 dev_err(dev, "irq init: could not request fatal interrupt %d, rc=%d\n", 3348 3374 irq, rc); 3349 3375 rc = -ENOENT; 3350 - goto free_fatal_int_irqs; 3376 + goto err_out; 3351 3377 } 3352 3378 } 3353 3379 ··· 3362 3388 dev_err(dev, "irq init: could not request cq interrupt %d, rc=%d\n", 3363 3389 irq, rc); 3364 3390 rc = -ENOENT; 3365 - goto free_cq_int_irqs; 3391 + goto err_out; 3366 3392 } 3367 3393 tasklet_init(t, cq_tasklet_v2_hw, (unsigned long)cq); 3368 3394 } 3369 3395 3370 3396 hisi_hba->cq_nvecs = hisi_hba->queue_count; 3371 3397 3372 - return 0; 3373 - 3374 - free_cq_int_irqs: 3375 - for (k = 0; k < queue_no; k++) { 3376 - struct hisi_sas_cq *cq = &hisi_hba->cq[k]; 3377 - 3378 - free_irq(irq_map[k + 96], cq); 3379 - tasklet_kill(&cq->tasklet); 3380 - } 3381 - free_fatal_int_irqs: 3382 - for (k = 0; k < fatal_no; k++) 3383 - free_irq(irq_map[k + 81], hisi_hba); 3384 - free_sata_int_irqs: 3385 - for (k = 0; k < phy_no; k++) { 3386 - struct hisi_sas_phy *phy = &hisi_hba->phy[k]; 3387 - 3388 - free_irq(irq_map[k + 72], phy); 3389 - } 3390 - free_phy_int_irqs: 3391 - for (k = 0; k < i; k++) 3392 - free_irq(irq_map[k + 1], hisi_hba); 3398 + err_out: 3393 3399 return rc; 3394 3400 } 3395 3401 ··· 3498 3544 return 0; 3499 3545 } 3500 3546 3501 - static int wait_cmds_complete_timeout_v2_hw(struct hisi_hba *hisi_hba, 3502 - int delay_ms, int timeout_ms) 3547 + static void wait_cmds_complete_timeout_v2_hw(struct hisi_hba *hisi_hba, 3548 + int delay_ms, int timeout_ms) 3503 3549 { 3504 3550 struct device *dev = hisi_hba->dev; 3505 3551 int entries, entries_old = 0, time; ··· 3513 3559 msleep(delay_ms); 3514 3560 } 3515 3561 3516 - if (time >= timeout_ms) 3517 - return -ETIMEDOUT; 3562 + if (time >= timeout_ms) { 3563 + dev_dbg(dev, "Wait commands complete timeout!\n"); 3564 + return; 3565 + } 3518 3566 3519 3567 dev_dbg(dev, "wait commands complete %dms\n", time); 3520 3568 3521 - return 0; 3522 3569 } 3523 3570 3524 3571 static struct device_attribute *host_attrs_v2_hw[] = { ··· 3561 3606 .prep_ssp = prep_ssp_v2_hw, 3562 3607 .prep_stp = prep_ata_v2_hw, 3563 3608 .prep_abort = prep_abort_v2_hw, 3564 - .get_free_slot = get_free_slot_v2_hw, 3565 3609 .start_delivery = start_delivery_v2_hw, 3566 - .slot_complete = slot_complete_v2_hw, 3567 3610 .phys_init = phys_init_v2_hw, 3568 3611 .phy_start = start_phy_v2_hw, 3569 3612 .phy_disable = disable_phy_v2_hw, ··· 3569 3616 .get_events = phy_get_events_v2_hw, 3570 3617 .phy_set_linkrate = phy_set_linkrate_v2_hw, 3571 3618 .phy_get_max_linkrate = phy_get_max_linkrate_v2_hw, 3572 - .max_command_entries = HISI_SAS_COMMAND_ENTRIES_V2_HW, 3573 3619 .complete_hdr_size = sizeof(struct hisi_sas_complete_v2_hdr), 3574 3620 .soft_reset = soft_reset_v2_hw, 3575 3621 .get_phys_state = get_phys_state_v2_hw,
+224 -83
drivers/scsi/hisi_sas/hisi_sas_v3_hw.c
··· 71 71 #define HGC_DQE_ECC_MB_ADDR_OFF 16 72 72 #define HGC_DQE_ECC_MB_ADDR_MSK (0xfff << HGC_DQE_ECC_MB_ADDR_OFF) 73 73 #define CHNL_INT_STATUS 0x148 74 + #define TAB_DFX 0x14c 74 75 #define HGC_ITCT_ECC_ADDR 0x150 75 76 #define HGC_ITCT_ECC_1B_ADDR_OFF 0 76 77 #define HGC_ITCT_ECC_1B_ADDR_MSK (0x3ff << \ ··· 84 83 #define AXI_ERR_INFO_MSK (0xff << AXI_ERR_INFO_OFF) 85 84 #define FIFO_ERR_INFO_OFF 8 86 85 #define FIFO_ERR_INFO_MSK (0xff << FIFO_ERR_INFO_OFF) 86 + #define TAB_RD_TYPE 0x15c 87 87 #define INT_COAL_EN 0x19c 88 88 #define OQ_INT_COAL_TIME 0x1a0 89 89 #define OQ_INT_COAL_CNT 0x1a4 ··· 191 189 #define PHY_CFG_PHY_RST_OFF 3 192 190 #define PHY_CFG_PHY_RST_MSK (0x1 << PHY_CFG_PHY_RST_OFF) 193 191 #define PROG_PHY_LINK_RATE (PORT_BASE + 0x8) 192 + #define CFG_PROG_PHY_LINK_RATE_OFF 8 193 + #define CFG_PROG_PHY_LINK_RATE_MSK (0xf << CFG_PROG_PHY_LINK_RATE_OFF) 194 194 #define PHY_CTRL (PORT_BASE + 0x14) 195 195 #define PHY_CTRL_RESET_OFF 0 196 196 #define PHY_CTRL_RESET_MSK (0x1 << PHY_CTRL_RESET_OFF) 197 197 #define CMD_HDR_PIR_OFF 8 198 198 #define CMD_HDR_PIR_MSK (0x1 << CMD_HDR_PIR_OFF) 199 199 #define SERDES_CFG (PORT_BASE + 0x1c) 200 + #define CFG_ALOS_CHK_DISABLE_OFF 9 201 + #define CFG_ALOS_CHK_DISABLE_MSK (0x1 << CFG_ALOS_CHK_DISABLE_OFF) 202 + #define SAS_PHY_BIST_CTRL (PORT_BASE + 0x2c) 203 + #define CFG_BIST_MODE_SEL_OFF 0 204 + #define CFG_BIST_MODE_SEL_MSK (0xf << CFG_BIST_MODE_SEL_OFF) 205 + #define CFG_LOOP_TEST_MODE_OFF 14 206 + #define CFG_LOOP_TEST_MODE_MSK (0x3 << CFG_LOOP_TEST_MODE_OFF) 207 + #define CFG_RX_BIST_EN_OFF 16 208 + #define CFG_RX_BIST_EN_MSK (0x1 << CFG_RX_BIST_EN_OFF) 209 + #define CFG_TX_BIST_EN_OFF 17 210 + #define CFG_TX_BIST_EN_MSK (0x1 << CFG_TX_BIST_EN_OFF) 211 + #define CFG_BIST_TEST_OFF 18 212 + #define CFG_BIST_TEST_MSK (0x1 << CFG_BIST_TEST_OFF) 213 + #define SAS_PHY_BIST_CODE (PORT_BASE + 0x30) 214 + #define SAS_PHY_BIST_CODE1 (PORT_BASE + 0x34) 215 + #define SAS_BIST_ERR_CNT (PORT_BASE + 0x38) 200 216 #define SL_CFG (PORT_BASE + 0x84) 201 217 #define AIP_LIMIT (PORT_BASE + 0x90) 202 218 #define SL_CONTROL (PORT_BASE + 0x94) ··· 517 497 void __iomem *regs = hisi_hba->regs + off; 518 498 519 499 return readl(regs); 520 - } 521 - 522 - static u32 hisi_sas_read32_relaxed(struct hisi_hba *hisi_hba, u32 off) 523 - { 524 - void __iomem *regs = hisi_hba->regs + off; 525 - 526 - return readl_relaxed(regs); 527 500 } 528 501 529 502 static void hisi_sas_write32(struct hisi_hba *hisi_hba, u32 off, u32 val) ··· 1019 1006 return bitmap; 1020 1007 } 1021 1008 1022 - /** 1023 - * The callpath to this function and upto writing the write 1024 - * queue pointer should be safe from interruption. 1025 - */ 1026 - static int 1027 - get_free_slot_v3_hw(struct hisi_hba *hisi_hba, struct hisi_sas_dq *dq) 1028 - { 1029 - struct device *dev = hisi_hba->dev; 1030 - int queue = dq->id; 1031 - u32 r, w; 1032 - 1033 - w = dq->wr_point; 1034 - r = hisi_sas_read32_relaxed(hisi_hba, 1035 - DLVRY_Q_0_RD_PTR + (queue * 0x14)); 1036 - if (r == (w+1) % HISI_SAS_QUEUE_SLOTS) { 1037 - dev_warn(dev, "full queue=%d r=%d w=%d\n", 1038 - queue, r, w); 1039 - return -EAGAIN; 1040 - } 1041 - 1042 - dq->wr_point = (dq->wr_point + 1) % HISI_SAS_QUEUE_SLOTS; 1043 - 1044 - return w; 1045 - } 1046 - 1047 1009 static void start_delivery_v3_hw(struct hisi_sas_dq *dq) 1048 1010 { 1049 1011 struct hisi_hba *hisi_hba = dq->hisi_hba; ··· 1374 1386 hdr->dw1 = cpu_to_le32(dw1); 1375 1387 1376 1388 /* dw2 */ 1377 - if (task->ata_task.use_ncq && hisi_sas_get_ncq_tag(task, &hdr_tag)) { 1389 + if (task->ata_task.use_ncq) { 1390 + struct ata_queued_cmd *qc = task->uldd_task; 1391 + 1392 + hdr_tag = qc->tag; 1378 1393 task->ata_task.fis.sector_count |= (u8) (hdr_tag << 3); 1379 1394 dw2 |= hdr_tag << CMD_HDR_NCQ_TAG_OFF; 1380 1395 } ··· 1935 1944 u32 irq_value, irq_msk; 1936 1945 1937 1946 irq_msk = hisi_sas_read32(hisi_hba, SAS_ECC_INTR_MSK); 1938 - hisi_sas_write32(hisi_hba, SAS_ECC_INTR_MSK, irq_msk | 0xffffffff); 1947 + hisi_sas_write32(hisi_hba, SAS_ECC_INTR_MSK, 0xffffffff); 1939 1948 1940 1949 irq_value = hisi_sas_read32(hisi_hba, SAS_ECC_INTR); 1941 1950 if (irq_value) ··· 2211 2220 2212 2221 slot_err_v3_hw(hisi_hba, task, slot); 2213 2222 if (ts->stat != SAS_DATA_UNDERRUN) 2214 - dev_info(dev, "erroneous completion iptt=%d task=%p dev id=%d CQ hdr: 0x%x 0x%x 0x%x 0x%x Error info: 0x%x 0x%x 0x%x 0x%x\n", 2223 + dev_info(dev, "erroneous completion iptt=%d task=%pK dev id=%d CQ hdr: 0x%x 0x%x 0x%x 0x%x Error info: 0x%x 0x%x 0x%x 0x%x\n", 2215 2224 slot->idx, task, sas_dev->device_id, 2216 2225 dw0, dw1, complete_hdr->act, dw3, 2217 2226 error_info[0], error_info[1], ··· 2232 2241 } 2233 2242 case SAS_PROTOCOL_SMP: { 2234 2243 struct scatterlist *sg_resp = &task->smp_task.smp_resp; 2235 - void *to; 2244 + void *to = page_address(sg_page(sg_resp)); 2236 2245 2237 2246 ts->stat = SAM_STAT_GOOD; 2238 - to = kmap_atomic(sg_page(sg_resp)); 2239 2247 2240 - dma_unmap_sg(dev, &task->smp_task.smp_resp, 1, 2241 - DMA_FROM_DEVICE); 2242 2248 dma_unmap_sg(dev, &task->smp_task.smp_req, 1, 2243 2249 DMA_TO_DEVICE); 2244 2250 memcpy(to + sg_resp->offset, 2245 2251 hisi_sas_status_buf_addr_mem(slot) + 2246 2252 sizeof(struct hisi_sas_err_record), 2247 - sg_dma_len(sg_resp)); 2248 - kunmap_atomic(to); 2253 + sg_resp->length); 2249 2254 break; 2250 2255 } 2251 2256 case SAS_PROTOCOL_SATA: ··· 2266 2279 spin_lock_irqsave(&task->task_state_lock, flags); 2267 2280 if (task->task_state_flags & SAS_TASK_STATE_ABORTED) { 2268 2281 spin_unlock_irqrestore(&task->task_state_lock, flags); 2269 - dev_info(dev, "slot complete: task(%p) aborted\n", task); 2282 + dev_info(dev, "slot complete: task(%pK) aborted\n", task); 2270 2283 return SAS_ABORTED_TASK; 2271 2284 } 2272 2285 task->task_state_flags |= SAS_TASK_STATE_DONE; ··· 2277 2290 spin_lock_irqsave(&device->done_lock, flags); 2278 2291 if (test_bit(SAS_HA_FROZEN, &ha->state)) { 2279 2292 spin_unlock_irqrestore(&device->done_lock, flags); 2280 - dev_info(dev, "slot complete: task(%p) ignored\n ", 2293 + dev_info(dev, "slot complete: task(%pK) ignored\n ", 2281 2294 task); 2282 2295 return sts; 2283 2296 } ··· 2372 2385 { 2373 2386 struct device *dev = hisi_hba->dev; 2374 2387 struct pci_dev *pdev = hisi_hba->pci_dev; 2375 - int vectors, rc; 2376 - int i, k; 2388 + int vectors, rc, i; 2377 2389 int max_msi = HISI_SAS_MSI_COUNT_V3_HW, min_msi; 2378 2390 2379 2391 if (auto_affine_msi_experimental) { ··· 2420 2434 if (rc) { 2421 2435 dev_err(dev, "could not request chnl interrupt, rc=%d\n", rc); 2422 2436 rc = -ENOENT; 2423 - goto free_phy_irq; 2437 + goto free_irq_vectors; 2424 2438 } 2425 2439 2426 2440 rc = devm_request_irq(dev, pci_irq_vector(pdev, 11), ··· 2429 2443 if (rc) { 2430 2444 dev_err(dev, "could not request fatal interrupt, rc=%d\n", rc); 2431 2445 rc = -ENOENT; 2432 - goto free_chnl_interrupt; 2446 + goto free_irq_vectors; 2433 2447 } 2434 2448 2435 2449 /* Init tasklets for cq only */ ··· 2446 2460 dev_err(dev, "could not request cq%d interrupt, rc=%d\n", 2447 2461 i, rc); 2448 2462 rc = -ENOENT; 2449 - goto free_cq_irqs; 2463 + goto free_irq_vectors; 2450 2464 } 2451 2465 2452 2466 tasklet_init(t, cq_tasklet_v3_hw, (unsigned long)cq); ··· 2454 2468 2455 2469 return 0; 2456 2470 2457 - free_cq_irqs: 2458 - for (k = 0; k < i; k++) { 2459 - struct hisi_sas_cq *cq = &hisi_hba->cq[k]; 2460 - int nr = hisi_sas_intr_conv ? 16 : 16 + k; 2461 - 2462 - free_irq(pci_irq_vector(pdev, nr), cq); 2463 - } 2464 - free_irq(pci_irq_vector(pdev, 11), hisi_hba); 2465 - free_chnl_interrupt: 2466 - free_irq(pci_irq_vector(pdev, 2), hisi_hba); 2467 - free_phy_irq: 2468 - free_irq(pci_irq_vector(pdev, 1), hisi_hba); 2469 2471 free_irq_vectors: 2470 2472 pci_free_irq_vectors(pdev); 2471 2473 return rc; ··· 2594 2620 return 0; 2595 2621 } 2596 2622 2597 - static int wait_cmds_complete_timeout_v3_hw(struct hisi_hba *hisi_hba, 2598 - int delay_ms, int timeout_ms) 2623 + static void wait_cmds_complete_timeout_v3_hw(struct hisi_hba *hisi_hba, 2624 + int delay_ms, int timeout_ms) 2599 2625 { 2600 2626 struct device *dev = hisi_hba->dev; 2601 2627 int entries, entries_old = 0, time; ··· 2609 2635 msleep(delay_ms); 2610 2636 } 2611 2637 2612 - if (time >= timeout_ms) 2613 - return -ETIMEDOUT; 2638 + if (time >= timeout_ms) { 2639 + dev_dbg(dev, "Wait commands complete timeout!\n"); 2640 + return; 2641 + } 2614 2642 2615 2643 dev_dbg(dev, "wait commands complete %dms\n", time); 2616 - 2617 - return 0; 2618 2644 } 2619 2645 2620 2646 static ssize_t intr_conv_v3_hw_show(struct device *dev, ··· 2861 2887 .read_global_reg = hisi_sas_read32, 2862 2888 }; 2863 2889 2890 + static const struct hisi_sas_debugfs_reg_lu debugfs_axi_reg_lu[] = { 2891 + HISI_SAS_DEBUGFS_REG(AM_CFG_MAX_TRANS), 2892 + HISI_SAS_DEBUGFS_REG(AM_CFG_SINGLE_PORT_MAX_TRANS), 2893 + HISI_SAS_DEBUGFS_REG(AXI_CFG), 2894 + HISI_SAS_DEBUGFS_REG(AM_ROB_ECC_ERR_ADDR), 2895 + {} 2896 + }; 2897 + 2898 + static const struct hisi_sas_debugfs_reg debugfs_axi_reg = { 2899 + .lu = debugfs_axi_reg_lu, 2900 + .count = 0x61, 2901 + .base_off = AXI_MASTER_CFG_BASE, 2902 + .read_global_reg = hisi_sas_read32, 2903 + }; 2904 + 2905 + static const struct hisi_sas_debugfs_reg_lu debugfs_ras_reg_lu[] = { 2906 + HISI_SAS_DEBUGFS_REG(SAS_RAS_INTR1), 2907 + HISI_SAS_DEBUGFS_REG(SAS_RAS_INTR0_MASK), 2908 + HISI_SAS_DEBUGFS_REG(SAS_RAS_INTR1_MASK), 2909 + HISI_SAS_DEBUGFS_REG(CFG_SAS_RAS_INTR_MASK), 2910 + HISI_SAS_DEBUGFS_REG(SAS_RAS_INTR2), 2911 + HISI_SAS_DEBUGFS_REG(SAS_RAS_INTR2_MASK), 2912 + {} 2913 + }; 2914 + 2915 + static const struct hisi_sas_debugfs_reg debugfs_ras_reg = { 2916 + .lu = debugfs_ras_reg_lu, 2917 + .count = 0x10, 2918 + .base_off = RAS_BASE, 2919 + .read_global_reg = hisi_sas_read32, 2920 + }; 2921 + 2864 2922 static void debugfs_snapshot_prepare_v3_hw(struct hisi_hba *hisi_hba) 2865 2923 { 2866 - struct device *dev = hisi_hba->dev; 2867 - 2868 2924 set_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags); 2869 2925 2870 2926 hisi_sas_write32(hisi_hba, DLVRY_QUEUE_ENABLE, 0); 2871 2927 2872 - if (wait_cmds_complete_timeout_v3_hw(hisi_hba, 100, 5000) == -ETIMEDOUT) 2873 - dev_dbg(dev, "Wait commands complete timeout!\n"); 2928 + wait_cmds_complete_timeout_v3_hw(hisi_hba, 100, 5000); 2874 2929 2875 2930 hisi_sas_kill_tasklets(hisi_hba); 2876 2931 } ··· 2910 2907 (u32)((1ULL << hisi_hba->queue_count) - 1)); 2911 2908 2912 2909 clear_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags); 2910 + } 2911 + 2912 + static void read_iost_itct_cache_v3_hw(struct hisi_hba *hisi_hba, 2913 + enum hisi_sas_debugfs_cache_type type, 2914 + u32 *cache) 2915 + { 2916 + u32 cache_dw_size = HISI_SAS_IOST_ITCT_CACHE_DW_SZ * 2917 + HISI_SAS_IOST_ITCT_CACHE_NUM; 2918 + u32 *buf = cache; 2919 + u32 i, val; 2920 + 2921 + hisi_sas_write32(hisi_hba, TAB_RD_TYPE, type); 2922 + 2923 + for (i = 0; i < HISI_SAS_IOST_ITCT_CACHE_DW_SZ; i++) { 2924 + val = hisi_sas_read32(hisi_hba, TAB_DFX); 2925 + if (val == 0xffffffff) 2926 + break; 2927 + } 2928 + 2929 + if (val != 0xffffffff) { 2930 + pr_err("Issue occur when reading IOST/ITCT cache!\n"); 2931 + return; 2932 + } 2933 + 2934 + memset(buf, 0, cache_dw_size * 4); 2935 + buf[0] = val; 2936 + 2937 + for (i = 1; i < cache_dw_size; i++) 2938 + buf[i] = hisi_sas_read32(hisi_hba, TAB_DFX); 2939 + } 2940 + 2941 + static void hisi_sas_bist_test_prep_v3_hw(struct hisi_hba *hisi_hba) 2942 + { 2943 + u32 reg_val; 2944 + int phy_id = hisi_hba->debugfs_bist_phy_no; 2945 + 2946 + /* disable PHY */ 2947 + hisi_sas_phy_enable(hisi_hba, phy_id, 0); 2948 + 2949 + /* disable ALOS */ 2950 + reg_val = hisi_sas_phy_read32(hisi_hba, phy_id, SERDES_CFG); 2951 + reg_val |= CFG_ALOS_CHK_DISABLE_MSK; 2952 + hisi_sas_phy_write32(hisi_hba, phy_id, SERDES_CFG, reg_val); 2953 + } 2954 + 2955 + static void hisi_sas_bist_test_restore_v3_hw(struct hisi_hba *hisi_hba) 2956 + { 2957 + u32 reg_val; 2958 + int phy_id = hisi_hba->debugfs_bist_phy_no; 2959 + 2960 + /* disable loopback */ 2961 + reg_val = hisi_sas_phy_read32(hisi_hba, phy_id, SAS_PHY_BIST_CTRL); 2962 + reg_val &= ~(CFG_RX_BIST_EN_MSK | CFG_TX_BIST_EN_MSK | 2963 + CFG_BIST_TEST_MSK); 2964 + hisi_sas_phy_write32(hisi_hba, phy_id, SAS_PHY_BIST_CTRL, reg_val); 2965 + 2966 + /* enable ALOS */ 2967 + reg_val = hisi_sas_phy_read32(hisi_hba, phy_id, SERDES_CFG); 2968 + reg_val &= ~CFG_ALOS_CHK_DISABLE_MSK; 2969 + hisi_sas_phy_write32(hisi_hba, phy_id, SERDES_CFG, reg_val); 2970 + 2971 + /* restore the linkrate */ 2972 + reg_val = hisi_sas_phy_read32(hisi_hba, phy_id, PROG_PHY_LINK_RATE); 2973 + /* init OOB link rate as 1.5 Gbits */ 2974 + reg_val &= ~CFG_PROG_PHY_LINK_RATE_MSK; 2975 + reg_val |= (0x8 << CFG_PROG_PHY_LINK_RATE_OFF); 2976 + hisi_sas_phy_write32(hisi_hba, phy_id, PROG_PHY_LINK_RATE, reg_val); 2977 + 2978 + /* enable PHY */ 2979 + hisi_sas_phy_enable(hisi_hba, phy_id, 1); 2980 + } 2981 + 2982 + #define SAS_PHY_BIST_CODE_INIT 0x1 2983 + #define SAS_PHY_BIST_CODE1_INIT 0X80 2984 + static int debugfs_set_bist_v3_hw(struct hisi_hba *hisi_hba, bool enable) 2985 + { 2986 + u32 reg_val, mode_tmp; 2987 + u32 linkrate = hisi_hba->debugfs_bist_linkrate; 2988 + u32 phy_id = hisi_hba->debugfs_bist_phy_no; 2989 + u32 code_mode = hisi_hba->debugfs_bist_code_mode; 2990 + u32 path_mode = hisi_hba->debugfs_bist_mode; 2991 + struct device *dev = hisi_hba->dev; 2992 + 2993 + dev_info(dev, "BIST info:linkrate=%d phy_id=%d code_mode=%d path_mode=%d\n", 2994 + linkrate, phy_id, code_mode, path_mode); 2995 + mode_tmp = path_mode ? 2 : 1; 2996 + if (enable) { 2997 + /* some preparations before bist test */ 2998 + hisi_sas_bist_test_prep_v3_hw(hisi_hba); 2999 + 3000 + /* set linkrate of bit test*/ 3001 + reg_val = hisi_sas_phy_read32(hisi_hba, phy_id, 3002 + PROG_PHY_LINK_RATE); 3003 + reg_val &= ~CFG_PROG_PHY_LINK_RATE_MSK; 3004 + reg_val |= (linkrate << CFG_PROG_PHY_LINK_RATE_OFF); 3005 + hisi_sas_phy_write32(hisi_hba, phy_id, 3006 + PROG_PHY_LINK_RATE, reg_val); 3007 + 3008 + /* set code mode of bit test */ 3009 + reg_val = hisi_sas_phy_read32(hisi_hba, phy_id, 3010 + SAS_PHY_BIST_CTRL); 3011 + reg_val &= ~(CFG_BIST_MODE_SEL_MSK | 3012 + CFG_LOOP_TEST_MODE_MSK | 3013 + CFG_RX_BIST_EN_MSK | 3014 + CFG_TX_BIST_EN_MSK | 3015 + CFG_BIST_TEST_MSK); 3016 + reg_val |= ((code_mode << CFG_BIST_MODE_SEL_OFF) | 3017 + (mode_tmp << CFG_LOOP_TEST_MODE_OFF) | 3018 + CFG_BIST_TEST_MSK); 3019 + hisi_sas_phy_write32(hisi_hba, phy_id, 3020 + SAS_PHY_BIST_CTRL, reg_val); 3021 + 3022 + mdelay(100); 3023 + reg_val |= (CFG_RX_BIST_EN_MSK | CFG_TX_BIST_EN_MSK); 3024 + hisi_sas_phy_write32(hisi_hba, phy_id, 3025 + SAS_PHY_BIST_CTRL, reg_val); 3026 + 3027 + /* set the bist init value */ 3028 + hisi_sas_phy_write32(hisi_hba, phy_id, 3029 + SAS_PHY_BIST_CODE, 3030 + SAS_PHY_BIST_CODE_INIT); 3031 + hisi_sas_phy_write32(hisi_hba, phy_id, 3032 + SAS_PHY_BIST_CODE1, 3033 + SAS_PHY_BIST_CODE1_INIT); 3034 + 3035 + /* clear error bit */ 3036 + mdelay(100); 3037 + hisi_sas_phy_read32(hisi_hba, phy_id, SAS_BIST_ERR_CNT); 3038 + } else { 3039 + /* disable bist test and recover it */ 3040 + hisi_hba->debugfs_bist_cnt += hisi_sas_phy_read32(hisi_hba, 3041 + phy_id, SAS_BIST_ERR_CNT); 3042 + hisi_sas_bist_test_restore_v3_hw(hisi_hba); 3043 + } 3044 + 3045 + return 0; 2913 3046 } 2914 3047 2915 3048 static struct scsi_host_template sht_v3_hw = { ··· 3074 2935 static const struct hisi_sas_hw hisi_sas_v3_hw = { 3075 2936 .hw_init = hisi_sas_v3_init, 3076 2937 .setup_itct = setup_itct_v3_hw, 3077 - .max_command_entries = HISI_SAS_COMMAND_ENTRIES_V3_HW, 3078 2938 .get_wideport_bitmap = get_wideport_bitmap_v3_hw, 3079 2939 .complete_hdr_size = sizeof(struct hisi_sas_complete_v3_hdr), 3080 2940 .clear_itct = clear_itct_v3_hw, ··· 3082 2944 .prep_smp = prep_smp_v3_hw, 3083 2945 .prep_stp = prep_ata_v3_hw, 3084 2946 .prep_abort = prep_abort_v3_hw, 3085 - .get_free_slot = get_free_slot_v3_hw, 3086 2947 .start_delivery = start_delivery_v3_hw, 3087 - .slot_complete = slot_complete_v3_hw, 3088 2948 .phys_init = phys_init_v3_hw, 3089 2949 .phy_start = start_phy_v3_hw, 3090 2950 .phy_disable = disable_phy_v3_hw, ··· 3095 2959 .get_events = phy_get_events_v3_hw, 3096 2960 .write_gpio = write_gpio_v3_hw, 3097 2961 .wait_cmds_complete_timeout = wait_cmds_complete_timeout_v3_hw, 3098 - .debugfs_reg_global = &debugfs_global_reg, 2962 + .debugfs_reg_array[DEBUGFS_GLOBAL] = &debugfs_global_reg, 2963 + .debugfs_reg_array[DEBUGFS_AXI] = &debugfs_axi_reg, 2964 + .debugfs_reg_array[DEBUGFS_RAS] = &debugfs_ras_reg, 3099 2965 .debugfs_reg_port = &debugfs_port_reg, 3100 2966 .snapshot_prepare = debugfs_snapshot_prepare_v3_hw, 3101 2967 .snapshot_restore = debugfs_snapshot_restore_v3_hw, 2968 + .read_iost_itct_cache = read_iost_itct_cache_v3_hw, 2969 + .set_bist = debugfs_set_bist_v3_hw, 3102 2970 }; 3103 2971 3104 2972 static struct Scsi_Host * ··· 3132 2992 prot_mask); 3133 2993 else 3134 2994 hisi_hba->prot_mask = prot_mask; 3135 - 3136 - timer_setup(&hisi_hba->timer, NULL, 0); 3137 2995 3138 2996 if (hisi_sas_get_fw_info(hisi_hba) < 0) 3139 2997 goto err_out; ··· 3214 3076 shost->max_lun = ~0; 3215 3077 shost->max_channel = 1; 3216 3078 shost->max_cmd_len = 16; 3217 - shost->can_queue = hisi_hba->hw->max_command_entries - 3218 - HISI_SAS_RESERVED_IPTT_CNT; 3219 - shost->cmd_per_lun = hisi_hba->hw->max_command_entries - 3220 - HISI_SAS_RESERVED_IPTT_CNT; 3079 + shost->can_queue = HISI_SAS_UNRESERVED_IPTT; 3080 + shost->cmd_per_lun = HISI_SAS_UNRESERVED_IPTT; 3221 3081 3222 3082 sha->sas_ha_name = DRV_NAME; 3223 3083 sha->dev = dev; 3224 3084 sha->lldd_module = THIS_MODULE; 3225 3085 sha->sas_addr = &hisi_hba->sas_addr[0]; 3226 3086 sha->num_phys = hisi_hba->n_phy; 3227 - sha->core.shost = hisi_hba->shost; 3228 3087 3229 3088 for (i = 0; i < hisi_hba->n_phy; i++) { 3230 3089 sha->sas_phy[i] = &hisi_hba->phy[i].sas_phy; ··· 3408 3273 pci_enable_wake(pdev, PCI_D0, 0); 3409 3274 pci_restore_state(pdev); 3410 3275 rc = pci_enable_device(pdev); 3411 - if (rc) 3276 + if (rc) { 3412 3277 dev_err(dev, "enable device failed during resume (%d)\n", rc); 3278 + return rc; 3279 + } 3413 3280 3414 3281 pci_set_master(pdev); 3415 3282 scsi_unblock_requests(shost); 3416 3283 clear_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags); 3417 3284 3418 3285 sas_prep_resume_ha(sha); 3419 - init_reg_v3_hw(hisi_hba); 3286 + rc = hw_init_v3_hw(hisi_hba); 3287 + if (rc) { 3288 + scsi_remove_host(shost); 3289 + pci_disable_device(pdev); 3290 + } 3420 3291 hisi_hba->hw->phys_init(hisi_hba); 3421 3292 sas_resume_ha(sha); 3422 3293 clear_bit(HISI_SAS_RESET_BIT, &hisi_hba->flags);
+3
drivers/scsi/ibmvscsi/ibmvfc.c
··· 1830 1830 port_id = (bsg_request->rqst_data.h_els.port_id[0] << 16) | 1831 1831 (bsg_request->rqst_data.h_els.port_id[1] << 8) | 1832 1832 bsg_request->rqst_data.h_els.port_id[2]; 1833 + /* fall through */ 1833 1834 case FC_BSG_RPT_ELS: 1834 1835 fc_flags = IBMVFC_FC_ELS; 1835 1836 break; ··· 1839 1838 port_id = (bsg_request->rqst_data.h_ct.port_id[0] << 16) | 1840 1839 (bsg_request->rqst_data.h_ct.port_id[1] << 8) | 1841 1840 bsg_request->rqst_data.h_ct.port_id[2]; 1841 + /* fall through */ 1842 1842 case FC_BSG_RPT_CT: 1843 1843 fc_flags = IBMVFC_FC_CT_IU; 1844 1844 break; ··· 4022 4020 return; 4023 4021 case IBMVFC_MAD_CRQ_ERROR: 4024 4022 ibmvfc_retry_host_init(vhost); 4023 + /* fall through */ 4025 4024 case IBMVFC_MAD_DRIVER_FAILED: 4026 4025 ibmvfc_free_event(evt); 4027 4026 return;
+3
drivers/scsi/ibmvscsi_tgt/ibmvscsi_tgt.c
··· 1581 1581 case H_PERMISSION: 1582 1582 if (connection_broken(vscsi)) 1583 1583 flag_bits = (RESPONSE_Q_DOWN | CLIENT_FAILED); 1584 + /* Fall through */ 1584 1585 default: 1585 1586 dev_err(&vscsi->dev, "adapter_info: h_copy_rdma to client failed, rc %ld\n", 1586 1587 rc); ··· 2493 2492 break; 2494 2493 case H_CLOSED: 2495 2494 vscsi->flags |= CLIENT_FAILED; 2495 + /* Fall through */ 2496 2496 case H_DROPPED: 2497 2497 vscsi->flags |= RESPONSE_Q_DOWN; 2498 + /* Fall through */ 2498 2499 case H_REMOTE_PARM: 2499 2500 dev_err(&vscsi->dev, "ping_response: h_send_crq failed, rc %ld\n", 2500 2501 rc);
+7 -4
drivers/scsi/lpfc/lpfc.h
··· 51 51 cmnd for menlo needs nearly twice as for firmware 52 52 downloads using bsg */ 53 53 54 + #define LPFC_DEFAULT_XPSGL_SIZE 256 55 + #define LPFC_MAX_SG_TABLESIZE 0xffff 54 56 #define LPFC_MIN_SG_SLI4_BUF_SZ 0x800 /* based on LPFC_DEFAULT_SG_SEG_CNT */ 55 57 #define LPFC_MAX_BG_SLI4_SEG_CNT_DIF 128 /* sg element count for BlockGuard */ 56 58 #define LPFC_MAX_SG_SEG_CNT_DIF 512 /* sg element count per scsi cmnd */ ··· 734 732 #define HBA_AER_ENABLED 0x1000 /* AER enabled with HBA */ 735 733 #define HBA_DEVLOSS_TMO 0x2000 /* HBA in devloss timeout */ 736 734 #define HBA_RRQ_ACTIVE 0x4000 /* process the rrq active list */ 737 - #define HBA_FCP_IOQ_FLUSH 0x8000 /* FCP I/O queues being flushed */ 735 + #define HBA_IOQ_FLUSH 0x8000 /* FCP/NVME I/O queues being flushed */ 738 736 #define HBA_FW_DUMP_OP 0x10000 /* Skips fn reset before FW dump */ 739 737 #define HBA_RECOVERABLE_UE 0x20000 /* Firmware supports recoverable UE */ 740 738 #define HBA_FORCED_LINK_SPEED 0x40000 /* 741 739 * Firmware supports Forced Link Speed 742 740 * capability 743 741 */ 744 - #define HBA_NVME_IOQ_FLUSH 0x80000 /* NVME IO queues flushed. */ 745 742 #define HBA_FLOGI_ISSUED 0x100000 /* FLOGI was issued */ 746 743 747 744 uint32_t fcp_ring_in_use; /* When polling test if intr-hndlr active*/ ··· 796 795 uint8_t mds_diags_support; 797 796 uint8_t bbcredit_support; 798 797 uint8_t enab_exp_wqcq_pages; 798 + u8 nsler; /* Firmware supports FC-NVMe-2 SLER */ 799 799 800 800 /* HBA Config Parameters */ 801 801 uint32_t cfg_ack0; 802 802 uint32_t cfg_xri_rebalancing; 803 + uint32_t cfg_xpsgl; 803 804 uint32_t cfg_enable_npiv; 804 805 uint32_t cfg_enable_rrq; 805 806 uint32_t cfg_topology; ··· 908 905 wait_queue_head_t work_waitq; 909 906 struct task_struct *worker_thread; 910 907 unsigned long data_flags; 908 + uint32_t border_sge_num; 911 909 912 910 uint32_t hbq_in_use; /* HBQs in use flag */ 913 911 uint32_t hbq_count; /* Count of configured HBQs */ ··· 991 987 struct dma_pool *lpfc_nvmet_drb_pool; /* data receive buffer pool */ 992 988 struct dma_pool *lpfc_hbq_pool; /* SLI3 hbq buffer pool */ 993 989 struct dma_pool *txrdy_payload_pool; 990 + struct dma_pool *lpfc_cmd_rsp_buf_pool; 994 991 struct lpfc_dma_pool lpfc_mbuf_safety_pool; 995 992 996 993 mempool_t *mbox_mem_pool; ··· 1039 1034 struct dentry *debug_hbqinfo; 1040 1035 struct dentry *debug_dumpHostSlim; 1041 1036 struct dentry *debug_dumpHBASlim; 1042 - struct dentry *debug_dumpData; /* BlockGuard BPL */ 1043 - struct dentry *debug_dumpDif; /* BlockGuard BPL */ 1044 1037 struct dentry *debug_InjErrLBA; /* LBA to inject errors at */ 1045 1038 struct dentry *debug_InjErrNPortID; /* NPortID to inject errors at */ 1046 1039 struct dentry *debug_InjErrWWPN; /* WWPN to inject errors at */
+55 -21
drivers/scsi/lpfc/lpfc_attr.c
··· 841 841 lpfc_vpd_t *vp = &phba->vpd; 842 842 843 843 lpfc_jedec_to_ascii(vp->rev.biuRev, hdw); 844 - return scnprintf(buf, PAGE_SIZE, "%s\n", hdw); 844 + return scnprintf(buf, PAGE_SIZE, "%s %08x %08x\n", hdw, 845 + vp->rev.smRev, vp->rev.smFwRev); 845 846 } 846 847 847 848 /** ··· 3683 3682 if (rport) 3684 3683 remoteport = rport->remoteport; 3685 3684 spin_unlock(&vport->phba->hbalock); 3686 - if (remoteport) 3687 - nvme_fc_set_remoteport_devloss(rport->remoteport, 3685 + if (rport && remoteport) 3686 + nvme_fc_set_remoteport_devloss(remoteport, 3688 3687 vport->cfg_devloss_tmo); 3689 3688 #endif 3690 3689 } ··· 5468 5467 * lpfc_nvme_enable_fb: Enable NVME first burst on I and T functions. 5469 5468 * For the Initiator (I), enabling this parameter means that an NVMET 5470 5469 * PRLI response with FBA enabled and an FB_SIZE set to a nonzero value will be 5471 - * processed by the initiator for subsequent NVME FCP IO. For the target 5472 - * function (T), enabling this parameter qualifies the lpfc_nvmet_fb_size 5473 - * driver parameter as the target function's first burst size returned to the 5474 - * initiator in the target's NVME PRLI response. Parameter supported on physical 5475 - * port only - no NPIV support. 5470 + * processed by the initiator for subsequent NVME FCP IO. 5471 + * Currently, this feature is not supported on the NVME target 5476 5472 * Value range is [0,1]. Default value is 0 (disabled). 5477 5473 */ 5478 5474 LPFC_ATTR_RW(nvme_enable_fb, 0, 0, 1, 5479 - "Enable First Burst feature on I and T functions."); 5475 + "Enable First Burst feature for NVME Initiator."); 5480 5476 5481 5477 /* 5482 5478 # lpfc_max_scsicmpl_time: Use scsi command completion time to control I/O queue ··· 5925 5927 * 1 = MDS Diagnostics enabled 5926 5928 * Value range is [0,1]. Default value is 0. 5927 5929 */ 5928 - LPFC_ATTR_R(enable_mds_diags, 0, 0, 1, "Enable MDS Diagnostics"); 5930 + LPFC_ATTR_RW(enable_mds_diags, 0, 0, 1, "Enable MDS Diagnostics"); 5929 5931 5930 5932 /* 5931 5933 * lpfc_ras_fwlog_buffsize: Firmware logging host buffer size ··· 6857 6859 static void 6858 6860 lpfc_set_rport_loss_tmo(struct fc_rport *rport, uint32_t timeout) 6859 6861 { 6862 + struct lpfc_rport_data *rdata = rport->dd_data; 6863 + struct lpfc_nodelist *ndlp = rdata->pnode; 6864 + #if (IS_ENABLED(CONFIG_NVME_FC)) 6865 + struct lpfc_nvme_rport *nrport = NULL; 6866 + #endif 6867 + 6860 6868 if (timeout) 6861 6869 rport->dev_loss_tmo = timeout; 6862 6870 else 6863 6871 rport->dev_loss_tmo = 1; 6872 + 6873 + if (!ndlp || !NLP_CHK_NODE_ACT(ndlp)) { 6874 + dev_info(&rport->dev, "Cannot find remote node to " 6875 + "set rport dev loss tmo, port_id x%x\n", 6876 + rport->port_id); 6877 + return; 6878 + } 6879 + 6880 + #if (IS_ENABLED(CONFIG_NVME_FC)) 6881 + nrport = lpfc_ndlp_get_nrport(ndlp); 6882 + 6883 + if (nrport && nrport->remoteport) 6884 + nvme_fc_set_remoteport_devloss(nrport->remoteport, 6885 + rport->dev_loss_tmo); 6886 + #endif 6864 6887 } 6865 6888 6866 6889 /** ··· 7078 7059 }; 7079 7060 7080 7061 /** 7062 + * lpfc_get_hba_function_mode - Used to determine the HBA function in FCoE 7063 + * Mode 7064 + * @phba: lpfc_hba pointer. 7065 + **/ 7066 + static void 7067 + lpfc_get_hba_function_mode(struct lpfc_hba *phba) 7068 + { 7069 + /* If it's a SkyHawk FCoE adapter */ 7070 + if (phba->pcidev->device == PCI_DEVICE_ID_SKYHAWK) 7071 + phba->hba_flag |= HBA_FCOE_MODE; 7072 + else 7073 + phba->hba_flag &= ~HBA_FCOE_MODE; 7074 + } 7075 + 7076 + /** 7081 7077 * lpfc_get_cfgparam - Used during probe_one to init the adapter structure 7082 7078 * @phba: lpfc_hba pointer. 7083 7079 **/ ··· 7148 7114 else 7149 7115 phba->cfg_poll = lpfc_poll; 7150 7116 7151 - if (phba->cfg_enable_bg) 7117 + /* Get the function mode */ 7118 + lpfc_get_hba_function_mode(phba); 7119 + 7120 + /* BlockGuard allowed for FC only. */ 7121 + if (phba->cfg_enable_bg && phba->hba_flag & HBA_FCOE_MODE) { 7122 + lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 7123 + "0581 BlockGuard feature not supported\n"); 7124 + /* If set, clear the BlockGuard support param */ 7125 + phba->cfg_enable_bg = 0; 7126 + } else if (phba->cfg_enable_bg) { 7152 7127 phba->sli3_options |= LPFC_SLI3_BG_ENABLED; 7128 + } 7153 7129 7154 7130 lpfc_suppress_rsp_init(phba, lpfc_suppress_rsp); 7155 7131 ··· 7218 7174 lpfc_ras_fwlog_buffsize_init(phba, lpfc_ras_fwlog_buffsize); 7219 7175 lpfc_ras_fwlog_level_init(phba, lpfc_ras_fwlog_level); 7220 7176 lpfc_ras_fwlog_func_init(phba, lpfc_ras_fwlog_func); 7221 - 7222 - 7223 - /* If the NVME FC4 type is enabled, scale the sg_seg_cnt to 7224 - * accommodate 512K and 1M IOs in a single nvme buf and supply 7225 - * enough NVME LS iocb buffers for larger connectivity counts. 7226 - */ 7227 - if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 7228 - phba->cfg_sg_seg_cnt = LPFC_MAX_NVME_SEG_CNT; 7229 - phba->cfg_iocb_cnt = 5; 7230 - } 7231 7177 7232 7178 return; 7233 7179 }
+17 -12
drivers/scsi/lpfc/lpfc_bsg.c
··· 1040 1040 if (!dmabuf) { 1041 1041 lpfc_printf_log(phba, KERN_ERR, 1042 1042 LOG_LIBDFC, "2616 No dmabuf " 1043 - "found for iocbq 0x%p\n", 1043 + "found for iocbq x%px\n", 1044 1044 iocbq); 1045 1045 kfree(evt_dat->data); 1046 1046 kfree(evt_dat); ··· 1276 1276 return 0; /* call job done later */ 1277 1277 1278 1278 job_error: 1279 - if (dd_data != NULL) 1280 - kfree(dd_data); 1281 - 1279 + kfree(dd_data); 1282 1280 job->dd_data = NULL; 1283 1281 return rc; 1284 1282 } ··· 1569 1571 "2722 Xmit CT response on exchange x%x Data: x%x x%x x%x\n", 1570 1572 icmd->ulpContext, icmd->ulpIoTag, tag, phba->link_state); 1571 1573 1572 - ctiocb->iocb_cmpl = NULL; 1573 1574 ctiocb->iocb_flag |= LPFC_IO_LIBDFC; 1574 1575 ctiocb->vport = phba->pport; 1575 1576 ctiocb->context1 = dd_data; ··· 5448 5451 bsg_reply->result = rc; 5449 5452 5450 5453 /* complete the job back to userspace */ 5451 - bsg_job_done(job, bsg_reply->result, bsg_reply->reply_payload_rcv_len); 5454 + if (!rc) 5455 + bsg_job_done(job, bsg_reply->result, 5456 + bsg_reply->reply_payload_rcv_len); 5452 5457 return rc; 5453 5458 } 5454 5459 ··· 5529 5530 bsg_reply->result = rc; 5530 5531 5531 5532 /* complete the job back to userspace */ 5532 - bsg_job_done(job, bsg_reply->result, 5533 - bsg_reply->reply_payload_rcv_len); 5533 + if (!rc) 5534 + bsg_job_done(job, bsg_reply->result, 5535 + bsg_reply->reply_payload_rcv_len); 5534 5536 5535 5537 return rc; 5536 5538 } ··· 5591 5591 bsg_reply->result = rc; 5592 5592 5593 5593 /* complete the job back to userspace */ 5594 - bsg_job_done(job, bsg_reply->result, bsg_reply->reply_payload_rcv_len); 5594 + if (!rc) 5595 + bsg_job_done(job, bsg_reply->result, 5596 + bsg_reply->reply_payload_rcv_len); 5595 5597 5596 5598 return rc; 5597 5599 } ··· 5675 5673 5676 5674 ras_job_error: 5677 5675 bsg_reply->result = rc; 5678 - bsg_job_done(job, bsg_reply->result, bsg_reply->reply_payload_rcv_len); 5676 + if (!rc) 5677 + bsg_job_done(job, bsg_reply->result, 5678 + bsg_reply->reply_payload_rcv_len); 5679 5679 5680 5680 return rc; 5681 5681 } ··· 5748 5744 phba->sli4_hba.link_state.logical_speed / 1000; 5749 5745 job_error: 5750 5746 bsg_reply->result = rc; 5751 - bsg_job_done(job, bsg_reply->result, 5752 - bsg_reply->reply_payload_rcv_len); 5747 + if (!rc) 5748 + bsg_job_done(job, bsg_reply->result, 5749 + bsg_reply->reply_payload_rcv_len); 5753 5750 return rc; 5754 5751 5755 5752 }
+2 -11
drivers/scsi/lpfc/lpfc_crtn.h
··· 326 326 void lpfc_sli_abort_iocb_ring(struct lpfc_hba *, struct lpfc_sli_ring *); 327 327 void lpfc_sli_abort_fcp_rings(struct lpfc_hba *phba); 328 328 void lpfc_sli_hba_iocb_abort(struct lpfc_hba *); 329 - void lpfc_sli_flush_fcp_rings(struct lpfc_hba *); 329 + void lpfc_sli_flush_io_rings(struct lpfc_hba *phba); 330 330 int lpfc_sli_ringpostbuf_put(struct lpfc_hba *, struct lpfc_sli_ring *, 331 331 struct lpfc_dmabuf *); 332 332 struct lpfc_dmabuf *lpfc_sli_ringpostbuf_get(struct lpfc_hba *, ··· 432 432 uint16_t *, uint16_t *); 433 433 int lpfc_sli4_get_avail_extnt_rsrc(struct lpfc_hba *, uint16_t, 434 434 uint16_t *, uint16_t *); 435 - 436 - /* externs BlockGuard */ 437 - extern char *_dump_buf_data; 438 - extern unsigned long _dump_buf_data_order; 439 - extern char *_dump_buf_dif; 440 - extern unsigned long _dump_buf_dif_order; 441 - extern spinlock_t _dump_buf_lock; 442 - extern int _dump_buf_done; 443 - extern spinlock_t pgcnt_lock; 444 - extern unsigned int pgcnt; 445 435 446 436 /* Interface exported by fabric iocb scheduler */ 447 437 void lpfc_fabric_abort_nport(struct lpfc_nodelist *); ··· 585 595 struct lpfc_sli4_hdw_queue *qp); 586 596 void lpfc_nvme_cmd_template(void); 587 597 void lpfc_nvmet_cmd_template(void); 598 + void lpfc_nvme_cancel_iocb(struct lpfc_hba *phba, struct lpfc_iocbq *pwqeIn); 588 599 extern int lpfc_enable_nvmet_cnt; 589 600 extern unsigned long long lpfc_enable_nvmet[]; 590 601 extern int lpfc_no_hba_reset_cnt;
+52 -14
drivers/scsi/lpfc/lpfc_ct.c
··· 462 462 struct lpfc_nodelist *ndlp; 463 463 464 464 if ((vport->port_type != LPFC_NPIV_PORT) || 465 + (fc4_type == FC_TYPE_FCP) || 465 466 !(vport->ct_flags & FC_CT_RFF_ID) || !vport->cfg_restrict_login) { 466 467 467 468 ndlp = lpfc_setup_disc_node(vport, Did); ··· 481 480 482 481 lpfc_printf_vlog(vport, KERN_INFO, LOG_DISCOVERY, 483 482 "0238 Process x%06x NameServer Rsp " 484 - "Data: x%x x%x x%x x%x\n", Did, 483 + "Data: x%x x%x x%x x%x x%x\n", Did, 485 484 ndlp->nlp_flag, ndlp->nlp_fc4_type, 486 - vport->fc_flag, 485 + ndlp->nlp_state, vport->fc_flag, 487 486 vport->fc_rscn_id_cnt); 487 + 488 + /* if ndlp needs to be discovered and prior 489 + * state of ndlp hit devloss, change state to 490 + * allow rediscovery. 491 + */ 492 + if (ndlp->nlp_flag & NLP_NPR_2B_DISC && 493 + ndlp->nlp_state == NLP_STE_UNUSED_NODE) { 494 + lpfc_nlp_set_state(vport, ndlp, 495 + NLP_STE_NPR_NODE); 496 + } 488 497 } else { 489 498 lpfc_debugfs_disc_trc(vport, LPFC_DISC_TRC_CT, 490 499 "Skip1 GID_FTrsp: did:x%x flg:x%x cnt:%d", ··· 502 491 503 492 lpfc_printf_vlog(vport, KERN_INFO, LOG_DISCOVERY, 504 493 "0239 Skip x%06x NameServer Rsp " 505 - "Data: x%x x%x\n", Did, 506 - vport->fc_flag, 507 - vport->fc_rscn_id_cnt); 494 + "Data: x%x x%x %p\n", 495 + Did, vport->fc_flag, 496 + vport->fc_rscn_id_cnt, ndlp); 508 497 } 509 498 } else { 510 499 if (!(vport->fc_flag & FC_RSCN_MODE) || ··· 762 751 if (CTrsp->CommandResponse.bits.CmdRsp == 763 752 cpu_to_be16(SLI_CT_RESPONSE_FS_ACC)) { 764 753 lpfc_printf_vlog(vport, KERN_INFO, LOG_DISCOVERY, 765 - "0208 NameServer Rsp Data: x%x x%x\n", 754 + "0208 NameServer Rsp Data: x%x x%x " 755 + "sz x%x\n", 766 756 vport->fc_flag, 767 - CTreq->un.gid.Fc4Type); 757 + CTreq->un.gid.Fc4Type, 758 + irsp->un.genreq64.bdl.bdeSize); 768 759 769 760 lpfc_ns_rsp(vport, 770 761 outp, ··· 827 814 } 828 815 vport->gidft_inp--; 829 816 } 817 + 818 + lpfc_printf_vlog(vport, KERN_INFO, LOG_DISCOVERY, 819 + "4216 GID_FT cmpl inp %d disc %d\n", 820 + vport->gidft_inp, vport->num_disc_nodes); 821 + 830 822 /* Link up / RSCN discovery */ 831 823 if ((vport->num_disc_nodes == 0) && 832 824 (vport->gidft_inp == 0)) { ··· 1227 1209 if (fc4_data_1 & LPFC_FC4_TYPE_BITMASK) 1228 1210 ndlp->nlp_fc4_type |= NLP_FC4_NVME; 1229 1211 lpfc_printf_vlog(vport, KERN_INFO, LOG_DISCOVERY, 1230 - "3064 Setting ndlp %p, DID x%06x with " 1231 - "FC4 x%08x, Data: x%08x x%08x\n", 1212 + "3064 Setting ndlp x%px, DID x%06x " 1213 + "with FC4 x%08x, Data: x%08x x%08x " 1214 + "%d\n", 1232 1215 ndlp, did, ndlp->nlp_fc4_type, 1233 - FC_TYPE_FCP, FC_TYPE_NVME); 1234 - ndlp->nlp_prev_state = NLP_STE_REG_LOGIN_ISSUE; 1216 + FC_TYPE_FCP, FC_TYPE_NVME, 1217 + ndlp->nlp_state); 1235 1218 1236 - lpfc_nlp_set_state(vport, ndlp, NLP_STE_PRLI_ISSUE); 1237 - lpfc_issue_els_prli(vport, ndlp, 0); 1219 + if (ndlp->nlp_state == NLP_STE_REG_LOGIN_ISSUE && 1220 + ndlp->nlp_fc4_type) { 1221 + ndlp->nlp_prev_state = NLP_STE_REG_LOGIN_ISSUE; 1222 + 1223 + lpfc_nlp_set_state(vport, ndlp, 1224 + NLP_STE_PRLI_ISSUE); 1225 + lpfc_issue_els_prli(vport, ndlp, 0); 1226 + } else if (!ndlp->nlp_fc4_type) { 1227 + /* If fc4 type is still unknown, then LOGO */ 1228 + lpfc_printf_vlog(vport, KERN_INFO, 1229 + LOG_DISCOVERY, 1230 + "6443 Sending LOGO ndlp x%px," 1231 + "DID x%06x with fc4_type: " 1232 + "x%08x, state: %d\n", 1233 + ndlp, did, ndlp->nlp_fc4_type, 1234 + ndlp->nlp_state); 1235 + lpfc_issue_els_logo(vport, ndlp, 0); 1236 + ndlp->nlp_prev_state = NLP_STE_REG_LOGIN_ISSUE; 1237 + lpfc_nlp_set_state(vport, ndlp, 1238 + NLP_STE_NPR_NODE); 1239 + } 1238 1240 } 1239 1241 } else 1240 1242 lpfc_printf_vlog(vport, KERN_ERR, LOG_DISCOVERY, ··· 2553 2515 ae = (struct lpfc_fdmi_attr_entry *)&ad->AttrValue; 2554 2516 2555 2517 hsp = (struct serv_parm *)&vport->fc_sparam; 2556 - ae->un.AttrInt = (((uint32_t) hsp->cmn.bbRcvSizeMsb) << 8) | 2518 + ae->un.AttrInt = (((uint32_t) hsp->cmn.bbRcvSizeMsb & 0x0F) << 8) | 2557 2519 (uint32_t) hsp->cmn.bbRcvSizeLsb; 2558 2520 ae->un.AttrInt = cpu_to_be32(ae->un.AttrInt); 2559 2521 size = FOURBYTES + sizeof(uint32_t);
+12 -216
drivers/scsi/lpfc/lpfc_debugfs.c
··· 361 361 phys = ((uint64_t)hbq_buf->dbuf.phys & 0xffffffff); 362 362 if (phys == le32_to_cpu(hbqe->bde.addrLow)) { 363 363 len += scnprintf(buf+len, size-len, 364 - "Buf%d: %p %06x\n", i, 364 + "Buf%d: x%px %06x\n", i, 365 365 hbq_buf->dbuf.virt, hbq_buf->tag); 366 366 found = 1; 367 367 break; ··· 416 416 qp = &phba->sli4_hba.hdwq[lpfc_debugfs_last_xripool]; 417 417 418 418 len += scnprintf(buf + len, size - len, "HdwQ %d Info ", i); 419 - spin_lock_irqsave(&qp->abts_scsi_buf_list_lock, iflag); 420 - spin_lock(&qp->abts_nvme_buf_list_lock); 419 + spin_lock_irqsave(&qp->abts_io_buf_list_lock, iflag); 421 420 spin_lock(&qp->io_buf_list_get_lock); 422 421 spin_lock(&qp->io_buf_list_put_lock); 423 422 out = qp->total_io_bufs - (qp->get_io_bufs + qp->put_io_bufs + ··· 429 430 qp->abts_nvme_io_bufs, out); 430 431 spin_unlock(&qp->io_buf_list_put_lock); 431 432 spin_unlock(&qp->io_buf_list_get_lock); 432 - spin_unlock(&qp->abts_nvme_buf_list_lock); 433 - spin_unlock_irqrestore(&qp->abts_scsi_buf_list_lock, iflag); 433 + spin_unlock_irqrestore(&qp->abts_io_buf_list_lock, iflag); 434 434 435 435 lpfc_debugfs_last_xripool++; 436 436 if (lpfc_debugfs_last_xripool >= phba->cfg_hdw_queue) ··· 531 533 continue; 532 534 pbl_pool = &multixri_pool->pbl_pool; 533 535 pvt_pool = &multixri_pool->pvt_pool; 534 - txcmplq_cnt = qp->fcp_wq->pring->txcmplq_cnt; 535 - if (qp->nvme_wq) 536 - txcmplq_cnt += qp->nvme_wq->pring->txcmplq_cnt; 536 + txcmplq_cnt = qp->io_wq->pring->txcmplq_cnt; 537 537 538 538 scnprintf(tmp, sizeof(tmp), 539 539 "%03d: %4d %4d %4d %4d | %10d %10d ", ··· 2162 2166 return rc; 2163 2167 } 2164 2168 2165 - static int 2166 - lpfc_debugfs_dumpData_open(struct inode *inode, struct file *file) 2167 - { 2168 - struct lpfc_debug *debug; 2169 - int rc = -ENOMEM; 2170 - 2171 - if (!_dump_buf_data) 2172 - return -EBUSY; 2173 - 2174 - debug = kmalloc(sizeof(*debug), GFP_KERNEL); 2175 - if (!debug) 2176 - goto out; 2177 - 2178 - /* Round to page boundary */ 2179 - pr_err("9059 BLKGRD: %s: _dump_buf_data=0x%p\n", 2180 - __func__, _dump_buf_data); 2181 - debug->buffer = _dump_buf_data; 2182 - if (!debug->buffer) { 2183 - kfree(debug); 2184 - goto out; 2185 - } 2186 - 2187 - debug->len = (1 << _dump_buf_data_order) << PAGE_SHIFT; 2188 - file->private_data = debug; 2189 - 2190 - rc = 0; 2191 - out: 2192 - return rc; 2193 - } 2194 - 2195 - static int 2196 - lpfc_debugfs_dumpDif_open(struct inode *inode, struct file *file) 2197 - { 2198 - struct lpfc_debug *debug; 2199 - int rc = -ENOMEM; 2200 - 2201 - if (!_dump_buf_dif) 2202 - return -EBUSY; 2203 - 2204 - debug = kmalloc(sizeof(*debug), GFP_KERNEL); 2205 - if (!debug) 2206 - goto out; 2207 - 2208 - /* Round to page boundary */ 2209 - pr_err("9060 BLKGRD: %s: _dump_buf_dif=0x%p file=%pD\n", 2210 - __func__, _dump_buf_dif, file); 2211 - debug->buffer = _dump_buf_dif; 2212 - if (!debug->buffer) { 2213 - kfree(debug); 2214 - goto out; 2215 - } 2216 - 2217 - debug->len = (1 << _dump_buf_dif_order) << PAGE_SHIFT; 2218 - file->private_data = debug; 2219 - 2220 - rc = 0; 2221 - out: 2222 - return rc; 2223 - } 2224 - 2225 - static ssize_t 2226 - lpfc_debugfs_dumpDataDif_write(struct file *file, const char __user *buf, 2227 - size_t nbytes, loff_t *ppos) 2228 - { 2229 - /* 2230 - * The Data/DIF buffers only save one failing IO 2231 - * The write op is used as a reset mechanism after an IO has 2232 - * already been saved to the next one can be saved 2233 - */ 2234 - spin_lock(&_dump_buf_lock); 2235 - 2236 - memset((void *)_dump_buf_data, 0, 2237 - ((1 << PAGE_SHIFT) << _dump_buf_data_order)); 2238 - memset((void *)_dump_buf_dif, 0, 2239 - ((1 << PAGE_SHIFT) << _dump_buf_dif_order)); 2240 - 2241 - _dump_buf_done = 0; 2242 - 2243 - spin_unlock(&_dump_buf_lock); 2244 - 2245 - return nbytes; 2246 - } 2247 - 2248 2169 static ssize_t 2249 2170 lpfc_debugfs_dif_err_read(struct file *file, char __user *buf, 2250 2171 size_t nbytes, loff_t *ppos) ··· 2369 2456 struct lpfc_debug *debug = file->private_data; 2370 2457 2371 2458 kfree(debug->buffer); 2372 - kfree(debug); 2373 - 2374 - return 0; 2375 - } 2376 - 2377 - static int 2378 - lpfc_debugfs_dumpDataDif_release(struct inode *inode, struct file *file) 2379 - { 2380 - struct lpfc_debug *debug = file->private_data; 2381 - 2382 - debug->buffer = NULL; 2383 2459 kfree(debug); 2384 2460 2385 2461 return 0; ··· 3688 3786 int qidx; 3689 3787 3690 3788 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) { 3691 - qp = phba->sli4_hba.hdwq[qidx].fcp_wq; 3789 + qp = phba->sli4_hba.hdwq[qidx].io_wq; 3692 3790 if (qp->assoc_qid != cq_id) 3693 3791 continue; 3694 3792 *len = __lpfc_idiag_print_wq(qp, wqtype, pbuffer, *len); 3695 3793 if (*len >= max_cnt) 3696 3794 return 1; 3697 - } 3698 - if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 3699 - for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) { 3700 - qp = phba->sli4_hba.hdwq[qidx].nvme_wq; 3701 - if (qp->assoc_qid != cq_id) 3702 - continue; 3703 - *len = __lpfc_idiag_print_wq(qp, wqtype, pbuffer, *len); 3704 - if (*len >= max_cnt) 3705 - return 1; 3706 - } 3707 3795 } 3708 3796 return 0; 3709 3797 } ··· 3760 3868 struct lpfc_queue *qp; 3761 3869 int rc; 3762 3870 3763 - qp = phba->sli4_hba.hdwq[eqidx].fcp_cq; 3871 + qp = phba->sli4_hba.hdwq[eqidx].io_cq; 3764 3872 3765 - *len = __lpfc_idiag_print_cq(qp, "FCP", pbuffer, *len); 3873 + *len = __lpfc_idiag_print_cq(qp, "IO", pbuffer, *len); 3766 3874 3767 3875 /* Reset max counter */ 3768 3876 qp->CQ_max_cqe = 0; ··· 3770 3878 if (*len >= max_cnt) 3771 3879 return 1; 3772 3880 3773 - rc = lpfc_idiag_wqs_for_cq(phba, "FCP", pbuffer, len, 3881 + rc = lpfc_idiag_wqs_for_cq(phba, "IO", pbuffer, len, 3774 3882 max_cnt, qp->queue_id); 3775 3883 if (rc) 3776 3884 return 1; 3777 - 3778 - if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 3779 - qp = phba->sli4_hba.hdwq[eqidx].nvme_cq; 3780 - 3781 - *len = __lpfc_idiag_print_cq(qp, "NVME", pbuffer, *len); 3782 - 3783 - /* Reset max counter */ 3784 - qp->CQ_max_cqe = 0; 3785 - 3786 - if (*len >= max_cnt) 3787 - return 1; 3788 - 3789 - rc = lpfc_idiag_wqs_for_cq(phba, "NVME", pbuffer, len, 3790 - max_cnt, qp->queue_id); 3791 - if (rc) 3792 - return 1; 3793 - } 3794 3885 3795 3886 if ((eqidx < phba->cfg_nvmet_mrq) && phba->nvmet_support) { 3796 3887 /* NVMET CQset */ ··· 4223 4348 if (phba->sli4_hba.hdwq) { 4224 4349 for (qidx = 0; qidx < phba->cfg_hdw_queue; 4225 4350 qidx++) { 4226 - qp = phba->sli4_hba.hdwq[qidx].fcp_cq; 4351 + qp = phba->sli4_hba.hdwq[qidx].io_cq; 4227 4352 if (qp && qp->queue_id == queid) { 4228 4353 /* Sanity check */ 4229 4354 rc = lpfc_idiag_que_param_check( ··· 4234 4359 goto pass_check; 4235 4360 } 4236 4361 } 4237 - } 4238 - /* NVME complete queue */ 4239 - if (phba->sli4_hba.hdwq) { 4240 - qidx = 0; 4241 - do { 4242 - qp = phba->sli4_hba.hdwq[qidx].nvme_cq; 4243 - if (qp && qp->queue_id == queid) { 4244 - /* Sanity check */ 4245 - rc = lpfc_idiag_que_param_check( 4246 - qp, index, count); 4247 - if (rc) 4248 - goto error_out; 4249 - idiag.ptr_private = qp; 4250 - goto pass_check; 4251 - } 4252 - } while (++qidx < phba->cfg_hdw_queue); 4253 4362 } 4254 4363 goto error_out; 4255 4364 break; ··· 4278 4419 if (phba->sli4_hba.hdwq) { 4279 4420 /* FCP/SCSI work queue */ 4280 4421 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) { 4281 - qp = phba->sli4_hba.hdwq[qidx].fcp_wq; 4282 - if (qp && qp->queue_id == queid) { 4283 - /* Sanity check */ 4284 - rc = lpfc_idiag_que_param_check( 4285 - qp, index, count); 4286 - if (rc) 4287 - goto error_out; 4288 - idiag.ptr_private = qp; 4289 - goto pass_check; 4290 - } 4291 - } 4292 - /* NVME work queue */ 4293 - for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) { 4294 - qp = phba->sli4_hba.hdwq[qidx].nvme_wq; 4422 + qp = phba->sli4_hba.hdwq[qidx].io_wq; 4295 4423 if (qp && qp->queue_id == queid) { 4296 4424 /* Sanity check */ 4297 4425 rc = lpfc_idiag_que_param_check( ··· 5354 5508 .release = lpfc_debugfs_release, 5355 5509 }; 5356 5510 5357 - #undef lpfc_debugfs_op_dumpData 5358 - static const struct file_operations lpfc_debugfs_op_dumpData = { 5359 - .owner = THIS_MODULE, 5360 - .open = lpfc_debugfs_dumpData_open, 5361 - .llseek = lpfc_debugfs_lseek, 5362 - .read = lpfc_debugfs_read, 5363 - .write = lpfc_debugfs_dumpDataDif_write, 5364 - .release = lpfc_debugfs_dumpDataDif_release, 5365 - }; 5366 - 5367 - #undef lpfc_debugfs_op_dumpDif 5368 - static const struct file_operations lpfc_debugfs_op_dumpDif = { 5369 - .owner = THIS_MODULE, 5370 - .open = lpfc_debugfs_dumpDif_open, 5371 - .llseek = lpfc_debugfs_lseek, 5372 - .read = lpfc_debugfs_read, 5373 - .write = lpfc_debugfs_dumpDataDif_write, 5374 - .release = lpfc_debugfs_dumpDataDif_release, 5375 - }; 5376 - 5377 5511 #undef lpfc_debugfs_op_dif_err 5378 5512 static const struct file_operations lpfc_debugfs_op_dif_err = { 5379 5513 .owner = THIS_MODULE, ··· 5750 5924 } else 5751 5925 phba->debug_dumpHostSlim = NULL; 5752 5926 5753 - /* Setup dumpData */ 5754 - snprintf(name, sizeof(name), "dumpData"); 5755 - phba->debug_dumpData = 5756 - debugfs_create_file(name, S_IFREG|S_IRUGO|S_IWUSR, 5757 - phba->hba_debugfs_root, 5758 - phba, &lpfc_debugfs_op_dumpData); 5759 - 5760 - /* Setup dumpDif */ 5761 - snprintf(name, sizeof(name), "dumpDif"); 5762 - phba->debug_dumpDif = 5763 - debugfs_create_file(name, S_IFREG|S_IRUGO|S_IWUSR, 5764 - phba->hba_debugfs_root, 5765 - phba, &lpfc_debugfs_op_dumpDif); 5766 - 5767 5927 /* Setup DIF Error Injections */ 5768 5928 snprintf(name, sizeof(name), "InjErrLBA"); 5769 5929 phba->debug_InjErrLBA = ··· 6127 6315 debugfs_remove(phba->debug_dumpHostSlim); /* HostSlim */ 6128 6316 phba->debug_dumpHostSlim = NULL; 6129 6317 6130 - debugfs_remove(phba->debug_dumpData); /* dumpData */ 6131 - phba->debug_dumpData = NULL; 6132 - 6133 - debugfs_remove(phba->debug_dumpDif); /* dumpDif */ 6134 - phba->debug_dumpDif = NULL; 6135 - 6136 6318 debugfs_remove(phba->debug_InjErrLBA); /* InjErrLBA */ 6137 6319 phba->debug_InjErrLBA = NULL; 6138 6320 ··· 6248 6442 lpfc_debug_dump_wq(phba, DUMP_NVMELS, 0); 6249 6443 6250 6444 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) 6251 - lpfc_debug_dump_wq(phba, DUMP_FCP, idx); 6252 - 6253 - if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 6254 - for (idx = 0; idx < phba->cfg_hdw_queue; idx++) 6255 - lpfc_debug_dump_wq(phba, DUMP_NVME, idx); 6256 - } 6445 + lpfc_debug_dump_wq(phba, DUMP_IO, idx); 6257 6446 6258 6447 lpfc_debug_dump_hdr_rq(phba); 6259 6448 lpfc_debug_dump_dat_rq(phba); ··· 6260 6459 lpfc_debug_dump_cq(phba, DUMP_NVMELS, 0); 6261 6460 6262 6461 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) 6263 - lpfc_debug_dump_cq(phba, DUMP_FCP, idx); 6264 - 6265 - if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 6266 - for (idx = 0; idx < phba->cfg_hdw_queue; idx++) 6267 - lpfc_debug_dump_cq(phba, DUMP_NVME, idx); 6268 - } 6462 + lpfc_debug_dump_cq(phba, DUMP_IO, idx); 6269 6463 6270 6464 /* 6271 6465 * Dump Event Queues (EQs)
+17 -44
drivers/scsi/lpfc/lpfc_debugfs.h
··· 291 291 #define LPFC_DUMP_MULTIXRIPOOL_SIZE 8192 292 292 293 293 enum { 294 - DUMP_FCP, 295 - DUMP_NVME, 294 + DUMP_IO, 296 295 DUMP_MBX, 297 296 DUMP_ELS, 298 297 DUMP_NVMELS, ··· 414 415 struct lpfc_queue *wq; 415 416 char *qtypestr; 416 417 417 - if (qtype == DUMP_FCP) { 418 - wq = phba->sli4_hba.hdwq[wqidx].fcp_wq; 419 - qtypestr = "FCP"; 420 - } else if (qtype == DUMP_NVME) { 421 - wq = phba->sli4_hba.hdwq[wqidx].nvme_wq; 422 - qtypestr = "NVME"; 418 + if (qtype == DUMP_IO) { 419 + wq = phba->sli4_hba.hdwq[wqidx].io_wq; 420 + qtypestr = "IO"; 423 421 } else if (qtype == DUMP_MBX) { 424 422 wq = phba->sli4_hba.mbx_wq; 425 423 qtypestr = "MBX"; ··· 429 433 } else 430 434 return; 431 435 432 - if (qtype == DUMP_FCP || qtype == DUMP_NVME) 436 + if (qtype == DUMP_IO) 433 437 pr_err("%s WQ: WQ[Idx:%d|Qid:%d]\n", 434 438 qtypestr, wqidx, wq->queue_id); 435 439 else ··· 455 459 char *qtypestr; 456 460 int eqidx; 457 461 458 - /* fcp/nvme wq and cq are 1:1, thus same indexes */ 462 + /* io wq and cq are 1:1, thus same indexes */ 459 463 eq = NULL; 460 464 461 - if (qtype == DUMP_FCP) { 462 - wq = phba->sli4_hba.hdwq[wqidx].fcp_wq; 463 - cq = phba->sli4_hba.hdwq[wqidx].fcp_cq; 464 - qtypestr = "FCP"; 465 - } else if (qtype == DUMP_NVME) { 466 - wq = phba->sli4_hba.hdwq[wqidx].nvme_wq; 467 - cq = phba->sli4_hba.hdwq[wqidx].nvme_cq; 468 - qtypestr = "NVME"; 465 + if (qtype == DUMP_IO) { 466 + wq = phba->sli4_hba.hdwq[wqidx].io_wq; 467 + cq = phba->sli4_hba.hdwq[wqidx].io_cq; 468 + qtypestr = "IO"; 469 469 } else if (qtype == DUMP_MBX) { 470 470 wq = phba->sli4_hba.mbx_wq; 471 471 cq = phba->sli4_hba.mbx_cq; ··· 488 496 eq = phba->sli4_hba.hdwq[0].hba_eq; 489 497 } 490 498 491 - if (qtype == DUMP_FCP || qtype == DUMP_NVME) 499 + if (qtype == DUMP_IO) 492 500 pr_err("%s CQ: WQ[Idx:%d|Qid%d]->CQ[Idx%d|Qid%d]" 493 501 "->EQ[Idx:%d|Qid:%d]:\n", 494 502 qtypestr, wqidx, wq->queue_id, wqidx, cq->queue_id, ··· 564 572 int wq_idx; 565 573 566 574 for (wq_idx = 0; wq_idx < phba->cfg_hdw_queue; wq_idx++) 567 - if (phba->sli4_hba.hdwq[wq_idx].fcp_wq->queue_id == qid) 575 + if (phba->sli4_hba.hdwq[wq_idx].io_wq->queue_id == qid) 568 576 break; 569 577 if (wq_idx < phba->cfg_hdw_queue) { 570 - pr_err("FCP WQ[Idx:%d|Qid:%d]\n", wq_idx, qid); 571 - lpfc_debug_dump_q(phba->sli4_hba.hdwq[wq_idx].fcp_wq); 572 - return; 573 - } 574 - 575 - for (wq_idx = 0; wq_idx < phba->cfg_hdw_queue; wq_idx++) 576 - if (phba->sli4_hba.hdwq[wq_idx].nvme_wq->queue_id == qid) 577 - break; 578 - if (wq_idx < phba->cfg_hdw_queue) { 579 - pr_err("NVME WQ[Idx:%d|Qid:%d]\n", wq_idx, qid); 580 - lpfc_debug_dump_q(phba->sli4_hba.hdwq[wq_idx].nvme_wq); 578 + pr_err("IO WQ[Idx:%d|Qid:%d]\n", wq_idx, qid); 579 + lpfc_debug_dump_q(phba->sli4_hba.hdwq[wq_idx].io_wq); 581 580 return; 582 581 } 583 582 ··· 637 654 int cq_idx; 638 655 639 656 for (cq_idx = 0; cq_idx < phba->cfg_hdw_queue; cq_idx++) 640 - if (phba->sli4_hba.hdwq[cq_idx].fcp_cq->queue_id == qid) 657 + if (phba->sli4_hba.hdwq[cq_idx].io_cq->queue_id == qid) 641 658 break; 642 659 643 660 if (cq_idx < phba->cfg_hdw_queue) { 644 - pr_err("FCP CQ[Idx:%d|Qid:%d]\n", cq_idx, qid); 645 - lpfc_debug_dump_q(phba->sli4_hba.hdwq[cq_idx].fcp_cq); 646 - return; 647 - } 648 - 649 - for (cq_idx = 0; cq_idx < phba->cfg_hdw_queue; cq_idx++) 650 - if (phba->sli4_hba.hdwq[cq_idx].nvme_cq->queue_id == qid) 651 - break; 652 - 653 - if (cq_idx < phba->cfg_hdw_queue) { 654 - pr_err("NVME CQ[Idx:%d|Qid:%d]\n", cq_idx, qid); 655 - lpfc_debug_dump_q(phba->sli4_hba.hdwq[cq_idx].nvme_cq); 661 + pr_err("IO CQ[Idx:%d|Qid:%d]\n", cq_idx, qid); 662 + lpfc_debug_dump_q(phba->sli4_hba.hdwq[cq_idx].io_cq); 656 663 return; 657 664 } 658 665
+3
drivers/scsi/lpfc/lpfc_disc.h
··· 112 112 uint8_t nlp_retry; /* used for ELS retries */ 113 113 uint8_t nlp_fcp_info; /* class info, bits 0-3 */ 114 114 #define NLP_FCP_2_DEVICE 0x10 /* FCP-2 device */ 115 + u8 nlp_nvme_info; /* NVME NSLER Support */ 116 + #define NLP_NVME_NSLER 0x1 /* NVME NSLER device */ 115 117 116 118 uint16_t nlp_usg_map; /* ndlp management usage bitmap */ 117 119 #define NLP_USG_NODE_ACT_BIT 0x1 /* Indicate ndlp is actively used */ ··· 159 157 /* Defines for nlp_flag (uint32) */ 160 158 #define NLP_IGNR_REG_CMPL 0x00000001 /* Rcvd rscn before we cmpl reg login */ 161 159 #define NLP_REG_LOGIN_SEND 0x00000002 /* sent reglogin to adapter */ 160 + #define NLP_RELEASE_RPI 0x00000004 /* Release RPI to free pool */ 162 161 #define NLP_SUPPRESS_RSP 0x00000010 /* Remote NPort supports suppress rsp */ 163 162 #define NLP_PLOGI_SND 0x00000020 /* sent PLOGI request for this entry */ 164 163 #define NLP_PRLI_SND 0x00000040 /* sent PRLI request for this entry */
+99 -17
drivers/scsi/lpfc/lpfc_els.c
··· 1052 1052 if (lpfc_els_retry(phba, cmdiocb, rspiocb)) 1053 1053 goto out; 1054 1054 1055 + lpfc_printf_vlog(vport, KERN_WARNING, LOG_ELS, 1056 + "0150 FLOGI failure Status:x%x/x%x " 1057 + "xri x%x TMO:x%x\n", 1058 + irsp->ulpStatus, irsp->un.ulpWord[4], 1059 + cmdiocb->sli4_xritag, irsp->ulpTimeout); 1060 + 1055 1061 /* If this is not a loop open failure, bail out */ 1056 1062 if (!(irsp->ulpStatus == IOSTAT_LOCAL_REJECT && 1057 1063 ((irsp->un.ulpWord[4] & IOERR_PARAM_MASK) == 1058 1064 IOERR_LOOP_OPEN_FAILURE))) 1059 1065 goto flogifail; 1060 - 1061 - lpfc_printf_vlog(vport, KERN_WARNING, LOG_ELS, 1062 - "0150 FLOGI failure Status:x%x/x%x xri x%x TMO:x%x\n", 1063 - irsp->ulpStatus, irsp->un.ulpWord[4], 1064 - cmdiocb->sli4_xritag, irsp->ulpTimeout); 1065 1066 1066 1067 /* FLOGI failed, so there is no fabric */ 1067 1068 spin_lock_irq(shost->host_lock); ··· 1204 1203 lpfc_issue_clear_la(phba, vport); 1205 1204 } 1206 1205 out: 1206 + lpfc_els_free_iocb(phba, cmdiocb); 1207 + } 1208 + 1209 + /** 1210 + * lpfc_cmpl_els_link_down - Completion callback function for ELS command 1211 + * aborted during a link down 1212 + * @phba: pointer to lpfc hba data structure. 1213 + * @cmdiocb: pointer to lpfc command iocb data structure. 1214 + * @rspiocb: pointer to lpfc response iocb data structure. 1215 + * 1216 + */ 1217 + static void 1218 + lpfc_cmpl_els_link_down(struct lpfc_hba *phba, struct lpfc_iocbq *cmdiocb, 1219 + struct lpfc_iocbq *rspiocb) 1220 + { 1221 + IOCB_t *irsp; 1222 + uint32_t *pcmd; 1223 + uint32_t cmd; 1224 + 1225 + pcmd = (uint32_t *)(((struct lpfc_dmabuf *)cmdiocb->context2)->virt); 1226 + cmd = *pcmd; 1227 + irsp = &rspiocb->iocb; 1228 + 1229 + lpfc_printf_log(phba, KERN_INFO, LOG_ELS, 1230 + "6445 ELS completes after LINK_DOWN: " 1231 + " Status %x/%x cmd x%x flg x%x\n", 1232 + irsp->ulpStatus, irsp->un.ulpWord[4], cmd, 1233 + cmdiocb->iocb_flag); 1234 + 1235 + if (cmdiocb->iocb_flag & LPFC_IO_FABRIC) { 1236 + cmdiocb->iocb_flag &= ~LPFC_IO_FABRIC; 1237 + atomic_dec(&phba->fabric_iocb_count); 1238 + } 1207 1239 lpfc_els_free_iocb(phba, cmdiocb); 1208 1240 } 1209 1241 ··· 2141 2107 !(vport->fc_flag & FC_OFFLINE_MODE)) { 2142 2108 lpfc_printf_vlog(vport, KERN_INFO, LOG_DISCOVERY, 2143 2109 "4110 Issue PLOGI x%x deferred " 2144 - "on NPort x%x rpi x%x Data: %p\n", 2110 + "on NPort x%x rpi x%x Data: x%px\n", 2145 2111 ndlp->nlp_defer_did, ndlp->nlp_DID, 2146 2112 ndlp->nlp_rpi, ndlp); 2147 2113 ··· 2435 2401 npr_nvme = (struct lpfc_nvme_prli *)pcmd; 2436 2402 bf_set(prli_type_code, npr_nvme, PRLI_NVME_TYPE); 2437 2403 bf_set(prli_estabImagePair, npr_nvme, 0); /* Should be 0 */ 2404 + if (phba->nsler) { 2405 + bf_set(prli_nsler, npr_nvme, 1); 2406 + bf_set(prli_conf, npr_nvme, 1); 2407 + } 2438 2408 2439 2409 /* Only initiators request first burst. */ 2440 2410 if ((phba->cfg_nvme_enable_fb) && ··· 4241 4203 mempool_free(pmb, phba->mbox_mem_pool); 4242 4204 if (ndlp) { 4243 4205 lpfc_printf_vlog(ndlp->vport, KERN_INFO, LOG_NODE, 4244 - "0006 rpi%x DID:%x flg:%x %d map:%x %p\n", 4206 + "0006 rpi%x DID:%x flg:%x %d map:%x x%px\n", 4245 4207 ndlp->nlp_rpi, ndlp->nlp_DID, ndlp->nlp_flag, 4246 4208 kref_read(&ndlp->kref), 4247 4209 ndlp->nlp_usg_map, ndlp); ··· 5672 5634 desc->tag = cpu_to_be32(RDP_PORT_NAMES_DESC_TAG); 5673 5635 if (vport->fc_flag & FC_FABRIC) { 5674 5636 memcpy(desc->port_names.wwnn, &vport->fabric_nodename, 5675 - sizeof(desc->port_names.wwnn)); 5637 + sizeof(desc->port_names.wwnn)); 5676 5638 5677 5639 memcpy(desc->port_names.wwpn, &vport->fabric_portname, 5678 - sizeof(desc->port_names.wwpn)); 5640 + sizeof(desc->port_names.wwpn)); 5679 5641 } else { /* Point to Point */ 5680 5642 memcpy(desc->port_names.wwnn, &ndlp->nlp_nodename, 5681 - sizeof(desc->port_names.wwnn)); 5643 + sizeof(desc->port_names.wwnn)); 5682 5644 5683 - memcpy(desc->port_names.wwnn, &ndlp->nlp_portname, 5684 - sizeof(desc->port_names.wwpn)); 5645 + memcpy(desc->port_names.wwpn, &ndlp->nlp_portname, 5646 + sizeof(desc->port_names.wwpn)); 5685 5647 } 5686 5648 5687 5649 desc->length = cpu_to_be32(sizeof(desc->port_names)); ··· 6365 6327 continue; 6366 6328 } 6367 6329 6368 - if (ndlp->nlp_fc4_type & NLP_FC4_NVME) 6330 + /* Check to see if we need to NVME rescan this target 6331 + * remoteport. 6332 + */ 6333 + if (ndlp->nlp_fc4_type & NLP_FC4_NVME && 6334 + ndlp->nlp_type & (NLP_NVME_TARGET | NLP_NVME_DISCOVERY)) 6369 6335 lpfc_nvme_rescan_port(vport, ndlp); 6370 6336 6371 6337 lpfc_disc_state_machine(vport, ndlp, NULL, ··· 6483 6441 *lp, vport->fc_flag, payload_len); 6484 6442 lpfc_els_rsp_acc(vport, ELS_CMD_ACC, cmdiocb, ndlp, NULL); 6485 6443 6486 - if (ndlp->nlp_fc4_type & NLP_FC4_NVME) 6444 + /* Check to see if we need to NVME rescan this target 6445 + * remoteport. 6446 + */ 6447 + if (ndlp->nlp_fc4_type & NLP_FC4_NVME && 6448 + ndlp->nlp_type & (NLP_NVME_TARGET | NLP_NVME_DISCOVERY)) 6487 6449 lpfc_nvme_rescan_port(vport, ndlp); 6488 6450 return 0; 6489 6451 } ··· 8006 7960 if (phba->sli_rev == LPFC_SLI_REV4) 8007 7961 spin_lock(&pring->ring_lock); 8008 7962 7963 + /* First we need to issue aborts to outstanding cmds on txcmpl */ 8009 7964 list_for_each_entry_safe(piocb, tmp_iocb, &pring->txcmplq, list) { 8010 7965 if (piocb->iocb_flag & LPFC_IO_LIBDFC) 8011 7966 continue; 8012 7967 8013 7968 if (piocb->vport != vport) 8014 7969 continue; 8015 - list_add_tail(&piocb->dlist, &abort_list); 7970 + 7971 + /* On the ELS ring we can have ELS_REQUESTs or 7972 + * GEN_REQUESTs waiting for a response. 7973 + */ 7974 + cmd = &piocb->iocb; 7975 + if (cmd->ulpCommand == CMD_ELS_REQUEST64_CR) { 7976 + list_add_tail(&piocb->dlist, &abort_list); 7977 + 7978 + /* If the link is down when flushing ELS commands 7979 + * the firmware will not complete them till after 7980 + * the link comes back up. This may confuse 7981 + * discovery for the new link up, so we need to 7982 + * change the compl routine to just clean up the iocb 7983 + * and avoid any retry logic. 7984 + */ 7985 + if (phba->link_state == LPFC_LINK_DOWN) 7986 + piocb->iocb_cmpl = lpfc_cmpl_els_link_down; 7987 + } 7988 + if (cmd->ulpCommand == CMD_GEN_REQUEST64_CR) 7989 + list_add_tail(&piocb->dlist, &abort_list); 8016 7990 } 7991 + 8017 7992 if (phba->sli_rev == LPFC_SLI_REV4) 8018 7993 spin_unlock(&pring->ring_lock); 8019 7994 spin_unlock_irq(&phba->hbalock); 8020 - /* Abort each iocb on the aborted list and remove the dlist links. */ 7995 + 7996 + /* Abort each txcmpl iocb on aborted list and remove the dlist links. */ 8021 7997 list_for_each_entry_safe(piocb, tmp_iocb, &abort_list, dlist) { 8022 7998 spin_lock_irq(&phba->hbalock); 8023 7999 list_del_init(&piocb->dlist); ··· 8055 7987 if (phba->sli_rev == LPFC_SLI_REV4) 8056 7988 spin_lock(&pring->ring_lock); 8057 7989 7990 + /* No need to abort the txq list, 7991 + * just queue them up for lpfc_sli_cancel_iocbs 7992 + */ 8058 7993 list_for_each_entry_safe(piocb, tmp_iocb, &pring->txq, list) { 8059 7994 cmd = &piocb->iocb; 8060 7995 ··· 8078 8007 list_del_init(&piocb->list); 8079 8008 list_add_tail(&piocb->list, &abort_list); 8080 8009 } 8010 + 8011 + /* The same holds true for any FLOGI/FDISC on the fabric_iocb_list */ 8012 + if (vport == phba->pport) { 8013 + list_for_each_entry_safe(piocb, tmp_iocb, 8014 + &phba->fabric_iocb_list, list) { 8015 + cmd = &piocb->iocb; 8016 + list_del_init(&piocb->list); 8017 + list_add_tail(&piocb->list, &abort_list); 8018 + } 8019 + } 8020 + 8081 8021 if (phba->sli_rev == LPFC_SLI_REV4) 8082 8022 spin_unlock(&pring->ring_lock); 8083 8023 spin_unlock_irq(&phba->hbalock); 8084 8024 8085 - /* Cancell all the IOCBs from the completions list */ 8025 + /* Cancel all the IOCBs from the completions list */ 8086 8026 lpfc_sli_cancel_iocbs(phba, &abort_list, 8087 8027 IOSTAT_LOCAL_REJECT, IOERR_SLI_ABORTED); 8088 8028
+109 -72
drivers/scsi/lpfc/lpfc_hbadisc.c
··· 118 118 struct lpfc_work_evt *evtp; 119 119 int put_node; 120 120 int put_rport; 121 + unsigned long iflags; 121 122 122 123 rdata = rport->dd_data; 123 124 ndlp = rdata->pnode; ··· 133 132 ndlp->nlp_sid, ndlp->nlp_DID, ndlp->nlp_flag); 134 133 135 134 lpfc_printf_vlog(ndlp->vport, KERN_INFO, LOG_NODE, 136 - "3181 dev_loss_callbk x%06x, rport %p flg x%x\n", 135 + "3181 dev_loss_callbk x%06x, rport x%px flg x%x\n", 137 136 ndlp->nlp_DID, ndlp->rport, ndlp->nlp_flag); 138 137 139 138 /* Don't defer this if we are in the process of deleting the vport ··· 171 170 } 172 171 173 172 shost = lpfc_shost_from_vport(vport); 174 - spin_lock_irq(shost->host_lock); 173 + spin_lock_irqsave(shost->host_lock, iflags); 175 174 ndlp->nlp_flag |= NLP_IN_DEV_LOSS; 176 - spin_unlock_irq(shost->host_lock); 175 + spin_unlock_irqrestore(shost->host_lock, iflags); 177 176 178 177 /* We need to hold the node by incrementing the reference 179 178 * count until this queued work is done 180 179 */ 181 180 evtp->evt_arg1 = lpfc_nlp_get(ndlp); 182 181 183 - spin_lock_irq(&phba->hbalock); 182 + spin_lock_irqsave(&phba->hbalock, iflags); 184 183 if (evtp->evt_arg1) { 185 184 evtp->evt = LPFC_EVT_DEV_LOSS; 186 185 list_add_tail(&evtp->evt_listp, &phba->work_list); 187 186 lpfc_worker_wake_up(phba); 188 187 } 189 - spin_unlock_irq(&phba->hbalock); 188 + spin_unlock_irqrestore(&phba->hbalock, iflags); 190 189 191 190 return; 192 191 } ··· 213 212 int put_node; 214 213 int warn_on = 0; 215 214 int fcf_inuse = 0; 215 + unsigned long iflags; 216 216 217 217 rport = ndlp->rport; 218 218 vport = ndlp->vport; 219 219 shost = lpfc_shost_from_vport(vport); 220 220 221 - spin_lock_irq(shost->host_lock); 221 + spin_lock_irqsave(shost->host_lock, iflags); 222 222 ndlp->nlp_flag &= ~NLP_IN_DEV_LOSS; 223 - spin_unlock_irq(shost->host_lock); 223 + spin_unlock_irqrestore(shost->host_lock, iflags); 224 224 225 225 if (!rport) 226 226 return fcf_inuse; ··· 237 235 ndlp->nlp_DID, ndlp->nlp_type, rport->scsi_target_id); 238 236 239 237 lpfc_printf_vlog(ndlp->vport, KERN_INFO, LOG_NODE, 240 - "3182 dev_loss_tmo_handler x%06x, rport %p flg x%x\n", 238 + "3182 dev_loss_tmo_handler x%06x, rport x%px flg x%x\n", 241 239 ndlp->nlp_DID, ndlp->rport, ndlp->nlp_flag); 242 240 243 241 /* ··· 905 903 phba->trunk_link.link1.state = 0; 906 904 phba->trunk_link.link2.state = 0; 907 905 phba->trunk_link.link3.state = 0; 906 + phba->sli4_hba.link_state.logical_speed = 907 + LPFC_LINK_SPEED_UNKNOWN; 908 908 } 909 909 spin_lock_irq(shost->host_lock); 910 910 phba->pport->fc_flag &= ~FC_LBIT; ··· 3119 3115 int rc; 3120 3116 struct fcf_record *fcf_record; 3121 3117 uint32_t fc_flags = 0; 3118 + unsigned long iflags; 3122 3119 3123 - spin_lock_irq(&phba->hbalock); 3120 + spin_lock_irqsave(&phba->hbalock, iflags); 3124 3121 phba->fc_linkspeed = bf_get(lpfc_mbx_read_top_link_spd, la); 3125 3122 3126 3123 if (!(phba->hba_flag & HBA_FCOE_MODE)) { ··· 3218 3213 vport->fc_myDID = phba->fc_pref_DID; 3219 3214 fc_flags |= FC_LBIT; 3220 3215 } 3221 - spin_unlock_irq(&phba->hbalock); 3216 + spin_unlock_irqrestore(&phba->hbalock, iflags); 3222 3217 3223 3218 if (fc_flags) { 3224 - spin_lock_irq(shost->host_lock); 3219 + spin_lock_irqsave(shost->host_lock, iflags); 3225 3220 vport->fc_flag |= fc_flags; 3226 - spin_unlock_irq(shost->host_lock); 3221 + spin_unlock_irqrestore(shost->host_lock, iflags); 3227 3222 } 3228 3223 3229 3224 lpfc_linkup(phba); ··· 3297 3292 * The driver is expected to do FIP/FCF. Call the port 3298 3293 * and get the FCF Table. 3299 3294 */ 3300 - spin_lock_irq(&phba->hbalock); 3295 + spin_lock_irqsave(&phba->hbalock, iflags); 3301 3296 if (phba->hba_flag & FCF_TS_INPROG) { 3302 - spin_unlock_irq(&phba->hbalock); 3297 + spin_unlock_irqrestore(&phba->hbalock, iflags); 3303 3298 return; 3304 3299 } 3305 3300 /* This is the initial FCF discovery scan */ 3306 3301 phba->fcf.fcf_flag |= FCF_INIT_DISC; 3307 - spin_unlock_irq(&phba->hbalock); 3302 + spin_unlock_irqrestore(&phba->hbalock, iflags); 3308 3303 lpfc_printf_log(phba, KERN_INFO, LOG_FIP | LOG_DISCOVERY, 3309 3304 "2778 Start FCF table scan at linkup\n"); 3310 3305 rc = lpfc_sli4_fcf_scan_read_fcf_rec(phba, 3311 3306 LPFC_FCOE_FCF_GET_FIRST); 3312 3307 if (rc) { 3313 - spin_lock_irq(&phba->hbalock); 3308 + spin_lock_irqsave(&phba->hbalock, iflags); 3314 3309 phba->fcf.fcf_flag &= ~FCF_INIT_DISC; 3315 - spin_unlock_irq(&phba->hbalock); 3310 + spin_unlock_irqrestore(&phba->hbalock, iflags); 3316 3311 goto out; 3317 3312 } 3318 3313 /* Reset FCF roundrobin bmask for new discovery */ ··· 3323 3318 out: 3324 3319 lpfc_vport_set_state(vport, FC_VPORT_FAILED); 3325 3320 lpfc_printf_vlog(vport, KERN_ERR, LOG_MBOX, 3326 - "0263 Discovery Mailbox error: state: 0x%x : %p %p\n", 3321 + "0263 Discovery Mailbox error: state: 0x%x : x%px x%px\n", 3327 3322 vport->port_state, sparam_mbox, cfglink_mbox); 3328 3323 lpfc_issue_clear_la(phba, vport); 3329 3324 return; ··· 3371 3366 MAILBOX_t *mb = &pmb->u.mb; 3372 3367 struct lpfc_dmabuf *mp = (struct lpfc_dmabuf *)(pmb->ctx_buf); 3373 3368 uint8_t attn_type; 3369 + unsigned long iflags; 3374 3370 3375 3371 /* Unblock ELS traffic */ 3376 3372 pring = lpfc_phba_elsring(phba); ··· 3393 3387 3394 3388 memcpy(&phba->alpa_map[0], mp->virt, 128); 3395 3389 3396 - spin_lock_irq(shost->host_lock); 3390 + spin_lock_irqsave(shost->host_lock, iflags); 3397 3391 if (bf_get(lpfc_mbx_read_top_pb, la)) 3398 3392 vport->fc_flag |= FC_BYPASSED_MODE; 3399 3393 else 3400 3394 vport->fc_flag &= ~FC_BYPASSED_MODE; 3401 - spin_unlock_irq(shost->host_lock); 3395 + spin_unlock_irqrestore(shost->host_lock, iflags); 3402 3396 3403 3397 if (phba->fc_eventTag <= la->eventTag) { 3404 3398 phba->fc_stat.LinkMultiEvent++; ··· 3409 3403 3410 3404 phba->fc_eventTag = la->eventTag; 3411 3405 if (phba->sli_rev < LPFC_SLI_REV4) { 3412 - spin_lock_irq(&phba->hbalock); 3406 + spin_lock_irqsave(&phba->hbalock, iflags); 3413 3407 if (bf_get(lpfc_mbx_read_top_mm, la)) 3414 3408 phba->sli.sli_flag |= LPFC_MENLO_MAINT; 3415 3409 else 3416 3410 phba->sli.sli_flag &= ~LPFC_MENLO_MAINT; 3417 - spin_unlock_irq(&phba->hbalock); 3411 + spin_unlock_irqrestore(&phba->hbalock, iflags); 3418 3412 } 3419 3413 3420 3414 phba->link_events++; ··· 3535 3529 pmb->ctx_ndlp = NULL; 3536 3530 3537 3531 lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI, 3538 - "0002 rpi:%x DID:%x flg:%x %d map:%x %p\n", 3532 + "0002 rpi:%x DID:%x flg:%x %d map:%x x%px\n", 3539 3533 ndlp->nlp_rpi, ndlp->nlp_DID, ndlp->nlp_flag, 3540 3534 kref_read(&ndlp->kref), 3541 3535 ndlp->nlp_usg_map, ndlp); ··· 4047 4041 ndlp->nlp_type |= NLP_FABRIC; 4048 4042 lpfc_nlp_set_state(vport, ndlp, NLP_STE_UNMAPPED_NODE); 4049 4043 lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI, 4050 - "0003 rpi:%x DID:%x flg:%x %d map%x %p\n", 4044 + "0003 rpi:%x DID:%x flg:%x %d map%x x%px\n", 4051 4045 ndlp->nlp_rpi, ndlp->nlp_DID, ndlp->nlp_flag, 4052 4046 kref_read(&ndlp->kref), 4053 4047 ndlp->nlp_usg_map, ndlp); ··· 4166 4160 fc_remote_port_rolechg(rport, rport_ids.roles); 4167 4161 4168 4162 lpfc_printf_vlog(ndlp->vport, KERN_INFO, LOG_NODE, 4169 - "3183 rport register x%06x, rport %p role x%x\n", 4163 + "3183 rport register x%06x, rport x%px role x%x\n", 4170 4164 ndlp->nlp_DID, rport, rport_ids.roles); 4171 4165 4172 4166 if ((rport->scsi_target_id != -1) && ··· 4190 4184 ndlp->nlp_DID, ndlp->nlp_flag, ndlp->nlp_type); 4191 4185 4192 4186 lpfc_printf_vlog(vport, KERN_INFO, LOG_NODE, 4193 - "3184 rport unregister x%06x, rport %p\n", 4187 + "3184 rport unregister x%06x, rport x%px\n", 4194 4188 ndlp->nlp_DID, rport); 4195 4189 4196 4190 fc_remote_port_delete(rport); ··· 4202 4196 lpfc_nlp_counters(struct lpfc_vport *vport, int state, int count) 4203 4197 { 4204 4198 struct Scsi_Host *shost = lpfc_shost_from_vport(vport); 4199 + unsigned long iflags; 4205 4200 4206 - spin_lock_irq(shost->host_lock); 4201 + spin_lock_irqsave(shost->host_lock, iflags); 4207 4202 switch (state) { 4208 4203 case NLP_STE_UNUSED_NODE: 4209 4204 vport->fc_unused_cnt += count; ··· 4234 4227 vport->fc_npr_cnt += count; 4235 4228 break; 4236 4229 } 4237 - spin_unlock_irq(shost->host_lock); 4230 + spin_unlock_irqrestore(shost->host_lock, iflags); 4238 4231 } 4239 4232 4240 4233 static void ··· 4487 4480 return NULL; 4488 4481 4489 4482 if (phba->sli_rev == LPFC_SLI_REV4) { 4490 - rpi = lpfc_sli4_alloc_rpi(vport->phba); 4491 - if (rpi == LPFC_RPI_ALLOC_ERROR) 4483 + if (ndlp->nlp_rpi == LPFC_RPI_ALLOC_ERROR) 4484 + rpi = lpfc_sli4_alloc_rpi(vport->phba); 4485 + else 4486 + rpi = ndlp->nlp_rpi; 4487 + 4488 + if (rpi == LPFC_RPI_ALLOC_ERROR) { 4489 + lpfc_printf_vlog(vport, KERN_WARNING, LOG_NODE, 4490 + "0359 %s: ndlp:x%px " 4491 + "usgmap:x%x refcnt:%d FAILED RPI " 4492 + " ALLOC\n", 4493 + __func__, 4494 + (void *)ndlp, ndlp->nlp_usg_map, 4495 + kref_read(&ndlp->kref)); 4492 4496 return NULL; 4497 + } 4493 4498 } 4494 4499 4495 4500 spin_lock_irqsave(&phba->ndlp_lock, flags); ··· 4509 4490 if (NLP_CHK_FREE_REQ(ndlp)) { 4510 4491 spin_unlock_irqrestore(&phba->ndlp_lock, flags); 4511 4492 lpfc_printf_vlog(vport, KERN_WARNING, LOG_NODE, 4512 - "0277 lpfc_enable_node: ndlp:x%p " 4493 + "0277 %s: ndlp:x%px " 4513 4494 "usgmap:x%x refcnt:%d\n", 4514 - (void *)ndlp, ndlp->nlp_usg_map, 4495 + __func__, (void *)ndlp, ndlp->nlp_usg_map, 4515 4496 kref_read(&ndlp->kref)); 4516 4497 goto free_rpi; 4517 4498 } ··· 4519 4500 if (NLP_CHK_NODE_ACT(ndlp)) { 4520 4501 spin_unlock_irqrestore(&phba->ndlp_lock, flags); 4521 4502 lpfc_printf_vlog(vport, KERN_WARNING, LOG_NODE, 4522 - "0278 lpfc_enable_node: ndlp:x%p " 4503 + "0278 %s: ndlp:x%px " 4523 4504 "usgmap:x%x refcnt:%d\n", 4524 - (void *)ndlp, ndlp->nlp_usg_map, 4505 + __func__, (void *)ndlp, ndlp->nlp_usg_map, 4525 4506 kref_read(&ndlp->kref)); 4526 4507 goto free_rpi; 4527 4508 } ··· 4551 4532 ndlp->nlp_rpi = rpi; 4552 4533 lpfc_printf_vlog(vport, KERN_INFO, LOG_NODE, 4553 4534 "0008 rpi:%x DID:%x flg:%x refcnt:%d " 4554 - "map:%x %p\n", ndlp->nlp_rpi, ndlp->nlp_DID, 4535 + "map:%x x%px\n", ndlp->nlp_rpi, ndlp->nlp_DID, 4555 4536 ndlp->nlp_flag, 4556 4537 kref_read(&ndlp->kref), 4557 4538 ndlp->nlp_usg_map, ndlp); ··· 4560 4541 4561 4542 if (state != NLP_STE_UNUSED_NODE) 4562 4543 lpfc_nlp_set_state(vport, ndlp, state); 4544 + else 4545 + lpfc_printf_vlog(vport, KERN_INFO, LOG_NODE, 4546 + "0013 rpi:%x DID:%x flg:%x refcnt:%d " 4547 + "map:%x x%px STATE=UNUSED\n", 4548 + ndlp->nlp_rpi, ndlp->nlp_DID, 4549 + ndlp->nlp_flag, 4550 + kref_read(&ndlp->kref), 4551 + ndlp->nlp_usg_map, ndlp); 4563 4552 4564 4553 lpfc_debugfs_disc_trc(vport, LPFC_DISC_TRC_NODE, 4565 4554 "node enable: did:x%x", ··· 4824 4797 (ndlp->nlp_defer_did != NLP_EVT_NOTHING_PENDING)) { 4825 4798 lpfc_printf_vlog(vport, KERN_INFO, LOG_DISCOVERY, 4826 4799 "1434 UNREG cmpl deferred logo x%x " 4827 - "on NPort x%x Data: x%x %p\n", 4800 + "on NPort x%x Data: x%x x%px\n", 4828 4801 ndlp->nlp_rpi, ndlp->nlp_DID, 4829 4802 ndlp->nlp_defer_did, ndlp); 4830 4803 ··· 4832 4805 ndlp->nlp_defer_did = NLP_EVT_NOTHING_PENDING; 4833 4806 lpfc_issue_els_plogi(vport, ndlp->nlp_DID, 0); 4834 4807 } else { 4808 + if (ndlp->nlp_flag & NLP_RELEASE_RPI) { 4809 + lpfc_sli4_free_rpi(vport->phba, ndlp->nlp_rpi); 4810 + ndlp->nlp_flag &= ~NLP_RELEASE_RPI; 4811 + } 4835 4812 ndlp->nlp_flag &= ~NLP_UNREG_INP; 4836 4813 } 4837 4814 } ··· 4874 4843 lpfc_printf_vlog(vport, KERN_INFO, LOG_DISCOVERY, 4875 4844 "1436 unreg_rpi SKIP UNREG x%x on " 4876 4845 "NPort x%x deferred x%x flg x%x " 4877 - "Data: %p\n", 4846 + "Data: x%px\n", 4878 4847 ndlp->nlp_rpi, ndlp->nlp_DID, 4879 4848 ndlp->nlp_defer_did, 4880 4849 ndlp->nlp_flag, ndlp); ··· 4924 4893 4925 4894 lpfc_printf_vlog(vport, KERN_INFO, LOG_DISCOVERY, 4926 4895 "1433 unreg_rpi UNREG x%x on " 4927 - "NPort x%x deferred flg x%x Data:%p\n", 4896 + "NPort x%x deferred flg x%x " 4897 + "Data:x%px\n", 4928 4898 ndlp->nlp_rpi, ndlp->nlp_DID, 4929 4899 ndlp->nlp_flag, ndlp); 4930 4900 ··· 5066 5034 ndlp->nlp_state, ndlp->nlp_rpi); 5067 5035 if (NLP_CHK_FREE_REQ(ndlp)) { 5068 5036 lpfc_printf_vlog(vport, KERN_WARNING, LOG_NODE, 5069 - "0280 lpfc_cleanup_node: ndlp:x%p " 5037 + "0280 %s: ndlp:x%px " 5070 5038 "usgmap:x%x refcnt:%d\n", 5071 - (void *)ndlp, ndlp->nlp_usg_map, 5039 + __func__, (void *)ndlp, ndlp->nlp_usg_map, 5072 5040 kref_read(&ndlp->kref)); 5073 5041 lpfc_dequeue_node(vport, ndlp); 5074 5042 } else { 5075 5043 lpfc_printf_vlog(vport, KERN_WARNING, LOG_NODE, 5076 - "0281 lpfc_cleanup_node: ndlp:x%p " 5044 + "0281 %s: ndlp:x%px " 5077 5045 "usgmap:x%x refcnt:%d\n", 5078 - (void *)ndlp, ndlp->nlp_usg_map, 5046 + __func__, (void *)ndlp, ndlp->nlp_usg_map, 5079 5047 kref_read(&ndlp->kref)); 5080 5048 lpfc_disable_node(vport, ndlp); 5081 5049 } ··· 5136 5104 list_del_init(&ndlp->els_retry_evt.evt_listp); 5137 5105 list_del_init(&ndlp->dev_loss_evt.evt_listp); 5138 5106 lpfc_cleanup_vports_rrqs(vport, ndlp); 5107 + if (phba->sli_rev == LPFC_SLI_REV4) 5108 + ndlp->nlp_flag |= NLP_RELEASE_RPI; 5139 5109 lpfc_unreg_rpi(vport, ndlp); 5140 5110 5141 5111 return 0; ··· 5166 5132 * allocated by the firmware. 5167 5133 */ 5168 5134 lpfc_printf_vlog(vport, KERN_INFO, LOG_NODE, 5169 - "0005 rpi:%x DID:%x flg:%x %d map:%x %p\n", 5135 + "0005 rpi:%x DID:%x flg:%x %d map:%x x%px\n", 5170 5136 ndlp->nlp_rpi, ndlp->nlp_DID, ndlp->nlp_flag, 5171 5137 kref_read(&ndlp->kref), 5172 5138 ndlp->nlp_usg_map, ndlp); ··· 5202 5168 * for registered rport so need to cleanup rport 5203 5169 */ 5204 5170 lpfc_printf_vlog(vport, KERN_WARNING, LOG_NODE, 5205 - "0940 removed node x%p DID x%x " 5206 - " rport not null %p\n", 5171 + "0940 removed node x%px DID x%x " 5172 + " rport not null x%px\n", 5207 5173 ndlp, ndlp->nlp_DID, ndlp->rport); 5208 5174 rport = ndlp->rport; 5209 5175 rdata = rport->dd_data; ··· 5277 5243 5278 5244 list_for_each_entry(ndlp, &vport->fc_nodes, nlp_listp) { 5279 5245 if (lpfc_matchdid(vport, ndlp, did)) { 5280 - data1 = (((uint32_t) ndlp->nlp_state << 24) | 5281 - ((uint32_t) ndlp->nlp_xri << 16) | 5282 - ((uint32_t) ndlp->nlp_type << 8) | 5283 - ((uint32_t) ndlp->nlp_rpi & 0xff)); 5246 + data1 = (((uint32_t)ndlp->nlp_state << 24) | 5247 + ((uint32_t)ndlp->nlp_xri << 16) | 5248 + ((uint32_t)ndlp->nlp_type << 8) | 5249 + ((uint32_t)ndlp->nlp_usg_map & 0xff)); 5284 5250 lpfc_printf_vlog(vport, KERN_INFO, LOG_NODE, 5285 5251 "0929 FIND node DID " 5286 - "Data: x%p x%x x%x x%x %p\n", 5252 + "Data: x%px x%x x%x x%x x%x x%px\n", 5287 5253 ndlp, ndlp->nlp_DID, 5288 - ndlp->nlp_flag, data1, 5254 + ndlp->nlp_flag, data1, ndlp->nlp_rpi, 5289 5255 ndlp->active_rrqs_xri_bitmap); 5290 5256 return ndlp; 5291 5257 } ··· 5330 5296 spin_unlock_irqrestore(shost->host_lock, iflags); 5331 5297 lpfc_printf_vlog(vport, KERN_INFO, LOG_NODE, 5332 5298 "2025 FIND node DID " 5333 - "Data: x%p x%x x%x x%x %p\n", 5299 + "Data: x%px x%x x%x x%x x%px\n", 5334 5300 ndlp, ndlp->nlp_DID, 5335 5301 ndlp->nlp_flag, data1, 5336 5302 ndlp->active_rrqs_xri_bitmap); ··· 5370 5336 if (vport->phba->nvmet_support) 5371 5337 return NULL; 5372 5338 ndlp = lpfc_enable_node(vport, ndlp, NLP_STE_NPR_NODE); 5373 - if (!ndlp) 5339 + if (!ndlp) { 5340 + lpfc_printf_vlog(vport, KERN_WARNING, LOG_SLI, 5341 + "0014 Could not enable ndlp\n"); 5374 5342 return NULL; 5343 + } 5375 5344 spin_lock_irq(shost->host_lock); 5376 5345 ndlp->nlp_flag |= NLP_NPR_2B_DISC; 5377 5346 spin_unlock_irq(shost->host_lock); ··· 5997 5960 ndlp->nlp_type |= NLP_FABRIC; 5998 5961 lpfc_nlp_set_state(vport, ndlp, NLP_STE_UNMAPPED_NODE); 5999 5962 lpfc_printf_vlog(vport, KERN_INFO, LOG_SLI, 6000 - "0004 rpi:%x DID:%x flg:%x %d map:%x %p\n", 5963 + "0004 rpi:%x DID:%x flg:%x %d map:%x x%px\n", 6001 5964 ndlp->nlp_rpi, ndlp->nlp_DID, ndlp->nlp_flag, 6002 5965 kref_read(&ndlp->kref), 6003 5966 ndlp->nlp_usg_map, ndlp); ··· 6051 6014 list_for_each_entry(ndlp, &vport->fc_nodes, nlp_listp) { 6052 6015 if (filter(ndlp, param)) { 6053 6016 lpfc_printf_vlog(vport, KERN_INFO, LOG_NODE, 6054 - "3185 FIND node filter %p DID " 6055 - "ndlp %p did x%x flg x%x st x%x " 6017 + "3185 FIND node filter %ps DID " 6018 + "ndlp x%px did x%x flg x%x st x%x " 6056 6019 "xri x%x type x%x rpi x%x\n", 6057 6020 filter, ndlp, ndlp->nlp_DID, 6058 6021 ndlp->nlp_flag, ndlp->nlp_state, ··· 6062 6025 } 6063 6026 } 6064 6027 lpfc_printf_vlog(vport, KERN_INFO, LOG_NODE, 6065 - "3186 FIND node filter %p NOT FOUND.\n", filter); 6028 + "3186 FIND node filter %ps NOT FOUND.\n", filter); 6066 6029 return NULL; 6067 6030 } 6068 6031 ··· 6102 6065 { 6103 6066 struct Scsi_Host *shost = lpfc_shost_from_vport(vport); 6104 6067 struct lpfc_nodelist *ndlp; 6068 + unsigned long flags; 6105 6069 6106 - spin_lock_irq(shost->host_lock); 6070 + spin_lock_irqsave(shost->host_lock, flags); 6107 6071 ndlp = __lpfc_findnode_rpi(vport, rpi); 6108 - spin_unlock_irq(shost->host_lock); 6072 + spin_unlock_irqrestore(shost->host_lock, flags); 6109 6073 return ndlp; 6110 6074 } 6111 6075 ··· 6187 6149 ndlp->nlp_rpi = rpi; 6188 6150 lpfc_printf_vlog(vport, KERN_INFO, LOG_NODE, 6189 6151 "0007 rpi:%x DID:%x flg:%x refcnt:%d " 6190 - "map:%x %p\n", ndlp->nlp_rpi, ndlp->nlp_DID, 6152 + "map:%x x%px\n", ndlp->nlp_rpi, ndlp->nlp_DID, 6191 6153 ndlp->nlp_flag, 6192 6154 kref_read(&ndlp->kref), 6193 6155 ndlp->nlp_usg_map, ndlp); ··· 6225 6187 ndlp->nlp_DID, ndlp->nlp_flag, ndlp->nlp_type); 6226 6188 6227 6189 lpfc_printf_vlog(ndlp->vport, KERN_INFO, LOG_NODE, 6228 - "0279 lpfc_nlp_release: ndlp:x%p did %x " 6190 + "0279 %s: ndlp:x%px did %x " 6229 6191 "usgmap:x%x refcnt:%d rpi:%x\n", 6192 + __func__, 6230 6193 (void *)ndlp, ndlp->nlp_DID, ndlp->nlp_usg_map, 6231 6194 kref_read(&ndlp->kref), ndlp->nlp_rpi); 6232 6195 ··· 6239 6200 spin_lock_irqsave(&phba->ndlp_lock, flags); 6240 6201 NLP_CLR_NODE_ACT(ndlp); 6241 6202 spin_unlock_irqrestore(&phba->ndlp_lock, flags); 6242 - if (phba->sli_rev == LPFC_SLI_REV4) 6243 - lpfc_sli4_free_rpi(phba, ndlp->nlp_rpi); 6244 6203 6245 6204 /* free ndlp memory for final ndlp release */ 6246 6205 if (NLP_CHK_FREE_REQ(ndlp)) { ··· 6274 6237 if (!NLP_CHK_NODE_ACT(ndlp) || NLP_CHK_FREE_ACK(ndlp)) { 6275 6238 spin_unlock_irqrestore(&phba->ndlp_lock, flags); 6276 6239 lpfc_printf_vlog(ndlp->vport, KERN_WARNING, LOG_NODE, 6277 - "0276 lpfc_nlp_get: ndlp:x%p " 6240 + "0276 %s: ndlp:x%px " 6278 6241 "usgmap:x%x refcnt:%d\n", 6279 - (void *)ndlp, ndlp->nlp_usg_map, 6242 + __func__, (void *)ndlp, ndlp->nlp_usg_map, 6280 6243 kref_read(&ndlp->kref)); 6281 6244 return NULL; 6282 6245 } else ··· 6302 6265 return 1; 6303 6266 6304 6267 lpfc_debugfs_disc_trc(ndlp->vport, LPFC_DISC_TRC_NODE, 6305 - "node put: did:x%x flg:x%x refcnt:x%x", 6306 - ndlp->nlp_DID, ndlp->nlp_flag, 6307 - kref_read(&ndlp->kref)); 6268 + "node put: did:x%x flg:x%x refcnt:x%x", 6269 + ndlp->nlp_DID, ndlp->nlp_flag, 6270 + kref_read(&ndlp->kref)); 6308 6271 phba = ndlp->phba; 6309 6272 spin_lock_irqsave(&phba->ndlp_lock, flags); 6310 6273 /* Check the ndlp memory free acknowledge flag to avoid the ··· 6314 6277 if (NLP_CHK_FREE_ACK(ndlp)) { 6315 6278 spin_unlock_irqrestore(&phba->ndlp_lock, flags); 6316 6279 lpfc_printf_vlog(ndlp->vport, KERN_WARNING, LOG_NODE, 6317 - "0274 lpfc_nlp_put: ndlp:x%p " 6280 + "0274 %s: ndlp:x%px " 6318 6281 "usgmap:x%x refcnt:%d\n", 6319 - (void *)ndlp, ndlp->nlp_usg_map, 6282 + __func__, (void *)ndlp, ndlp->nlp_usg_map, 6320 6283 kref_read(&ndlp->kref)); 6321 6284 return 1; 6322 6285 } ··· 6327 6290 if (NLP_CHK_IACT_REQ(ndlp)) { 6328 6291 spin_unlock_irqrestore(&phba->ndlp_lock, flags); 6329 6292 lpfc_printf_vlog(ndlp->vport, KERN_WARNING, LOG_NODE, 6330 - "0275 lpfc_nlp_put: ndlp:x%p " 6293 + "0275 %s: ndlp:x%px " 6331 6294 "usgmap:x%x refcnt:%d\n", 6332 - (void *)ndlp, ndlp->nlp_usg_map, 6295 + __func__, (void *)ndlp, ndlp->nlp_usg_map, 6333 6296 kref_read(&ndlp->kref)); 6334 6297 return 1; 6335 6298 }
+3 -3
drivers/scsi/lpfc/lpfc_hw.h
··· 843 843 struct lpfc_name portName; 844 844 struct lpfc_name nodeName; 845 845 uint32_t DID; 846 - } ADISC; 846 + } __packed ADISC; 847 847 848 848 typedef struct _FARP { /* Structure is in Big Endian format */ 849 849 uint32_t Mflags:8; ··· 873 873 uint32_t Fdid; 874 874 struct lpfc_name FportName; 875 875 struct lpfc_name FnodeName; 876 - } FAN; 876 + } __packed FAN; 877 877 878 878 typedef struct _SCR { /* Structure is in Big Endian format */ 879 879 uint8_t resvd1; ··· 917 917 union { 918 918 RNID_TOP_DISC topologyDisc; /* topology disc (0xdf) */ 919 919 } un; 920 - } RNID; 920 + } __packed RNID; 921 921 922 922 typedef struct _RPS { /* Structure is in Big Endian format */ 923 923 union {
+34
drivers/scsi/lpfc/lpfc_hw4.h
··· 2050 2050 uint32_t sge_len; 2051 2051 }; 2052 2052 2053 + struct sli4_hybrid_sgl { 2054 + struct list_head list_node; 2055 + struct sli4_sge *dma_sgl; 2056 + dma_addr_t dma_phys_sgl; 2057 + }; 2058 + 2059 + struct fcp_cmd_rsp_buf { 2060 + struct list_head list_node; 2061 + 2062 + /* for storing cmd/rsp dma alloc'ed virt_addr */ 2063 + struct fcp_cmnd *fcp_cmnd; 2064 + struct fcp_rsp *fcp_rsp; 2065 + 2066 + /* for storing this cmd/rsp's dma mapped phys addr from per CPU pool */ 2067 + dma_addr_t fcp_cmd_rsp_dma_handle; 2068 + }; 2069 + 2053 2070 struct sli4_sge_diseed { /* SLI-4 */ 2054 2071 uint32_t ref_tag; 2055 2072 uint32_t ref_tag_tran; ··· 3466 3449 #define cfg_xib_SHIFT 4 3467 3450 #define cfg_xib_MASK 0x00000001 3468 3451 #define cfg_xib_WORD word19 3452 + #define cfg_xpsgl_SHIFT 6 3453 + #define cfg_xpsgl_MASK 0x00000001 3454 + #define cfg_xpsgl_WORD word19 3469 3455 #define cfg_eqdr_SHIFT 8 3470 3456 #define cfg_eqdr_MASK 0x00000001 3471 3457 #define cfg_eqdr_WORD word19 ··· 3479 3459 #define cfg_bv1s_SHIFT 10 3480 3460 #define cfg_bv1s_MASK 0x00000001 3481 3461 #define cfg_bv1s_WORD word19 3462 + 3463 + #define cfg_nsler_SHIFT 12 3464 + #define cfg_nsler_MASK 0x00000001 3465 + #define cfg_nsler_WORD word19 3482 3466 3483 3467 uint32_t word20; 3484 3468 #define cfg_max_tow_xri_SHIFT 0 ··· 4338 4314 #define wqe_rcvoxid_SHIFT 16 4339 4315 #define wqe_rcvoxid_MASK 0x0000FFFF 4340 4316 #define wqe_rcvoxid_WORD word9 4317 + #define wqe_sof_SHIFT 24 4318 + #define wqe_sof_MASK 0x000000FF 4319 + #define wqe_sof_WORD word9 4320 + #define wqe_eof_SHIFT 16 4321 + #define wqe_eof_MASK 0x000000FF 4322 + #define wqe_eof_WORD word9 4341 4323 uint32_t word10; 4342 4324 #define wqe_ebde_cnt_SHIFT 0 4343 4325 #define wqe_ebde_cnt_MASK 0x0000000f ··· 4625 4595 #define prli_type_code_WORD word1 4626 4596 uint32_t word_rsvd2; 4627 4597 uint32_t word_rsvd3; 4598 + 4628 4599 uint32_t word4; 4629 4600 #define prli_fba_SHIFT 0 4630 4601 #define prli_fba_MASK 0x00000001 ··· 4642 4611 #define prli_conf_SHIFT 7 4643 4612 #define prli_conf_MASK 0x00000001 4644 4613 #define prli_conf_WORD word4 4614 + #define prli_nsler_SHIFT 8 4615 + #define prli_nsler_MASK 0x00000001 4616 + #define prli_nsler_WORD word4 4645 4617 uint32_t word5; 4646 4618 #define prli_fb_sz_SHIFT 0 4647 4619 #define prli_fb_sz_MASK 0x0000ffff
+430 -498
drivers/scsi/lpfc/lpfc_init.c
··· 39 39 #include <linux/msi.h> 40 40 #include <linux/irq.h> 41 41 #include <linux/bitops.h> 42 + #include <linux/crash_dump.h> 42 43 43 44 #include <scsi/scsi.h> 44 45 #include <scsi/scsi_device.h> ··· 65 64 #include "lpfc_vport.h" 66 65 #include "lpfc_version.h" 67 66 #include "lpfc_ids.h" 68 - 69 - char *_dump_buf_data; 70 - unsigned long _dump_buf_data_order; 71 - char *_dump_buf_dif; 72 - unsigned long _dump_buf_dif_order; 73 - spinlock_t _dump_buf_lock; 74 67 75 68 /* Used when mapping IRQ vectors in a driver centric manner */ 76 69 static uint32_t lpfc_present_cpu; ··· 1076 1081 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 1077 1082 qp = &phba->sli4_hba.hdwq[idx]; 1078 1083 1079 - spin_lock(&qp->abts_scsi_buf_list_lock); 1080 - list_splice_init(&qp->lpfc_abts_scsi_buf_list, 1084 + spin_lock(&qp->abts_io_buf_list_lock); 1085 + list_splice_init(&qp->lpfc_abts_io_buf_list, 1081 1086 &aborts); 1082 1087 1083 1088 list_for_each_entry_safe(psb, psb_next, &aborts, list) { ··· 1088 1093 spin_lock(&qp->io_buf_list_put_lock); 1089 1094 list_splice_init(&aborts, &qp->lpfc_io_buf_list_put); 1090 1095 qp->put_io_bufs += qp->abts_scsi_io_bufs; 1096 + qp->put_io_bufs += qp->abts_nvme_io_bufs; 1091 1097 qp->abts_scsi_io_bufs = 0; 1098 + qp->abts_nvme_io_bufs = 0; 1092 1099 spin_unlock(&qp->io_buf_list_put_lock); 1093 - spin_unlock(&qp->abts_scsi_buf_list_lock); 1094 - 1095 - if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 1096 - spin_lock(&qp->abts_nvme_buf_list_lock); 1097 - list_splice_init(&qp->lpfc_abts_nvme_buf_list, 1098 - &nvme_aborts); 1099 - list_for_each_entry_safe(psb, psb_next, &nvme_aborts, 1100 - list) { 1101 - psb->pCmd = NULL; 1102 - psb->status = IOSTAT_SUCCESS; 1103 - cnt++; 1104 - } 1105 - spin_lock(&qp->io_buf_list_put_lock); 1106 - qp->put_io_bufs += qp->abts_nvme_io_bufs; 1107 - qp->abts_nvme_io_bufs = 0; 1108 - list_splice_init(&nvme_aborts, 1109 - &qp->lpfc_io_buf_list_put); 1110 - spin_unlock(&qp->io_buf_list_put_lock); 1111 - spin_unlock(&qp->abts_nvme_buf_list_lock); 1112 - 1113 - } 1100 + spin_unlock(&qp->abts_io_buf_list_lock); 1114 1101 } 1115 1102 spin_unlock_irq(&phba->hbalock); 1116 1103 ··· 1238 1261 unsigned char *eqcnt = NULL; 1239 1262 uint32_t usdelay; 1240 1263 int i; 1264 + bool update = false; 1241 1265 1242 1266 if (!phba->cfg_auto_imax || phba->pport->load_flag & FC_UNLOADING) 1243 1267 return; ··· 1252 1274 if (!eqcnt) 1253 1275 goto requeue; 1254 1276 1255 - /* Loop thru all IRQ vectors */ 1256 - for (i = 0; i < phba->cfg_irq_chann; i++) { 1257 - /* Get the EQ corresponding to the IRQ vector */ 1258 - eq = phba->sli4_hba.hba_eq_hdl[i].eq; 1259 - if (eq && eqcnt[eq->last_cpu] < 2) 1260 - eqcnt[eq->last_cpu]++; 1261 - continue; 1262 - } 1277 + if (phba->cfg_irq_chann > 1) { 1278 + /* Loop thru all IRQ vectors */ 1279 + for (i = 0; i < phba->cfg_irq_chann; i++) { 1280 + /* Get the EQ corresponding to the IRQ vector */ 1281 + eq = phba->sli4_hba.hba_eq_hdl[i].eq; 1282 + if (!eq) 1283 + continue; 1284 + if (eq->q_mode) { 1285 + update = true; 1286 + break; 1287 + } 1288 + if (eqcnt[eq->last_cpu] < 2) 1289 + eqcnt[eq->last_cpu]++; 1290 + } 1291 + } else 1292 + update = true; 1263 1293 1264 1294 for_each_present_cpu(i) { 1265 - if (phba->cfg_irq_chann > 1 && eqcnt[i] < 2) 1266 - continue; 1267 - 1268 1295 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, i); 1296 + if (!update && eqcnt[i] < 2) { 1297 + eqi->icnt = 0; 1298 + continue; 1299 + } 1269 1300 1270 1301 usdelay = (eqi->icnt / LPFC_IMAX_THRESHOLD) * 1271 1302 LPFC_EQ_DELAY_STEP; ··· 1522 1535 spin_unlock_irq(&phba->hbalock); 1523 1536 1524 1537 lpfc_offline_prep(phba, LPFC_MBX_NO_WAIT); 1538 + lpfc_sli_flush_io_rings(phba); 1525 1539 lpfc_offline(phba); 1526 1540 lpfc_hba_down_post(phba); 1527 1541 lpfc_unblock_mgmt_io(phba); ··· 1784 1796 "2887 Reset Needed: Attempting Port " 1785 1797 "Recovery...\n"); 1786 1798 lpfc_offline_prep(phba, mbx_action); 1799 + lpfc_sli_flush_io_rings(phba); 1787 1800 lpfc_offline(phba); 1788 1801 /* release interrupt for possible resource change */ 1789 1802 lpfc_sli4_disable_intr(phba); ··· 1904 1915 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 1905 1916 "7624 Firmware not ready: Failing UE recovery," 1906 1917 " waited %dSec", i); 1907 - lpfc_sli4_offline_eratt(phba); 1918 + phba->link_state = LPFC_HBA_ERROR; 1908 1919 break; 1909 1920 1910 1921 case LPFC_SLI_INTF_IF_TYPE_2: ··· 1978 1989 } 1979 1990 /* fall through for not able to recover */ 1980 1991 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 1981 - "3152 Unrecoverable error, bring the port " 1982 - "offline\n"); 1983 - lpfc_sli4_offline_eratt(phba); 1992 + "3152 Unrecoverable error\n"); 1993 + phba->link_state = LPFC_HBA_ERROR; 1984 1994 break; 1985 1995 case LPFC_SLI_INTF_IF_TYPE_1: 1986 1996 default: ··· 2851 2863 &vport->fc_nodes, nlp_listp) { 2852 2864 lpfc_printf_vlog(ndlp->vport, KERN_ERR, 2853 2865 LOG_NODE, 2854 - "0282 did:x%x ndlp:x%p " 2866 + "0282 did:x%x ndlp:x%px " 2855 2867 "usgmap:x%x refcnt:%d\n", 2856 2868 ndlp->nlp_DID, (void *)ndlp, 2857 2869 ndlp->nlp_usg_map, ··· 3055 3067 ndlp->nlp_rpi = rpi; 3056 3068 lpfc_printf_vlog(ndlp->vport, KERN_INFO, LOG_NODE, 3057 3069 "0009 rpi:%x DID:%x " 3058 - "flg:%x map:%x %p\n", ndlp->nlp_rpi, 3070 + "flg:%x map:%x x%px\n", ndlp->nlp_rpi, 3059 3071 ndlp->nlp_DID, ndlp->nlp_flag, 3060 3072 ndlp->nlp_usg_map, ndlp); 3061 3073 } ··· 3240 3252 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 3241 3253 lpfc_destroy_expedite_pool(phba); 3242 3254 3243 - if (!(phba->pport->load_flag & FC_UNLOADING)) { 3244 - lpfc_sli_flush_fcp_rings(phba); 3245 - 3246 - if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 3247 - lpfc_sli_flush_nvme_rings(phba); 3248 - } 3255 + if (!(phba->pport->load_flag & FC_UNLOADING)) 3256 + lpfc_sli_flush_io_rings(phba); 3249 3257 3250 3258 hwq_count = phba->cfg_hdw_queue; 3251 3259 ··· 3475 3491 lpfc_printf_vlog(ndlp->vport, 3476 3492 KERN_INFO, LOG_NODE, 3477 3493 "0011 lpfc_offline: " 3478 - "ndlp:x%p did %x " 3494 + "ndlp:x%px did %x " 3479 3495 "usgmap:x%x rpi:%x\n", 3480 3496 ndlp, ndlp->nlp_DID, 3481 3497 ndlp->nlp_usg_map, ··· 3620 3636 qp->put_io_bufs--; 3621 3637 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 3622 3638 lpfc_ncmd->data, lpfc_ncmd->dma_handle); 3639 + if (phba->cfg_xpsgl && !phba->nvmet_support) 3640 + lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd); 3641 + lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd); 3623 3642 kfree(lpfc_ncmd); 3624 3643 qp->total_io_bufs--; 3625 3644 } ··· 3636 3649 qp->get_io_bufs--; 3637 3650 dma_pool_free(phba->lpfc_sg_dma_buf_pool, 3638 3651 lpfc_ncmd->data, lpfc_ncmd->dma_handle); 3652 + if (phba->cfg_xpsgl && !phba->nvmet_support) 3653 + lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd); 3654 + lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd); 3639 3655 kfree(lpfc_ncmd); 3640 3656 qp->total_io_bufs--; 3641 3657 } ··· 4087 4097 LIST_HEAD(post_nblist); 4088 4098 LIST_HEAD(nvme_nblist); 4089 4099 4090 - /* Sanity check to ensure our sizing is right for both SCSI and NVME */ 4091 - if (sizeof(struct lpfc_io_buf) > LPFC_COMMON_IO_BUF_SZ) { 4092 - lpfc_printf_log(phba, KERN_ERR, LOG_FCP, 4093 - "6426 Common buffer size %zd exceeds %d\n", 4094 - sizeof(struct lpfc_io_buf), 4095 - LPFC_COMMON_IO_BUF_SZ); 4096 - return 0; 4097 - } 4098 - 4099 4100 phba->sli4_hba.io_xri_cnt = 0; 4100 4101 for (bcnt = 0; bcnt < num_to_alloc; bcnt++) { 4101 - lpfc_ncmd = kzalloc(LPFC_COMMON_IO_BUF_SZ, GFP_KERNEL); 4102 + lpfc_ncmd = kzalloc(sizeof(*lpfc_ncmd), GFP_KERNEL); 4102 4103 if (!lpfc_ncmd) 4103 4104 break; 4104 4105 /* ··· 4105 4124 break; 4106 4125 } 4107 4126 4108 - /* 4109 - * 4K Page alignment is CRITICAL to BlockGuard, double check 4110 - * to be sure. 4111 - */ 4112 - if ((phba->sli3_options & LPFC_SLI3_BG_ENABLED) && 4113 - (((unsigned long)(lpfc_ncmd->data) & 4114 - (unsigned long)(SLI4_PAGE_SIZE - 1)) != 0)) { 4115 - lpfc_printf_log(phba, KERN_ERR, LOG_FCP, 4116 - "3369 Memory alignment err: addr=%lx\n", 4117 - (unsigned long)lpfc_ncmd->data); 4118 - dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4119 - lpfc_ncmd->data, lpfc_ncmd->dma_handle); 4120 - kfree(lpfc_ncmd); 4121 - break; 4127 + if (phba->cfg_xpsgl && !phba->nvmet_support) { 4128 + INIT_LIST_HEAD(&lpfc_ncmd->dma_sgl_xtra_list); 4129 + } else { 4130 + /* 4131 + * 4K Page alignment is CRITICAL to BlockGuard, double 4132 + * check to be sure. 4133 + */ 4134 + if ((phba->sli3_options & LPFC_SLI3_BG_ENABLED) && 4135 + (((unsigned long)(lpfc_ncmd->data) & 4136 + (unsigned long)(SLI4_PAGE_SIZE - 1)) != 0)) { 4137 + lpfc_printf_log(phba, KERN_ERR, LOG_FCP, 4138 + "3369 Memory alignment err: " 4139 + "addr=%lx\n", 4140 + (unsigned long)lpfc_ncmd->data); 4141 + dma_pool_free(phba->lpfc_sg_dma_buf_pool, 4142 + lpfc_ncmd->data, 4143 + lpfc_ncmd->dma_handle); 4144 + kfree(lpfc_ncmd); 4145 + break; 4146 + } 4122 4147 } 4148 + 4149 + INIT_LIST_HEAD(&lpfc_ncmd->dma_cmd_rsp_list); 4123 4150 4124 4151 lxri = lpfc_sli4_next_xritag(phba); 4125 4152 if (lxri == NO_XRI) { ··· 4307 4318 4308 4319 shost->dma_boundary = 4309 4320 phba->sli4_hba.pc_sli4_params.sge_supp_len-1; 4310 - shost->sg_tablesize = phba->cfg_scsi_seg_cnt; 4321 + 4322 + if (phba->cfg_xpsgl && !phba->nvmet_support) 4323 + shost->sg_tablesize = LPFC_MAX_SG_TABLESIZE; 4324 + else 4325 + shost->sg_tablesize = phba->cfg_scsi_seg_cnt; 4311 4326 } else 4312 4327 /* SLI-3 has a limited number of hardware queues (3), 4313 4328 * thus there is only one for FCP processing. ··· 6329 6336 if (lpfc_mem_alloc(phba, BPL_ALIGN_SZ)) 6330 6337 return -ENOMEM; 6331 6338 6339 + phba->lpfc_sg_dma_buf_pool = 6340 + dma_pool_create("lpfc_sg_dma_buf_pool", 6341 + &phba->pcidev->dev, phba->cfg_sg_dma_buf_size, 6342 + BPL_ALIGN_SZ, 0); 6343 + 6344 + if (!phba->lpfc_sg_dma_buf_pool) 6345 + goto fail_free_mem; 6346 + 6347 + phba->lpfc_cmd_rsp_buf_pool = 6348 + dma_pool_create("lpfc_cmd_rsp_buf_pool", 6349 + &phba->pcidev->dev, 6350 + sizeof(struct fcp_cmnd) + 6351 + sizeof(struct fcp_rsp), 6352 + BPL_ALIGN_SZ, 0); 6353 + 6354 + if (!phba->lpfc_cmd_rsp_buf_pool) 6355 + goto fail_free_dma_buf_pool; 6356 + 6332 6357 /* 6333 6358 * Enable sr-iov virtual functions if supported and configured 6334 6359 * through the module parameter. ··· 6365 6354 } 6366 6355 6367 6356 return 0; 6357 + 6358 + fail_free_dma_buf_pool: 6359 + dma_pool_destroy(phba->lpfc_sg_dma_buf_pool); 6360 + phba->lpfc_sg_dma_buf_pool = NULL; 6361 + fail_free_mem: 6362 + lpfc_mem_free(phba); 6363 + return -ENOMEM; 6368 6364 } 6369 6365 6370 6366 /** ··· 6432 6414 if (rc) 6433 6415 return -ENODEV; 6434 6416 6417 + /* Allocate all driver workqueues here */ 6418 + 6419 + /* The lpfc_wq workqueue for deferred irq use */ 6420 + phba->wq = alloc_workqueue("lpfc_wq", WQ_MEM_RECLAIM, 0); 6421 + 6435 6422 /* 6436 6423 * Initialize timers used by driver 6437 6424 */ ··· 6471 6448 * The WQ create will allocate the ring. 6472 6449 */ 6473 6450 6474 - /* 6475 - * 1 for cmd, 1 for rsp, NVME adds an extra one 6476 - * for boundary conditions in its max_sgl_segment template. 6477 - */ 6478 - extra = 2; 6479 - if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 6480 - extra++; 6481 - 6482 - /* 6483 - * It doesn't matter what family our adapter is in, we are 6484 - * limited to 2 Pages, 512 SGEs, for our SGL. 6485 - * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp 6486 - */ 6487 - max_buf_size = (2 * SLI4_PAGE_SIZE); 6488 - 6489 - /* 6490 - * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size 6491 - * used to create the sg_dma_buf_pool must be calculated. 6492 - */ 6493 - if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) { 6494 - /* 6495 - * The scsi_buf for a T10-DIF I/O holds the FCP cmnd, 6496 - * the FCP rsp, and a SGE. Sice we have no control 6497 - * over how many protection segments the SCSI Layer 6498 - * will hand us (ie: there could be one for every block 6499 - * in the IO), just allocate enough SGEs to accomidate 6500 - * our max amount and we need to limit lpfc_sg_seg_cnt 6501 - * to minimize the risk of running out. 6502 - */ 6503 - phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + 6504 - sizeof(struct fcp_rsp) + max_buf_size; 6505 - 6506 - /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */ 6507 - phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT; 6508 - 6509 - /* 6510 - * If supporting DIF, reduce the seg count for scsi to 6511 - * allow room for the DIF sges. 6512 - */ 6513 - if (phba->cfg_enable_bg && 6514 - phba->cfg_sg_seg_cnt > LPFC_MAX_BG_SLI4_SEG_CNT_DIF) 6515 - phba->cfg_scsi_seg_cnt = LPFC_MAX_BG_SLI4_SEG_CNT_DIF; 6516 - else 6517 - phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt; 6518 - 6519 - } else { 6520 - /* 6521 - * The scsi_buf for a regular I/O holds the FCP cmnd, 6522 - * the FCP rsp, a SGE for each, and a SGE for up to 6523 - * cfg_sg_seg_cnt data segments. 6524 - */ 6525 - phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + 6526 - sizeof(struct fcp_rsp) + 6527 - ((phba->cfg_sg_seg_cnt + extra) * 6528 - sizeof(struct sli4_sge)); 6529 - 6530 - /* Total SGEs for scsi_sg_list */ 6531 - phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + extra; 6532 - phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt; 6533 - 6534 - /* 6535 - * NOTE: if (phba->cfg_sg_seg_cnt + extra) <= 256 we only 6536 - * need to post 1 page for the SGL. 6537 - */ 6538 - } 6539 - 6540 - /* Limit to LPFC_MAX_NVME_SEG_CNT for NVME. */ 6541 - if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 6542 - if (phba->cfg_sg_seg_cnt > LPFC_MAX_NVME_SEG_CNT) { 6543 - lpfc_printf_log(phba, KERN_INFO, LOG_NVME | LOG_INIT, 6544 - "6300 Reducing NVME sg segment " 6545 - "cnt to %d\n", 6546 - LPFC_MAX_NVME_SEG_CNT); 6547 - phba->cfg_nvme_seg_cnt = LPFC_MAX_NVME_SEG_CNT; 6548 - } else 6549 - phba->cfg_nvme_seg_cnt = phba->cfg_sg_seg_cnt; 6550 - } 6551 - 6552 - /* Initialize the host templates with the updated values. */ 6553 - lpfc_vport_template.sg_tablesize = phba->cfg_scsi_seg_cnt; 6554 - lpfc_template.sg_tablesize = phba->cfg_scsi_seg_cnt; 6555 - lpfc_template_no_hr.sg_tablesize = phba->cfg_scsi_seg_cnt; 6556 - 6557 - if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ) 6558 - phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ; 6559 - else 6560 - phba->cfg_sg_dma_buf_size = 6561 - SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size); 6562 - 6563 - lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP, 6564 - "9087 sg_seg_cnt:%d dmabuf_size:%d " 6565 - "total:%d scsi:%d nvme:%d\n", 6566 - phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size, 6567 - phba->cfg_total_seg_cnt, phba->cfg_scsi_seg_cnt, 6568 - phba->cfg_nvme_seg_cnt); 6569 - 6570 6451 /* Initialize buffer queue management fields */ 6571 6452 INIT_LIST_HEAD(&phba->hbqs[LPFC_ELS_HBQ].hbq_buffer_list); 6572 6453 phba->hbqs[LPFC_ELS_HBQ].hbq_alloc_buffer = lpfc_sli4_rb_alloc; ··· 6479 6552 /* 6480 6553 * Initialize the SLI Layer to run with lpfc SLI4 HBAs. 6481 6554 */ 6482 - if (phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP) { 6483 - /* Initialize the Abort scsi buffer list used by driver */ 6484 - spin_lock_init(&phba->sli4_hba.abts_scsi_buf_list_lock); 6485 - INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_scsi_buf_list); 6486 - } 6555 + /* Initialize the Abort buffer list used by driver */ 6556 + spin_lock_init(&phba->sli4_hba.abts_io_buf_list_lock); 6557 + INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_io_buf_list); 6487 6558 6488 6559 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 6489 6560 /* Initialize the Abort nvme buffer list used by driver */ ··· 6689 6764 } 6690 6765 } 6691 6766 6767 + /* 6768 + * 1 for cmd, 1 for rsp, NVME adds an extra one 6769 + * for boundary conditions in its max_sgl_segment template. 6770 + */ 6771 + extra = 2; 6772 + if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 6773 + extra++; 6774 + 6775 + /* 6776 + * It doesn't matter what family our adapter is in, we are 6777 + * limited to 2 Pages, 512 SGEs, for our SGL. 6778 + * There are going to be 2 reserved SGEs: 1 FCP cmnd + 1 FCP rsp 6779 + */ 6780 + max_buf_size = (2 * SLI4_PAGE_SIZE); 6781 + 6782 + /* 6783 + * Since lpfc_sg_seg_cnt is module param, the sg_dma_buf_size 6784 + * used to create the sg_dma_buf_pool must be calculated. 6785 + */ 6786 + if (phba->sli3_options & LPFC_SLI3_BG_ENABLED) { 6787 + /* Both cfg_enable_bg and cfg_external_dif code paths */ 6788 + 6789 + /* 6790 + * The scsi_buf for a T10-DIF I/O holds the FCP cmnd, 6791 + * the FCP rsp, and a SGE. Sice we have no control 6792 + * over how many protection segments the SCSI Layer 6793 + * will hand us (ie: there could be one for every block 6794 + * in the IO), just allocate enough SGEs to accomidate 6795 + * our max amount and we need to limit lpfc_sg_seg_cnt 6796 + * to minimize the risk of running out. 6797 + */ 6798 + phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + 6799 + sizeof(struct fcp_rsp) + max_buf_size; 6800 + 6801 + /* Total SGEs for scsi_sg_list and scsi_sg_prot_list */ 6802 + phba->cfg_total_seg_cnt = LPFC_MAX_SGL_SEG_CNT; 6803 + 6804 + /* 6805 + * If supporting DIF, reduce the seg count for scsi to 6806 + * allow room for the DIF sges. 6807 + */ 6808 + if (phba->cfg_enable_bg && 6809 + phba->cfg_sg_seg_cnt > LPFC_MAX_BG_SLI4_SEG_CNT_DIF) 6810 + phba->cfg_scsi_seg_cnt = LPFC_MAX_BG_SLI4_SEG_CNT_DIF; 6811 + else 6812 + phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt; 6813 + 6814 + } else { 6815 + /* 6816 + * The scsi_buf for a regular I/O holds the FCP cmnd, 6817 + * the FCP rsp, a SGE for each, and a SGE for up to 6818 + * cfg_sg_seg_cnt data segments. 6819 + */ 6820 + phba->cfg_sg_dma_buf_size = sizeof(struct fcp_cmnd) + 6821 + sizeof(struct fcp_rsp) + 6822 + ((phba->cfg_sg_seg_cnt + extra) * 6823 + sizeof(struct sli4_sge)); 6824 + 6825 + /* Total SGEs for scsi_sg_list */ 6826 + phba->cfg_total_seg_cnt = phba->cfg_sg_seg_cnt + extra; 6827 + phba->cfg_scsi_seg_cnt = phba->cfg_sg_seg_cnt; 6828 + 6829 + /* 6830 + * NOTE: if (phba->cfg_sg_seg_cnt + extra) <= 256 we only 6831 + * need to post 1 page for the SGL. 6832 + */ 6833 + } 6834 + 6835 + if (phba->cfg_xpsgl && !phba->nvmet_support) 6836 + phba->cfg_sg_dma_buf_size = LPFC_DEFAULT_XPSGL_SIZE; 6837 + else if (phba->cfg_sg_dma_buf_size <= LPFC_MIN_SG_SLI4_BUF_SZ) 6838 + phba->cfg_sg_dma_buf_size = LPFC_MIN_SG_SLI4_BUF_SZ; 6839 + else 6840 + phba->cfg_sg_dma_buf_size = 6841 + SLI4_PAGE_ALIGN(phba->cfg_sg_dma_buf_size); 6842 + 6843 + phba->border_sge_num = phba->cfg_sg_dma_buf_size / 6844 + sizeof(struct sli4_sge); 6845 + 6846 + /* Limit to LPFC_MAX_NVME_SEG_CNT for NVME. */ 6847 + if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 6848 + if (phba->cfg_sg_seg_cnt > LPFC_MAX_NVME_SEG_CNT) { 6849 + lpfc_printf_log(phba, KERN_INFO, LOG_NVME | LOG_INIT, 6850 + "6300 Reducing NVME sg segment " 6851 + "cnt to %d\n", 6852 + LPFC_MAX_NVME_SEG_CNT); 6853 + phba->cfg_nvme_seg_cnt = LPFC_MAX_NVME_SEG_CNT; 6854 + } else 6855 + phba->cfg_nvme_seg_cnt = phba->cfg_sg_seg_cnt; 6856 + } 6857 + 6858 + /* Initialize the host templates with the updated values. */ 6859 + lpfc_vport_template.sg_tablesize = phba->cfg_scsi_seg_cnt; 6860 + lpfc_template.sg_tablesize = phba->cfg_scsi_seg_cnt; 6861 + lpfc_template_no_hr.sg_tablesize = phba->cfg_scsi_seg_cnt; 6862 + 6863 + lpfc_printf_log(phba, KERN_INFO, LOG_INIT | LOG_FCP, 6864 + "9087 sg_seg_cnt:%d dmabuf_size:%d " 6865 + "total:%d scsi:%d nvme:%d\n", 6866 + phba->cfg_sg_seg_cnt, phba->cfg_sg_dma_buf_size, 6867 + phba->cfg_total_seg_cnt, phba->cfg_scsi_seg_cnt, 6868 + phba->cfg_nvme_seg_cnt); 6869 + 6870 + if (phba->cfg_sg_dma_buf_size < SLI4_PAGE_SIZE) 6871 + i = phba->cfg_sg_dma_buf_size; 6872 + else 6873 + i = SLI4_PAGE_SIZE; 6874 + 6875 + phba->lpfc_sg_dma_buf_pool = 6876 + dma_pool_create("lpfc_sg_dma_buf_pool", 6877 + &phba->pcidev->dev, 6878 + phba->cfg_sg_dma_buf_size, 6879 + i, 0); 6880 + if (!phba->lpfc_sg_dma_buf_pool) 6881 + goto out_free_bsmbx; 6882 + 6883 + phba->lpfc_cmd_rsp_buf_pool = 6884 + dma_pool_create("lpfc_cmd_rsp_buf_pool", 6885 + &phba->pcidev->dev, 6886 + sizeof(struct fcp_cmnd) + 6887 + sizeof(struct fcp_rsp), 6888 + i, 0); 6889 + if (!phba->lpfc_cmd_rsp_buf_pool) 6890 + goto out_free_sg_dma_buf; 6891 + 6692 6892 mempool_free(mboxq, phba->mbox_mem_pool); 6693 6893 6694 6894 /* Verify OAS is supported */ ··· 6825 6775 /* Verify all the SLI4 queues */ 6826 6776 rc = lpfc_sli4_queue_verify(phba); 6827 6777 if (rc) 6828 - goto out_free_bsmbx; 6778 + goto out_free_cmd_rsp_buf; 6829 6779 6830 6780 /* Create driver internal CQE event pool */ 6831 6781 rc = lpfc_sli4_cq_event_pool_create(phba); 6832 6782 if (rc) 6833 - goto out_free_bsmbx; 6783 + goto out_free_cmd_rsp_buf; 6834 6784 6835 6785 /* Initialize sgl lists per host */ 6836 6786 lpfc_init_sgl_list(phba); ··· 6921 6871 lpfc_free_active_sgl(phba); 6922 6872 out_destroy_cq_event_pool: 6923 6873 lpfc_sli4_cq_event_pool_destroy(phba); 6874 + out_free_cmd_rsp_buf: 6875 + dma_pool_destroy(phba->lpfc_cmd_rsp_buf_pool); 6876 + phba->lpfc_cmd_rsp_buf_pool = NULL; 6877 + out_free_sg_dma_buf: 6878 + dma_pool_destroy(phba->lpfc_sg_dma_buf_pool); 6879 + phba->lpfc_sg_dma_buf_pool = NULL; 6924 6880 out_free_bsmbx: 6925 6881 lpfc_destroy_bootstrap_mbox(phba); 6926 6882 out_free_mem: ··· 7052 6996 error = PTR_ERR(phba->worker_thread); 7053 6997 return error; 7054 6998 } 7055 - 7056 - /* The lpfc_wq workqueue for deferred irq use, is only used for SLI4 */ 7057 - if (phba->sli_rev == LPFC_SLI_REV4) 7058 - phba->wq = alloc_workqueue("lpfc_wq", WQ_MEM_RECLAIM, 0); 7059 - else 7060 - phba->wq = NULL; 7061 6999 7062 7000 return 0; 7063 7001 } ··· 7613 7563 uint32_t old_mask; 7614 7564 uint32_t old_guard; 7615 7565 7616 - int pagecnt = 10; 7617 7566 if (phba->cfg_prot_mask && phba->cfg_prot_guard) { 7618 7567 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 7619 7568 "1478 Registering BlockGuard with the " ··· 7649 7600 "layer, Bad protection parameters: %d %d\n", 7650 7601 old_mask, old_guard); 7651 7602 } 7652 - 7653 - if (!_dump_buf_data) { 7654 - while (pagecnt) { 7655 - spin_lock_init(&_dump_buf_lock); 7656 - _dump_buf_data = 7657 - (char *) __get_free_pages(GFP_KERNEL, pagecnt); 7658 - if (_dump_buf_data) { 7659 - lpfc_printf_log(phba, KERN_ERR, LOG_BG, 7660 - "9043 BLKGRD: allocated %d pages for " 7661 - "_dump_buf_data at 0x%p\n", 7662 - (1 << pagecnt), _dump_buf_data); 7663 - _dump_buf_data_order = pagecnt; 7664 - memset(_dump_buf_data, 0, 7665 - ((1 << PAGE_SHIFT) << pagecnt)); 7666 - break; 7667 - } else 7668 - --pagecnt; 7669 - } 7670 - if (!_dump_buf_data_order) 7671 - lpfc_printf_log(phba, KERN_ERR, LOG_BG, 7672 - "9044 BLKGRD: ERROR unable to allocate " 7673 - "memory for hexdump\n"); 7674 - } else 7675 - lpfc_printf_log(phba, KERN_ERR, LOG_BG, 7676 - "9045 BLKGRD: already allocated _dump_buf_data=0x%p" 7677 - "\n", _dump_buf_data); 7678 - if (!_dump_buf_dif) { 7679 - while (pagecnt) { 7680 - _dump_buf_dif = 7681 - (char *) __get_free_pages(GFP_KERNEL, pagecnt); 7682 - if (_dump_buf_dif) { 7683 - lpfc_printf_log(phba, KERN_ERR, LOG_BG, 7684 - "9046 BLKGRD: allocated %d pages for " 7685 - "_dump_buf_dif at 0x%p\n", 7686 - (1 << pagecnt), _dump_buf_dif); 7687 - _dump_buf_dif_order = pagecnt; 7688 - memset(_dump_buf_dif, 0, 7689 - ((1 << PAGE_SHIFT) << pagecnt)); 7690 - break; 7691 - } else 7692 - --pagecnt; 7693 - } 7694 - if (!_dump_buf_dif_order) 7695 - lpfc_printf_log(phba, KERN_ERR, LOG_BG, 7696 - "9047 BLKGRD: ERROR unable to allocate " 7697 - "memory for hexdump\n"); 7698 - } else 7699 - lpfc_printf_log(phba, KERN_ERR, LOG_BG, 7700 - "9048 BLKGRD: already allocated _dump_buf_dif=0x%p\n", 7701 - _dump_buf_dif); 7702 7603 } 7703 7604 7704 7605 /** ··· 8308 8309 bf_get(lpfc_mbx_rd_conf_extnts_inuse, rd_config); 8309 8310 phba->sli4_hba.max_cfg_param.max_xri = 8310 8311 bf_get(lpfc_mbx_rd_conf_xri_count, rd_config); 8312 + /* Reduce resource usage in kdump environment */ 8313 + if (is_kdump_kernel() && 8314 + phba->sli4_hba.max_cfg_param.max_xri > 512) 8315 + phba->sli4_hba.max_cfg_param.max_xri = 512; 8311 8316 phba->sli4_hba.max_cfg_param.xri_base = 8312 8317 bf_get(lpfc_mbx_rd_conf_xri_base, rd_config); 8313 8318 phba->sli4_hba.max_cfg_param.max_vpi = ··· 8384 8381 * NVMET, FCP io channel WQs are not created. 8385 8382 */ 8386 8383 qmin -= 4; 8387 - 8388 - /* If NVME is configured, double the number of CQ/WQs needed */ 8389 - if ((phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) && 8390 - !phba->nvmet_support) 8391 - qmin /= 2; 8392 8384 8393 8385 /* Check to see if there is enough for NVME */ 8394 8386 if ((phba->cfg_irq_chann > qmin) || ··· 8641 8643 } 8642 8644 8643 8645 static int 8644 - lpfc_alloc_nvme_wq_cq(struct lpfc_hba *phba, int wqidx) 8646 + lpfc_alloc_io_wq_cq(struct lpfc_hba *phba, int idx) 8645 8647 { 8646 8648 struct lpfc_queue *qdesc; 8649 + u32 wqesize; 8647 8650 int cpu; 8648 8651 8649 - cpu = lpfc_find_cpu_handle(phba, wqidx, LPFC_FIND_BY_HDWQ); 8650 - qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE, 8651 - phba->sli4_hba.cq_esize, 8652 - LPFC_CQE_EXP_COUNT, cpu); 8653 - if (!qdesc) { 8654 - lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 8655 - "0508 Failed allocate fast-path NVME CQ (%d)\n", 8656 - wqidx); 8657 - return 1; 8658 - } 8659 - qdesc->qe_valid = 1; 8660 - qdesc->hdwq = wqidx; 8661 - qdesc->chann = cpu; 8662 - phba->sli4_hba.hdwq[wqidx].nvme_cq = qdesc; 8663 - 8664 - qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE, 8665 - LPFC_WQE128_SIZE, LPFC_WQE_EXP_COUNT, 8666 - cpu); 8667 - if (!qdesc) { 8668 - lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 8669 - "0509 Failed allocate fast-path NVME WQ (%d)\n", 8670 - wqidx); 8671 - return 1; 8672 - } 8673 - qdesc->hdwq = wqidx; 8674 - qdesc->chann = wqidx; 8675 - phba->sli4_hba.hdwq[wqidx].nvme_wq = qdesc; 8676 - list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); 8677 - return 0; 8678 - } 8679 - 8680 - static int 8681 - lpfc_alloc_fcp_wq_cq(struct lpfc_hba *phba, int wqidx) 8682 - { 8683 - struct lpfc_queue *qdesc; 8684 - uint32_t wqesize; 8685 - int cpu; 8686 - 8687 - cpu = lpfc_find_cpu_handle(phba, wqidx, LPFC_FIND_BY_HDWQ); 8688 - /* Create Fast Path FCP CQs */ 8652 + cpu = lpfc_find_cpu_handle(phba, idx, LPFC_FIND_BY_HDWQ); 8653 + /* Create Fast Path IO CQs */ 8689 8654 if (phba->enab_exp_wqcq_pages) 8690 8655 /* Increase the CQ size when WQEs contain an embedded cdb */ 8691 8656 qdesc = lpfc_sli4_queue_alloc(phba, LPFC_EXPANDED_PAGE_SIZE, ··· 8661 8700 phba->sli4_hba.cq_ecount, cpu); 8662 8701 if (!qdesc) { 8663 8702 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 8664 - "0499 Failed allocate fast-path FCP CQ (%d)\n", wqidx); 8703 + "0499 Failed allocate fast-path IO CQ (%d)\n", idx); 8665 8704 return 1; 8666 8705 } 8667 8706 qdesc->qe_valid = 1; 8668 - qdesc->hdwq = wqidx; 8707 + qdesc->hdwq = idx; 8669 8708 qdesc->chann = cpu; 8670 - phba->sli4_hba.hdwq[wqidx].fcp_cq = qdesc; 8709 + phba->sli4_hba.hdwq[idx].io_cq = qdesc; 8671 8710 8672 - /* Create Fast Path FCP WQs */ 8711 + /* Create Fast Path IO WQs */ 8673 8712 if (phba->enab_exp_wqcq_pages) { 8674 8713 /* Increase the WQ size when WQEs contain an embedded cdb */ 8675 8714 wqesize = (phba->fcp_embed_io) ? ··· 8684 8723 8685 8724 if (!qdesc) { 8686 8725 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 8687 - "0503 Failed allocate fast-path FCP WQ (%d)\n", 8688 - wqidx); 8726 + "0503 Failed allocate fast-path IO WQ (%d)\n", 8727 + idx); 8689 8728 return 1; 8690 8729 } 8691 - qdesc->hdwq = wqidx; 8692 - qdesc->chann = wqidx; 8693 - phba->sli4_hba.hdwq[wqidx].fcp_wq = qdesc; 8730 + qdesc->hdwq = idx; 8731 + qdesc->chann = cpu; 8732 + phba->sli4_hba.hdwq[idx].io_wq = qdesc; 8694 8733 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); 8695 8734 return 0; 8696 8735 } ··· 8754 8793 qp->get_io_bufs = 0; 8755 8794 qp->put_io_bufs = 0; 8756 8795 qp->total_io_bufs = 0; 8757 - spin_lock_init(&qp->abts_scsi_buf_list_lock); 8758 - INIT_LIST_HEAD(&qp->lpfc_abts_scsi_buf_list); 8796 + spin_lock_init(&qp->abts_io_buf_list_lock); 8797 + INIT_LIST_HEAD(&qp->lpfc_abts_io_buf_list); 8759 8798 qp->abts_scsi_io_bufs = 0; 8760 - spin_lock_init(&qp->abts_nvme_buf_list_lock); 8761 - INIT_LIST_HEAD(&qp->lpfc_abts_nvme_buf_list); 8762 8799 qp->abts_nvme_io_bufs = 0; 8800 + INIT_LIST_HEAD(&qp->sgl_list); 8801 + INIT_LIST_HEAD(&qp->cmd_rsp_buf_list); 8802 + spin_lock_init(&qp->hdwq_lock); 8763 8803 } 8764 8804 } 8765 8805 ··· 8826 8864 } 8827 8865 qdesc->qe_valid = 1; 8828 8866 qdesc->hdwq = cpup->hdwq; 8829 - qdesc->chann = cpu; /* First CPU this EQ is affinitised to */ 8867 + qdesc->chann = cpu; /* First CPU this EQ is affinitized to */ 8830 8868 qdesc->last_cpu = qdesc->chann; 8831 8869 8832 8870 /* Save the allocated EQ in the Hardware Queue */ ··· 8857 8895 qp->hba_eq = phba->sli4_hba.hdwq[eqcpup->hdwq].hba_eq; 8858 8896 } 8859 8897 8860 - /* Allocate SCSI SLI4 CQ/WQs */ 8898 + /* Allocate IO Path SLI4 CQ/WQs */ 8861 8899 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 8862 - if (lpfc_alloc_fcp_wq_cq(phba, idx)) 8900 + if (lpfc_alloc_io_wq_cq(phba, idx)) 8863 8901 goto out_error; 8864 8902 } 8865 8903 8866 - /* Allocate NVME SLI4 CQ/WQs */ 8867 - if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 8868 - for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 8869 - if (lpfc_alloc_nvme_wq_cq(phba, idx)) 8870 - goto out_error; 8871 - } 8872 - 8873 - if (phba->nvmet_support) { 8874 - for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) { 8875 - cpu = lpfc_find_cpu_handle(phba, idx, 8876 - LPFC_FIND_BY_HDWQ); 8877 - qdesc = lpfc_sli4_queue_alloc( 8878 - phba, 8904 + if (phba->nvmet_support) { 8905 + for (idx = 0; idx < phba->cfg_nvmet_mrq; idx++) { 8906 + cpu = lpfc_find_cpu_handle(phba, idx, 8907 + LPFC_FIND_BY_HDWQ); 8908 + qdesc = lpfc_sli4_queue_alloc(phba, 8879 8909 LPFC_DEFAULT_PAGE_SIZE, 8880 8910 phba->sli4_hba.cq_esize, 8881 8911 phba->sli4_hba.cq_ecount, 8882 8912 cpu); 8883 - if (!qdesc) { 8884 - lpfc_printf_log( 8885 - phba, KERN_ERR, LOG_INIT, 8913 + if (!qdesc) { 8914 + lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 8886 8915 "3142 Failed allocate NVME " 8887 8916 "CQ Set (%d)\n", idx); 8888 - goto out_error; 8889 - } 8890 - qdesc->qe_valid = 1; 8891 - qdesc->hdwq = idx; 8892 - qdesc->chann = cpu; 8893 - phba->sli4_hba.nvmet_cqset[idx] = qdesc; 8917 + goto out_error; 8894 8918 } 8919 + qdesc->qe_valid = 1; 8920 + qdesc->hdwq = idx; 8921 + qdesc->chann = cpu; 8922 + phba->sli4_hba.nvmet_cqset[idx] = qdesc; 8895 8923 } 8896 8924 } 8897 8925 ··· 8912 8960 goto out_error; 8913 8961 } 8914 8962 qdesc->qe_valid = 1; 8915 - qdesc->chann = 0; 8963 + qdesc->chann = cpu; 8916 8964 phba->sli4_hba.els_cq = qdesc; 8917 8965 8918 8966 ··· 8930 8978 "0505 Failed allocate slow-path MQ\n"); 8931 8979 goto out_error; 8932 8980 } 8933 - qdesc->chann = 0; 8981 + qdesc->chann = cpu; 8934 8982 phba->sli4_hba.mbx_wq = qdesc; 8935 8983 8936 8984 /* ··· 8946 8994 "0504 Failed allocate slow-path ELS WQ\n"); 8947 8995 goto out_error; 8948 8996 } 8949 - qdesc->chann = 0; 8997 + qdesc->chann = cpu; 8950 8998 phba->sli4_hba.els_wq = qdesc; 8951 8999 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); 8952 9000 ··· 8960 9008 "6079 Failed allocate NVME LS CQ\n"); 8961 9009 goto out_error; 8962 9010 } 8963 - qdesc->chann = 0; 9011 + qdesc->chann = cpu; 8964 9012 qdesc->qe_valid = 1; 8965 9013 phba->sli4_hba.nvmels_cq = qdesc; 8966 9014 ··· 8973 9021 "6080 Failed allocate NVME LS WQ\n"); 8974 9022 goto out_error; 8975 9023 } 8976 - qdesc->chann = 0; 9024 + qdesc->chann = cpu; 8977 9025 phba->sli4_hba.nvmels_wq = qdesc; 8978 9026 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list); 8979 9027 } ··· 9116 9164 /* Loop thru all Hardware Queues */ 9117 9165 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 9118 9166 /* Free the CQ/WQ corresponding to the Hardware Queue */ 9119 - lpfc_sli4_queue_free(hdwq[idx].fcp_cq); 9120 - lpfc_sli4_queue_free(hdwq[idx].nvme_cq); 9121 - lpfc_sli4_queue_free(hdwq[idx].fcp_wq); 9122 - lpfc_sli4_queue_free(hdwq[idx].nvme_wq); 9123 - hdwq[idx].hba_eq = NULL; 9124 - hdwq[idx].fcp_cq = NULL; 9125 - hdwq[idx].nvme_cq = NULL; 9126 - hdwq[idx].fcp_wq = NULL; 9127 - hdwq[idx].nvme_wq = NULL; 9167 + lpfc_sli4_queue_free(hdwq[idx].io_cq); 9168 + lpfc_sli4_queue_free(hdwq[idx].io_wq); 9169 + hdwq[idx].io_cq = NULL; 9170 + hdwq[idx].io_wq = NULL; 9171 + if (phba->cfg_xpsgl && !phba->nvmet_support) 9172 + lpfc_free_sgl_per_hdwq(phba, &hdwq[idx]); 9173 + lpfc_free_cmd_rsp_buf_per_hdwq(phba, &hdwq[idx]); 9128 9174 } 9129 9175 /* Loop thru all IRQ vectors */ 9130 9176 for (idx = 0; idx < phba->cfg_irq_chann; idx++) { ··· 9322 9372 list_for_each_entry(childq, &eq->child_list, list) { 9323 9373 if (childq->queue_id > phba->sli4_hba.cq_max) 9324 9374 continue; 9325 - if ((childq->subtype == LPFC_FCP) || 9326 - (childq->subtype == LPFC_NVME)) 9375 + if (childq->subtype == LPFC_IO) 9327 9376 phba->sli4_hba.cq_lookup[childq->queue_id] = 9328 9377 childq; 9329 9378 } ··· 9448 9499 } 9449 9500 9450 9501 /* Loop thru all Hardware Queues */ 9451 - if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 9452 - for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) { 9453 - cpu = lpfc_find_cpu_handle(phba, qidx, 9454 - LPFC_FIND_BY_HDWQ); 9455 - cpup = &phba->sli4_hba.cpu_map[cpu]; 9456 - 9457 - /* Create the CQ/WQ corresponding to the 9458 - * Hardware Queue 9459 - */ 9460 - rc = lpfc_create_wq_cq(phba, 9461 - phba->sli4_hba.hdwq[cpup->hdwq].hba_eq, 9462 - qp[qidx].nvme_cq, 9463 - qp[qidx].nvme_wq, 9464 - &phba->sli4_hba.hdwq[qidx].nvme_cq_map, 9465 - qidx, LPFC_NVME); 9466 - if (rc) { 9467 - lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 9468 - "6123 Failed to setup fastpath " 9469 - "NVME WQ/CQ (%d), rc = 0x%x\n", 9470 - qidx, (uint32_t)rc); 9471 - goto out_destroy; 9472 - } 9473 - } 9474 - } 9475 - 9476 9502 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) { 9477 9503 cpu = lpfc_find_cpu_handle(phba, qidx, LPFC_FIND_BY_HDWQ); 9478 9504 cpup = &phba->sli4_hba.cpu_map[cpu]; ··· 9455 9531 /* Create the CQ/WQ corresponding to the Hardware Queue */ 9456 9532 rc = lpfc_create_wq_cq(phba, 9457 9533 phba->sli4_hba.hdwq[cpup->hdwq].hba_eq, 9458 - qp[qidx].fcp_cq, 9459 - qp[qidx].fcp_wq, 9460 - &phba->sli4_hba.hdwq[qidx].fcp_cq_map, 9461 - qidx, LPFC_FCP); 9534 + qp[qidx].io_cq, 9535 + qp[qidx].io_wq, 9536 + &phba->sli4_hba.hdwq[qidx].io_cq_map, 9537 + qidx, 9538 + LPFC_IO); 9462 9539 if (rc) { 9463 9540 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 9464 9541 "0535 Failed to setup fastpath " 9465 - "FCP WQ/CQ (%d), rc = 0x%x\n", 9542 + "IO WQ/CQ (%d), rc = 0x%x\n", 9466 9543 qidx, (uint32_t)rc); 9467 9544 goto out_destroy; 9468 9545 } ··· 9763 9838 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) { 9764 9839 /* Destroy the CQ/WQ corresponding to Hardware Queue */ 9765 9840 qp = &phba->sli4_hba.hdwq[qidx]; 9766 - lpfc_wq_destroy(phba, qp->fcp_wq); 9767 - lpfc_wq_destroy(phba, qp->nvme_wq); 9768 - lpfc_cq_destroy(phba, qp->fcp_cq); 9769 - lpfc_cq_destroy(phba, qp->nvme_cq); 9841 + lpfc_wq_destroy(phba, qp->io_wq); 9842 + lpfc_cq_destroy(phba, qp->io_cq); 9770 9843 } 9771 9844 /* Loop thru all IRQ vectors */ 9772 9845 for (qidx = 0; qidx < phba->cfg_irq_chann; qidx++) { ··· 10634 10711 static void 10635 10712 lpfc_cpu_affinity_check(struct lpfc_hba *phba, int vectors) 10636 10713 { 10637 - int i, cpu, idx, new_cpu, start_cpu, first_cpu; 10714 + int i, cpu, idx, next_idx, new_cpu, start_cpu, first_cpu; 10638 10715 int max_phys_id, min_phys_id; 10639 10716 int max_core_id, min_core_id; 10640 10717 struct lpfc_vector_map_info *cpup; ··· 10676 10753 #endif 10677 10754 10678 10755 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 10679 - "3328 CPU physid %d coreid %d\n", 10680 - cpup->phys_id, cpup->core_id); 10756 + "3328 CPU %d physid %d coreid %d flag x%x\n", 10757 + cpu, cpup->phys_id, cpup->core_id, cpup->flag); 10681 10758 10682 10759 if (cpup->phys_id > max_phys_id) 10683 10760 max_phys_id = cpup->phys_id; ··· 10735 10812 cpup->eq = idx; 10736 10813 cpup->irq = pci_irq_vector(phba->pcidev, idx); 10737 10814 10738 - lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 10739 - "3336 Set Affinity: CPU %d " 10740 - "irq %d eq %d\n", 10741 - cpu, cpup->irq, cpup->eq); 10742 - 10743 10815 /* If this is the first CPU thats assigned to this 10744 10816 * vector, set LPFC_CPU_FIRST_IRQ. 10745 10817 */ 10746 10818 if (!i) 10747 10819 cpup->flag |= LPFC_CPU_FIRST_IRQ; 10748 10820 i++; 10821 + 10822 + lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 10823 + "3336 Set Affinity: CPU %d " 10824 + "irq %d eq %d flag x%x\n", 10825 + cpu, cpup->irq, cpup->eq, cpup->flag); 10749 10826 } 10750 10827 } 10751 10828 ··· 10859 10936 } 10860 10937 } 10861 10938 10939 + /* Assign hdwq indices that are unique across all cpus in the map 10940 + * that are also FIRST_CPUs. 10941 + */ 10942 + idx = 0; 10943 + for_each_present_cpu(cpu) { 10944 + cpup = &phba->sli4_hba.cpu_map[cpu]; 10945 + 10946 + /* Only FIRST IRQs get a hdwq index assignment. */ 10947 + if (!(cpup->flag & LPFC_CPU_FIRST_IRQ)) 10948 + continue; 10949 + 10950 + /* 1 to 1, the first LPFC_CPU_FIRST_IRQ cpus to a unique hdwq */ 10951 + cpup->hdwq = idx; 10952 + idx++; 10953 + lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 10954 + "3333 Set Affinity: CPU %d (phys %d core %d): " 10955 + "hdwq %d eq %d irq %d flg x%x\n", 10956 + cpu, cpup->phys_id, cpup->core_id, 10957 + cpup->hdwq, cpup->eq, cpup->irq, cpup->flag); 10958 + } 10862 10959 /* Finally we need to associate a hdwq with each cpu_map entry 10863 10960 * This will be 1 to 1 - hdwq to cpu, unless there are less 10864 10961 * hardware queues then CPUs. For that case we will just round-robin 10865 10962 * the available hardware queues as they get assigned to CPUs. 10963 + * The next_idx is the idx from the FIRST_CPU loop above to account 10964 + * for irq_chann < hdwq. The idx is used for round-robin assignments 10965 + * and needs to start at 0. 10866 10966 */ 10867 - idx = 0; 10967 + next_idx = idx; 10868 10968 start_cpu = 0; 10969 + idx = 0; 10869 10970 for_each_present_cpu(cpu) { 10870 10971 cpup = &phba->sli4_hba.cpu_map[cpu]; 10871 - if (idx >= phba->cfg_hdw_queue) { 10872 - /* We need to reuse a Hardware Queue for another CPU, 10873 - * so be smart about it and pick one that has its 10874 - * IRQ/EQ mapped to the same phys_id (CPU package). 10875 - * and core_id. 10876 - */ 10877 - new_cpu = start_cpu; 10878 - for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { 10879 - new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; 10880 - if ((new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY) && 10881 - (new_cpup->phys_id == cpup->phys_id) && 10882 - (new_cpup->core_id == cpup->core_id)) 10883 - goto found_hdwq; 10884 - new_cpu = cpumask_next( 10885 - new_cpu, cpu_present_mask); 10886 - if (new_cpu == nr_cpumask_bits) 10887 - new_cpu = first_cpu; 10888 - } 10889 10972 10890 - /* If we can't match both phys_id and core_id, 10891 - * settle for just a phys_id match. 10892 - */ 10893 - new_cpu = start_cpu; 10894 - for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { 10895 - new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; 10896 - if ((new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY) && 10897 - (new_cpup->phys_id == cpup->phys_id)) 10898 - goto found_hdwq; 10899 - new_cpu = cpumask_next( 10900 - new_cpu, cpu_present_mask); 10901 - if (new_cpu == nr_cpumask_bits) 10902 - new_cpu = first_cpu; 10903 - } 10973 + /* FIRST cpus are already mapped. */ 10974 + if (cpup->flag & LPFC_CPU_FIRST_IRQ) 10975 + continue; 10904 10976 10905 - /* Otherwise just round robin on cfg_hdw_queue */ 10906 - cpup->hdwq = idx % phba->cfg_hdw_queue; 10907 - goto logit; 10908 - found_hdwq: 10909 - /* We found an available entry, copy the IRQ info */ 10910 - start_cpu = cpumask_next(new_cpu, cpu_present_mask); 10911 - if (start_cpu == nr_cpumask_bits) 10912 - start_cpu = first_cpu; 10913 - cpup->hdwq = new_cpup->hdwq; 10914 - } else { 10915 - /* 1 to 1, CPU to hdwq */ 10916 - cpup->hdwq = idx; 10977 + /* If the cfg_irq_chann < cfg_hdw_queue, set the hdwq 10978 + * of the unassigned cpus to the next idx so that all 10979 + * hdw queues are fully utilized. 10980 + */ 10981 + if (next_idx < phba->cfg_hdw_queue) { 10982 + cpup->hdwq = next_idx; 10983 + next_idx++; 10984 + continue; 10917 10985 } 10918 - logit: 10986 + 10987 + /* Not a First CPU and all hdw_queues are used. Reuse a 10988 + * Hardware Queue for another CPU, so be smart about it 10989 + * and pick one that has its IRQ/EQ mapped to the same phys_id 10990 + * (CPU package) and core_id. 10991 + */ 10992 + new_cpu = start_cpu; 10993 + for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { 10994 + new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; 10995 + if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY && 10996 + new_cpup->phys_id == cpup->phys_id && 10997 + new_cpup->core_id == cpup->core_id) { 10998 + goto found_hdwq; 10999 + } 11000 + new_cpu = cpumask_next(new_cpu, cpu_present_mask); 11001 + if (new_cpu == nr_cpumask_bits) 11002 + new_cpu = first_cpu; 11003 + } 11004 + 11005 + /* If we can't match both phys_id and core_id, 11006 + * settle for just a phys_id match. 11007 + */ 11008 + new_cpu = start_cpu; 11009 + for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) { 11010 + new_cpup = &phba->sli4_hba.cpu_map[new_cpu]; 11011 + if (new_cpup->hdwq != LPFC_VECTOR_MAP_EMPTY && 11012 + new_cpup->phys_id == cpup->phys_id) 11013 + goto found_hdwq; 11014 + 11015 + new_cpu = cpumask_next(new_cpu, cpu_present_mask); 11016 + if (new_cpu == nr_cpumask_bits) 11017 + new_cpu = first_cpu; 11018 + } 11019 + 11020 + /* Otherwise just round robin on cfg_hdw_queue */ 11021 + cpup->hdwq = idx % phba->cfg_hdw_queue; 11022 + idx++; 11023 + goto logit; 11024 + found_hdwq: 11025 + /* We found an available entry, copy the IRQ info */ 11026 + start_cpu = cpumask_next(new_cpu, cpu_present_mask); 11027 + if (start_cpu == nr_cpumask_bits) 11028 + start_cpu = first_cpu; 11029 + cpup->hdwq = new_cpup->hdwq; 11030 + logit: 10919 11031 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 10920 11032 "3335 Set Affinity: CPU %d (phys %d core %d): " 10921 11033 "hdwq %d eq %d irq %d flg x%x\n", 10922 11034 cpu, cpup->phys_id, cpup->core_id, 10923 11035 cpup->hdwq, cpup->eq, cpup->irq, cpup->flag); 10924 - idx++; 10925 11036 } 10926 11037 10927 11038 /* The cpu_map array will be used later during initialization ··· 11046 11089 * @phba: pointer to lpfc hba data structure. 11047 11090 * 11048 11091 * This routine is invoked to enable the MSI interrupt mode to device with 11049 - * SLI-4 interface spec. The kernel function pci_enable_msi() is called 11050 - * to enable the MSI vector. The device driver is responsible for calling 11051 - * the request_irq() to register MSI vector with a interrupt the handler, 11052 - * which is done in this function. 11092 + * SLI-4 interface spec. The kernel function pci_alloc_irq_vectors() is 11093 + * called to enable the MSI vector. The device driver is responsible for 11094 + * calling the request_irq() to register MSI vector with a interrupt the 11095 + * handler, which is done in this function. 11053 11096 * 11054 11097 * Return codes 11055 11098 * 0 - successful ··· 11060 11103 { 11061 11104 int rc, index; 11062 11105 11063 - rc = pci_enable_msi(phba->pcidev); 11064 - if (!rc) 11106 + rc = pci_alloc_irq_vectors(phba->pcidev, 1, 1, 11107 + PCI_IRQ_MSI | PCI_IRQ_AFFINITY); 11108 + if (rc > 0) 11065 11109 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11066 11110 "0487 PCI enable MSI mode success.\n"); 11067 11111 else { 11068 11112 lpfc_printf_log(phba, KERN_INFO, LOG_INIT, 11069 11113 "0488 PCI enable MSI mode failed (%d)\n", rc); 11070 - return rc; 11114 + return rc ? rc : -1; 11071 11115 } 11072 11116 11073 11117 rc = request_irq(phba->pcidev->irq, lpfc_sli4_intr_handler, 11074 11118 0, LPFC_DRIVER_NAME, phba); 11075 11119 if (rc) { 11076 - pci_disable_msi(phba->pcidev); 11120 + pci_free_irq_vectors(phba->pcidev); 11077 11121 lpfc_printf_log(phba, KERN_WARNING, LOG_INIT, 11078 11122 "0490 MSI request_irq failed (%d)\n", rc); 11079 11123 return rc; ··· 11240 11282 lpfc_sli4_xri_exchange_busy_wait(struct lpfc_hba *phba) 11241 11283 { 11242 11284 struct lpfc_sli4_hdw_queue *qp; 11243 - int idx, ccnt, fcnt; 11285 + int idx, ccnt; 11244 11286 int wait_time = 0; 11245 11287 int io_xri_cmpl = 1; 11246 11288 int nvmet_xri_cmpl = 1; 11247 - int fcp_xri_cmpl = 1; 11248 11289 int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list); 11249 11290 11250 11291 /* Driver just aborted IOs during the hba_unset process. Pause ··· 11257 11300 lpfc_nvme_wait_for_io_drain(phba); 11258 11301 11259 11302 ccnt = 0; 11260 - fcnt = 0; 11261 11303 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 11262 11304 qp = &phba->sli4_hba.hdwq[idx]; 11263 - fcp_xri_cmpl = list_empty( 11264 - &qp->lpfc_abts_scsi_buf_list); 11265 - if (!fcp_xri_cmpl) /* if list is NOT empty */ 11266 - fcnt++; 11267 - if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 11268 - io_xri_cmpl = list_empty( 11269 - &qp->lpfc_abts_nvme_buf_list); 11270 - if (!io_xri_cmpl) /* if list is NOT empty */ 11271 - ccnt++; 11272 - } 11305 + io_xri_cmpl = list_empty(&qp->lpfc_abts_io_buf_list); 11306 + if (!io_xri_cmpl) /* if list is NOT empty */ 11307 + ccnt++; 11273 11308 } 11274 11309 if (ccnt) 11275 11310 io_xri_cmpl = 0; 11276 - if (fcnt) 11277 - fcp_xri_cmpl = 0; 11278 11311 11279 11312 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 11280 11313 nvmet_xri_cmpl = 11281 11314 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list); 11282 11315 } 11283 11316 11284 - while (!fcp_xri_cmpl || !els_xri_cmpl || !io_xri_cmpl || 11285 - !nvmet_xri_cmpl) { 11317 + while (!els_xri_cmpl || !io_xri_cmpl || !nvmet_xri_cmpl) { 11286 11318 if (wait_time > LPFC_XRI_EXCH_BUSY_WAIT_TMO) { 11287 11319 if (!nvmet_xri_cmpl) 11288 11320 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, ··· 11280 11334 wait_time/1000); 11281 11335 if (!io_xri_cmpl) 11282 11336 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 11283 - "6100 NVME XRI exchange busy " 11284 - "wait time: %d seconds.\n", 11285 - wait_time/1000); 11286 - if (!fcp_xri_cmpl) 11287 - lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 11288 - "2877 FCP XRI exchange busy " 11337 + "6100 IO XRI exchange busy " 11289 11338 "wait time: %d seconds.\n", 11290 11339 wait_time/1000); 11291 11340 if (!els_xri_cmpl) ··· 11296 11355 } 11297 11356 11298 11357 ccnt = 0; 11299 - fcnt = 0; 11300 11358 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 11301 11359 qp = &phba->sli4_hba.hdwq[idx]; 11302 - fcp_xri_cmpl = list_empty( 11303 - &qp->lpfc_abts_scsi_buf_list); 11304 - if (!fcp_xri_cmpl) /* if list is NOT empty */ 11305 - fcnt++; 11306 - if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 11307 - io_xri_cmpl = list_empty( 11308 - &qp->lpfc_abts_nvme_buf_list); 11309 - if (!io_xri_cmpl) /* if list is NOT empty */ 11310 - ccnt++; 11311 - } 11360 + io_xri_cmpl = list_empty( 11361 + &qp->lpfc_abts_io_buf_list); 11362 + if (!io_xri_cmpl) /* if list is NOT empty */ 11363 + ccnt++; 11312 11364 } 11313 11365 if (ccnt) 11314 11366 io_xri_cmpl = 0; 11315 - if (fcnt) 11316 - fcp_xri_cmpl = 0; 11317 11367 11318 11368 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 11319 11369 nvmet_xri_cmpl = list_empty( ··· 11548 11616 phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters); 11549 11617 phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters); 11550 11618 11619 + /* Check for Extended Pre-Registered SGL support */ 11620 + phba->cfg_xpsgl = bf_get(cfg_xpsgl, mbx_sli4_parameters); 11621 + 11551 11622 /* Check for firmware nvme support */ 11552 11623 rc = (bf_get(cfg_nvme, mbx_sli4_parameters) && 11553 11624 bf_get(cfg_xib, mbx_sli4_parameters)); ··· 11581 11646 phba->nvme_support = 0; 11582 11647 phba->nvmet_support = 0; 11583 11648 phba->cfg_nvmet_mrq = 0; 11649 + phba->cfg_nvme_seg_cnt = 0; 11584 11650 11585 11651 /* If no FC4 type support, move to just SCSI support */ 11586 11652 if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_FCP)) 11587 11653 return -ENODEV; 11588 11654 phba->cfg_enable_fc4_type = LPFC_ENABLE_FCP; 11589 11655 } 11656 + } 11657 + 11658 + /* If the NVME FC4 type is enabled, scale the sg_seg_cnt to 11659 + * accommodate 512K and 1M IOs in a single nvme buf and supply 11660 + * enough NVME LS iocb buffers for larger connectivity counts. 11661 + */ 11662 + if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 11663 + phba->cfg_sg_seg_cnt = LPFC_MAX_NVME_SEG_CNT; 11664 + phba->cfg_iocb_cnt = 5; 11590 11665 } 11591 11666 11592 11667 /* Only embed PBDE for if_type 6, PBDE support requires xib be set */ ··· 11662 11717 phba->mds_diags_support = 1; 11663 11718 else 11664 11719 phba->mds_diags_support = 0; 11720 + 11721 + /* 11722 + * Check if the SLI port supports NSLER 11723 + */ 11724 + if (bf_get(cfg_nsler, mbx_sli4_parameters)) 11725 + phba->nsler = 1; 11726 + else 11727 + phba->nsler = 0; 11665 11728 11666 11729 return 0; 11667 11730 } ··· 12099 12146 lpfc_scsi_dev_block(phba); 12100 12147 12101 12148 /* Flush all driver's outstanding SCSI I/Os as we are to reset */ 12102 - lpfc_sli_flush_fcp_rings(phba); 12149 + lpfc_sli_flush_io_rings(phba); 12103 12150 12104 12151 /* stop all timers */ 12105 12152 lpfc_stop_hba_timers(phba); ··· 12129 12176 lpfc_stop_hba_timers(phba); 12130 12177 12131 12178 /* Clean up all driver's outstanding SCSI I/Os */ 12132 - lpfc_sli_flush_fcp_rings(phba); 12179 + lpfc_sli_flush_io_rings(phba); 12133 12180 } 12134 12181 12135 12182 /** ··· 12901 12948 /* Block all SCSI devices' I/Os on the host */ 12902 12949 lpfc_scsi_dev_block(phba); 12903 12950 12904 - /* Flush all driver's outstanding SCSI I/Os as we are to reset */ 12905 - lpfc_sli_flush_fcp_rings(phba); 12906 - 12907 - /* Flush the outstanding NVME IOs if fc4 type enabled. */ 12908 - if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 12909 - lpfc_sli_flush_nvme_rings(phba); 12951 + /* Flush all driver's outstanding I/Os as we are to reset */ 12952 + lpfc_sli_flush_io_rings(phba); 12910 12953 12911 12954 /* stop all timers */ 12912 12955 lpfc_stop_hba_timers(phba); ··· 12933 12984 /* stop all timers */ 12934 12985 lpfc_stop_hba_timers(phba); 12935 12986 12936 - /* Clean up all driver's outstanding SCSI I/Os */ 12937 - lpfc_sli_flush_fcp_rings(phba); 12938 - 12939 - /* Flush the outstanding NVME IOs if fc4 type enabled. */ 12940 - if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) 12941 - lpfc_sli_flush_nvme_rings(phba); 12987 + /* Clean up all driver's outstanding I/Os */ 12988 + lpfc_sli_flush_io_rings(phba); 12942 12989 } 12943 12990 12944 12991 /** ··· 13475 13530 pci_unregister_driver(&lpfc_driver); 13476 13531 fc_release_transport(lpfc_transport_template); 13477 13532 fc_release_transport(lpfc_vport_transport_template); 13478 - if (_dump_buf_data) { 13479 - printk(KERN_ERR "9062 BLKGRD: freeing %lu pages for " 13480 - "_dump_buf_data at 0x%p\n", 13481 - (1L << _dump_buf_data_order), _dump_buf_data); 13482 - free_pages((unsigned long)_dump_buf_data, _dump_buf_data_order); 13483 - } 13484 - 13485 - if (_dump_buf_dif) { 13486 - printk(KERN_ERR "9049 BLKGRD: freeing %lu pages for " 13487 - "_dump_buf_dif at 0x%p\n", 13488 - (1L << _dump_buf_dif_order), _dump_buf_dif); 13489 - free_pages((unsigned long)_dump_buf_dif, _dump_buf_dif_order); 13490 - } 13491 13533 idr_destroy(&lpfc_hba_index); 13492 13534 } 13493 13535
+19 -46
drivers/scsi/lpfc/lpfc_mem.c
··· 72 72 * lpfc_mem_alloc - create and allocate all PCI and memory pools 73 73 * @phba: HBA to allocate pools for 74 74 * 75 - * Description: Creates and allocates PCI pools lpfc_sg_dma_buf_pool, 76 - * lpfc_mbuf_pool, lpfc_hrb_pool. Creates and allocates kmalloc-backed mempools 75 + * Description: Creates and allocates PCI pools lpfc_mbuf_pool, 76 + * lpfc_hrb_pool. Creates and allocates kmalloc-backed mempools 77 77 * for LPFC_MBOXQ_t and lpfc_nodelist. Also allocates the VPI bitmask. 78 78 * 79 79 * Notes: Not interrupt-safe. Must be called with no locks held. If any ··· 89 89 struct lpfc_dma_pool *pool = &phba->lpfc_mbuf_safety_pool; 90 90 int i; 91 91 92 - if (phba->sli_rev == LPFC_SLI_REV4) { 93 - /* Calculate alignment */ 94 - if (phba->cfg_sg_dma_buf_size < SLI4_PAGE_SIZE) 95 - i = phba->cfg_sg_dma_buf_size; 96 - else 97 - i = SLI4_PAGE_SIZE; 98 - 99 - phba->lpfc_sg_dma_buf_pool = 100 - dma_pool_create("lpfc_sg_dma_buf_pool", 101 - &phba->pcidev->dev, 102 - phba->cfg_sg_dma_buf_size, 103 - i, 0); 104 - if (!phba->lpfc_sg_dma_buf_pool) 105 - goto fail; 106 - 107 - } else { 108 - phba->lpfc_sg_dma_buf_pool = 109 - dma_pool_create("lpfc_sg_dma_buf_pool", 110 - &phba->pcidev->dev, phba->cfg_sg_dma_buf_size, 111 - align, 0); 112 - 113 - if (!phba->lpfc_sg_dma_buf_pool) 114 - goto fail; 115 - } 116 92 117 93 phba->lpfc_mbuf_pool = dma_pool_create("lpfc_mbuf_pool", &phba->pcidev->dev, 118 94 LPFC_BPL_SIZE, 119 95 align, 0); 120 96 if (!phba->lpfc_mbuf_pool) 121 - goto fail_free_dma_buf_pool; 97 + goto fail; 122 98 123 99 pool->elements = kmalloc_array(LPFC_MBUF_POOL_SIZE, 124 100 sizeof(struct lpfc_dmabuf), ··· 184 208 fail_free_lpfc_mbuf_pool: 185 209 dma_pool_destroy(phba->lpfc_mbuf_pool); 186 210 phba->lpfc_mbuf_pool = NULL; 187 - fail_free_dma_buf_pool: 188 - dma_pool_destroy(phba->lpfc_sg_dma_buf_pool); 189 - phba->lpfc_sg_dma_buf_pool = NULL; 190 211 fail: 191 212 return -ENOMEM; 192 213 } ··· 221 248 222 249 /* Free HBQ pools */ 223 250 lpfc_sli_hbqbuf_free_all(phba); 224 - if (phba->lpfc_nvmet_drb_pool) 225 - dma_pool_destroy(phba->lpfc_nvmet_drb_pool); 251 + dma_pool_destroy(phba->lpfc_nvmet_drb_pool); 226 252 phba->lpfc_nvmet_drb_pool = NULL; 227 - if (phba->lpfc_drb_pool) 228 - dma_pool_destroy(phba->lpfc_drb_pool); 253 + 254 + dma_pool_destroy(phba->lpfc_drb_pool); 229 255 phba->lpfc_drb_pool = NULL; 230 - if (phba->lpfc_hrb_pool) 231 - dma_pool_destroy(phba->lpfc_hrb_pool); 256 + 257 + dma_pool_destroy(phba->lpfc_hrb_pool); 232 258 phba->lpfc_hrb_pool = NULL; 233 - if (phba->txrdy_payload_pool) 234 - dma_pool_destroy(phba->txrdy_payload_pool); 259 + 260 + dma_pool_destroy(phba->txrdy_payload_pool); 235 261 phba->txrdy_payload_pool = NULL; 236 262 237 - if (phba->lpfc_hbq_pool) 238 - dma_pool_destroy(phba->lpfc_hbq_pool); 263 + dma_pool_destroy(phba->lpfc_hbq_pool); 239 264 phba->lpfc_hbq_pool = NULL; 240 265 241 - if (phba->rrq_pool) 242 - mempool_destroy(phba->rrq_pool); 266 + mempool_destroy(phba->rrq_pool); 243 267 phba->rrq_pool = NULL; 244 268 245 269 /* Free NLP memory pool */ ··· 259 289 260 290 dma_pool_destroy(phba->lpfc_mbuf_pool); 261 291 phba->lpfc_mbuf_pool = NULL; 262 - 263 - /* Free DMA buffer memory pool */ 264 - dma_pool_destroy(phba->lpfc_sg_dma_buf_pool); 265 - phba->lpfc_sg_dma_buf_pool = NULL; 266 292 267 293 /* Free Device Data memory pool */ 268 294 if (phba->device_data_mem_pool) { ··· 331 365 332 366 /* Free and destroy all the allocated memory pools */ 333 367 lpfc_mem_free(phba); 368 + 369 + /* Free DMA buffer memory pool */ 370 + dma_pool_destroy(phba->lpfc_sg_dma_buf_pool); 371 + phba->lpfc_sg_dma_buf_pool = NULL; 372 + 373 + dma_pool_destroy(phba->lpfc_cmd_rsp_buf_pool); 374 + phba->lpfc_cmd_rsp_buf_pool = NULL; 334 375 335 376 /* Free the iocb lookup array */ 336 377 kfree(psli->iocbq_lookup);
+36 -7
drivers/scsi/lpfc/lpfc_nportdisc.c
··· 614 614 } 615 615 out: 616 616 /* If we are authenticated, move to the proper state */ 617 - if (ndlp->nlp_type & NLP_FCP_TARGET) 617 + if (ndlp->nlp_type & (NLP_FCP_TARGET | NLP_NVME_TARGET)) 618 618 lpfc_nlp_set_state(vport, ndlp, NLP_STE_MAPPED_NODE); 619 619 else 620 620 lpfc_nlp_set_state(vport, ndlp, NLP_STE_UNMAPPED_NODE); ··· 799 799 if (npr->writeXferRdyDis) 800 800 ndlp->nlp_flag |= NLP_FIRSTBURST; 801 801 } 802 - if (npr->Retry) 802 + if (npr->Retry && ndlp->nlp_type & 803 + (NLP_FCP_INITIATOR | NLP_FCP_TARGET)) 803 804 ndlp->nlp_fcp_info |= NLP_FCP_2_DEVICE; 805 + 806 + if (npr->Retry && phba->nsler && 807 + ndlp->nlp_type & (NLP_NVME_INITIATOR | NLP_NVME_TARGET)) 808 + ndlp->nlp_nvme_info |= NLP_NVME_NSLER; 809 + 804 810 805 811 /* If this driver is in nvme target mode, set the ndlp's fc4 806 812 * type to NVME provided the PRLI response claims NVME FC4 ··· 891 885 lpfc_printf_vlog(vport, KERN_INFO, LOG_DISCOVERY, 892 886 "1435 release_rpi SKIP UNREG x%x on " 893 887 "NPort x%x deferred x%x flg x%x " 894 - "Data: %p\n", 888 + "Data: x%px\n", 895 889 ndlp->nlp_rpi, ndlp->nlp_DID, 896 890 ndlp->nlp_defer_did, 897 891 ndlp->nlp_flag, ndlp); ··· 1667 1661 LPFC_MBOXQ_t *mb; 1668 1662 LPFC_MBOXQ_t *nextmb; 1669 1663 struct lpfc_dmabuf *mp; 1664 + struct lpfc_nodelist *ns_ndlp; 1670 1665 1671 1666 cmdiocb = (struct lpfc_iocbq *) arg; 1672 1667 ··· 1699 1692 } 1700 1693 } 1701 1694 spin_unlock_irq(&phba->hbalock); 1695 + 1696 + /* software abort if any GID_FT is outstanding */ 1697 + if (vport->cfg_enable_fc4_type != LPFC_ENABLE_FCP) { 1698 + ns_ndlp = lpfc_findnode_did(vport, NameServer_DID); 1699 + if (ns_ndlp && NLP_CHK_NODE_ACT(ns_ndlp)) 1700 + lpfc_els_abort(phba, ns_ndlp); 1701 + } 1702 1702 1703 1703 lpfc_rcv_logo(vport, ndlp, cmdiocb, ELS_CMD_LOGO); 1704 1704 return ndlp->nlp_state; ··· 1828 1814 1829 1815 ndlp->nlp_prev_state = NLP_STE_REG_LOGIN_ISSUE; 1830 1816 lpfc_nlp_set_state(vport, ndlp, NLP_STE_PRLI_ISSUE); 1831 - lpfc_issue_els_prli(vport, ndlp, 0); 1817 + if (lpfc_issue_els_prli(vport, ndlp, 0)) { 1818 + lpfc_issue_els_logo(vport, ndlp, 0); 1819 + ndlp->nlp_prev_state = NLP_STE_REG_LOGIN_ISSUE; 1820 + lpfc_nlp_set_state(vport, ndlp, NLP_STE_NPR_NODE); 1821 + } 1832 1822 } else { 1833 1823 if ((vport->fc_flag & FC_PT2PT) && phba->nvmet_support) 1834 1824 phba->targetport->port_id = vport->fc_myDID; ··· 2029 2011 /* Complete setting up the remote ndlp personality. */ 2030 2012 if (bf_get_be32(prli_init, nvpr)) 2031 2013 ndlp->nlp_type |= NLP_NVME_INITIATOR; 2014 + 2015 + if (phba->nsler && bf_get_be32(prli_nsler, nvpr)) 2016 + ndlp->nlp_nvme_info |= NLP_NVME_NSLER; 2017 + else 2018 + ndlp->nlp_nvme_info &= ~NLP_NVME_NSLER; 2032 2019 2033 2020 /* Target driver cannot solicit NVME FB. */ 2034 2021 if (bf_get_be32(prli_tgt, nvpr)) { ··· 2914 2891 uint32_t(*func) (struct lpfc_vport *, struct lpfc_nodelist *, void *, 2915 2892 uint32_t); 2916 2893 uint32_t got_ndlp = 0; 2894 + uint32_t data1; 2917 2895 2918 2896 if (lpfc_nlp_get(ndlp)) 2919 2897 got_ndlp = 1; 2920 2898 2921 2899 cur_state = ndlp->nlp_state; 2922 2900 2901 + data1 = (((uint32_t)ndlp->nlp_fc4_type << 16) | 2902 + ((uint32_t)ndlp->nlp_type)); 2923 2903 /* DSM in event <evt> on NPort <nlp_DID> in state <cur_state> */ 2924 2904 lpfc_printf_vlog(vport, KERN_INFO, LOG_DISCOVERY, 2925 2905 "0211 DSM in event x%x on NPort x%x in " 2926 2906 "state %d rpi x%x Data: x%x x%x\n", 2927 2907 evt, ndlp->nlp_DID, cur_state, ndlp->nlp_rpi, 2928 - ndlp->nlp_flag, ndlp->nlp_fc4_type); 2908 + ndlp->nlp_flag, data1); 2929 2909 2930 2910 lpfc_debugfs_disc_trc(vport, LPFC_DISC_TRC_DSM, 2931 2911 "DSM in: evt:%d ste:%d did:x%x", ··· 2939 2913 2940 2914 /* DSM out state <rc> on NPort <nlp_DID> */ 2941 2915 if (got_ndlp) { 2916 + data1 = (((uint32_t)ndlp->nlp_fc4_type << 16) | 2917 + ((uint32_t)ndlp->nlp_type)); 2942 2918 lpfc_printf_vlog(vport, KERN_INFO, LOG_DISCOVERY, 2943 2919 "0212 DSM out state %d on NPort x%x " 2944 - "rpi x%x Data: x%x\n", 2945 - rc, ndlp->nlp_DID, ndlp->nlp_rpi, ndlp->nlp_flag); 2920 + "rpi x%x Data: x%x x%x\n", 2921 + rc, ndlp->nlp_DID, ndlp->nlp_rpi, ndlp->nlp_flag, 2922 + data1); 2946 2923 2947 2924 lpfc_debugfs_disc_trc(vport, LPFC_DISC_TRC_DSM, 2948 2925 "DSM out: ste:%d did:x%x flg:x%x",
+244 -143
drivers/scsi/lpfc/lpfc_nvme.c
··· 247 247 248 248 lpfc_printf_vlog(vport, KERN_INFO, LOG_NVME, 249 249 "6073 Binding %s HdwQueue %d (cpu %d) to " 250 - "hdw_queue %d qhandle %p\n", str, 250 + "hdw_queue %d qhandle x%px\n", str, 251 251 qidx, qhandle->cpu_id, qhandle->index, qhandle); 252 252 *handle = (void *)qhandle; 253 253 return 0; ··· 282 282 vport = lport->vport; 283 283 284 284 lpfc_printf_vlog(vport, KERN_INFO, LOG_NVME, 285 - "6001 ENTER. lpfc_pnvme %p, qidx x%x qhandle %p\n", 285 + "6001 ENTER. lpfc_pnvme x%px, qidx x%x qhandle x%px\n", 286 286 lport, qidx, handle); 287 287 kfree(handle); 288 288 } ··· 293 293 struct lpfc_nvme_lport *lport = localport->private; 294 294 295 295 lpfc_printf_vlog(lport->vport, KERN_INFO, LOG_NVME, 296 - "6173 localport %p delete complete\n", 296 + "6173 localport x%px delete complete\n", 297 297 lport); 298 298 299 299 /* release any threads waiting for the unreg to complete */ ··· 332 332 * calling state machine to remove the node. 333 333 */ 334 334 lpfc_printf_vlog(vport, KERN_INFO, LOG_NVME_DISC, 335 - "6146 remoteport delete of remoteport %p\n", 335 + "6146 remoteport delete of remoteport x%px\n", 336 336 remoteport); 337 337 spin_lock_irq(&vport->phba->hbalock); 338 338 ··· 383 383 ndlp = (struct lpfc_nodelist *)cmdwqe->context1; 384 384 lpfc_printf_vlog(vport, KERN_INFO, LOG_NVME_DISC, 385 385 "6047 nvme cmpl Enter " 386 - "Data %p DID %x Xri: %x status %x reason x%x cmd:%p " 387 - "lsreg:%p bmp:%p ndlp:%p\n", 386 + "Data %px DID %x Xri: %x status %x reason x%x " 387 + "cmd:x%px lsreg:x%px bmp:x%px ndlp:x%px\n", 388 388 pnvme_lsreq, ndlp ? ndlp->nlp_DID : 0, 389 389 cmdwqe->sli4_xritag, status, 390 390 (wcqe->parameter & 0xffff), ··· 404 404 else 405 405 lpfc_printf_vlog(vport, KERN_ERR, LOG_NVME_DISC, 406 406 "6046 nvme cmpl without done call back? " 407 - "Data %p DID %x Xri: %x status %x\n", 407 + "Data %px DID %x Xri: %x status %x\n", 408 408 pnvme_lsreq, ndlp ? ndlp->nlp_DID : 0, 409 409 cmdwqe->sli4_xritag, status); 410 410 if (ndlp) { ··· 436 436 return 1; 437 437 438 438 wqe = &genwqe->wqe; 439 + /* Initialize only 64 bytes */ 439 440 memset(wqe, 0, sizeof(union lpfc_wqe)); 440 441 441 442 genwqe->context3 = (uint8_t *)bmp; ··· 517 516 /* Issue GEN REQ WQE for NPORT <did> */ 518 517 lpfc_printf_vlog(vport, KERN_INFO, LOG_ELS, 519 518 "6050 Issue GEN REQ WQE to NPORT x%x " 520 - "Data: x%x x%x wq:%p lsreq:%p bmp:%p xmit:%d 1st:%d\n", 519 + "Data: x%x x%x wq:x%px lsreq:x%px bmp:x%px " 520 + "xmit:%d 1st:%d\n", 521 521 ndlp->nlp_DID, genwqe->iotag, 522 522 vport->port_state, 523 523 genwqe, pnvme_lsreq, bmp, xmit_len, first_len); ··· 596 594 ndlp = rport->ndlp; 597 595 if (!ndlp || !NLP_CHK_NODE_ACT(ndlp)) { 598 596 lpfc_printf_vlog(vport, KERN_ERR, LOG_NODE | LOG_NVME_IOERR, 599 - "6051 Remoteport %p, rport has invalid ndlp. " 597 + "6051 Remoteport x%px, rport has invalid ndlp. " 600 598 "Failing LS Req\n", pnvme_rport); 601 599 return -ENODEV; 602 600 } ··· 648 646 649 647 /* Expand print to include key fields. */ 650 648 lpfc_printf_vlog(vport, KERN_INFO, LOG_NVME_DISC, 651 - "6149 Issue LS Req to DID 0x%06x lport %p, rport %p " 652 - "lsreq%p rqstlen:%d rsplen:%d %pad %pad\n", 653 - ndlp->nlp_DID, 654 - pnvme_lport, pnvme_rport, 649 + "6149 Issue LS Req to DID 0x%06x lport x%px, " 650 + "rport x%px lsreq x%px rqstlen:%d rsplen:%d " 651 + "%pad %pad\n", 652 + ndlp->nlp_DID, pnvme_lport, pnvme_rport, 655 653 pnvme_lsreq, pnvme_lsreq->rqstlen, 656 654 pnvme_lsreq->rsplen, &pnvme_lsreq->rqstdma, 657 655 &pnvme_lsreq->rspdma); ··· 667 665 if (ret != WQE_SUCCESS) { 668 666 atomic_inc(&lport->xmt_ls_err); 669 667 lpfc_printf_vlog(vport, KERN_ERR, LOG_NVME_DISC, 670 - "6052 EXIT. issue ls wqe failed lport %p, " 671 - "rport %p lsreq%p Status %x DID %x\n", 668 + "6052 EXIT. issue ls wqe failed lport x%px, " 669 + "rport x%px lsreq x%px Status %x DID %x\n", 672 670 pnvme_lport, pnvme_rport, pnvme_lsreq, 673 671 ret, ndlp->nlp_DID); 674 672 lpfc_mbuf_free(vport->phba, bmp->virt, bmp->phys); ··· 725 723 726 724 /* Expand print to include key fields. */ 727 725 lpfc_printf_vlog(vport, KERN_INFO, LOG_NVME_ABTS, 728 - "6040 ENTER. lport %p, rport %p lsreq %p rqstlen:%d " 726 + "6040 ENTER. lport x%px, rport x%px lsreq x%px rqstlen:%d " 729 727 "rsplen:%d %pad %pad\n", 730 728 pnvme_lport, pnvme_rport, 731 729 pnvme_lsreq, pnvme_lsreq->rqstlen, ··· 986 984 if (!lpfc_ncmd->nvmeCmd) { 987 985 spin_unlock(&lpfc_ncmd->buf_lock); 988 986 lpfc_printf_vlog(vport, KERN_ERR, LOG_NODE | LOG_NVME_IOERR, 989 - "6066 Missing cmpl ptrs: lpfc_ncmd %p, " 990 - "nvmeCmd %p\n", 987 + "6066 Missing cmpl ptrs: lpfc_ncmd x%px, " 988 + "nvmeCmd x%px\n", 991 989 lpfc_ncmd, lpfc_ncmd->nvmeCmd); 992 990 993 991 /* Release the lpfc_ncmd regardless of the missing elements. */ ··· 1000 998 idx = lpfc_ncmd->cur_iocbq.hba_wqidx; 1001 999 phba->sli4_hba.hdwq[idx].nvme_cstat.io_cmpls++; 1002 1000 1003 - if (vport->localport) { 1001 + if (unlikely(status && vport->localport)) { 1004 1002 lport = (struct lpfc_nvme_lport *)vport->localport->private; 1005 - if (lport && status) { 1003 + if (lport) { 1006 1004 if (bf_get(lpfc_wcqe_c_xb, wcqe)) 1007 1005 atomic_inc(&lport->cmpl_fcp_xb); 1008 1006 atomic_inc(&lport->cmpl_fcp_err); ··· 1102 1100 if (lpfc_ncmd->result == IOERR_ABORT_REQUESTED) 1103 1101 lpfc_printf_vlog(vport, KERN_INFO, 1104 1102 LOG_NVME_IOERR, 1105 - "6032 Delay Aborted cmd %p " 1106 - "nvme cmd %p, xri x%x, " 1103 + "6032 Delay Aborted cmd x%px " 1104 + "nvme cmd x%px, xri x%x, " 1107 1105 "xb %d\n", 1108 1106 lpfc_ncmd, nCmd, 1109 1107 lpfc_ncmd->cur_iocbq.sli4_xritag, ··· 1142 1140 phba->ktime_last_cmd = lpfc_ncmd->ts_data_nvme; 1143 1141 lpfc_nvme_ktime(phba, lpfc_ncmd); 1144 1142 } 1145 - if (phba->cpucheck_on & LPFC_CHECK_NVME_IO) { 1143 + if (unlikely(phba->cpucheck_on & LPFC_CHECK_NVME_IO)) { 1146 1144 uint32_t cpu; 1147 1145 idx = lpfc_ncmd->cur_iocbq.hba_wqidx; 1148 1146 cpu = raw_smp_processor_id(); ··· 1255 1253 sizeof(uint32_t) * 8); 1256 1254 cstat->control_requests++; 1257 1255 } 1256 + 1257 + if (pnode->nlp_nvme_info & NLP_NVME_NSLER) 1258 + bf_set(wqe_erp, &wqe->generic.wqe_com, 1); 1258 1259 /* 1259 1260 * Finish initializing those WQE fields that are independent 1260 1261 * of the nvme_cmnd request_buffer ··· 1309 1304 struct nvmefc_fcp_req *nCmd = lpfc_ncmd->nvmeCmd; 1310 1305 union lpfc_wqe128 *wqe = &lpfc_ncmd->cur_iocbq.wqe; 1311 1306 struct sli4_sge *sgl = lpfc_ncmd->dma_sgl; 1307 + struct sli4_hybrid_sgl *sgl_xtra = NULL; 1312 1308 struct scatterlist *data_sg; 1313 1309 struct sli4_sge *first_data_sgl; 1314 1310 struct ulp_bde64 *bde; 1315 - dma_addr_t physaddr; 1311 + dma_addr_t physaddr = 0; 1316 1312 uint32_t num_bde = 0; 1317 - uint32_t dma_len; 1313 + uint32_t dma_len = 0; 1318 1314 uint32_t dma_offset = 0; 1319 - int nseg, i; 1315 + int nseg, i, j; 1316 + bool lsp_just_set = false; 1320 1317 1321 1318 /* Fix up the command and response DMA stuff. */ 1322 1319 lpfc_nvme_adj_fcp_sgls(vport, lpfc_ncmd, nCmd); ··· 1355 1348 */ 1356 1349 nseg = nCmd->sg_cnt; 1357 1350 data_sg = nCmd->first_sgl; 1351 + 1352 + /* for tracking the segment boundaries */ 1353 + j = 2; 1358 1354 for (i = 0; i < nseg; i++) { 1359 1355 if (data_sg == NULL) { 1360 1356 lpfc_printf_log(phba, KERN_ERR, LOG_NVME_IOERR, ··· 1366 1356 lpfc_ncmd->seg_cnt = 0; 1367 1357 return 1; 1368 1358 } 1369 - physaddr = data_sg->dma_address; 1370 - dma_len = data_sg->length; 1371 - sgl->addr_lo = cpu_to_le32(putPaddrLow(physaddr)); 1372 - sgl->addr_hi = cpu_to_le32(putPaddrHigh(physaddr)); 1373 - sgl->word2 = le32_to_cpu(sgl->word2); 1374 - if ((num_bde + 1) == nseg) 1375 - bf_set(lpfc_sli4_sge_last, sgl, 1); 1376 - else 1377 - bf_set(lpfc_sli4_sge_last, sgl, 0); 1378 - bf_set(lpfc_sli4_sge_offset, sgl, dma_offset); 1379 - bf_set(lpfc_sli4_sge_type, sgl, LPFC_SGE_TYPE_DATA); 1380 - sgl->word2 = cpu_to_le32(sgl->word2); 1381 - sgl->sge_len = cpu_to_le32(dma_len); 1382 1359 1383 - dma_offset += dma_len; 1384 - data_sg = sg_next(data_sg); 1385 - sgl++; 1360 + sgl->word2 = 0; 1361 + if ((num_bde + 1) == nseg) { 1362 + bf_set(lpfc_sli4_sge_last, sgl, 1); 1363 + bf_set(lpfc_sli4_sge_type, sgl, 1364 + LPFC_SGE_TYPE_DATA); 1365 + } else { 1366 + bf_set(lpfc_sli4_sge_last, sgl, 0); 1367 + 1368 + /* expand the segment */ 1369 + if (!lsp_just_set && 1370 + !((j + 1) % phba->border_sge_num) && 1371 + ((nseg - 1) != i)) { 1372 + /* set LSP type */ 1373 + bf_set(lpfc_sli4_sge_type, sgl, 1374 + LPFC_SGE_TYPE_LSP); 1375 + 1376 + sgl_xtra = lpfc_get_sgl_per_hdwq( 1377 + phba, lpfc_ncmd); 1378 + 1379 + if (unlikely(!sgl_xtra)) { 1380 + lpfc_ncmd->seg_cnt = 0; 1381 + return 1; 1382 + } 1383 + sgl->addr_lo = cpu_to_le32(putPaddrLow( 1384 + sgl_xtra->dma_phys_sgl)); 1385 + sgl->addr_hi = cpu_to_le32(putPaddrHigh( 1386 + sgl_xtra->dma_phys_sgl)); 1387 + 1388 + } else { 1389 + bf_set(lpfc_sli4_sge_type, sgl, 1390 + LPFC_SGE_TYPE_DATA); 1391 + } 1392 + } 1393 + 1394 + if (!(bf_get(lpfc_sli4_sge_type, sgl) & 1395 + LPFC_SGE_TYPE_LSP)) { 1396 + if ((nseg - 1) == i) 1397 + bf_set(lpfc_sli4_sge_last, sgl, 1); 1398 + 1399 + physaddr = data_sg->dma_address; 1400 + dma_len = data_sg->length; 1401 + sgl->addr_lo = cpu_to_le32( 1402 + putPaddrLow(physaddr)); 1403 + sgl->addr_hi = cpu_to_le32( 1404 + putPaddrHigh(physaddr)); 1405 + 1406 + bf_set(lpfc_sli4_sge_offset, sgl, dma_offset); 1407 + sgl->word2 = cpu_to_le32(sgl->word2); 1408 + sgl->sge_len = cpu_to_le32(dma_len); 1409 + 1410 + dma_offset += dma_len; 1411 + data_sg = sg_next(data_sg); 1412 + 1413 + sgl++; 1414 + 1415 + lsp_just_set = false; 1416 + } else { 1417 + sgl->word2 = cpu_to_le32(sgl->word2); 1418 + 1419 + sgl->sge_len = cpu_to_le32( 1420 + phba->cfg_sg_dma_buf_size); 1421 + 1422 + sgl = (struct sli4_sge *)sgl_xtra->dma_sgl; 1423 + i = i - 1; 1424 + 1425 + lsp_just_set = true; 1426 + } 1427 + 1428 + j++; 1386 1429 } 1387 1430 if (phba->cfg_enable_pbde) { 1388 1431 /* Use PBDE support for first SGL only, offset == 0 */ ··· 1537 1474 goto out_fail; 1538 1475 } 1539 1476 1540 - if (vport->load_flag & FC_UNLOADING) { 1477 + if (unlikely(vport->load_flag & FC_UNLOADING)) { 1541 1478 lpfc_printf_vlog(vport, KERN_INFO, LOG_NVME_IOERR, 1542 1479 "6124 Fail IO, Driver unload\n"); 1543 1480 atomic_inc(&lport->xmt_fcp_err); ··· 1568 1505 ndlp = rport->ndlp; 1569 1506 if (!ndlp || !NLP_CHK_NODE_ACT(ndlp)) { 1570 1507 lpfc_printf_vlog(vport, KERN_INFO, LOG_NODE | LOG_NVME_IOERR, 1571 - "6053 Fail IO, ndlp not ready: rport %p " 1572 - "ndlp %p, DID x%06x\n", 1508 + "6053 Busy IO, ndlp not ready: rport x%px " 1509 + "ndlp x%px, DID x%06x\n", 1573 1510 rport, ndlp, pnvme_rport->port_id); 1574 1511 atomic_inc(&lport->xmt_fcp_err); 1575 1512 ret = -EBUSY; ··· 1821 1758 /* Announce entry to new IO submit field. */ 1822 1759 lpfc_printf_vlog(vport, KERN_INFO, LOG_NVME_ABTS, 1823 1760 "6002 Abort Request to rport DID x%06x " 1824 - "for nvme_fc_req %p\n", 1761 + "for nvme_fc_req x%px\n", 1825 1762 pnvme_rport->port_id, 1826 1763 pnvme_fcreq); 1827 1764 ··· 1830 1767 */ 1831 1768 spin_lock_irqsave(&phba->hbalock, flags); 1832 1769 /* driver queued commands are in process of being flushed */ 1833 - if (phba->hba_flag & HBA_NVME_IOQ_FLUSH) { 1770 + if (phba->hba_flag & HBA_IOQ_FLUSH) { 1834 1771 spin_unlock_irqrestore(&phba->hbalock, flags); 1835 1772 lpfc_printf_vlog(vport, KERN_ERR, LOG_NVME_ABTS, 1836 1773 "6139 Driver in reset cleanup - flushing " ··· 1868 1805 if (lpfc_nbuf->nvmeCmd != pnvme_fcreq) { 1869 1806 lpfc_printf_vlog(vport, KERN_ERR, LOG_NVME_ABTS, 1870 1807 "6143 NVME req mismatch: " 1871 - "lpfc_nbuf %p nvmeCmd %p, " 1872 - "pnvme_fcreq %p. Skipping Abort xri x%x\n", 1808 + "lpfc_nbuf x%px nvmeCmd x%px, " 1809 + "pnvme_fcreq x%px. Skipping Abort xri x%x\n", 1873 1810 lpfc_nbuf, lpfc_nbuf->nvmeCmd, 1874 1811 pnvme_fcreq, nvmereq_wqe->sli4_xritag); 1875 1812 goto out_unlock; ··· 1878 1815 /* Don't abort IOs no longer on the pending queue. */ 1879 1816 if (!(nvmereq_wqe->iocb_flag & LPFC_IO_ON_TXCMPLQ)) { 1880 1817 lpfc_printf_vlog(vport, KERN_ERR, LOG_NVME_ABTS, 1881 - "6142 NVME IO req %p not queued - skipping " 1818 + "6142 NVME IO req x%px not queued - skipping " 1882 1819 "abort req xri x%x\n", 1883 1820 pnvme_fcreq, nvmereq_wqe->sli4_xritag); 1884 1821 goto out_unlock; ··· 1893 1830 if (nvmereq_wqe->iocb_flag & LPFC_DRIVER_ABORTED) { 1894 1831 lpfc_printf_vlog(vport, KERN_ERR, LOG_NVME_ABTS, 1895 1832 "6144 Outstanding NVME I/O Abort Request " 1896 - "still pending on nvme_fcreq %p, " 1897 - "lpfc_ncmd %p xri x%x\n", 1833 + "still pending on nvme_fcreq x%px, " 1834 + "lpfc_ncmd %px xri x%x\n", 1898 1835 pnvme_fcreq, lpfc_nbuf, 1899 1836 nvmereq_wqe->sli4_xritag); 1900 1837 goto out_unlock; ··· 1904 1841 if (!abts_buf) { 1905 1842 lpfc_printf_vlog(vport, KERN_ERR, LOG_NVME_ABTS, 1906 1843 "6136 No available abort wqes. Skipping " 1907 - "Abts req for nvme_fcreq %p xri x%x\n", 1844 + "Abts req for nvme_fcreq x%px xri x%x\n", 1908 1845 pnvme_fcreq, nvmereq_wqe->sli4_xritag); 1909 1846 goto out_unlock; 1910 1847 } ··· 1918 1855 /* WQEs are reused. Clear stale data and set key fields to 1919 1856 * zero like ia, iaab, iaar, xri_tag, and ctxt_tag. 1920 1857 */ 1921 - memset(abts_wqe, 0, sizeof(union lpfc_wqe)); 1858 + memset(abts_wqe, 0, sizeof(*abts_wqe)); 1922 1859 bf_set(abort_cmd_criteria, &abts_wqe->abort_cmd, T_XRI_TAG); 1923 1860 1924 1861 /* word 7 */ ··· 1955 1892 if (ret_val) { 1956 1893 lpfc_printf_vlog(vport, KERN_ERR, LOG_NVME_ABTS, 1957 1894 "6137 Failed abts issue_wqe with status x%x " 1958 - "for nvme_fcreq %p.\n", 1895 + "for nvme_fcreq x%px.\n", 1959 1896 ret_val, pnvme_fcreq); 1960 1897 lpfc_sli_release_iocbq(phba, abts_buf); 1961 1898 return; ··· 2045 1982 sgl->word2 = cpu_to_le32(sgl->word2); 2046 1983 /* Fill in word 3 / sgl_len during cmd submission */ 2047 1984 2048 - /* Initialize WQE */ 1985 + /* Initialize 64 bytes only */ 2049 1986 memset(wqe, 0, sizeof(union lpfc_wqe)); 2050 1987 2051 1988 if (lpfc_ndlp_check_qdepth(phba, ndlp)) { ··· 2091 2028 lpfc_ncmd->cur_iocbq.sli4_xritag, 2092 2029 lpfc_ncmd->cur_iocbq.iotag); 2093 2030 2094 - spin_lock_irqsave(&qp->abts_nvme_buf_list_lock, iflag); 2031 + spin_lock_irqsave(&qp->abts_io_buf_list_lock, iflag); 2095 2032 list_add_tail(&lpfc_ncmd->list, 2096 - &qp->lpfc_abts_nvme_buf_list); 2033 + &qp->lpfc_abts_io_buf_list); 2097 2034 qp->abts_nvme_io_bufs++; 2098 - spin_unlock_irqrestore(&qp->abts_nvme_buf_list_lock, iflag); 2035 + spin_unlock_irqrestore(&qp->abts_io_buf_list_lock, iflag); 2099 2036 } else 2100 2037 lpfc_release_io_buf(phba, (struct lpfc_io_buf *)lpfc_ncmd, qp); 2101 2038 } ··· 2158 2095 if (!ret) { 2159 2096 lpfc_printf_vlog(vport, KERN_INFO, LOG_NVME | LOG_NVME_DISC, 2160 2097 "6005 Successfully registered local " 2161 - "NVME port num %d, localP %p, private %p, " 2162 - "sg_seg %d\n", 2098 + "NVME port num %d, localP x%px, private " 2099 + "x%px, sg_seg %d\n", 2163 2100 localport->port_num, localport, 2164 2101 localport->private, 2165 2102 lpfc_nvme_template.max_sgl_segments); ··· 2220 2157 if (unlikely(!ret)) { 2221 2158 pending = 0; 2222 2159 for (i = 0; i < phba->cfg_hdw_queue; i++) { 2223 - pring = phba->sli4_hba.hdwq[i].nvme_wq->pring; 2160 + pring = phba->sli4_hba.hdwq[i].io_wq->pring; 2224 2161 if (!pring) 2225 2162 continue; 2226 2163 if (pring->txcmplq_cnt) 2227 2164 pending += pring->txcmplq_cnt; 2228 2165 } 2229 2166 lpfc_printf_vlog(vport, KERN_ERR, LOG_NVME_IOERR, 2230 - "6176 Lport %p Localport %p wait " 2167 + "6176 Lport x%px Localport x%px wait " 2231 2168 "timed out. Pending %d. Renewing.\n", 2232 2169 lport, vport->localport, pending); 2233 2170 continue; ··· 2235 2172 break; 2236 2173 } 2237 2174 lpfc_printf_vlog(vport, KERN_INFO, LOG_NVME_IOERR, 2238 - "6177 Lport %p Localport %p Complete Success\n", 2175 + "6177 Lport x%px Localport x%px Complete Success\n", 2239 2176 lport, vport->localport); 2240 2177 } 2241 2178 #endif ··· 2266 2203 lport = (struct lpfc_nvme_lport *)localport->private; 2267 2204 2268 2205 lpfc_printf_vlog(vport, KERN_INFO, LOG_NVME, 2269 - "6011 Destroying NVME localport %p\n", 2206 + "6011 Destroying NVME localport x%px\n", 2270 2207 localport); 2271 2208 2272 2209 /* lport's rport list is clear. Unregister ··· 2316 2253 lport = (struct lpfc_nvme_lport *)localport->private; 2317 2254 if (!lport) { 2318 2255 lpfc_printf_vlog(vport, KERN_WARNING, LOG_NVME, 2319 - "6171 Update NVME fail. localP %p, No lport\n", 2256 + "6171 Update NVME fail. localP x%px, No lport\n", 2320 2257 localport); 2321 2258 return; 2322 2259 } 2323 2260 lpfc_printf_vlog(vport, KERN_INFO, LOG_NVME, 2324 - "6012 Update NVME lport %p did x%x\n", 2261 + "6012 Update NVME lport x%px did x%x\n", 2325 2262 localport, vport->fc_myDID); 2326 2263 2327 2264 localport->port_id = vport->fc_myDID; ··· 2331 2268 localport->port_role = FC_PORT_ROLE_NVME_INITIATOR; 2332 2269 2333 2270 lpfc_printf_vlog(vport, KERN_INFO, LOG_NVME_DISC, 2334 - "6030 bound lport %p to DID x%06x\n", 2271 + "6030 bound lport x%px to DID x%06x\n", 2335 2272 lport, localport->port_id); 2336 2273 #endif 2337 2274 } ··· 2380 2317 2381 2318 spin_lock_irq(&vport->phba->hbalock); 2382 2319 oldrport = lpfc_ndlp_get_nrport(ndlp); 2383 - spin_unlock_irq(&vport->phba->hbalock); 2384 - if (!oldrport) 2320 + if (oldrport) { 2321 + prev_ndlp = oldrport->ndlp; 2322 + spin_unlock_irq(&vport->phba->hbalock); 2323 + } else { 2324 + spin_unlock_irq(&vport->phba->hbalock); 2385 2325 lpfc_nlp_get(ndlp); 2326 + } 2386 2327 2387 2328 ret = nvme_fc_register_remoteport(localport, &rpinfo, &remote_port); 2388 2329 if (!ret) { ··· 2405 2338 /* New remoteport record does not guarantee valid 2406 2339 * host private memory area. 2407 2340 */ 2408 - prev_ndlp = oldrport->ndlp; 2409 2341 if (oldrport == remote_port->private) { 2410 2342 /* Same remoteport - ndlp should match. 2411 2343 * Just reuse. 2412 2344 */ 2413 2345 lpfc_printf_vlog(ndlp->vport, KERN_INFO, 2414 2346 LOG_NVME_DISC, 2415 - "6014 Rebinding lport to " 2416 - "remoteport %p wwpn 0x%llx, " 2417 - "Data: x%x x%x %p %p x%x x%06x\n", 2347 + "6014 Rebind lport to current " 2348 + "remoteport x%px wwpn 0x%llx, " 2349 + "Data: x%x x%x x%px x%px x%x " 2350 + " x%06x\n", 2418 2351 remote_port, 2419 2352 remote_port->port_name, 2420 2353 remote_port->port_id, 2421 2354 remote_port->port_role, 2422 - prev_ndlp, 2355 + oldrport->ndlp, 2423 2356 ndlp, 2424 2357 ndlp->nlp_type, 2425 2358 ndlp->nlp_DID); 2426 - return 0; 2359 + 2360 + /* It's a complete rebind only if the driver 2361 + * is registering with the same ndlp. Otherwise 2362 + * the driver likely executed a node swap 2363 + * prior to this registration and the ndlp to 2364 + * remoteport binding needs to be redone. 2365 + */ 2366 + if (prev_ndlp == ndlp) 2367 + return 0; 2368 + 2427 2369 } 2428 2370 2429 2371 /* Sever the ndlp<->rport association ··· 2466 2390 spin_unlock_irq(&vport->phba->hbalock); 2467 2391 lpfc_printf_vlog(vport, KERN_INFO, 2468 2392 LOG_NVME_DISC | LOG_NODE, 2469 - "6022 Binding new rport to " 2470 - "lport %p Remoteport %p rport %p WWNN 0x%llx, " 2393 + "6022 Bind lport x%px to remoteport x%px " 2394 + "rport x%px WWNN 0x%llx, " 2471 2395 "Rport WWPN 0x%llx DID " 2472 - "x%06x Role x%x, ndlp %p prev_ndlp %p\n", 2396 + "x%06x Role x%x, ndlp %p prev_ndlp x%px\n", 2473 2397 lport, remote_port, rport, 2474 2398 rpinfo.node_name, rpinfo.port_name, 2475 2399 rpinfo.port_id, rpinfo.port_role, ··· 2499 2423 lpfc_nvme_rescan_port(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp) 2500 2424 { 2501 2425 #if (IS_ENABLED(CONFIG_NVME_FC)) 2502 - struct lpfc_nvme_rport *rport; 2503 - struct nvme_fc_remote_port *remoteport; 2426 + struct lpfc_nvme_rport *nrport; 2427 + struct nvme_fc_remote_port *remoteport = NULL; 2504 2428 2505 - rport = ndlp->nrport; 2429 + spin_lock_irq(&vport->phba->hbalock); 2430 + nrport = lpfc_ndlp_get_nrport(ndlp); 2431 + if (nrport) 2432 + remoteport = nrport->remoteport; 2433 + spin_unlock_irq(&vport->phba->hbalock); 2506 2434 2507 2435 lpfc_printf_vlog(vport, KERN_INFO, LOG_NVME_DISC, 2508 2436 "6170 Rescan NPort DID x%06x type x%x " 2509 - "state x%x rport %p\n", 2510 - ndlp->nlp_DID, ndlp->nlp_type, ndlp->nlp_state, rport); 2511 - if (!rport) 2512 - goto input_err; 2513 - remoteport = rport->remoteport; 2514 - if (!remoteport) 2515 - goto input_err; 2437 + "state x%x nrport x%px remoteport x%px\n", 2438 + ndlp->nlp_DID, ndlp->nlp_type, ndlp->nlp_state, 2439 + nrport, remoteport); 2440 + 2441 + if (!nrport || !remoteport) 2442 + goto rescan_exit; 2516 2443 2517 2444 /* Only rescan if we are an NVME target in the MAPPED state */ 2518 2445 if (remoteport->port_role & FC_PORT_ROLE_NVME_DISCOVERY && ··· 2528 2449 ndlp->nlp_DID, remoteport->port_state); 2529 2450 } 2530 2451 return; 2531 - input_err: 2532 - lpfc_printf_vlog(vport, KERN_ERR, LOG_NVME_DISC, 2533 - "6169 State error: lport %p, rport%p FCID x%06x\n", 2534 - vport->localport, ndlp->rport, ndlp->nlp_DID); 2452 + rescan_exit: 2453 + lpfc_printf_vlog(vport, KERN_INFO, LOG_NVME_DISC, 2454 + "6169 Skip NVME Rport Rescan, NVME remoteport " 2455 + "unregistered\n"); 2535 2456 #endif 2536 2457 } 2537 2458 ··· 2578 2499 goto input_err; 2579 2500 2580 2501 lpfc_printf_vlog(vport, KERN_INFO, LOG_NVME_DISC, 2581 - "6033 Unreg nvme remoteport %p, portname x%llx, " 2502 + "6033 Unreg nvme remoteport x%px, portname x%llx, " 2582 2503 "port_id x%06x, portstate x%x port type x%x\n", 2583 2504 remoteport, remoteport->port_name, 2584 2505 remoteport->port_id, remoteport->port_state, ··· 2616 2537 input_err: 2617 2538 #endif 2618 2539 lpfc_printf_vlog(vport, KERN_ERR, LOG_NVME_DISC, 2619 - "6168 State error: lport %p, rport%p FCID x%06x\n", 2540 + "6168 State error: lport x%px, rport x%px FCID x%06x\n", 2620 2541 vport->localport, ndlp->rport, ndlp->nlp_DID); 2621 2542 } 2622 2543 ··· 2624 2545 * lpfc_sli4_nvme_xri_aborted - Fast-path process of NVME xri abort 2625 2546 * @phba: pointer to lpfc hba data structure. 2626 2547 * @axri: pointer to the fcp xri abort wcqe structure. 2548 + * @lpfc_ncmd: The nvme job structure for the request being aborted. 2627 2549 * 2628 2550 * This routine is invoked by the worker thread to process a SLI4 fast-path 2629 2551 * NVME aborted xri. Aborted NVME IO commands are completed to the transport ··· 2632 2552 **/ 2633 2553 void 2634 2554 lpfc_sli4_nvme_xri_aborted(struct lpfc_hba *phba, 2635 - struct sli4_wcqe_xri_aborted *axri, int idx) 2555 + struct sli4_wcqe_xri_aborted *axri, 2556 + struct lpfc_io_buf *lpfc_ncmd) 2636 2557 { 2637 2558 uint16_t xri = bf_get(lpfc_wcqe_xa_xri, axri); 2638 - struct lpfc_io_buf *lpfc_ncmd, *next_lpfc_ncmd; 2639 2559 struct nvmefc_fcp_req *nvme_cmd = NULL; 2640 - struct lpfc_nodelist *ndlp; 2641 - struct lpfc_sli4_hdw_queue *qp; 2642 - unsigned long iflag = 0; 2560 + struct lpfc_nodelist *ndlp = lpfc_ncmd->ndlp; 2643 2561 2644 - if (!(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)) 2645 - return; 2646 - qp = &phba->sli4_hba.hdwq[idx]; 2647 - spin_lock_irqsave(&phba->hbalock, iflag); 2648 - spin_lock(&qp->abts_nvme_buf_list_lock); 2649 - list_for_each_entry_safe(lpfc_ncmd, next_lpfc_ncmd, 2650 - &qp->lpfc_abts_nvme_buf_list, list) { 2651 - if (lpfc_ncmd->cur_iocbq.sli4_xritag == xri) { 2652 - list_del_init(&lpfc_ncmd->list); 2653 - qp->abts_nvme_io_bufs--; 2654 - lpfc_ncmd->flags &= ~LPFC_SBUF_XBUSY; 2655 - lpfc_ncmd->status = IOSTAT_SUCCESS; 2656 - spin_unlock(&qp->abts_nvme_buf_list_lock); 2657 2562 2658 - spin_unlock_irqrestore(&phba->hbalock, iflag); 2659 - ndlp = lpfc_ncmd->ndlp; 2660 - if (ndlp) 2661 - lpfc_sli4_abts_err_handler(phba, ndlp, axri); 2662 - 2663 - lpfc_printf_log(phba, KERN_INFO, LOG_NVME_ABTS, 2664 - "6311 nvme_cmd %p xri x%x tag x%x " 2665 - "abort complete and xri released\n", 2666 - lpfc_ncmd->nvmeCmd, xri, 2667 - lpfc_ncmd->cur_iocbq.iotag); 2668 - 2669 - /* Aborted NVME commands are required to not complete 2670 - * before the abort exchange command fully completes. 2671 - * Once completed, it is available via the put list. 2672 - */ 2673 - if (lpfc_ncmd->nvmeCmd) { 2674 - nvme_cmd = lpfc_ncmd->nvmeCmd; 2675 - nvme_cmd->done(nvme_cmd); 2676 - lpfc_ncmd->nvmeCmd = NULL; 2677 - } 2678 - lpfc_release_nvme_buf(phba, lpfc_ncmd); 2679 - return; 2680 - } 2681 - } 2682 - spin_unlock(&qp->abts_nvme_buf_list_lock); 2683 - spin_unlock_irqrestore(&phba->hbalock, iflag); 2563 + if (ndlp) 2564 + lpfc_sli4_abts_err_handler(phba, ndlp, axri); 2684 2565 2685 2566 lpfc_printf_log(phba, KERN_INFO, LOG_NVME_ABTS, 2686 - "6312 XRI Aborted xri x%x not found\n", xri); 2567 + "6311 nvme_cmd %p xri x%x tag x%x abort complete and " 2568 + "xri released\n", 2569 + lpfc_ncmd->nvmeCmd, xri, 2570 + lpfc_ncmd->cur_iocbq.iotag); 2687 2571 2572 + /* Aborted NVME commands are required to not complete 2573 + * before the abort exchange command fully completes. 2574 + * Once completed, it is available via the put list. 2575 + */ 2576 + if (lpfc_ncmd->nvmeCmd) { 2577 + nvme_cmd = lpfc_ncmd->nvmeCmd; 2578 + nvme_cmd->done(nvme_cmd); 2579 + lpfc_ncmd->nvmeCmd = NULL; 2580 + } 2581 + lpfc_release_nvme_buf(phba, lpfc_ncmd); 2688 2582 } 2689 2583 2690 2584 /** ··· 2680 2626 if (phba->sli_rev < LPFC_SLI_REV4 || !phba->sli4_hba.hdwq) 2681 2627 return; 2682 2628 2683 - /* Cycle through all NVME rings and make sure all outstanding 2629 + /* Cycle through all IO rings and make sure all outstanding 2684 2630 * WQEs have been removed from the txcmplqs. 2685 2631 */ 2686 2632 for (i = 0; i < phba->cfg_hdw_queue; i++) { 2687 - if (!phba->sli4_hba.hdwq[i].nvme_wq) 2633 + if (!phba->sli4_hba.hdwq[i].io_wq) 2688 2634 continue; 2689 - pring = phba->sli4_hba.hdwq[i].nvme_wq->pring; 2635 + pring = phba->sli4_hba.hdwq[i].io_wq->pring; 2690 2636 2691 2637 if (!pring) 2692 2638 continue; ··· 2706 2652 } 2707 2653 } 2708 2654 } 2655 + } 2656 + 2657 + void 2658 + lpfc_nvme_cancel_iocb(struct lpfc_hba *phba, struct lpfc_iocbq *pwqeIn) 2659 + { 2660 + #if (IS_ENABLED(CONFIG_NVME_FC)) 2661 + struct lpfc_io_buf *lpfc_ncmd; 2662 + struct nvmefc_fcp_req *nCmd; 2663 + struct lpfc_nvme_fcpreq_priv *freqpriv; 2664 + 2665 + if (!pwqeIn->context1) { 2666 + lpfc_sli_release_iocbq(phba, pwqeIn); 2667 + return; 2668 + } 2669 + /* For abort iocb just return, IO iocb will do a done call */ 2670 + if (bf_get(wqe_cmnd, &pwqeIn->wqe.gen_req.wqe_com) == 2671 + CMD_ABORT_XRI_CX) { 2672 + lpfc_sli_release_iocbq(phba, pwqeIn); 2673 + return; 2674 + } 2675 + lpfc_ncmd = (struct lpfc_io_buf *)pwqeIn->context1; 2676 + 2677 + spin_lock(&lpfc_ncmd->buf_lock); 2678 + if (!lpfc_ncmd->nvmeCmd) { 2679 + spin_unlock(&lpfc_ncmd->buf_lock); 2680 + lpfc_release_nvme_buf(phba, lpfc_ncmd); 2681 + return; 2682 + } 2683 + 2684 + nCmd = lpfc_ncmd->nvmeCmd; 2685 + lpfc_printf_log(phba, KERN_INFO, LOG_NVME_IOERR, 2686 + "6194 NVME Cancel xri %x\n", 2687 + lpfc_ncmd->cur_iocbq.sli4_xritag); 2688 + 2689 + nCmd->transferred_length = 0; 2690 + nCmd->rcv_rsplen = 0; 2691 + nCmd->status = NVME_SC_INTERNAL; 2692 + freqpriv = nCmd->private; 2693 + freqpriv->nvme_buf = NULL; 2694 + lpfc_ncmd->nvmeCmd = NULL; 2695 + 2696 + spin_unlock(&lpfc_ncmd->buf_lock); 2697 + nCmd->done(nCmd); 2698 + 2699 + /* Call release with XB=1 to queue the IO into the abort list. */ 2700 + lpfc_release_nvme_buf(phba, lpfc_ncmd); 2701 + #endif 2709 2702 }
+12 -16
drivers/scsi/lpfc/lpfc_nvmet.c
··· 1026 1026 * WQE release CQE 1027 1027 */ 1028 1028 ctxp->flag |= LPFC_NVMET_DEFER_WQFULL; 1029 - wq = ctxp->hdwq->nvme_wq; 1029 + wq = ctxp->hdwq->io_wq; 1030 1030 pring = wq->pring; 1031 1031 spin_lock_irqsave(&pring->ring_lock, iflags); 1032 1032 list_add_tail(&nvmewqeq->list, &wq->wqfull_list); ··· 1104 1104 spin_unlock_irqrestore(&ctxp->ctxlock, flags); 1105 1105 lpfc_nvmet_unsol_fcp_issue_abort(phba, ctxp, ctxp->sid, 1106 1106 ctxp->oxid); 1107 - wq = ctxp->hdwq->nvme_wq; 1107 + wq = ctxp->hdwq->io_wq; 1108 1108 lpfc_nvmet_wqfull_flush(phba, wq, ctxp); 1109 1109 return; 1110 1110 } ··· 1437 1437 infop = lpfc_get_ctx_list(phba, i, j); 1438 1438 lpfc_printf_log(phba, KERN_INFO, LOG_NVME | LOG_INIT, 1439 1439 "6408 TOTAL NVMET ctx for CPU %d " 1440 - "MRQ %d: cnt %d nextcpu %p\n", 1440 + "MRQ %d: cnt %d nextcpu x%px\n", 1441 1441 i, j, infop->nvmet_ctx_list_cnt, 1442 1442 infop->nvmet_ctx_next_cpu); 1443 1443 } ··· 1500 1500 1501 1501 lpfc_printf_log(phba, KERN_INFO, LOG_NVME_DISC, 1502 1502 "6026 Registered NVME " 1503 - "targetport: %p, private %p " 1503 + "targetport: x%px, private x%px " 1504 1504 "portnm %llx nodenm %llx segs %d qs %d\n", 1505 1505 phba->targetport, tgtp, 1506 1506 pinfo.port_name, pinfo.node_name, ··· 1555 1555 return 0; 1556 1556 1557 1557 lpfc_printf_vlog(vport, KERN_INFO, LOG_NVME, 1558 - "6007 Update NVMET port %p did x%x\n", 1558 + "6007 Update NVMET port x%px did x%x\n", 1559 1559 phba->targetport, vport->fc_myDID); 1560 1560 1561 1561 phba->targetport->port_id = vport->fc_myDID; ··· 1790 1790 lpfc_nvmet_defer_release(phba, ctxp); 1791 1791 spin_unlock_irqrestore(&ctxp->ctxlock, iflag); 1792 1792 } 1793 - if (ctxp->state == LPFC_NVMET_STE_RCV) 1794 - lpfc_nvmet_unsol_fcp_issue_abort(phba, ctxp, ctxp->sid, 1795 - ctxp->oxid); 1796 - else 1797 - lpfc_nvmet_sol_fcp_issue_abort(phba, ctxp, ctxp->sid, 1798 - ctxp->oxid); 1793 + lpfc_nvmet_sol_fcp_issue_abort(phba, ctxp, ctxp->sid, 1794 + ctxp->oxid); 1799 1795 1800 1796 lpfc_sli4_seq_abort_rsp(vport, fc_hdr, 1); 1801 1797 return 0; ··· 1918 1922 if (phba->targetport) { 1919 1923 tgtp = (struct lpfc_nvmet_tgtport *)phba->targetport->private; 1920 1924 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) { 1921 - wq = phba->sli4_hba.hdwq[qidx].nvme_wq; 1925 + wq = phba->sli4_hba.hdwq[qidx].io_wq; 1922 1926 lpfc_nvmet_wqfull_flush(phba, wq, NULL); 1923 1927 } 1924 1928 tgtp->tport_unreg_cmp = &tport_unreg_cmp; ··· 1926 1930 if (!wait_for_completion_timeout(tgtp->tport_unreg_cmp, 1927 1931 msecs_to_jiffies(LPFC_NVMET_WAIT_TMO))) 1928 1932 lpfc_printf_log(phba, KERN_ERR, LOG_NVME, 1929 - "6179 Unreg targetport %p timeout " 1933 + "6179 Unreg targetport x%px timeout " 1930 1934 "reached.\n", phba->targetport); 1931 1935 lpfc_nvmet_cleanup_io_context(phba); 1932 1936 } ··· 3109 3113 atomic_inc(&tgtp->xmt_ls_abort_cmpl); 3110 3114 3111 3115 lpfc_printf_log(phba, KERN_INFO, LOG_NVME_ABTS, 3112 - "6083 Abort cmpl: ctx %p WCQE:%08x %08x %08x %08x\n", 3116 + "6083 Abort cmpl: ctx x%px WCQE:%08x %08x %08x %08x\n", 3113 3117 ctxp, wcqe->word0, wcqe->total_data_placed, 3114 3118 result, wcqe->word3); 3115 3119 ··· 3295 3299 */ 3296 3300 spin_lock_irqsave(&phba->hbalock, flags); 3297 3301 /* driver queued commands are in process of being flushed */ 3298 - if (phba->hba_flag & HBA_NVME_IOQ_FLUSH) { 3302 + if (phba->hba_flag & HBA_IOQ_FLUSH) { 3299 3303 spin_unlock_irqrestore(&phba->hbalock, flags); 3300 3304 atomic_inc(&tgtp->xmt_abort_rsp_error); 3301 3305 lpfc_printf_log(phba, KERN_ERR, LOG_NVME, ··· 3330 3334 /* WQEs are reused. Clear stale data and set key fields to 3331 3335 * zero like ia, iaab, iaar, xri_tag, and ctxt_tag. 3332 3336 */ 3333 - memset(abts_wqe, 0, sizeof(union lpfc_wqe)); 3337 + memset(abts_wqe, 0, sizeof(*abts_wqe)); 3334 3338 3335 3339 /* word 3 */ 3336 3340 bf_set(abort_cmd_criteria, &abts_wqe->abort_cmd, T_XRI_TAG);
+383 -216
drivers/scsi/lpfc/lpfc_scsi.c
··· 53 53 #define LPFC_RESET_WAIT 2 54 54 #define LPFC_ABORT_WAIT 2 55 55 56 - int _dump_buf_done = 1; 57 - 58 56 static char *dif_op_str[] = { 59 57 "PROT_NORMAL", 60 58 "PROT_READ_INSERT", ··· 86 88 lpfc_release_scsi_buf_s3(struct lpfc_hba *phba, struct lpfc_io_buf *psb); 87 89 static int 88 90 lpfc_prot_group_type(struct lpfc_hba *phba, struct scsi_cmnd *sc); 89 - 90 - static void 91 - lpfc_debug_save_data(struct lpfc_hba *phba, struct scsi_cmnd *cmnd) 92 - { 93 - void *src, *dst; 94 - struct scatterlist *sgde = scsi_sglist(cmnd); 95 - 96 - if (!_dump_buf_data) { 97 - lpfc_printf_log(phba, KERN_ERR, LOG_BG, 98 - "9050 BLKGRD: ERROR %s _dump_buf_data is NULL\n", 99 - __func__); 100 - return; 101 - } 102 - 103 - 104 - if (!sgde) { 105 - lpfc_printf_log(phba, KERN_ERR, LOG_BG, 106 - "9051 BLKGRD: ERROR: data scatterlist is null\n"); 107 - return; 108 - } 109 - 110 - dst = (void *) _dump_buf_data; 111 - while (sgde) { 112 - src = sg_virt(sgde); 113 - memcpy(dst, src, sgde->length); 114 - dst += sgde->length; 115 - sgde = sg_next(sgde); 116 - } 117 - } 118 - 119 - static void 120 - lpfc_debug_save_dif(struct lpfc_hba *phba, struct scsi_cmnd *cmnd) 121 - { 122 - void *src, *dst; 123 - struct scatterlist *sgde = scsi_prot_sglist(cmnd); 124 - 125 - if (!_dump_buf_dif) { 126 - lpfc_printf_log(phba, KERN_ERR, LOG_BG, 127 - "9052 BLKGRD: ERROR %s _dump_buf_data is NULL\n", 128 - __func__); 129 - return; 130 - } 131 - 132 - if (!sgde) { 133 - lpfc_printf_log(phba, KERN_ERR, LOG_BG, 134 - "9053 BLKGRD: ERROR: prot scatterlist is null\n"); 135 - return; 136 - } 137 - 138 - dst = _dump_buf_dif; 139 - while (sgde) { 140 - src = sg_virt(sgde); 141 - memcpy(dst, src, sgde->length); 142 - dst += sgde->length; 143 - sgde = sg_next(sgde); 144 - } 145 - } 146 91 147 92 static inline unsigned 148 93 lpfc_cmd_blksize(struct scsi_cmnd *sc) ··· 478 537 for (idx = 0; idx < phba->cfg_hdw_queue; idx++) { 479 538 qp = &phba->sli4_hba.hdwq[idx]; 480 539 481 - spin_lock(&qp->abts_scsi_buf_list_lock); 540 + spin_lock(&qp->abts_io_buf_list_lock); 482 541 list_for_each_entry_safe(psb, next_psb, 483 - &qp->lpfc_abts_scsi_buf_list, list) { 542 + &qp->lpfc_abts_io_buf_list, list) { 543 + if (psb->cur_iocbq.iocb_flag == LPFC_IO_NVME) 544 + continue; 545 + 484 546 if (psb->rdata && psb->rdata->pnode && 485 547 psb->rdata->pnode->vport == vport) 486 548 psb->rdata = NULL; 487 549 } 488 - spin_unlock(&qp->abts_scsi_buf_list_lock); 550 + spin_unlock(&qp->abts_io_buf_list_lock); 489 551 } 490 552 spin_unlock_irqrestore(&phba->hbalock, iflag); 491 553 } 492 554 493 555 /** 494 - * lpfc_sli4_fcp_xri_aborted - Fast-path process of fcp xri abort 556 + * lpfc_sli4_io_xri_aborted - Fast-path process of fcp xri abort 495 557 * @phba: pointer to lpfc hba data structure. 496 558 * @axri: pointer to the fcp xri abort wcqe structure. 497 559 * 498 560 * This routine is invoked by the worker thread to process a SLI4 fast-path 499 - * FCP aborted xri. 561 + * FCP or NVME aborted xri. 500 562 **/ 501 563 void 502 - lpfc_sli4_fcp_xri_aborted(struct lpfc_hba *phba, 503 - struct sli4_wcqe_xri_aborted *axri, int idx) 564 + lpfc_sli4_io_xri_aborted(struct lpfc_hba *phba, 565 + struct sli4_wcqe_xri_aborted *axri, int idx) 504 566 { 505 567 uint16_t xri = bf_get(lpfc_wcqe_xa_xri, axri); 506 568 uint16_t rxid = bf_get(lpfc_wcqe_xa_remote_xid, axri); ··· 521 577 522 578 qp = &phba->sli4_hba.hdwq[idx]; 523 579 spin_lock_irqsave(&phba->hbalock, iflag); 524 - spin_lock(&qp->abts_scsi_buf_list_lock); 580 + spin_lock(&qp->abts_io_buf_list_lock); 525 581 list_for_each_entry_safe(psb, next_psb, 526 - &qp->lpfc_abts_scsi_buf_list, list) { 582 + &qp->lpfc_abts_io_buf_list, list) { 527 583 if (psb->cur_iocbq.sli4_xritag == xri) { 528 - list_del(&psb->list); 529 - qp->abts_scsi_io_bufs--; 584 + list_del_init(&psb->list); 530 585 psb->exch_busy = 0; 531 586 psb->status = IOSTAT_SUCCESS; 532 - spin_unlock( 533 - &qp->abts_scsi_buf_list_lock); 587 + #ifdef BUILD_NVME 588 + if (psb->cur_iocbq.iocb_flag == LPFC_IO_NVME) { 589 + qp->abts_nvme_io_bufs--; 590 + spin_unlock(&qp->abts_io_buf_list_lock); 591 + spin_unlock_irqrestore(&phba->hbalock, iflag); 592 + lpfc_sli4_nvme_xri_aborted(phba, axri, psb); 593 + return; 594 + } 595 + #endif 596 + qp->abts_scsi_io_bufs--; 597 + spin_unlock(&qp->abts_io_buf_list_lock); 598 + 534 599 if (psb->rdata && psb->rdata->pnode) 535 600 ndlp = psb->rdata->pnode; 536 601 else ··· 558 605 return; 559 606 } 560 607 } 561 - spin_unlock(&qp->abts_scsi_buf_list_lock); 608 + spin_unlock(&qp->abts_io_buf_list_lock); 562 609 for (i = 1; i <= phba->sli.last_iotag; i++) { 563 610 iocbq = phba->sli.iocbq_lookup[i]; 564 611 565 - if (!(iocbq->iocb_flag & LPFC_IO_FCP) || 566 - (iocbq->iocb_flag & LPFC_IO_LIBDFC)) 612 + if (!(iocbq->iocb_flag & LPFC_IO_FCP) || 613 + (iocbq->iocb_flag & LPFC_IO_LIBDFC)) 567 614 continue; 568 615 if (iocbq->sli4_xritag != xri) 569 616 continue; ··· 638 685 IOCB_t *iocb; 639 686 dma_addr_t pdma_phys_fcp_rsp; 640 687 dma_addr_t pdma_phys_fcp_cmd; 641 - uint32_t sgl_size, cpu, idx; 688 + uint32_t cpu, idx; 642 689 int tag; 690 + struct fcp_cmd_rsp_buf *tmp = NULL; 643 691 644 692 cpu = raw_smp_processor_id(); 645 693 if (cmnd && phba->cfg_fcp_io_sched == LPFC_FCP_SCHED_BY_HDWQ) { ··· 658 704 return NULL; 659 705 } 660 706 661 - sgl_size = phba->cfg_sg_dma_buf_size - 662 - (sizeof(struct fcp_cmnd) + sizeof(struct fcp_rsp)); 663 - 664 707 /* Setup key fields in buffer that may have been changed 665 708 * if other protocols used this buffer. 666 709 */ ··· 672 721 #ifdef CONFIG_SCSI_LPFC_DEBUG_FS 673 722 lpfc_cmd->prot_data_type = 0; 674 723 #endif 675 - lpfc_cmd->fcp_cmnd = (lpfc_cmd->data + sgl_size); 676 - lpfc_cmd->fcp_rsp = (struct fcp_rsp *)((uint8_t *)lpfc_cmd->fcp_cmnd + 677 - sizeof(struct fcp_cmnd)); 724 + tmp = lpfc_get_cmd_rsp_buf_per_hdwq(phba, lpfc_cmd); 725 + if (!tmp) 726 + return NULL; 727 + 728 + lpfc_cmd->fcp_cmnd = tmp->fcp_cmnd; 729 + lpfc_cmd->fcp_rsp = tmp->fcp_rsp; 678 730 679 731 /* 680 732 * The first two SGEs are the FCP_CMD and FCP_RSP. ··· 685 731 * first two and leave the rest for queuecommand. 686 732 */ 687 733 sgl = (struct sli4_sge *)lpfc_cmd->dma_sgl; 688 - pdma_phys_fcp_cmd = (lpfc_cmd->dma_handle + sgl_size); 734 + pdma_phys_fcp_cmd = tmp->fcp_cmd_rsp_dma_handle; 689 735 sgl->addr_hi = cpu_to_le32(putPaddrHigh(pdma_phys_fcp_cmd)); 690 736 sgl->addr_lo = cpu_to_le32(putPaddrLow(pdma_phys_fcp_cmd)); 691 737 sgl->word2 = le32_to_cpu(sgl->word2); ··· 789 835 790 836 qp = psb->hdwq; 791 837 if (psb->exch_busy) { 792 - spin_lock_irqsave(&qp->abts_scsi_buf_list_lock, iflag); 838 + spin_lock_irqsave(&qp->abts_io_buf_list_lock, iflag); 793 839 psb->pCmd = NULL; 794 - list_add_tail(&psb->list, &qp->lpfc_abts_scsi_buf_list); 840 + list_add_tail(&psb->list, &qp->lpfc_abts_io_buf_list); 795 841 qp->abts_scsi_io_bufs++; 796 - spin_unlock_irqrestore(&qp->abts_scsi_buf_list_lock, iflag); 842 + spin_unlock_irqrestore(&qp->abts_io_buf_list_lock, iflag); 797 843 } else { 798 844 lpfc_release_io_buf(phba, (struct lpfc_io_buf *)psb, qp); 799 845 } ··· 872 918 "dma_map_sg. Config %d, seg_cnt %d\n", 873 919 __func__, phba->cfg_sg_seg_cnt, 874 920 lpfc_cmd->seg_cnt); 921 + WARN_ON_ONCE(lpfc_cmd->seg_cnt > phba->cfg_sg_seg_cnt); 875 922 lpfc_cmd->seg_cnt = 0; 876 923 scsi_dma_unmap(scsi_cmnd); 877 - return 1; 924 + return 2; 878 925 } 879 926 880 927 /* ··· 1729 1774 1730 1775 if (!sgpe || !sgde) { 1731 1776 lpfc_printf_log(phba, KERN_ERR, LOG_FCP, 1732 - "9020 Invalid s/g entry: data=0x%p prot=0x%p\n", 1777 + "9020 Invalid s/g entry: data=x%px prot=x%px\n", 1733 1778 sgpe, sgde); 1734 1779 return 0; 1735 1780 } ··· 1944 1989 **/ 1945 1990 static int 1946 1991 lpfc_bg_setup_sgl(struct lpfc_hba *phba, struct scsi_cmnd *sc, 1947 - struct sli4_sge *sgl, int datasegcnt) 1992 + struct sli4_sge *sgl, int datasegcnt, 1993 + struct lpfc_io_buf *lpfc_cmd) 1948 1994 { 1949 1995 struct scatterlist *sgde = NULL; /* s/g data entry */ 1950 1996 struct sli4_sge_diseed *diseed = NULL; ··· 1959 2003 uint32_t checking = 1; 1960 2004 uint32_t dma_len; 1961 2005 uint32_t dma_offset = 0; 2006 + struct sli4_hybrid_sgl *sgl_xtra = NULL; 2007 + int j; 2008 + bool lsp_just_set = false; 1962 2009 1963 2010 status = lpfc_sc_to_bg_opcodes(phba, sc, &txop, &rxop); 1964 2011 if (status) ··· 2021 2062 sgl++; 2022 2063 2023 2064 /* assumption: caller has already run dma_map_sg on command data */ 2024 - scsi_for_each_sg(sc, sgde, datasegcnt, i) { 2025 - physaddr = sg_dma_address(sgde); 2026 - dma_len = sg_dma_len(sgde); 2027 - sgl->addr_lo = cpu_to_le32(putPaddrLow(physaddr)); 2028 - sgl->addr_hi = cpu_to_le32(putPaddrHigh(physaddr)); 2029 - if ((i + 1) == datasegcnt) 2030 - bf_set(lpfc_sli4_sge_last, sgl, 1); 2031 - else 2032 - bf_set(lpfc_sli4_sge_last, sgl, 0); 2033 - bf_set(lpfc_sli4_sge_offset, sgl, dma_offset); 2034 - bf_set(lpfc_sli4_sge_type, sgl, LPFC_SGE_TYPE_DATA); 2065 + sgde = scsi_sglist(sc); 2066 + j = 3; 2067 + for (i = 0; i < datasegcnt; i++) { 2068 + /* clear it */ 2069 + sgl->word2 = 0; 2035 2070 2036 - sgl->sge_len = cpu_to_le32(dma_len); 2037 - dma_offset += dma_len; 2071 + /* do we need to expand the segment */ 2072 + if (!lsp_just_set && !((j + 1) % phba->border_sge_num) && 2073 + ((datasegcnt - 1) != i)) { 2074 + /* set LSP type */ 2075 + bf_set(lpfc_sli4_sge_type, sgl, LPFC_SGE_TYPE_LSP); 2038 2076 2039 - sgl++; 2040 - num_sge++; 2077 + sgl_xtra = lpfc_get_sgl_per_hdwq(phba, lpfc_cmd); 2078 + 2079 + if (unlikely(!sgl_xtra)) { 2080 + lpfc_cmd->seg_cnt = 0; 2081 + return 0; 2082 + } 2083 + sgl->addr_lo = cpu_to_le32(putPaddrLow( 2084 + sgl_xtra->dma_phys_sgl)); 2085 + sgl->addr_hi = cpu_to_le32(putPaddrHigh( 2086 + sgl_xtra->dma_phys_sgl)); 2087 + 2088 + } else { 2089 + bf_set(lpfc_sli4_sge_type, sgl, LPFC_SGE_TYPE_DATA); 2090 + } 2091 + 2092 + if (!(bf_get(lpfc_sli4_sge_type, sgl) & LPFC_SGE_TYPE_LSP)) { 2093 + if ((datasegcnt - 1) == i) 2094 + bf_set(lpfc_sli4_sge_last, sgl, 1); 2095 + physaddr = sg_dma_address(sgde); 2096 + dma_len = sg_dma_len(sgde); 2097 + sgl->addr_lo = cpu_to_le32(putPaddrLow(physaddr)); 2098 + sgl->addr_hi = cpu_to_le32(putPaddrHigh(physaddr)); 2099 + 2100 + bf_set(lpfc_sli4_sge_offset, sgl, dma_offset); 2101 + sgl->word2 = cpu_to_le32(sgl->word2); 2102 + sgl->sge_len = cpu_to_le32(dma_len); 2103 + 2104 + dma_offset += dma_len; 2105 + sgde = sg_next(sgde); 2106 + 2107 + sgl++; 2108 + num_sge++; 2109 + lsp_just_set = false; 2110 + 2111 + } else { 2112 + sgl->word2 = cpu_to_le32(sgl->word2); 2113 + sgl->sge_len = cpu_to_le32(phba->cfg_sg_dma_buf_size); 2114 + 2115 + sgl = (struct sli4_sge *)sgl_xtra->dma_sgl; 2116 + i = i - 1; 2117 + 2118 + lsp_just_set = true; 2119 + } 2120 + 2121 + j++; 2122 + 2041 2123 } 2042 2124 2043 2125 out: ··· 2124 2124 **/ 2125 2125 static int 2126 2126 lpfc_bg_setup_sgl_prot(struct lpfc_hba *phba, struct scsi_cmnd *sc, 2127 - struct sli4_sge *sgl, int datacnt, int protcnt) 2127 + struct sli4_sge *sgl, int datacnt, int protcnt, 2128 + struct lpfc_io_buf *lpfc_cmd) 2128 2129 { 2129 2130 struct scatterlist *sgde = NULL; /* s/g data entry */ 2130 2131 struct scatterlist *sgpe = NULL; /* s/g prot entry */ ··· 2147 2146 #endif 2148 2147 uint32_t checking = 1; 2149 2148 uint32_t dma_offset = 0; 2150 - int num_sge = 0; 2149 + int num_sge = 0, j = 2; 2150 + struct sli4_hybrid_sgl *sgl_xtra = NULL; 2151 2151 2152 2152 sgpe = scsi_prot_sglist(sc); 2153 2153 sgde = scsi_sglist(sc); 2154 2154 2155 2155 if (!sgpe || !sgde) { 2156 2156 lpfc_printf_log(phba, KERN_ERR, LOG_FCP, 2157 - "9082 Invalid s/g entry: data=0x%p prot=0x%p\n", 2157 + "9082 Invalid s/g entry: data=x%px prot=x%px\n", 2158 2158 sgpe, sgde); 2159 2159 return 0; 2160 2160 } ··· 2181 2179 split_offset = 0; 2182 2180 do { 2183 2181 /* Check to see if we ran out of space */ 2184 - if (num_sge >= (phba->cfg_total_seg_cnt - 2)) 2182 + if ((num_sge >= (phba->cfg_total_seg_cnt - 2)) && 2183 + !(phba->cfg_xpsgl)) 2185 2184 return num_sge + 3; 2185 + 2186 + /* DISEED and DIF have to be together */ 2187 + if (!((j + 1) % phba->border_sge_num) || 2188 + !((j + 2) % phba->border_sge_num) || 2189 + !((j + 3) % phba->border_sge_num)) { 2190 + sgl->word2 = 0; 2191 + 2192 + /* set LSP type */ 2193 + bf_set(lpfc_sli4_sge_type, sgl, LPFC_SGE_TYPE_LSP); 2194 + 2195 + sgl_xtra = lpfc_get_sgl_per_hdwq(phba, lpfc_cmd); 2196 + 2197 + if (unlikely(!sgl_xtra)) { 2198 + goto out; 2199 + } else { 2200 + sgl->addr_lo = cpu_to_le32(putPaddrLow( 2201 + sgl_xtra->dma_phys_sgl)); 2202 + sgl->addr_hi = cpu_to_le32(putPaddrHigh( 2203 + sgl_xtra->dma_phys_sgl)); 2204 + } 2205 + 2206 + sgl->word2 = cpu_to_le32(sgl->word2); 2207 + sgl->sge_len = cpu_to_le32(phba->cfg_sg_dma_buf_size); 2208 + 2209 + sgl = (struct sli4_sge *)sgl_xtra->dma_sgl; 2210 + j = 0; 2211 + } 2186 2212 2187 2213 /* setup DISEED with what we have */ 2188 2214 diseed = (struct sli4_sge_diseed *) sgl; ··· 2258 2228 2259 2229 /* advance sgl and increment bde count */ 2260 2230 num_sge++; 2231 + 2261 2232 sgl++; 2233 + j++; 2262 2234 2263 2235 /* setup the first BDE that points to protection buffer */ 2264 2236 protphysaddr = sg_dma_address(sgpe) + protgroup_offset; ··· 2275 2243 sgl->addr_hi = le32_to_cpu(putPaddrHigh(protphysaddr)); 2276 2244 sgl->addr_lo = le32_to_cpu(putPaddrLow(protphysaddr)); 2277 2245 sgl->word2 = cpu_to_le32(sgl->word2); 2246 + sgl->sge_len = 0; 2278 2247 2279 2248 protgrp_blks = protgroup_len / 8; 2280 2249 protgrp_bytes = protgrp_blks * blksize; ··· 2296 2263 /* setup SGE's for data blocks associated with DIF data */ 2297 2264 pgdone = 0; 2298 2265 subtotal = 0; /* total bytes processed for current prot grp */ 2266 + 2267 + sgl++; 2268 + j++; 2269 + 2299 2270 while (!pgdone) { 2300 2271 /* Check to see if we ran out of space */ 2301 - if (num_sge >= phba->cfg_total_seg_cnt) 2272 + if ((num_sge >= phba->cfg_total_seg_cnt) && 2273 + !phba->cfg_xpsgl) 2302 2274 return num_sge + 1; 2303 2275 2304 2276 if (!sgde) { ··· 2312 2274 __func__); 2313 2275 return 0; 2314 2276 } 2315 - sgl++; 2316 - dataphysaddr = sg_dma_address(sgde) + split_offset; 2317 2277 2318 - remainder = sg_dma_len(sgde) - split_offset; 2278 + if (!((j + 1) % phba->border_sge_num)) { 2279 + sgl->word2 = 0; 2319 2280 2320 - if ((subtotal + remainder) <= protgrp_bytes) { 2321 - /* we can use this whole buffer */ 2322 - dma_len = remainder; 2323 - split_offset = 0; 2281 + /* set LSP type */ 2282 + bf_set(lpfc_sli4_sge_type, sgl, 2283 + LPFC_SGE_TYPE_LSP); 2324 2284 2325 - if ((subtotal + remainder) == protgrp_bytes) 2326 - pgdone = 1; 2285 + sgl_xtra = lpfc_get_sgl_per_hdwq(phba, 2286 + lpfc_cmd); 2287 + 2288 + if (unlikely(!sgl_xtra)) { 2289 + goto out; 2290 + } else { 2291 + sgl->addr_lo = cpu_to_le32( 2292 + putPaddrLow(sgl_xtra->dma_phys_sgl)); 2293 + sgl->addr_hi = cpu_to_le32( 2294 + putPaddrHigh(sgl_xtra->dma_phys_sgl)); 2295 + } 2296 + 2297 + sgl->word2 = cpu_to_le32(sgl->word2); 2298 + sgl->sge_len = cpu_to_le32( 2299 + phba->cfg_sg_dma_buf_size); 2300 + 2301 + sgl = (struct sli4_sge *)sgl_xtra->dma_sgl; 2327 2302 } else { 2328 - /* must split this buffer with next prot grp */ 2329 - dma_len = protgrp_bytes - subtotal; 2330 - split_offset += dma_len; 2303 + dataphysaddr = sg_dma_address(sgde) + 2304 + split_offset; 2305 + 2306 + remainder = sg_dma_len(sgde) - split_offset; 2307 + 2308 + if ((subtotal + remainder) <= protgrp_bytes) { 2309 + /* we can use this whole buffer */ 2310 + dma_len = remainder; 2311 + split_offset = 0; 2312 + 2313 + if ((subtotal + remainder) == 2314 + protgrp_bytes) 2315 + pgdone = 1; 2316 + } else { 2317 + /* must split this buffer with next 2318 + * prot grp 2319 + */ 2320 + dma_len = protgrp_bytes - subtotal; 2321 + split_offset += dma_len; 2322 + } 2323 + 2324 + subtotal += dma_len; 2325 + 2326 + sgl->word2 = 0; 2327 + sgl->addr_lo = cpu_to_le32(putPaddrLow( 2328 + dataphysaddr)); 2329 + sgl->addr_hi = cpu_to_le32(putPaddrHigh( 2330 + dataphysaddr)); 2331 + bf_set(lpfc_sli4_sge_last, sgl, 0); 2332 + bf_set(lpfc_sli4_sge_offset, sgl, dma_offset); 2333 + bf_set(lpfc_sli4_sge_type, sgl, 2334 + LPFC_SGE_TYPE_DATA); 2335 + 2336 + sgl->sge_len = cpu_to_le32(dma_len); 2337 + dma_offset += dma_len; 2338 + 2339 + num_sge++; 2340 + curr_data++; 2341 + 2342 + if (split_offset) { 2343 + sgl++; 2344 + j++; 2345 + break; 2346 + } 2347 + 2348 + /* Move to the next s/g segment if possible */ 2349 + sgde = sg_next(sgde); 2350 + 2351 + sgl++; 2331 2352 } 2332 2353 2333 - subtotal += dma_len; 2334 - 2335 - sgl->addr_lo = cpu_to_le32(putPaddrLow(dataphysaddr)); 2336 - sgl->addr_hi = cpu_to_le32(putPaddrHigh(dataphysaddr)); 2337 - bf_set(lpfc_sli4_sge_last, sgl, 0); 2338 - bf_set(lpfc_sli4_sge_offset, sgl, dma_offset); 2339 - bf_set(lpfc_sli4_sge_type, sgl, LPFC_SGE_TYPE_DATA); 2340 - 2341 - sgl->sge_len = cpu_to_le32(dma_len); 2342 - dma_offset += dma_len; 2343 - 2344 - num_sge++; 2345 - curr_data++; 2346 - 2347 - if (split_offset) 2348 - break; 2349 - 2350 - /* Move to the next s/g segment if possible */ 2351 - sgde = sg_next(sgde); 2354 + j++; 2352 2355 } 2353 2356 2354 2357 if (protgroup_offset) { 2355 2358 /* update the reference tag */ 2356 2359 reftag += protgrp_blks; 2357 - sgl++; 2358 2360 continue; 2359 2361 } 2360 2362 2361 2363 /* are we done ? */ 2362 2364 if (curr_prot == protcnt) { 2365 + /* mark the last SGL */ 2366 + sgl--; 2363 2367 bf_set(lpfc_sli4_sge_last, sgl, 1); 2364 2368 alldone = 1; 2365 2369 } else if (curr_prot < protcnt) { 2366 2370 /* advance to next prot buffer */ 2367 2371 sgpe = sg_next(sgpe); 2368 - sgl++; 2369 2372 2370 2373 /* update the reference tag */ 2371 2374 reftag += protgrp_blks; ··· 2509 2430 * 2510 2431 * This is the protection/DIF aware version of 2511 2432 * lpfc_scsi_prep_dma_buf(). It may be a good idea to combine the 2512 - * two functions eventually, but for now, it's here 2433 + * two functions eventually, but for now, it's here. 2434 + * RETURNS 0 - SUCCESS, 2435 + * 1 - Failed DMA map, retry. 2436 + * 2 - Invalid scsi cmd or prot-type. Do not rety. 2513 2437 **/ 2514 2438 static int 2515 2439 lpfc_bg_scsi_prep_dma_buf_s3(struct lpfc_hba *phba, ··· 2526 2444 int datasegcnt, protsegcnt, datadir = scsi_cmnd->sc_data_direction; 2527 2445 int prot_group_type = 0; 2528 2446 int fcpdl; 2447 + int ret = 1; 2529 2448 struct lpfc_vport *vport = phba->pport; 2530 2449 2531 2450 /* ··· 2550 2467 lpfc_cmd->seg_cnt = datasegcnt; 2551 2468 2552 2469 /* First check if data segment count from SCSI Layer is good */ 2553 - if (lpfc_cmd->seg_cnt > phba->cfg_sg_seg_cnt) 2470 + if (lpfc_cmd->seg_cnt > phba->cfg_sg_seg_cnt) { 2471 + WARN_ON_ONCE(lpfc_cmd->seg_cnt > phba->cfg_sg_seg_cnt); 2472 + ret = 2; 2554 2473 goto err; 2474 + } 2555 2475 2556 2476 prot_group_type = lpfc_prot_group_type(phba, scsi_cmnd); 2557 2477 ··· 2562 2476 case LPFC_PG_TYPE_NO_DIF: 2563 2477 2564 2478 /* Here we need to add a PDE5 and PDE6 to the count */ 2565 - if ((lpfc_cmd->seg_cnt + 2) > phba->cfg_total_seg_cnt) 2479 + if ((lpfc_cmd->seg_cnt + 2) > phba->cfg_total_seg_cnt) { 2480 + ret = 2; 2566 2481 goto err; 2482 + } 2567 2483 2568 2484 num_bde = lpfc_bg_setup_bpl(phba, scsi_cmnd, bpl, 2569 2485 datasegcnt); 2570 2486 /* we should have 2 or more entries in buffer list */ 2571 - if (num_bde < 2) 2487 + if (num_bde < 2) { 2488 + ret = 2; 2572 2489 goto err; 2490 + } 2573 2491 break; 2574 2492 2575 2493 case LPFC_PG_TYPE_DIF_BUF: ··· 2597 2507 * protection data segment. 2598 2508 */ 2599 2509 if ((lpfc_cmd->prot_seg_cnt * 4) > 2600 - (phba->cfg_total_seg_cnt - 2)) 2510 + (phba->cfg_total_seg_cnt - 2)) { 2511 + ret = 2; 2601 2512 goto err; 2513 + } 2602 2514 2603 2515 num_bde = lpfc_bg_setup_bpl_prot(phba, scsi_cmnd, bpl, 2604 2516 datasegcnt, protsegcnt); 2605 2517 /* we should have 3 or more entries in buffer list */ 2606 2518 if ((num_bde < 3) || 2607 - (num_bde > phba->cfg_total_seg_cnt)) 2519 + (num_bde > phba->cfg_total_seg_cnt)) { 2520 + ret = 2; 2608 2521 goto err; 2522 + } 2609 2523 break; 2610 2524 2611 2525 case LPFC_PG_TYPE_INVALID: ··· 2620 2526 lpfc_printf_log(phba, KERN_ERR, LOG_FCP, 2621 2527 "9022 Unexpected protection group %i\n", 2622 2528 prot_group_type); 2623 - return 1; 2529 + return 2; 2624 2530 } 2625 2531 } 2626 2532 ··· 2670 2576 2671 2577 lpfc_cmd->seg_cnt = 0; 2672 2578 lpfc_cmd->prot_seg_cnt = 0; 2673 - return 1; 2579 + return ret; 2674 2580 } 2675 2581 2676 2582 /* ··· 2903 2809 uint32_t bgstat = bgf->bgstat; 2904 2810 uint64_t failing_sector = 0; 2905 2811 2906 - spin_lock(&_dump_buf_lock); 2907 - if (!_dump_buf_done) { 2908 - lpfc_printf_log(phba, KERN_ERR, LOG_BG, "9070 BLKGRD: Saving" 2909 - " Data for %u blocks to debugfs\n", 2910 - (cmd->cmnd[7] << 8 | cmd->cmnd[8])); 2911 - lpfc_debug_save_data(phba, cmd); 2912 - 2913 - /* If we have a prot sgl, save the DIF buffer */ 2914 - if (lpfc_prot_group_type(phba, cmd) == 2915 - LPFC_PG_TYPE_DIF_BUF) { 2916 - lpfc_printf_log(phba, KERN_ERR, LOG_BG, "9071 BLKGRD: " 2917 - "Saving DIF for %u blocks to debugfs\n", 2918 - (cmd->cmnd[7] << 8 | cmd->cmnd[8])); 2919 - lpfc_debug_save_dif(phba, cmd); 2920 - } 2921 - 2922 - _dump_buf_done = 1; 2923 - } 2924 - spin_unlock(&_dump_buf_lock); 2925 - 2926 2812 if (lpfc_bgs_get_invalid_prof(bgstat)) { 2927 2813 cmd->result = DID_ERROR << 16; 2928 2814 lpfc_printf_log(phba, KERN_WARNING, LOG_FCP | LOG_BG, ··· 3036 2962 * field of @lpfc_cmd for device with SLI-4 interface spec. 3037 2963 * 3038 2964 * Return codes: 3039 - * 1 - Error 2965 + * 2 - Error - Do not retry 2966 + * 1 - Error - Retry 3040 2967 * 0 - Success 3041 2968 **/ 3042 2969 static int ··· 3053 2978 uint32_t num_bde = 0; 3054 2979 uint32_t dma_len; 3055 2980 uint32_t dma_offset = 0; 3056 - int nseg; 2981 + int nseg, i, j; 3057 2982 struct ulp_bde64 *bde; 2983 + bool lsp_just_set = false; 2984 + struct sli4_hybrid_sgl *sgl_xtra = NULL; 3058 2985 3059 2986 /* 3060 2987 * There are three possibilities here - use scatter-gather segment, use ··· 3083 3006 sgl += 1; 3084 3007 first_data_sgl = sgl; 3085 3008 lpfc_cmd->seg_cnt = nseg; 3086 - if (lpfc_cmd->seg_cnt > phba->cfg_sg_seg_cnt) { 3009 + if (!phba->cfg_xpsgl && 3010 + lpfc_cmd->seg_cnt > phba->cfg_sg_seg_cnt) { 3087 3011 lpfc_printf_log(phba, KERN_ERR, LOG_BG, "9074 BLKGRD:" 3088 3012 " %s: Too many sg segments from " 3089 3013 "dma_map_sg. Config %d, seg_cnt %d\n", 3090 3014 __func__, phba->cfg_sg_seg_cnt, 3091 3015 lpfc_cmd->seg_cnt); 3016 + WARN_ON_ONCE(lpfc_cmd->seg_cnt > phba->cfg_sg_seg_cnt); 3092 3017 lpfc_cmd->seg_cnt = 0; 3093 3018 scsi_dma_unmap(scsi_cmnd); 3094 - return 1; 3019 + return 2; 3095 3020 } 3096 3021 3097 3022 /* ··· 3105 3026 * the IOCB. If it can't then the BDEs get added to a BPL as it 3106 3027 * does for SLI-2 mode. 3107 3028 */ 3108 - scsi_for_each_sg(scsi_cmnd, sgel, nseg, num_bde) { 3109 - physaddr = sg_dma_address(sgel); 3110 - dma_len = sg_dma_len(sgel); 3111 - sgl->addr_lo = cpu_to_le32(putPaddrLow(physaddr)); 3112 - sgl->addr_hi = cpu_to_le32(putPaddrHigh(physaddr)); 3113 - sgl->word2 = le32_to_cpu(sgl->word2); 3114 - if ((num_bde + 1) == nseg) 3029 + 3030 + /* for tracking segment boundaries */ 3031 + sgel = scsi_sglist(scsi_cmnd); 3032 + j = 2; 3033 + for (i = 0; i < nseg; i++) { 3034 + sgl->word2 = 0; 3035 + if ((num_bde + 1) == nseg) { 3115 3036 bf_set(lpfc_sli4_sge_last, sgl, 1); 3116 - else 3037 + bf_set(lpfc_sli4_sge_type, sgl, 3038 + LPFC_SGE_TYPE_DATA); 3039 + } else { 3117 3040 bf_set(lpfc_sli4_sge_last, sgl, 0); 3118 - bf_set(lpfc_sli4_sge_offset, sgl, dma_offset); 3119 - bf_set(lpfc_sli4_sge_type, sgl, LPFC_SGE_TYPE_DATA); 3120 - sgl->word2 = cpu_to_le32(sgl->word2); 3121 - sgl->sge_len = cpu_to_le32(dma_len); 3122 - dma_offset += dma_len; 3123 - sgl++; 3041 + 3042 + /* do we need to expand the segment */ 3043 + if (!lsp_just_set && 3044 + !((j + 1) % phba->border_sge_num) && 3045 + ((nseg - 1) != i)) { 3046 + /* set LSP type */ 3047 + bf_set(lpfc_sli4_sge_type, sgl, 3048 + LPFC_SGE_TYPE_LSP); 3049 + 3050 + sgl_xtra = lpfc_get_sgl_per_hdwq( 3051 + phba, lpfc_cmd); 3052 + 3053 + if (unlikely(!sgl_xtra)) { 3054 + lpfc_cmd->seg_cnt = 0; 3055 + scsi_dma_unmap(scsi_cmnd); 3056 + return 1; 3057 + } 3058 + sgl->addr_lo = cpu_to_le32(putPaddrLow( 3059 + sgl_xtra->dma_phys_sgl)); 3060 + sgl->addr_hi = cpu_to_le32(putPaddrHigh( 3061 + sgl_xtra->dma_phys_sgl)); 3062 + 3063 + } else { 3064 + bf_set(lpfc_sli4_sge_type, sgl, 3065 + LPFC_SGE_TYPE_DATA); 3066 + } 3067 + } 3068 + 3069 + if (!(bf_get(lpfc_sli4_sge_type, sgl) & 3070 + LPFC_SGE_TYPE_LSP)) { 3071 + if ((nseg - 1) == i) 3072 + bf_set(lpfc_sli4_sge_last, sgl, 1); 3073 + 3074 + physaddr = sg_dma_address(sgel); 3075 + dma_len = sg_dma_len(sgel); 3076 + sgl->addr_lo = cpu_to_le32(putPaddrLow( 3077 + physaddr)); 3078 + sgl->addr_hi = cpu_to_le32(putPaddrHigh( 3079 + physaddr)); 3080 + 3081 + bf_set(lpfc_sli4_sge_offset, sgl, dma_offset); 3082 + sgl->word2 = cpu_to_le32(sgl->word2); 3083 + sgl->sge_len = cpu_to_le32(dma_len); 3084 + 3085 + dma_offset += dma_len; 3086 + sgel = sg_next(sgel); 3087 + 3088 + sgl++; 3089 + lsp_just_set = false; 3090 + 3091 + } else { 3092 + sgl->word2 = cpu_to_le32(sgl->word2); 3093 + sgl->sge_len = cpu_to_le32( 3094 + phba->cfg_sg_dma_buf_size); 3095 + 3096 + sgl = (struct sli4_sge *)sgl_xtra->dma_sgl; 3097 + i = i - 1; 3098 + 3099 + lsp_just_set = true; 3100 + } 3101 + 3102 + j++; 3124 3103 } 3125 3104 /* 3126 3105 * Setup the first Payload BDE. For FCoE we just key off ··· 3247 3110 * This is the protection/DIF aware version of 3248 3111 * lpfc_scsi_prep_dma_buf(). It may be a good idea to combine the 3249 3112 * two functions eventually, but for now, it's here 3113 + * Return codes: 3114 + * 2 - Error - Do not retry 3115 + * 1 - Error - Retry 3116 + * 0 - Success 3250 3117 **/ 3251 3118 static int 3252 3119 lpfc_bg_scsi_prep_dma_buf_s4(struct lpfc_hba *phba, ··· 3264 3123 int datasegcnt, protsegcnt, datadir = scsi_cmnd->sc_data_direction; 3265 3124 int prot_group_type = 0; 3266 3125 int fcpdl; 3126 + int ret = 1; 3267 3127 struct lpfc_vport *vport = phba->pport; 3268 3128 3269 3129 /* ··· 3294 3152 lpfc_cmd->seg_cnt = datasegcnt; 3295 3153 3296 3154 /* First check if data segment count from SCSI Layer is good */ 3297 - if (lpfc_cmd->seg_cnt > phba->cfg_sg_seg_cnt) 3155 + if (lpfc_cmd->seg_cnt > phba->cfg_sg_seg_cnt && 3156 + !phba->cfg_xpsgl) { 3157 + WARN_ON_ONCE(lpfc_cmd->seg_cnt > phba->cfg_sg_seg_cnt); 3158 + ret = 2; 3298 3159 goto err; 3160 + } 3299 3161 3300 3162 prot_group_type = lpfc_prot_group_type(phba, scsi_cmnd); 3301 3163 3302 3164 switch (prot_group_type) { 3303 3165 case LPFC_PG_TYPE_NO_DIF: 3304 3166 /* Here we need to add a DISEED to the count */ 3305 - if ((lpfc_cmd->seg_cnt + 1) > phba->cfg_total_seg_cnt) 3167 + if (((lpfc_cmd->seg_cnt + 1) > 3168 + phba->cfg_total_seg_cnt) && 3169 + !phba->cfg_xpsgl) { 3170 + ret = 2; 3306 3171 goto err; 3172 + } 3307 3173 3308 3174 num_sge = lpfc_bg_setup_sgl(phba, scsi_cmnd, sgl, 3309 - datasegcnt); 3175 + datasegcnt, lpfc_cmd); 3310 3176 3311 3177 /* we should have 2 or more entries in buffer list */ 3312 - if (num_sge < 2) 3178 + if (num_sge < 2) { 3179 + ret = 2; 3313 3180 goto err; 3181 + } 3314 3182 break; 3315 3183 3316 3184 case LPFC_PG_TYPE_DIF_BUF: ··· 3342 3190 * There is a minimun of 3 SGEs used for every 3343 3191 * protection data segment. 3344 3192 */ 3345 - if ((lpfc_cmd->prot_seg_cnt * 3) > 3346 - (phba->cfg_total_seg_cnt - 2)) 3193 + if (((lpfc_cmd->prot_seg_cnt * 3) > 3194 + (phba->cfg_total_seg_cnt - 2)) && 3195 + !phba->cfg_xpsgl) { 3196 + ret = 2; 3347 3197 goto err; 3198 + } 3348 3199 3349 3200 num_sge = lpfc_bg_setup_sgl_prot(phba, scsi_cmnd, sgl, 3350 - datasegcnt, protsegcnt); 3201 + datasegcnt, protsegcnt, lpfc_cmd); 3351 3202 3352 3203 /* we should have 3 or more entries in buffer list */ 3353 - if ((num_sge < 3) || 3354 - (num_sge > phba->cfg_total_seg_cnt)) 3204 + if (num_sge < 3 || 3205 + (num_sge > phba->cfg_total_seg_cnt && 3206 + !phba->cfg_xpsgl)) { 3207 + ret = 2; 3355 3208 goto err; 3209 + } 3356 3210 break; 3357 3211 3358 3212 case LPFC_PG_TYPE_INVALID: ··· 3369 3211 lpfc_printf_log(phba, KERN_ERR, LOG_FCP, 3370 3212 "9083 Unexpected protection group %i\n", 3371 3213 prot_group_type); 3372 - return 1; 3214 + return 2; 3373 3215 } 3374 3216 } 3375 3217 ··· 3431 3273 3432 3274 lpfc_cmd->seg_cnt = 0; 3433 3275 lpfc_cmd->prot_seg_cnt = 0; 3434 - return 1; 3276 + return ret; 3435 3277 } 3436 3278 3437 3279 /** ··· 3997 3839 uint32_t *lp = (uint32_t *)cmd->sense_buffer; 3998 3840 3999 3841 lpfc_printf_vlog(vport, KERN_INFO, LOG_FCP, 4000 - "0710 Iodone <%d/%llu> cmd %p, error " 3842 + "0710 Iodone <%d/%llu> cmd x%px, error " 4001 3843 "x%x SNS x%x x%x Data: x%x x%x\n", 4002 3844 cmd->device->id, cmd->device->lun, cmd, 4003 3845 cmd->result, *lp, *(lp + 3), cmd->retries, ··· 4612 4454 err = lpfc_scsi_prep_dma_buf(phba, lpfc_cmd); 4613 4455 } 4614 4456 4615 - if (err) 4457 + if (err == 2) { 4458 + cmnd->result = DID_ERROR << 16; 4459 + goto out_fail_command_release_buf; 4460 + } else if (err) { 4616 4461 goto out_host_busy_free_buf; 4462 + } 4617 4463 4618 4464 lpfc_scsi_prep_cmnd(vport, lpfc_cmd, ndlp); 4619 4465 ··· 4688 4526 out_tgt_busy: 4689 4527 return SCSI_MLQUEUE_TARGET_BUSY; 4690 4528 4529 + out_fail_command_release_buf: 4530 + lpfc_release_scsi_buf(phba, lpfc_cmd); 4531 + 4691 4532 out_fail_command: 4692 4533 cmnd->scsi_done(cmnd); 4693 4534 return 0; ··· 4733 4568 4734 4569 spin_lock_irqsave(&phba->hbalock, flags); 4735 4570 /* driver queued commands are in process of being flushed */ 4736 - if (phba->hba_flag & HBA_FCP_IOQ_FLUSH) { 4571 + if (phba->hba_flag & HBA_IOQ_FLUSH) { 4737 4572 lpfc_printf_vlog(vport, KERN_WARNING, LOG_FCP, 4738 4573 "3168 SCSI Layer abort requested I/O has been " 4739 4574 "flushed by LLD.\n"); ··· 4754 4589 4755 4590 iocb = &lpfc_cmd->cur_iocbq; 4756 4591 if (phba->sli_rev == LPFC_SLI_REV4) { 4757 - pring_s4 = phba->sli4_hba.hdwq[iocb->hba_wqidx].fcp_wq->pring; 4592 + pring_s4 = phba->sli4_hba.hdwq[iocb->hba_wqidx].io_wq->pring; 4758 4593 if (!pring_s4) { 4759 4594 ret = FAILED; 4760 4595 goto out_unlock_buf; ··· 5121 4956 rdata = lpfc_rport_data_from_scsi_device(cmnd->device); 5122 4957 if (!rdata) { 5123 4958 lpfc_printf_vlog(vport, KERN_INFO, LOG_FCP, 5124 - "0797 Tgt Map rport failure: rdata x%p\n", rdata); 4959 + "0797 Tgt Map rport failure: rdata x%px\n", rdata); 5125 4960 return FAILED; 5126 4961 } 5127 4962 pnode = rdata->pnode; ··· 5219 5054 rdata = lpfc_rport_data_from_scsi_device(cmnd->device); 5220 5055 if (!rdata || !rdata->pnode) { 5221 5056 lpfc_printf_vlog(vport, KERN_ERR, LOG_FCP, 5222 - "0798 Device Reset rdata failure: rdata x%p\n", 5057 + "0798 Device Reset rdata failure: rdata x%px\n", 5223 5058 rdata); 5224 5059 return FAILED; 5225 5060 } ··· 5231 5066 status = lpfc_chk_tgt_mapped(vport, cmnd); 5232 5067 if (status == FAILED) { 5233 5068 lpfc_printf_vlog(vport, KERN_ERR, LOG_FCP, 5234 - "0721 Device Reset rport failure: rdata x%p\n", rdata); 5069 + "0721 Device Reset rport failure: rdata x%px\n", rdata); 5235 5070 return FAILED; 5236 5071 } 5237 5072 ··· 5290 5125 rdata = lpfc_rport_data_from_scsi_device(cmnd->device); 5291 5126 if (!rdata || !rdata->pnode) { 5292 5127 lpfc_printf_vlog(vport, KERN_ERR, LOG_FCP, 5293 - "0799 Target Reset rdata failure: rdata x%p\n", 5128 + "0799 Target Reset rdata failure: rdata x%px\n", 5294 5129 rdata); 5295 5130 return FAILED; 5296 5131 } ··· 5302 5137 status = lpfc_chk_tgt_mapped(vport, cmnd); 5303 5138 if (status == FAILED) { 5304 5139 lpfc_printf_vlog(vport, KERN_ERR, LOG_FCP, 5305 - "0722 Target Reset rport failure: rdata x%p\n", rdata); 5140 + "0722 Target Reset rport failure: rdata x%px\n", rdata); 5306 5141 if (pnode) { 5307 5142 spin_lock_irq(shost->host_lock); 5308 5143 pnode->nlp_flag &= ~NLP_NPR_ADISC; ··· 5460 5295 lpfc_offline(phba); 5461 5296 rc = lpfc_sli_brdrestart(phba); 5462 5297 if (rc) 5463 - ret = FAILED; 5298 + goto error; 5299 + 5464 5300 rc = lpfc_online(phba); 5465 5301 if (rc) 5466 - ret = FAILED; 5302 + goto error; 5303 + 5467 5304 lpfc_unblock_mgmt_io(phba); 5468 5305 5469 - if (ret == FAILED) { 5470 - lpfc_printf_vlog(vport, KERN_ERR, LOG_FCP, 5471 - "3323 Failed host reset, bring it offline\n"); 5472 - lpfc_sli4_offline_eratt(phba); 5473 - } 5474 5306 return ret; 5307 + error: 5308 + lpfc_printf_vlog(vport, KERN_ERR, LOG_FCP, 5309 + "3323 Failed host reset\n"); 5310 + lpfc_unblock_mgmt_io(phba); 5311 + return FAILED; 5475 5312 } 5476 5313 5477 5314 /** ··· 6037 5870 .sg_tablesize = LPFC_DEFAULT_SG_SEG_CNT, 6038 5871 .cmd_per_lun = LPFC_CMD_PER_LUN, 6039 5872 .shost_attrs = lpfc_hba_attrs, 6040 - .max_sectors = 0xFFFF, 5873 + .max_sectors = 0xFFFFFFFF, 6041 5874 .vendor_id = LPFC_NL_VENDOR_ID, 6042 5875 .change_queue_depth = scsi_change_queue_depth, 6043 5876 .track_queue_depth = 1,
+397 -136
drivers/scsi/lpfc/lpfc_sli.c
··· 1391 1391 1392 1392 while (!list_empty(iocblist)) { 1393 1393 list_remove_head(iocblist, piocb, struct lpfc_iocbq, list); 1394 - if (!piocb->iocb_cmpl) 1395 - lpfc_sli_release_iocbq(phba, piocb); 1396 - else { 1394 + if (!piocb->iocb_cmpl) { 1395 + if (piocb->iocb_flag & LPFC_IO_NVME) 1396 + lpfc_nvme_cancel_iocb(phba, piocb); 1397 + else 1398 + lpfc_sli_release_iocbq(phba, piocb); 1399 + } else { 1397 1400 piocb->iocb.ulpStatus = ulpstatus; 1398 1401 piocb->iocb.un.ulpWord[4] = ulpWord4; 1399 1402 (piocb->iocb_cmpl) (phba, piocb, piocb); ··· 2429 2426 return; 2430 2427 } 2431 2428 2429 + static void 2430 + __lpfc_sli_rpi_release(struct lpfc_vport *vport, struct lpfc_nodelist *ndlp) 2431 + { 2432 + unsigned long iflags; 2433 + 2434 + if (ndlp->nlp_flag & NLP_RELEASE_RPI) { 2435 + lpfc_sli4_free_rpi(vport->phba, ndlp->nlp_rpi); 2436 + spin_lock_irqsave(&vport->phba->ndlp_lock, iflags); 2437 + ndlp->nlp_flag &= ~NLP_RELEASE_RPI; 2438 + ndlp->nlp_rpi = LPFC_RPI_ALLOC_ERROR; 2439 + spin_unlock_irqrestore(&vport->phba->ndlp_lock, iflags); 2440 + } 2441 + ndlp->nlp_flag &= ~NLP_UNREG_INP; 2442 + } 2432 2443 2433 2444 /** 2434 2445 * lpfc_sli_def_mbox_cmpl - Default mailbox completion handler ··· 2514 2497 vport, 2515 2498 KERN_INFO, LOG_MBOX | LOG_DISCOVERY, 2516 2499 "1438 UNREG cmpl deferred mbox x%x " 2517 - "on NPort x%x Data: x%x x%x %p\n", 2500 + "on NPort x%x Data: x%x x%x %px\n", 2518 2501 ndlp->nlp_rpi, ndlp->nlp_DID, 2519 2502 ndlp->nlp_flag, ndlp->nlp_defer_did, ndlp); 2520 2503 ··· 2524 2507 ndlp->nlp_defer_did = NLP_EVT_NOTHING_PENDING; 2525 2508 lpfc_issue_els_plogi(vport, ndlp->nlp_DID, 0); 2526 2509 } else { 2527 - ndlp->nlp_flag &= ~NLP_UNREG_INP; 2510 + __lpfc_sli_rpi_release(vport, ndlp); 2528 2511 } 2529 2512 pmb->ctx_ndlp = NULL; 2530 2513 } ··· 2572 2555 vport, KERN_INFO, LOG_MBOX | LOG_SLI, 2573 2556 "0010 UNREG_LOGIN vpi:%x " 2574 2557 "rpi:%x DID:%x defer x%x flg x%x " 2575 - "map:%x %p\n", 2558 + "map:%x %px\n", 2576 2559 vport->vpi, ndlp->nlp_rpi, 2577 2560 ndlp->nlp_DID, ndlp->nlp_defer_did, 2578 2561 ndlp->nlp_flag, ··· 2590 2573 vport, KERN_INFO, LOG_DISCOVERY, 2591 2574 "4111 UNREG cmpl deferred " 2592 2575 "clr x%x on " 2593 - "NPort x%x Data: x%x %p\n", 2576 + "NPort x%x Data: x%x x%px\n", 2594 2577 ndlp->nlp_rpi, ndlp->nlp_DID, 2595 2578 ndlp->nlp_defer_did, ndlp); 2596 2579 ndlp->nlp_flag &= ~NLP_UNREG_INP; ··· 2599 2582 lpfc_issue_els_plogi( 2600 2583 vport, ndlp->nlp_DID, 0); 2601 2584 } else { 2602 - ndlp->nlp_flag &= ~NLP_UNREG_INP; 2585 + __lpfc_sli_rpi_release(vport, ndlp); 2603 2586 } 2604 2587 } 2605 2588 } ··· 2712 2695 2713 2696 /* Mailbox cmd <cmd> Cmpl <cmpl> */ 2714 2697 lpfc_printf_log(phba, KERN_INFO, LOG_MBOX | LOG_SLI, 2715 - "(%d):0307 Mailbox cmd x%x (x%x/x%x) Cmpl x%p " 2698 + "(%d):0307 Mailbox cmd x%x (x%x/x%x) Cmpl %ps " 2716 2699 "Data: x%x x%x x%x x%x x%x x%x x%x x%x x%x " 2717 2700 "x%x x%x x%x\n", 2718 2701 pmb->vport ? pmb->vport->vpi : 0, ··· 3978 3961 /* Look on all the FCP Rings for the iotag */ 3979 3962 if (phba->sli_rev >= LPFC_SLI_REV4) { 3980 3963 for (i = 0; i < phba->cfg_hdw_queue; i++) { 3981 - pring = phba->sli4_hba.hdwq[i].fcp_wq->pring; 3964 + pring = phba->sli4_hba.hdwq[i].io_wq->pring; 3982 3965 lpfc_sli_abort_iocb_ring(phba, pring); 3983 3966 } 3984 3967 } else { ··· 3988 3971 } 3989 3972 3990 3973 /** 3991 - * lpfc_sli_flush_fcp_rings - flush all iocbs in the fcp ring 3974 + * lpfc_sli_flush_io_rings - flush all iocbs in the IO ring 3992 3975 * @phba: Pointer to HBA context object. 3993 3976 * 3994 - * This function flushes all iocbs in the fcp ring and frees all the iocb 3977 + * This function flushes all iocbs in the IO ring and frees all the iocb 3995 3978 * objects in txq and txcmplq. This function will not issue abort iocbs 3996 3979 * for all the iocb commands in txcmplq, they will just be returned with 3997 3980 * IOERR_SLI_DOWN. This function is invoked with EEH when device's PCI 3998 3981 * slot has been permanently disabled. 3999 3982 **/ 4000 3983 void 4001 - lpfc_sli_flush_fcp_rings(struct lpfc_hba *phba) 3984 + lpfc_sli_flush_io_rings(struct lpfc_hba *phba) 4002 3985 { 4003 3986 LIST_HEAD(txq); 4004 3987 LIST_HEAD(txcmplq); ··· 4009 3992 4010 3993 spin_lock_irq(&phba->hbalock); 4011 3994 /* Indicate the I/O queues are flushed */ 4012 - phba->hba_flag |= HBA_FCP_IOQ_FLUSH; 3995 + phba->hba_flag |= HBA_IOQ_FLUSH; 4013 3996 spin_unlock_irq(&phba->hbalock); 4014 3997 4015 3998 /* Look on all the FCP Rings for the iotag */ 4016 3999 if (phba->sli_rev >= LPFC_SLI_REV4) { 4017 4000 for (i = 0; i < phba->cfg_hdw_queue; i++) { 4018 - pring = phba->sli4_hba.hdwq[i].fcp_wq->pring; 4001 + pring = phba->sli4_hba.hdwq[i].io_wq->pring; 4019 4002 4020 4003 spin_lock_irq(&pring->ring_lock); 4021 4004 /* Retrieve everything on txq */ ··· 4058 4041 IOERR_SLI_DOWN); 4059 4042 /* Flush the txcmpq */ 4060 4043 lpfc_sli_cancel_iocbs(phba, &txcmplq, IOSTAT_LOCAL_REJECT, 4061 - IOERR_SLI_DOWN); 4062 - } 4063 - } 4064 - 4065 - /** 4066 - * lpfc_sli_flush_nvme_rings - flush all wqes in the nvme rings 4067 - * @phba: Pointer to HBA context object. 4068 - * 4069 - * This function flushes all wqes in the nvme rings and frees all resources 4070 - * in the txcmplq. This function does not issue abort wqes for the IO 4071 - * commands in txcmplq, they will just be returned with 4072 - * IOERR_SLI_DOWN. This function is invoked with EEH when device's PCI 4073 - * slot has been permanently disabled. 4074 - **/ 4075 - void 4076 - lpfc_sli_flush_nvme_rings(struct lpfc_hba *phba) 4077 - { 4078 - LIST_HEAD(txcmplq); 4079 - struct lpfc_sli_ring *pring; 4080 - uint32_t i; 4081 - struct lpfc_iocbq *piocb, *next_iocb; 4082 - 4083 - if ((phba->sli_rev < LPFC_SLI_REV4) || 4084 - !(phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME)) 4085 - return; 4086 - 4087 - /* Hint to other driver operations that a flush is in progress. */ 4088 - spin_lock_irq(&phba->hbalock); 4089 - phba->hba_flag |= HBA_NVME_IOQ_FLUSH; 4090 - spin_unlock_irq(&phba->hbalock); 4091 - 4092 - /* Cycle through all NVME rings and complete each IO with 4093 - * a local driver reason code. This is a flush so no 4094 - * abort exchange to FW. 4095 - */ 4096 - for (i = 0; i < phba->cfg_hdw_queue; i++) { 4097 - pring = phba->sli4_hba.hdwq[i].nvme_wq->pring; 4098 - 4099 - spin_lock_irq(&pring->ring_lock); 4100 - list_for_each_entry_safe(piocb, next_iocb, 4101 - &pring->txcmplq, list) 4102 - piocb->iocb_flag &= ~LPFC_IO_ON_TXCMPLQ; 4103 - /* Retrieve everything on the txcmplq */ 4104 - list_splice_init(&pring->txcmplq, &txcmplq); 4105 - pring->txcmplq_cnt = 0; 4106 - spin_unlock_irq(&pring->ring_lock); 4107 - 4108 - /* Flush the txcmpq &&&PAE */ 4109 - lpfc_sli_cancel_iocbs(phba, &txcmplq, 4110 - IOSTAT_LOCAL_REJECT, 4111 4044 IOERR_SLI_DOWN); 4112 4045 } 4113 4046 } ··· 4462 4495 * checking during resets the device. The caller is not required to hold 4463 4496 * any locks. 4464 4497 * 4465 - * This function returns 0 always. 4498 + * This function returns 0 on success else returns negative error code. 4466 4499 **/ 4467 4500 int 4468 4501 lpfc_sli4_brdreset(struct lpfc_hba *phba) ··· 4619 4652 hba_aer_enabled = phba->hba_flag & HBA_AER_ENABLED; 4620 4653 4621 4654 rc = lpfc_sli4_brdreset(phba); 4622 - if (rc) 4623 - return rc; 4655 + if (rc) { 4656 + phba->link_state = LPFC_HBA_ERROR; 4657 + goto hba_down_queue; 4658 + } 4624 4659 4625 4660 spin_lock_irq(&phba->hbalock); 4626 4661 phba->pport->stopped = 0; ··· 4637 4668 if (hba_aer_enabled) 4638 4669 pci_disable_pcie_error_reporting(phba->pcidev); 4639 4670 4671 + hba_down_queue: 4640 4672 lpfc_hba_down_post(phba); 4641 4673 lpfc_sli4_queue_destroy(phba); 4642 4674 ··· 5554 5584 for (qidx = 0; qidx < phba->cfg_hdw_queue; qidx++) { 5555 5585 qp = &sli4_hba->hdwq[qidx]; 5556 5586 /* ARM the corresponding CQ */ 5557 - sli4_hba->sli4_write_cq_db(phba, qp->fcp_cq, 0, 5558 - LPFC_QUEUE_REARM); 5559 - sli4_hba->sli4_write_cq_db(phba, qp->nvme_cq, 0, 5560 - LPFC_QUEUE_REARM); 5587 + sli4_hba->sli4_write_cq_db(phba, qp->io_cq, 0, 5588 + LPFC_QUEUE_REARM); 5561 5589 } 5562 5590 5563 5591 /* Loop thru all IRQ vectors */ ··· 7211 7243 else 7212 7244 phba->hba_flag &= ~HBA_FIP_SUPPORT; 7213 7245 7214 - phba->hba_flag &= ~HBA_FCP_IOQ_FLUSH; 7246 + phba->hba_flag &= ~HBA_IOQ_FLUSH; 7215 7247 7216 7248 if (phba->sli_rev != LPFC_SLI_REV4) { 7217 7249 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI, ··· 7940 7972 7941 7973 /* Mbox cmd <mbxCommand> timeout */ 7942 7974 lpfc_printf_log(phba, KERN_ERR, LOG_MBOX | LOG_SLI, 7943 - "0310 Mailbox command x%x timeout Data: x%x x%x x%p\n", 7975 + "0310 Mailbox command x%x timeout Data: x%x x%x x%px\n", 7944 7976 mb->mbxCommand, 7945 7977 phba->pport->port_state, 7946 7978 phba->sli.sli_flag, ··· 9301 9333 memset(wqe, 0, sizeof(union lpfc_wqe128)); 9302 9334 /* Some of the fields are in the right position already */ 9303 9335 memcpy(wqe, &iocbq->iocb, sizeof(union lpfc_wqe)); 9304 - if (iocbq->iocb.ulpCommand != CMD_SEND_FRAME) { 9305 - /* The ct field has moved so reset */ 9306 - wqe->generic.wqe_com.word7 = 0; 9307 - wqe->generic.wqe_com.word10 = 0; 9308 - } 9336 + /* The ct field has moved so reset */ 9337 + wqe->generic.wqe_com.word7 = 0; 9338 + wqe->generic.wqe_com.word10 = 0; 9309 9339 9310 9340 abort_tag = (uint32_t) iocbq->iotag; 9311 9341 xritag = iocbq->sli4_xritag; ··· 9762 9796 * we re-construct this WQE here based on information in 9763 9797 * iocbq from scratch. 9764 9798 */ 9765 - memset(wqe, 0, sizeof(union lpfc_wqe)); 9799 + memset(wqe, 0, sizeof(*wqe)); 9766 9800 /* OX_ID is invariable to who sent ABTS to CT exchange */ 9767 9801 bf_set(xmit_bls_rsp64_oxid, &wqe->xmit_bls_rsp, 9768 9802 bf_get(lpfc_abts_oxid, &iocbq->iocb.un.bls_rsp)); ··· 9809 9843 9810 9844 break; 9811 9845 case CMD_SEND_FRAME: 9846 + bf_set(wqe_cmnd, &wqe->generic.wqe_com, CMD_SEND_FRAME); 9847 + bf_set(wqe_sof, &wqe->generic.wqe_com, 0x2E); /* SOF byte */ 9848 + bf_set(wqe_eof, &wqe->generic.wqe_com, 0x41); /* EOF byte */ 9849 + bf_set(wqe_lenloc, &wqe->generic.wqe_com, 1); 9850 + bf_set(wqe_xbl, &wqe->generic.wqe_com, 1); 9851 + bf_set(wqe_dbde, &wqe->generic.wqe_com, 1); 9852 + bf_set(wqe_xc, &wqe->generic.wqe_com, 1); 9853 + bf_set(wqe_cmd_type, &wqe->generic.wqe_com, 0xA); 9854 + bf_set(wqe_cqid, &wqe->generic.wqe_com, LPFC_WQE_CQ_ID_DEFAULT); 9812 9855 bf_set(wqe_xri_tag, &wqe->generic.wqe_com, xritag); 9813 9856 bf_set(wqe_reqtag, &wqe->generic.wqe_com, iocbq->iotag); 9814 9857 return 0; ··· 9879 9904 /* Get the WQ */ 9880 9905 if ((piocb->iocb_flag & LPFC_IO_FCP) || 9881 9906 (piocb->iocb_flag & LPFC_USE_FCPWQIDX)) { 9882 - wq = phba->sli4_hba.hdwq[piocb->hba_wqidx].fcp_wq; 9907 + wq = phba->sli4_hba.hdwq[piocb->hba_wqidx].io_wq; 9883 9908 } else { 9884 9909 wq = phba->sli4_hba.els_wq; 9885 9910 } ··· 10026 10051 lpfc_cmd = (struct lpfc_io_buf *)piocb->context1; 10027 10052 piocb->hba_wqidx = lpfc_cmd->hdwq_no; 10028 10053 } 10029 - return phba->sli4_hba.hdwq[piocb->hba_wqidx].fcp_wq->pring; 10054 + return phba->sli4_hba.hdwq[piocb->hba_wqidx].io_wq->pring; 10030 10055 } else { 10031 10056 if (unlikely(!phba->sli4_hba.els_wq)) 10032 10057 return NULL; ··· 10479 10504 INIT_LIST_HEAD(&psli->mboxq_cmpl); 10480 10505 /* Initialize list headers for txq and txcmplq as double linked lists */ 10481 10506 for (i = 0; i < phba->cfg_hdw_queue; i++) { 10482 - pring = phba->sli4_hba.hdwq[i].fcp_wq->pring; 10507 + pring = phba->sli4_hba.hdwq[i].io_wq->pring; 10483 10508 pring->flag = 0; 10484 10509 pring->ringno = LPFC_FCP_RING; 10485 10510 pring->txcmplq_cnt = 0; ··· 10498 10523 spin_lock_init(&pring->ring_lock); 10499 10524 10500 10525 if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 10501 - for (i = 0; i < phba->cfg_hdw_queue; i++) { 10502 - pring = phba->sli4_hba.hdwq[i].nvme_wq->pring; 10503 - pring->flag = 0; 10504 - pring->ringno = LPFC_FCP_RING; 10505 - pring->txcmplq_cnt = 0; 10506 - INIT_LIST_HEAD(&pring->txq); 10507 - INIT_LIST_HEAD(&pring->txcmplq); 10508 - INIT_LIST_HEAD(&pring->iocb_continueq); 10509 - spin_lock_init(&pring->ring_lock); 10510 - } 10511 10526 pring = phba->sli4_hba.nvmels_wq->pring; 10512 10527 pring->flag = 0; 10513 10528 pring->ringno = LPFC_ELS_RING; ··· 10761 10796 pring = qp->pring; 10762 10797 if (!pring) 10763 10798 continue; 10764 - spin_lock_irq(&pring->ring_lock); 10799 + spin_lock(&pring->ring_lock); 10765 10800 list_splice_init(&pring->txq, &completions); 10766 - spin_unlock_irq(&pring->ring_lock); 10801 + spin_unlock(&pring->ring_lock); 10767 10802 if (pring == phba->sli4_hba.els_wq->pring) { 10768 10803 pring->flag |= LPFC_DEFERRED_RING_EVENT; 10769 10804 /* Set the lpfc data pending flag */ ··· 10944 10979 spin_unlock_irq(&phba->hbalock); 10945 10980 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 10946 10981 "0402 Cannot find virtual addr for buffer tag on " 10947 - "ring %d Data x%lx x%p x%p x%x\n", 10982 + "ring %d Data x%lx x%px x%px x%x\n", 10948 10983 pring->ringno, (unsigned long) tag, 10949 10984 slp->next, slp->prev, pring->postbufq_cnt); 10950 10985 ··· 10988 11023 spin_unlock_irq(&phba->hbalock); 10989 11024 lpfc_printf_log(phba, KERN_ERR, LOG_INIT, 10990 11025 "0410 Cannot find virtual addr for mapped buf on " 10991 - "ring %d Data x%llx x%p x%p x%x\n", 11026 + "ring %d Data x%llx x%px x%px x%x\n", 10992 11027 pring->ringno, (unsigned long long)phys, 10993 11028 slp->next, slp->prev, pring->postbufq_cnt); 10994 11029 return NULL; ··· 11043 11078 abort_iocb = phba->sli.iocbq_lookup[abort_context]; 11044 11079 11045 11080 lpfc_printf_log(phba, KERN_WARNING, LOG_ELS | LOG_SLI, 11046 - "0327 Cannot abort els iocb %p " 11081 + "0327 Cannot abort els iocb x%px " 11047 11082 "with tag %x context %x, abort status %x, " 11048 11083 "abort code %x\n", 11049 11084 abort_iocb, abort_iotag, abort_context, 11050 11085 irsp->ulpStatus, irsp->un.ulpWord[4]); 11051 11086 11052 11087 spin_unlock_irq(&phba->hbalock); 11088 + if (irsp->ulpStatus == IOSTAT_LOCAL_REJECT && 11089 + irsp->un.ulpWord[4] == IOERR_SLI_ABORTED) 11090 + lpfc_sli_release_iocbq(phba, abort_iocb); 11053 11091 } 11054 11092 release_iocb: 11055 11093 lpfc_sli_release_iocbq(phba, cmdiocb); ··· 11461 11493 int i; 11462 11494 11463 11495 /* all I/Os are in process of being flushed */ 11464 - if (phba->hba_flag & HBA_FCP_IOQ_FLUSH) 11496 + if (phba->hba_flag & HBA_IOQ_FLUSH) 11465 11497 return errcnt; 11466 11498 11467 11499 for (i = 1; i <= phba->sli.last_iotag; i++) { ··· 11571 11603 spin_lock_irqsave(&phba->hbalock, iflags); 11572 11604 11573 11605 /* all I/Os are in process of being flushed */ 11574 - if (phba->hba_flag & HBA_FCP_IOQ_FLUSH) { 11606 + if (phba->hba_flag & HBA_IOQ_FLUSH) { 11575 11607 spin_unlock_irqrestore(&phba->hbalock, iflags); 11576 11608 return 0; 11577 11609 } ··· 11595 11627 11596 11628 if (phba->sli_rev == LPFC_SLI_REV4) { 11597 11629 pring_s4 = 11598 - phba->sli4_hba.hdwq[iocbq->hba_wqidx].fcp_wq->pring; 11630 + phba->sli4_hba.hdwq[iocbq->hba_wqidx].io_wq->pring; 11599 11631 if (!pring_s4) { 11600 11632 spin_unlock(&lpfc_cmd->buf_lock); 11601 11633 continue; ··· 13304 13336 unsigned long iflags; 13305 13337 13306 13338 switch (cq->subtype) { 13307 - case LPFC_FCP: 13308 - lpfc_sli4_fcp_xri_aborted(phba, wcqe, cq->hdwq); 13339 + case LPFC_IO: 13340 + lpfc_sli4_io_xri_aborted(phba, wcqe, cq->hdwq); 13341 + if (phba->cfg_enable_fc4_type & LPFC_ENABLE_NVME) { 13342 + /* Notify aborted XRI for NVME work queue */ 13343 + if (phba->nvmet_support) 13344 + lpfc_sli4_nvmet_xri_aborted(phba, wcqe); 13345 + } 13309 13346 workposted = false; 13310 13347 break; 13311 13348 case LPFC_NVME_LS: /* NVME LS uses ELS resources */ ··· 13327 13354 phba->hba_flag |= ELS_XRI_ABORT_EVENT; 13328 13355 spin_unlock_irqrestore(&phba->hbalock, iflags); 13329 13356 workposted = true; 13330 - break; 13331 - case LPFC_NVME: 13332 - /* Notify aborted XRI for NVME work queue */ 13333 - if (phba->nvmet_support) 13334 - lpfc_sli4_nvmet_xri_aborted(phba, wcqe); 13335 - else 13336 - lpfc_sli4_nvme_xri_aborted(phba, wcqe, cq->hdwq); 13337 - 13338 - workposted = false; 13339 13357 break; 13340 13358 default: 13341 13359 lpfc_printf_log(phba, KERN_ERR, LOG_SLI, ··· 13655 13691 &delay); 13656 13692 break; 13657 13693 case LPFC_WCQ: 13658 - if (cq->subtype == LPFC_FCP || cq->subtype == LPFC_NVME) 13694 + if (cq->subtype == LPFC_IO) 13659 13695 workposted |= __lpfc_sli4_process_cq(phba, cq, 13660 13696 lpfc_sli4_fp_handle_cqe, 13661 13697 &delay); ··· 13972 14008 cq->CQ_wq++; 13973 14009 /* Process the WQ complete event */ 13974 14010 phba->last_completion_time = jiffies; 13975 - if ((cq->subtype == LPFC_FCP) || (cq->subtype == LPFC_NVME)) 13976 - lpfc_sli4_fp_handle_fcp_wcqe(phba, cq, 13977 - (struct lpfc_wcqe_complete *)&wcqe); 13978 - if (cq->subtype == LPFC_NVME_LS) 14011 + if (cq->subtype == LPFC_IO || cq->subtype == LPFC_NVME_LS) 13979 14012 lpfc_sli4_fp_handle_fcp_wcqe(phba, cq, 13980 14013 (struct lpfc_wcqe_complete *)&wcqe); 13981 14014 break; ··· 16879 16918 struct fc_vft_header *fc_vft_hdr; 16880 16919 uint32_t *header = (uint32_t *) fc_hdr; 16881 16920 16921 + #define FC_RCTL_MDS_DIAGS 0xF4 16922 + 16882 16923 switch (fc_hdr->fh_r_ctl) { 16883 16924 case FC_RCTL_DD_UNCAT: /* uncategorized information */ 16884 16925 case FC_RCTL_DD_SOL_DATA: /* solicited data */ ··· 17408 17445 icmd->ulpContext = phba->sli4_hba.rpi_ids[ndlp->nlp_rpi]; 17409 17446 ctiocb->context1 = lpfc_nlp_get(ndlp); 17410 17447 17411 - ctiocb->iocb_cmpl = NULL; 17412 17448 ctiocb->vport = phba->pport; 17413 17449 ctiocb->iocb_cmpl = lpfc_sli4_seq_abort_rsp_cmpl; 17414 17450 ctiocb->sli4_lxritag = NO_XRI; ··· 17890 17928 fcfi = bf_get(lpfc_rcqe_fcf_id, 17891 17929 &dmabuf->cq_event.cqe.rcqe_cmpl); 17892 17930 17931 + if (fc_hdr->fh_r_ctl == 0xF4 && fc_hdr->fh_type == 0xFF) { 17932 + vport = phba->pport; 17933 + lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 17934 + "2023 MDS Loopback %d bytes\n", 17935 + bf_get(lpfc_rcqe_length, 17936 + &dmabuf->cq_event.cqe.rcqe_cmpl)); 17937 + /* Handle MDS Loopback frames */ 17938 + lpfc_sli4_handle_mds_loopback(vport, dmabuf); 17939 + return; 17940 + } 17941 + 17893 17942 /* d_id this frame is directed to */ 17894 17943 did = sli4_did_from_fc_hdr(fc_hdr); 17895 17944 ··· 18184 18211 if (test_and_clear_bit(rpi, phba->sli4_hba.rpi_bmask)) { 18185 18212 phba->sli4_hba.rpi_count--; 18186 18213 phba->sli4_hba.max_cfg_param.rpi_used--; 18214 + } else { 18215 + lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 18216 + "2016 rpi %x not inuse\n", 18217 + rpi); 18187 18218 } 18188 18219 } 18189 18220 ··· 19438 19461 19439 19462 if (phba->link_flag & LS_MDS_LOOPBACK) { 19440 19463 /* MDS WQE are posted only to first WQ*/ 19441 - wq = phba->sli4_hba.hdwq[0].fcp_wq; 19464 + wq = phba->sli4_hba.hdwq[0].io_wq; 19442 19465 if (unlikely(!wq)) 19443 19466 return 0; 19444 19467 pring = wq->pring; ··· 19689 19712 /* NVME_FCREQ and NVME_ABTS requests */ 19690 19713 if (pwqe->iocb_flag & LPFC_IO_NVME) { 19691 19714 /* Get the IO distribution (hba_wqidx) for WQ assignment. */ 19692 - wq = qp->nvme_wq; 19715 + wq = qp->io_wq; 19693 19716 pring = wq->pring; 19694 19717 19695 - bf_set(wqe_cqid, &wqe->generic.wqe_com, qp->nvme_cq_map); 19718 + bf_set(wqe_cqid, &wqe->generic.wqe_com, qp->io_cq_map); 19696 19719 19697 19720 lpfc_qp_spin_lock_irqsave(&pring->ring_lock, iflags, 19698 19721 qp, wq_access); ··· 19709 19732 /* NVMET requests */ 19710 19733 if (pwqe->iocb_flag & LPFC_IO_NVMET) { 19711 19734 /* Get the IO distribution (hba_wqidx) for WQ assignment. */ 19712 - wq = qp->nvme_wq; 19735 + wq = qp->io_wq; 19713 19736 pring = wq->pring; 19714 19737 19715 19738 ctxp = pwqe->context2; ··· 19720 19743 } 19721 19744 bf_set(wqe_xri_tag, &pwqe->wqe.xmit_bls_rsp.wqe_com, 19722 19745 pwqe->sli4_xritag); 19723 - bf_set(wqe_cqid, &wqe->generic.wqe_com, qp->nvme_cq_map); 19746 + bf_set(wqe_cqid, &wqe->generic.wqe_com, qp->io_cq_map); 19724 19747 19725 19748 lpfc_qp_spin_lock_irqsave(&pring->ring_lock, iflags, 19726 19749 qp, wq_access); ··· 19767 19790 if (multixri_pool->stat_snapshot_taken == LPFC_MXP_SNAPSHOT_TAKEN) { 19768 19791 pvt_pool = &qp->p_multixri_pool->pvt_pool; 19769 19792 pbl_pool = &qp->p_multixri_pool->pbl_pool; 19770 - txcmplq_cnt = qp->fcp_wq->pring->txcmplq_cnt; 19771 - if (qp->nvme_wq) 19772 - txcmplq_cnt += qp->nvme_wq->pring->txcmplq_cnt; 19793 + txcmplq_cnt = qp->io_wq->pring->txcmplq_cnt; 19773 19794 19774 19795 multixri_pool->stat_pbl_count = pbl_pool->count; 19775 19796 multixri_pool->stat_pvt_count = pvt_pool->count; ··· 19837 19862 watermark_max = xri_limit; 19838 19863 watermark_min = xri_limit / 2; 19839 19864 19840 - txcmplq_cnt = qp->fcp_wq->pring->txcmplq_cnt; 19865 + txcmplq_cnt = qp->io_wq->pring->txcmplq_cnt; 19841 19866 abts_io_bufs = qp->abts_scsi_io_bufs; 19842 - if (qp->nvme_wq) { 19843 - txcmplq_cnt += qp->nvme_wq->pring->txcmplq_cnt; 19844 - abts_io_bufs += qp->abts_nvme_io_bufs; 19845 - } 19867 + abts_io_bufs += qp->abts_nvme_io_bufs; 19846 19868 19847 19869 new_watermark = txcmplq_cnt + abts_io_bufs; 19848 19870 new_watermark = min(watermark_max, new_watermark); ··· 20114 20142 pbl_pool = &qp->p_multixri_pool->pbl_pool; 20115 20143 pvt_pool = &qp->p_multixri_pool->pvt_pool; 20116 20144 20117 - txcmplq_cnt = qp->fcp_wq->pring->txcmplq_cnt; 20145 + txcmplq_cnt = qp->io_wq->pring->txcmplq_cnt; 20118 20146 abts_io_bufs = qp->abts_scsi_io_bufs; 20119 - if (qp->nvme_wq) { 20120 - txcmplq_cnt += qp->nvme_wq->pring->txcmplq_cnt; 20121 - abts_io_bufs += qp->abts_nvme_io_bufs; 20122 - } 20147 + abts_io_bufs += qp->abts_nvme_io_bufs; 20123 20148 20124 20149 xri_owned = pvt_pool->count + txcmplq_cnt + abts_io_bufs; 20125 20150 xri_limit = qp->p_multixri_pool->xri_limit; ··· 20157 20188 spin_unlock_irqrestore(&qp->io_buf_list_put_lock, 20158 20189 iflag); 20159 20190 } 20191 + 20192 + if (phba->cfg_xpsgl && !phba->nvmet_support && 20193 + !list_empty(&lpfc_ncmd->dma_sgl_xtra_list)) 20194 + lpfc_put_sgl_per_hdwq(phba, lpfc_ncmd); 20195 + 20196 + if (!list_empty(&lpfc_ncmd->dma_cmd_rsp_list)) 20197 + lpfc_put_cmd_rsp_buf_per_hdwq(phba, lpfc_ncmd); 20160 20198 } 20161 20199 20162 20200 /** ··· 20377 20401 } 20378 20402 20379 20403 return lpfc_cmd; 20404 + } 20405 + 20406 + /** 20407 + * lpfc_get_sgl_per_hdwq - Get one SGL chunk from hdwq's pool 20408 + * @phba: The HBA for which this call is being executed. 20409 + * @lpfc_buf: IO buf structure to append the SGL chunk 20410 + * 20411 + * This routine gets one SGL chunk buffer from hdwq's SGL chunk pool, 20412 + * and will allocate an SGL chunk if the pool is empty. 20413 + * 20414 + * Return codes: 20415 + * NULL - Error 20416 + * Pointer to sli4_hybrid_sgl - Success 20417 + **/ 20418 + struct sli4_hybrid_sgl * 20419 + lpfc_get_sgl_per_hdwq(struct lpfc_hba *phba, struct lpfc_io_buf *lpfc_buf) 20420 + { 20421 + struct sli4_hybrid_sgl *list_entry = NULL; 20422 + struct sli4_hybrid_sgl *tmp = NULL; 20423 + struct sli4_hybrid_sgl *allocated_sgl = NULL; 20424 + struct lpfc_sli4_hdw_queue *hdwq = lpfc_buf->hdwq; 20425 + struct list_head *buf_list = &hdwq->sgl_list; 20426 + 20427 + spin_lock_irq(&hdwq->hdwq_lock); 20428 + 20429 + if (likely(!list_empty(buf_list))) { 20430 + /* break off 1 chunk from the sgl_list */ 20431 + list_for_each_entry_safe(list_entry, tmp, 20432 + buf_list, list_node) { 20433 + list_move_tail(&list_entry->list_node, 20434 + &lpfc_buf->dma_sgl_xtra_list); 20435 + break; 20436 + } 20437 + } else { 20438 + /* allocate more */ 20439 + spin_unlock_irq(&hdwq->hdwq_lock); 20440 + tmp = kmalloc_node(sizeof(*tmp), GFP_ATOMIC, 20441 + cpu_to_node(smp_processor_id())); 20442 + if (!tmp) { 20443 + lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 20444 + "8353 error kmalloc memory for HDWQ " 20445 + "%d %s\n", 20446 + lpfc_buf->hdwq_no, __func__); 20447 + return NULL; 20448 + } 20449 + 20450 + tmp->dma_sgl = dma_pool_alloc(phba->lpfc_sg_dma_buf_pool, 20451 + GFP_ATOMIC, &tmp->dma_phys_sgl); 20452 + if (!tmp->dma_sgl) { 20453 + lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 20454 + "8354 error pool_alloc memory for HDWQ " 20455 + "%d %s\n", 20456 + lpfc_buf->hdwq_no, __func__); 20457 + kfree(tmp); 20458 + return NULL; 20459 + } 20460 + 20461 + spin_lock_irq(&hdwq->hdwq_lock); 20462 + list_add_tail(&tmp->list_node, &lpfc_buf->dma_sgl_xtra_list); 20463 + } 20464 + 20465 + allocated_sgl = list_last_entry(&lpfc_buf->dma_sgl_xtra_list, 20466 + struct sli4_hybrid_sgl, 20467 + list_node); 20468 + 20469 + spin_unlock_irq(&hdwq->hdwq_lock); 20470 + 20471 + return allocated_sgl; 20472 + } 20473 + 20474 + /** 20475 + * lpfc_put_sgl_per_hdwq - Put one SGL chunk into hdwq pool 20476 + * @phba: The HBA for which this call is being executed. 20477 + * @lpfc_buf: IO buf structure with the SGL chunk 20478 + * 20479 + * This routine puts one SGL chunk buffer into hdwq's SGL chunk pool. 20480 + * 20481 + * Return codes: 20482 + * 0 - Success 20483 + * -EINVAL - Error 20484 + **/ 20485 + int 20486 + lpfc_put_sgl_per_hdwq(struct lpfc_hba *phba, struct lpfc_io_buf *lpfc_buf) 20487 + { 20488 + int rc = 0; 20489 + struct sli4_hybrid_sgl *list_entry = NULL; 20490 + struct sli4_hybrid_sgl *tmp = NULL; 20491 + struct lpfc_sli4_hdw_queue *hdwq = lpfc_buf->hdwq; 20492 + struct list_head *buf_list = &hdwq->sgl_list; 20493 + 20494 + spin_lock_irq(&hdwq->hdwq_lock); 20495 + 20496 + if (likely(!list_empty(&lpfc_buf->dma_sgl_xtra_list))) { 20497 + list_for_each_entry_safe(list_entry, tmp, 20498 + &lpfc_buf->dma_sgl_xtra_list, 20499 + list_node) { 20500 + list_move_tail(&list_entry->list_node, 20501 + buf_list); 20502 + } 20503 + } else { 20504 + rc = -EINVAL; 20505 + } 20506 + 20507 + spin_unlock_irq(&hdwq->hdwq_lock); 20508 + return rc; 20509 + } 20510 + 20511 + /** 20512 + * lpfc_free_sgl_per_hdwq - Free all SGL chunks of hdwq pool 20513 + * @phba: phba object 20514 + * @hdwq: hdwq to cleanup sgl buff resources on 20515 + * 20516 + * This routine frees all SGL chunks of hdwq SGL chunk pool. 20517 + * 20518 + * Return codes: 20519 + * None 20520 + **/ 20521 + void 20522 + lpfc_free_sgl_per_hdwq(struct lpfc_hba *phba, 20523 + struct lpfc_sli4_hdw_queue *hdwq) 20524 + { 20525 + struct list_head *buf_list = &hdwq->sgl_list; 20526 + struct sli4_hybrid_sgl *list_entry = NULL; 20527 + struct sli4_hybrid_sgl *tmp = NULL; 20528 + 20529 + spin_lock_irq(&hdwq->hdwq_lock); 20530 + 20531 + /* Free sgl pool */ 20532 + list_for_each_entry_safe(list_entry, tmp, 20533 + buf_list, list_node) { 20534 + dma_pool_free(phba->lpfc_sg_dma_buf_pool, 20535 + list_entry->dma_sgl, 20536 + list_entry->dma_phys_sgl); 20537 + list_del(&list_entry->list_node); 20538 + kfree(list_entry); 20539 + } 20540 + 20541 + spin_unlock_irq(&hdwq->hdwq_lock); 20542 + } 20543 + 20544 + /** 20545 + * lpfc_get_cmd_rsp_buf_per_hdwq - Get one CMD/RSP buffer from hdwq 20546 + * @phba: The HBA for which this call is being executed. 20547 + * @lpfc_buf: IO buf structure to attach the CMD/RSP buffer 20548 + * 20549 + * This routine gets one CMD/RSP buffer from hdwq's CMD/RSP pool, 20550 + * and will allocate an CMD/RSP buffer if the pool is empty. 20551 + * 20552 + * Return codes: 20553 + * NULL - Error 20554 + * Pointer to fcp_cmd_rsp_buf - Success 20555 + **/ 20556 + struct fcp_cmd_rsp_buf * 20557 + lpfc_get_cmd_rsp_buf_per_hdwq(struct lpfc_hba *phba, 20558 + struct lpfc_io_buf *lpfc_buf) 20559 + { 20560 + struct fcp_cmd_rsp_buf *list_entry = NULL; 20561 + struct fcp_cmd_rsp_buf *tmp = NULL; 20562 + struct fcp_cmd_rsp_buf *allocated_buf = NULL; 20563 + struct lpfc_sli4_hdw_queue *hdwq = lpfc_buf->hdwq; 20564 + struct list_head *buf_list = &hdwq->cmd_rsp_buf_list; 20565 + 20566 + spin_lock_irq(&hdwq->hdwq_lock); 20567 + 20568 + if (likely(!list_empty(buf_list))) { 20569 + /* break off 1 chunk from the list */ 20570 + list_for_each_entry_safe(list_entry, tmp, 20571 + buf_list, 20572 + list_node) { 20573 + list_move_tail(&list_entry->list_node, 20574 + &lpfc_buf->dma_cmd_rsp_list); 20575 + break; 20576 + } 20577 + } else { 20578 + /* allocate more */ 20579 + spin_unlock_irq(&hdwq->hdwq_lock); 20580 + tmp = kmalloc_node(sizeof(*tmp), GFP_ATOMIC, 20581 + cpu_to_node(smp_processor_id())); 20582 + if (!tmp) { 20583 + lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 20584 + "8355 error kmalloc memory for HDWQ " 20585 + "%d %s\n", 20586 + lpfc_buf->hdwq_no, __func__); 20587 + return NULL; 20588 + } 20589 + 20590 + tmp->fcp_cmnd = dma_pool_alloc(phba->lpfc_cmd_rsp_buf_pool, 20591 + GFP_ATOMIC, 20592 + &tmp->fcp_cmd_rsp_dma_handle); 20593 + 20594 + if (!tmp->fcp_cmnd) { 20595 + lpfc_printf_log(phba, KERN_INFO, LOG_SLI, 20596 + "8356 error pool_alloc memory for HDWQ " 20597 + "%d %s\n", 20598 + lpfc_buf->hdwq_no, __func__); 20599 + kfree(tmp); 20600 + return NULL; 20601 + } 20602 + 20603 + tmp->fcp_rsp = (struct fcp_rsp *)((uint8_t *)tmp->fcp_cmnd + 20604 + sizeof(struct fcp_cmnd)); 20605 + 20606 + spin_lock_irq(&hdwq->hdwq_lock); 20607 + list_add_tail(&tmp->list_node, &lpfc_buf->dma_cmd_rsp_list); 20608 + } 20609 + 20610 + allocated_buf = list_last_entry(&lpfc_buf->dma_cmd_rsp_list, 20611 + struct fcp_cmd_rsp_buf, 20612 + list_node); 20613 + 20614 + spin_unlock_irq(&hdwq->hdwq_lock); 20615 + 20616 + return allocated_buf; 20617 + } 20618 + 20619 + /** 20620 + * lpfc_put_cmd_rsp_buf_per_hdwq - Put one CMD/RSP buffer into hdwq pool 20621 + * @phba: The HBA for which this call is being executed. 20622 + * @lpfc_buf: IO buf structure with the CMD/RSP buf 20623 + * 20624 + * This routine puts one CMD/RSP buffer into executing CPU's CMD/RSP pool. 20625 + * 20626 + * Return codes: 20627 + * 0 - Success 20628 + * -EINVAL - Error 20629 + **/ 20630 + int 20631 + lpfc_put_cmd_rsp_buf_per_hdwq(struct lpfc_hba *phba, 20632 + struct lpfc_io_buf *lpfc_buf) 20633 + { 20634 + int rc = 0; 20635 + struct fcp_cmd_rsp_buf *list_entry = NULL; 20636 + struct fcp_cmd_rsp_buf *tmp = NULL; 20637 + struct lpfc_sli4_hdw_queue *hdwq = lpfc_buf->hdwq; 20638 + struct list_head *buf_list = &hdwq->cmd_rsp_buf_list; 20639 + 20640 + spin_lock_irq(&hdwq->hdwq_lock); 20641 + 20642 + if (likely(!list_empty(&lpfc_buf->dma_cmd_rsp_list))) { 20643 + list_for_each_entry_safe(list_entry, tmp, 20644 + &lpfc_buf->dma_cmd_rsp_list, 20645 + list_node) { 20646 + list_move_tail(&list_entry->list_node, 20647 + buf_list); 20648 + } 20649 + } else { 20650 + rc = -EINVAL; 20651 + } 20652 + 20653 + spin_unlock_irq(&hdwq->hdwq_lock); 20654 + return rc; 20655 + } 20656 + 20657 + /** 20658 + * lpfc_free_cmd_rsp_buf_per_hdwq - Free all CMD/RSP chunks of hdwq pool 20659 + * @phba: phba object 20660 + * @hdwq: hdwq to cleanup cmd rsp buff resources on 20661 + * 20662 + * This routine frees all CMD/RSP buffers of hdwq's CMD/RSP buf pool. 20663 + * 20664 + * Return codes: 20665 + * None 20666 + **/ 20667 + void 20668 + lpfc_free_cmd_rsp_buf_per_hdwq(struct lpfc_hba *phba, 20669 + struct lpfc_sli4_hdw_queue *hdwq) 20670 + { 20671 + struct list_head *buf_list = &hdwq->cmd_rsp_buf_list; 20672 + struct fcp_cmd_rsp_buf *list_entry = NULL; 20673 + struct fcp_cmd_rsp_buf *tmp = NULL; 20674 + 20675 + spin_lock_irq(&hdwq->hdwq_lock); 20676 + 20677 + /* Free cmd_rsp buf pool */ 20678 + list_for_each_entry_safe(list_entry, tmp, 20679 + buf_list, 20680 + list_node) { 20681 + dma_pool_free(phba->lpfc_cmd_rsp_buf_pool, 20682 + list_entry->fcp_cmnd, 20683 + list_entry->fcp_cmd_rsp_dma_handle); 20684 + list_del(&list_entry->list_node); 20685 + kfree(list_entry); 20686 + } 20687 + 20688 + spin_unlock_irq(&hdwq->hdwq_lock); 20380 20689 }
+10 -1
drivers/scsi/lpfc/lpfc_sli.h
··· 365 365 /* Common fields */ 366 366 struct list_head list; 367 367 void *data; 368 + 368 369 dma_addr_t dma_handle; 369 370 dma_addr_t dma_phys_sgl; 370 - struct sli4_sge *dma_sgl; 371 + 372 + struct sli4_sge *dma_sgl; /* initial segment chunk */ 373 + 374 + /* linked list of extra sli4_hybrid_sge */ 375 + struct list_head dma_sgl_xtra_list; 376 + 377 + /* list head for fcp_cmd_rsp buf */ 378 + struct list_head dma_cmd_rsp_list; 379 + 371 380 struct lpfc_iocbq cur_iocbq; 372 381 struct lpfc_sli4_hdw_queue *hdwq; 373 382 uint16_t hdwq_no;
+30 -20
drivers/scsi/lpfc/lpfc_sli4.h
··· 49 49 #define LPFC_FCP_MQ_THRESHOLD_MAX 256 50 50 #define LPFC_FCP_MQ_THRESHOLD_DEF 8 51 51 52 - /* Common buffer size to accomidate SCSI and NVME IO buffers */ 53 - #define LPFC_COMMON_IO_BUF_SZ 768 54 - 55 52 /* 56 53 * Provide the default FCF Record attributes used by the driver 57 54 * when nonFIP mode is configured and there is no other default ··· 111 114 enum lpfc_sli4_queue_subtype { 112 115 LPFC_NONE, 113 116 LPFC_MBOX, 114 - LPFC_FCP, 117 + LPFC_IO, 115 118 LPFC_ELS, 116 - LPFC_NVME, 117 119 LPFC_NVMET, 118 120 LPFC_NVME_LS, 119 121 LPFC_USOL ··· 642 646 struct lpfc_sli4_hdw_queue { 643 647 /* Pointers to the constructed SLI4 queues */ 644 648 struct lpfc_queue *hba_eq; /* Event queues for HBA */ 645 - struct lpfc_queue *fcp_cq; /* Fast-path FCP compl queue */ 646 - struct lpfc_queue *nvme_cq; /* Fast-path NVME compl queue */ 647 - struct lpfc_queue *fcp_wq; /* Fast-path FCP work queue */ 648 - struct lpfc_queue *nvme_wq; /* Fast-path NVME work queue */ 649 - uint16_t fcp_cq_map; 650 - uint16_t nvme_cq_map; 649 + struct lpfc_queue *io_cq; /* Fast-path FCP & NVME compl queue */ 650 + struct lpfc_queue *io_wq; /* Fast-path FCP & NVME work queue */ 651 + uint16_t io_cq_map; 651 652 652 653 /* Keep track of IO buffers for this hardware queue */ 653 654 spinlock_t io_buf_list_get_lock; /* Common buf alloc list lock */ 654 655 struct list_head lpfc_io_buf_list_get; 655 656 spinlock_t io_buf_list_put_lock; /* Common buf free list lock */ 656 657 struct list_head lpfc_io_buf_list_put; 657 - spinlock_t abts_scsi_buf_list_lock; /* list of aborted SCSI IOs */ 658 - struct list_head lpfc_abts_scsi_buf_list; 659 - spinlock_t abts_nvme_buf_list_lock; /* list of aborted NVME IOs */ 660 - struct list_head lpfc_abts_nvme_buf_list; 658 + spinlock_t abts_io_buf_list_lock; /* list of aborted IOs */ 659 + struct list_head lpfc_abts_io_buf_list; 661 660 uint32_t total_io_bufs; 662 661 uint32_t get_io_bufs; 663 662 uint32_t put_io_bufs; ··· 676 685 uint32_t cpucheck_xmt_io[LPFC_CHECK_CPU_CNT]; 677 686 uint32_t cpucheck_cmpl_io[LPFC_CHECK_CPU_CNT]; 678 687 #endif 688 + 689 + /* Per HDWQ pool resources */ 690 + struct list_head sgl_list; 691 + struct list_head cmd_rsp_buf_list; 692 + 693 + /* Lock for syncing Per HDWQ pool resources */ 694 + spinlock_t hdwq_lock; 679 695 }; 680 696 681 697 #ifdef LPFC_HDWQ_LOCK_STAT ··· 848 850 struct lpfc_queue **cq_lookup; 849 851 struct list_head lpfc_els_sgl_list; 850 852 struct list_head lpfc_abts_els_sgl_list; 851 - spinlock_t abts_scsi_buf_list_lock; /* list of aborted SCSI IOs */ 852 - struct list_head lpfc_abts_scsi_buf_list; 853 + spinlock_t abts_io_buf_list_lock; /* list of aborted SCSI IOs */ 854 + struct list_head lpfc_abts_io_buf_list; 853 855 struct list_head lpfc_nvmet_sgl_list; 854 856 spinlock_t abts_nvmet_buf_list_lock; /* list of aborted NVMET IOs */ 855 857 struct list_head lpfc_abts_nvmet_ctx_list; ··· 1054 1056 void (*)(struct lpfc_hba *, LPFC_MBOXQ_t *), void *); 1055 1057 void lpfc_sli4_fcp_xri_abort_event_proc(struct lpfc_hba *); 1056 1058 void lpfc_sli4_els_xri_abort_event_proc(struct lpfc_hba *); 1057 - void lpfc_sli4_fcp_xri_aborted(struct lpfc_hba *, 1058 - struct sli4_wcqe_xri_aborted *, int); 1059 1059 void lpfc_sli4_nvme_xri_aborted(struct lpfc_hba *phba, 1060 - struct sli4_wcqe_xri_aborted *axri, int idx); 1060 + struct sli4_wcqe_xri_aborted *axri, 1061 + struct lpfc_io_buf *lpfc_ncmd); 1062 + void lpfc_sli4_io_xri_aborted(struct lpfc_hba *phba, 1063 + struct sli4_wcqe_xri_aborted *axri, int idx); 1061 1064 void lpfc_sli4_nvmet_xri_aborted(struct lpfc_hba *phba, 1062 1065 struct sli4_wcqe_xri_aborted *axri); 1063 1066 void lpfc_sli4_els_xri_aborted(struct lpfc_hba *, ··· 1093 1094 uint8_t lpfc_sli_config_mbox_subsys_get(struct lpfc_hba *, LPFC_MBOXQ_t *); 1094 1095 uint8_t lpfc_sli_config_mbox_opcode_get(struct lpfc_hba *, LPFC_MBOXQ_t *); 1095 1096 void lpfc_sli4_ras_dma_free(struct lpfc_hba *phba); 1097 + struct sli4_hybrid_sgl *lpfc_get_sgl_per_hdwq(struct lpfc_hba *phba, 1098 + struct lpfc_io_buf *buf); 1099 + struct fcp_cmd_rsp_buf *lpfc_get_cmd_rsp_buf_per_hdwq(struct lpfc_hba *phba, 1100 + struct lpfc_io_buf *buf); 1101 + int lpfc_put_sgl_per_hdwq(struct lpfc_hba *phba, struct lpfc_io_buf *buf); 1102 + int lpfc_put_cmd_rsp_buf_per_hdwq(struct lpfc_hba *phba, 1103 + struct lpfc_io_buf *buf); 1104 + void lpfc_free_sgl_per_hdwq(struct lpfc_hba *phba, 1105 + struct lpfc_sli4_hdw_queue *hdwq); 1106 + void lpfc_free_cmd_rsp_buf_per_hdwq(struct lpfc_hba *phba, 1107 + struct lpfc_sli4_hdw_queue *hdwq); 1096 1108 static inline void *lpfc_sli4_qe(struct lpfc_queue *q, uint16_t idx) 1097 1109 { 1098 1110 return q->q_pgs[idx / q->entry_cnt_per_pg] +
+1 -1
drivers/scsi/lpfc/lpfc_version.h
··· 20 20 * included with this package. * 21 21 *******************************************************************/ 22 22 23 - #define LPFC_DRIVER_VERSION "12.2.0.3" 23 + #define LPFC_DRIVER_VERSION "12.4.0.0" 24 24 #define LPFC_DRIVER_NAME "lpfc" 25 25 26 26 /* Used for SLI 2/3 */
+5 -3
drivers/scsi/lpfc/lpfc_vport.c
··· 527 527 * scsi_host_put() to release the vport. 528 528 */ 529 529 lpfc_mbx_unreg_vpi(vport); 530 - spin_lock_irq(shost->host_lock); 531 - vport->fc_flag |= FC_VPORT_NEEDS_INIT_VPI; 532 - spin_unlock_irq(shost->host_lock); 530 + if (phba->sli_rev == LPFC_SLI_REV4) { 531 + spin_lock_irq(shost->host_lock); 532 + vport->fc_flag |= FC_VPORT_NEEDS_INIT_VPI; 533 + spin_unlock_irq(shost->host_lock); 534 + } 533 535 534 536 lpfc_vport_set_state(vport, FC_VPORT_DISABLED); 535 537 lpfc_printf_vlog(vport, KERN_ERR, LOG_VPORT,
+1
drivers/scsi/megaraid/megaraid_sas.h
··· 2429 2429 u8 adapter_type; 2430 2430 bool consistent_mask_64bit; 2431 2431 bool support_nvme_passthru; 2432 + bool enable_sdev_max_qd; 2432 2433 u8 task_abort_tmo; 2433 2434 u8 max_reset_tmo; 2434 2435 u8 snapdump_wait_time;
+92 -22
drivers/scsi/megaraid/megaraid_sas_base.c
··· 109 109 module_param(event_log_level, int, 0644); 110 110 MODULE_PARM_DESC(event_log_level, "Asynchronous event logging level- range is: -2(CLASS_DEBUG) to 4(CLASS_DEAD), Default: 2(CLASS_CRITICAL)"); 111 111 112 + unsigned int enable_sdev_max_qd; 113 + module_param(enable_sdev_max_qd, int, 0444); 114 + MODULE_PARM_DESC(enable_sdev_max_qd, "Enable sdev max qd as can_queue. Default: 0"); 115 + 112 116 MODULE_LICENSE("GPL"); 113 117 MODULE_VERSION(MEGASAS_VERSION); 114 118 MODULE_AUTHOR("megaraidlinux.pdl@broadcom.com"); ··· 1945 1941 blk_queue_virt_boundary(sdev->request_queue, mr_nvme_pg_size - 1); 1946 1942 } 1947 1943 1948 - 1949 1944 /* 1950 - * megasas_set_static_target_properties - 1951 - * Device property set by driver are static and it is not required to be 1952 - * updated after OCR. 1953 - * 1954 - * set io timeout 1955 - * set device queue depth 1956 - * set nvme device properties. see - megasas_set_nvme_device_properties 1945 + * megasas_set_fw_assisted_qd - 1946 + * set device queue depth to can_queue 1947 + * set device queue depth to fw assisted qd 1957 1948 * 1958 1949 * @sdev: scsi device 1959 1950 * @is_target_prop true, if fw provided target properties. 1960 1951 */ 1961 - static void megasas_set_static_target_properties(struct scsi_device *sdev, 1952 + static void megasas_set_fw_assisted_qd(struct scsi_device *sdev, 1962 1953 bool is_target_prop) 1963 1954 { 1964 1955 u8 interface_type; 1965 1956 u32 device_qd = MEGASAS_DEFAULT_CMD_PER_LUN; 1966 - u32 max_io_size_kb = MR_DEFAULT_NVME_MDTS_KB; 1967 1957 u32 tgt_device_qd; 1968 1958 struct megasas_instance *instance; 1969 1959 struct MR_PRIV_DEVICE *mr_device_priv_data; ··· 1965 1967 instance = megasas_lookup_instance(sdev->host->host_no); 1966 1968 mr_device_priv_data = sdev->hostdata; 1967 1969 interface_type = mr_device_priv_data->interface_type; 1968 - 1969 - /* 1970 - * The RAID firmware may require extended timeouts. 1971 - */ 1972 - blk_queue_rq_timeout(sdev->request_queue, scmd_timeout * HZ); 1973 1970 1974 1971 switch (interface_type) { 1975 1972 case SAS_PD: ··· 1983 1990 if (tgt_device_qd && 1984 1991 (tgt_device_qd <= instance->host->can_queue)) 1985 1992 device_qd = tgt_device_qd; 1986 - 1987 - /* max_io_size_kb will be set to non zero for 1988 - * nvme based vd and syspd. 1989 - */ 1990 - max_io_size_kb = le32_to_cpu(instance->tgt_prop->max_io_size_kb); 1991 1993 } 1994 + 1995 + if (instance->enable_sdev_max_qd && interface_type != UNKNOWN_DRIVE) 1996 + device_qd = instance->host->can_queue; 1997 + 1998 + scsi_change_queue_depth(sdev, device_qd); 1999 + } 2000 + 2001 + /* 2002 + * megasas_set_static_target_properties - 2003 + * Device property set by driver are static and it is not required to be 2004 + * updated after OCR. 2005 + * 2006 + * set io timeout 2007 + * set device queue depth 2008 + * set nvme device properties. see - megasas_set_nvme_device_properties 2009 + * 2010 + * @sdev: scsi device 2011 + * @is_target_prop true, if fw provided target properties. 2012 + */ 2013 + static void megasas_set_static_target_properties(struct scsi_device *sdev, 2014 + bool is_target_prop) 2015 + { 2016 + u32 max_io_size_kb = MR_DEFAULT_NVME_MDTS_KB; 2017 + struct megasas_instance *instance; 2018 + 2019 + instance = megasas_lookup_instance(sdev->host->host_no); 2020 + 2021 + /* 2022 + * The RAID firmware may require extended timeouts. 2023 + */ 2024 + blk_queue_rq_timeout(sdev->request_queue, scmd_timeout * HZ); 2025 + 2026 + /* max_io_size_kb will be set to non zero for 2027 + * nvme based vd and syspd. 2028 + */ 2029 + if (is_target_prop) 2030 + max_io_size_kb = le32_to_cpu(instance->tgt_prop->max_io_size_kb); 1992 2031 1993 2032 if (instance->nvme_page_size && max_io_size_kb) 1994 2033 megasas_set_nvme_device_properties(sdev, (max_io_size_kb << 10)); 1995 2034 1996 - scsi_change_queue_depth(sdev, device_qd); 1997 - 2035 + megasas_set_fw_assisted_qd(sdev, is_target_prop); 1998 2036 } 1999 2037 2000 2038 ··· 3309 3285 } 3310 3286 3311 3287 static ssize_t 3288 + enable_sdev_max_qd_show(struct device *cdev, 3289 + struct device_attribute *attr, char *buf) 3290 + { 3291 + struct Scsi_Host *shost = class_to_shost(cdev); 3292 + struct megasas_instance *instance = (struct megasas_instance *)shost->hostdata; 3293 + 3294 + return snprintf(buf, PAGE_SIZE, "%d\n", instance->enable_sdev_max_qd); 3295 + } 3296 + 3297 + static ssize_t 3298 + enable_sdev_max_qd_store(struct device *cdev, 3299 + struct device_attribute *attr, const char *buf, size_t count) 3300 + { 3301 + struct Scsi_Host *shost = class_to_shost(cdev); 3302 + struct megasas_instance *instance = (struct megasas_instance *)shost->hostdata; 3303 + u32 val = 0; 3304 + bool is_target_prop; 3305 + int ret_target_prop = DCMD_FAILED; 3306 + struct scsi_device *sdev; 3307 + 3308 + if (kstrtou32(buf, 0, &val) != 0) { 3309 + pr_err("megasas: could not set enable_sdev_max_qd\n"); 3310 + return -EINVAL; 3311 + } 3312 + 3313 + mutex_lock(&instance->reset_mutex); 3314 + if (val) 3315 + instance->enable_sdev_max_qd = true; 3316 + else 3317 + instance->enable_sdev_max_qd = false; 3318 + 3319 + shost_for_each_device(sdev, shost) { 3320 + ret_target_prop = megasas_get_target_prop(instance, sdev); 3321 + is_target_prop = (ret_target_prop == DCMD_SUCCESS) ? true : false; 3322 + megasas_set_fw_assisted_qd(sdev, is_target_prop); 3323 + } 3324 + mutex_unlock(&instance->reset_mutex); 3325 + 3326 + return strlen(buf); 3327 + } 3328 + 3329 + static ssize_t 3312 3330 dump_system_regs_show(struct device *cdev, 3313 3331 struct device_attribute *attr, char *buf) 3314 3332 { ··· 3379 3313 static DEVICE_ATTR_RO(page_size); 3380 3314 static DEVICE_ATTR_RO(ldio_outstanding); 3381 3315 static DEVICE_ATTR_RO(fw_cmds_outstanding); 3316 + static DEVICE_ATTR_RW(enable_sdev_max_qd); 3382 3317 static DEVICE_ATTR_RO(dump_system_regs); 3383 3318 static DEVICE_ATTR_RO(raid_map_id); 3384 3319 ··· 3390 3323 &dev_attr_page_size, 3391 3324 &dev_attr_ldio_outstanding, 3392 3325 &dev_attr_fw_cmds_outstanding, 3326 + &dev_attr_enable_sdev_max_qd, 3393 3327 &dev_attr_dump_system_regs, 3394 3328 &dev_attr_raid_map_id, 3395 3329 NULL, ··· 5961 5893 MR_MAX_RAID_MAP_SIZE_OFFSET_SHIFT) & 5962 5894 MR_MAX_RAID_MAP_SIZE_MASK); 5963 5895 } 5896 + 5897 + instance->enable_sdev_max_qd = enable_sdev_max_qd; 5964 5898 5965 5899 switch (instance->adapter_type) { 5966 5900 case VENTURA_SERIES:
+14 -15
drivers/scsi/megaraid/megaraid_sas_fusion.c
··· 323 323 { 324 324 u16 cur_max_fw_cmds = 0; 325 325 u16 ldio_threshold = 0; 326 - struct megasas_register_set __iomem *reg_set; 327 - 328 - reg_set = instance->reg_set; 329 326 330 327 /* ventura FW does not fill outbound_scratch_pad_2 with queue depth */ 331 328 if (instance->adapter_type < VENTURA_SERIES) ··· 3508 3511 * @instance: Adapter soft state 3509 3512 * Completes all commands that is in reply descriptor queue 3510 3513 */ 3511 - int 3514 + static int 3512 3515 complete_cmd_fusion(struct megasas_instance *instance, u32 MSIxIndex, 3513 3516 struct megasas_irq_context *irq_context) 3514 3517 { ··· 3699 3702 * megasas_sync_irqs - Synchronizes all IRQs owned by adapter 3700 3703 * @instance: Adapter soft state 3701 3704 */ 3702 - void megasas_sync_irqs(unsigned long instance_addr) 3705 + static void megasas_sync_irqs(unsigned long instance_addr) 3703 3706 { 3704 3707 u32 count, i; 3705 3708 struct megasas_instance *instance = ··· 3757 3760 * 3758 3761 * Tasklet to complete cmds 3759 3762 */ 3760 - void 3763 + static void 3761 3764 megasas_complete_cmd_dpc_fusion(unsigned long instance_addr) 3762 3765 { 3763 3766 struct megasas_instance *instance = ··· 3777 3780 /** 3778 3781 * megasas_isr_fusion - isr entry point 3779 3782 */ 3780 - irqreturn_t megasas_isr_fusion(int irq, void *devp) 3783 + static irqreturn_t megasas_isr_fusion(int irq, void *devp) 3781 3784 { 3782 3785 struct megasas_irq_context *irq_context = devp; 3783 3786 struct megasas_instance *instance = irq_context->instance; ··· 3813 3816 * mfi_cmd: megasas_cmd pointer 3814 3817 * 3815 3818 */ 3816 - void 3819 + static void 3817 3820 build_mpt_mfi_pass_thru(struct megasas_instance *instance, 3818 3821 struct megasas_cmd *mfi_cmd) 3819 3822 { ··· 3871 3874 * @cmd: mfi cmd to build 3872 3875 * 3873 3876 */ 3874 - union MEGASAS_REQUEST_DESCRIPTOR_UNION * 3877 + static union MEGASAS_REQUEST_DESCRIPTOR_UNION * 3875 3878 build_mpt_cmd(struct megasas_instance *instance, struct megasas_cmd *cmd) 3876 3879 { 3877 3880 union MEGASAS_REQUEST_DESCRIPTOR_UNION *req_desc = NULL; ··· 3897 3900 * @cmd: mfi cmd pointer 3898 3901 * 3899 3902 */ 3900 - void 3903 + static void 3901 3904 megasas_issue_dcmd_fusion(struct megasas_instance *instance, 3902 3905 struct megasas_cmd *cmd) 3903 3906 { ··· 4093 4096 } 4094 4097 4095 4098 /* This function waits for outstanding commands on fusion to complete */ 4096 - int megasas_wait_for_outstanding_fusion(struct megasas_instance *instance, 4097 - int reason, int *convert) 4099 + static int 4100 + megasas_wait_for_outstanding_fusion(struct megasas_instance *instance, 4101 + int reason, int *convert) 4098 4102 { 4099 4103 int i, outstanding, retval = 0, hb_seconds_missed = 0; 4100 4104 u32 fw_state, abs_state; ··· 4219 4221 * megasas_refire_mgmt_cmd : Re-fire management commands 4220 4222 * @instance: Controller's soft instance 4221 4223 */ 4222 - void megasas_refire_mgmt_cmd(struct megasas_instance *instance) 4224 + static void megasas_refire_mgmt_cmd(struct megasas_instance *instance) 4223 4225 { 4224 4226 int j; 4225 4227 struct megasas_cmd_fusion *cmd_fusion; ··· 4745 4747 } 4746 4748 4747 4749 /*SRIOV get other instance in cluster if any*/ 4748 - struct megasas_instance *megasas_get_peer_instance(struct megasas_instance *instance) 4750 + static struct 4751 + megasas_instance *megasas_get_peer_instance(struct megasas_instance *instance) 4749 4752 { 4750 4753 int i; 4751 4754 ··· 5052 5053 } 5053 5054 5054 5055 /* Fusion Crash dump collection */ 5055 - void megasas_fusion_crash_dump(struct megasas_instance *instance) 5056 + static void megasas_fusion_crash_dump(struct megasas_instance *instance) 5056 5057 { 5057 5058 u32 status_reg; 5058 5059 u8 partial_copy = 0;
+3 -2
drivers/scsi/mpt3sas/mpi/mpi2.h
··· 9 9 * scatter/gather formats. 10 10 * Creation Date: June 21, 2006 11 11 * 12 - * mpi2.h Version: 02.00.53 12 + * mpi2.h Version: 02.00.54 13 13 * 14 14 * NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25 15 15 * prefix are for use only on MPI v2.5 products, and must not be used ··· 121 121 * 08-15-18 02.00.52 Bumped MPI2_HEADER_VERSION_UNIT. 122 122 * 08-28-18 02.00.53 Bumped MPI2_HEADER_VERSION_UNIT. 123 123 * Added MPI2_IOCSTATUS_FAILURE 124 + * 12-17-18 02.00.54 Bumped MPI2_HEADER_VERSION_UNIT 124 125 * -------------------------------------------------------------------------- 125 126 */ 126 127 ··· 162 161 163 162 164 163 /* Unit and Dev versioning for this MPI header set */ 165 - #define MPI2_HEADER_VERSION_UNIT (0x35) 164 + #define MPI2_HEADER_VERSION_UNIT (0x36) 166 165 #define MPI2_HEADER_VERSION_DEV (0x00) 167 166 #define MPI2_HEADER_VERSION_UNIT_MASK (0xFF00) 168 167 #define MPI2_HEADER_VERSION_UNIT_SHIFT (8)
+8 -2
drivers/scsi/mpt3sas/mpi/mpi2_cnfg.h
··· 7 7 * Title: MPI Configuration messages and pages 8 8 * Creation Date: November 10, 2006 9 9 * 10 - * mpi2_cnfg.h Version: 02.00.46 10 + * mpi2_cnfg.h Version: 02.00.47 11 11 * 12 12 * NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25 13 13 * prefix are for use only on MPI v2.5 products, and must not be used ··· 244 244 * Added DMDReport Delay Time defines to 245 245 * PCIeIOUnitPage1 246 246 * -------------------------------------------------------------------------- 247 + * 08-02-18 02.00.44 Added Slotx2, Slotx4 to ManPage 7. 248 + * 08-15-18 02.00.45 Added ProductSpecific field at end of IOC Page 1 249 + * 08-28-18 02.00.46 Added NVMs Write Cache flag to IOUnitPage1 250 + * Added DMDReport Delay Time defines to PCIeIOUnitPage1 251 + * 12-17-18 02.00.47 Swap locations of Slotx2 and Slotx4 in ManPage 7. 247 252 */ 248 253 249 254 #ifndef MPI2_CNFG_H ··· 815 810 U8 Location; /*0x14 */ 816 811 U8 ReceptacleID; /*0x15 */ 817 812 U16 Slot; /*0x16 */ 818 - U32 Reserved2; /*0x18 */ 813 + U16 Slotx2; /*0x18 */ 814 + U16 Slotx4; /*0x1A */ 819 815 } MPI2_MANPAGE7_CONNECTOR_INFO, 820 816 *PTR_MPI2_MANPAGE7_CONNECTOR_INFO, 821 817 Mpi2ManPage7ConnectorInfo_t,
+21 -18
drivers/scsi/mpt3sas/mpi/mpi2_image.h
··· 5 5 * Name: mpi2_image.h 6 6 * Description: Contains definitions for firmware and other component images 7 7 * Creation Date: 04/02/2018 8 - * Version: 02.06.03 8 + * Version: 02.06.04 9 9 * 10 10 * 11 11 * Version History ··· 17 17 * 08-14-18 02.06.01 Corrected define for MPI26_IMAGE_HEADER_SIGNATURE0_MPI26 18 18 * 08-28-18 02.06.02 Added MPI2_EXT_IMAGE_TYPE_RDE 19 19 * 09-07-18 02.06.03 Added MPI26_EVENT_PCIE_TOPO_PI_16_LANES 20 + * 12-17-18 02.06.04 Addd MPI2_EXT_IMAGE_TYPE_PBLP 21 + * Shorten some defines to be compatible with DOS 20 22 */ 21 23 #ifndef MPI2_IMAGE_H 22 24 #define MPI2_IMAGE_H ··· 202 200 #define MPI26_IMAGE_HEADER_SIGNATURE0_MPI26 (0xEB000042) 203 201 204 202 /**** Definitions for Signature1 field ****/ 205 - #define MPI26_IMAGE_HEADER_SIGNATURE1_APPLICATION (0x20505041) 206 - #define MPI26_IMAGE_HEADER_SIGNATURE1_CBB (0x20424243) 207 - #define MPI26_IMAGE_HEADER_SIGNATURE1_MFG (0x2047464D) 208 - #define MPI26_IMAGE_HEADER_SIGNATURE1_BIOS (0x534F4942) 209 - #define MPI26_IMAGE_HEADER_SIGNATURE1_HIIM (0x4D494948) 210 - #define MPI26_IMAGE_HEADER_SIGNATURE1_HIIA (0x41494948) 211 - #define MPI26_IMAGE_HEADER_SIGNATURE1_CPLD (0x444C5043) 212 - #define MPI26_IMAGE_HEADER_SIGNATURE1_SPD (0x20445053) 213 - #define MPI26_IMAGE_HEADER_SIGNATURE1_NVDATA (0x5444564E) 214 - #define MPI26_IMAGE_HEADER_SIGNATURE1_GAS_GAUGE (0x20534147) 215 - #define MPI26_IMAGE_HEADER_SIGNATURE1_PBLP (0x50424C50) 203 + #define MPI26_IMAGE_HEADER_SIG1_APPLICATION (0x20505041) 204 + #define MPI26_IMAGE_HEADER_SIG1_CBB (0x20424243) 205 + #define MPI26_IMAGE_HEADER_SIG1_MFG (0x2047464D) 206 + #define MPI26_IMAGE_HEADER_SIG1_BIOS (0x534F4942) 207 + #define MPI26_IMAGE_HEADER_SIG1_HIIM (0x4D494948) 208 + #define MPI26_IMAGE_HEADER_SIG1_HIIA (0x41494948) 209 + #define MPI26_IMAGE_HEADER_SIG1_CPLD (0x444C5043) 210 + #define MPI26_IMAGE_HEADER_SIG1_SPD (0x20445053) 211 + #define MPI26_IMAGE_HEADER_SIG1_NVDATA (0x5444564E) 212 + #define MPI26_IMAGE_HEADER_SIG1_GAS_GAUGE (0x20534147) 213 + #define MPI26_IMAGE_HEADER_SIG1_PBLP (0x504C4250) 216 214 217 215 /**** Definitions for Signature2 field ****/ 218 216 #define MPI26_IMAGE_HEADER_SIGNATURE2_VALUE (0x50584546) ··· 280 278 #define MPI2_EXT_IMAGE_TYPE_MEGARAID (0x08) 281 279 #define MPI2_EXT_IMAGE_TYPE_ENCRYPTED_HASH (0x09) 282 280 #define MPI2_EXT_IMAGE_TYPE_RDE (0x0A) 281 + #define MPI2_EXT_IMAGE_TYPE_PBLP (0x0B) 283 282 #define MPI2_EXT_IMAGE_TYPE_MIN_PRODUCT_SPECIFIC (0x80) 284 283 #define MPI2_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC (0xFF) 285 284 ··· 475 472 #define MPI25_HASH_ALGORITHM_UNUSED (0x00) 476 473 #define MPI25_HASH_ALGORITHM_SHA256 (0x01) 477 474 478 - #define MPI26_HASH_ALGORITHM_VERSION_MASK (0xE0) 479 - #define MPI26_HASH_ALGORITHM_VERSION_NONE (0x00) 480 - #define MPI26_HASH_ALGORITHM_VERSION_SHA1 (0x20) 481 - #define MPI26_HASH_ALGORITHM_VERSION_SHA2 (0x40) 482 - #define MPI26_HASH_ALGORITHM_VERSION_SHA3 (0x60) 483 - #define MPI26_HASH_ALGORITHM_SIZE_MASK (0x1F) 475 + #define MPI26_HASH_ALGORITHM_VER_MASK (0xE0) 476 + #define MPI26_HASH_ALGORITHM_VER_NONE (0x00) 477 + #define MPI26_HASH_ALGORITHM_VER_SHA1 (0x20) 478 + #define MPI26_HASH_ALGORITHM_VER_SHA2 (0x40) 479 + #define MPI26_HASH_ALGORITHM_VER_SHA3 (0x60) 480 + #define MPI26_HASH_ALGORITHM_SIZE_MASK (0x1F) 484 481 #define MPI26_HASH_ALGORITHM_SIZE_256 (0x01) 485 482 #define MPI26_HASH_ALGORITHM_SIZE_512 (0x02) 486 483
+7 -6
drivers/scsi/mpt3sas/mpi/mpi2_pci.h
··· 6 6 * Title: MPI PCIe Attached Devices structures and definitions. 7 7 * Creation Date: October 9, 2012 8 8 * 9 - * mpi2_pci.h Version: 02.00.03 9 + * mpi2_pci.h Version: 02.00.04 10 10 * 11 11 * NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25 12 12 * prefix are for use only on MPI v2.5 products, and must not be used ··· 24 24 * 07-01-16 02.00.02 Added MPI26_NVME_FLAGS_FORCE_ADMIN_ERR_RESP to 25 25 * NVME Encapsulated Request. 26 26 * 07-22-18 02.00.03 Updted flags field for NVME Encapsulated req 27 + * 12-17-18 02.00.04 Added MPI26_PCIE_DEVINFO_SCSI 28 + * Shortten some defines to be compatible with DOS 27 29 * -------------------------------------------------------------------------- 28 30 */ 29 31 ··· 43 41 #define MPI26_PCIE_DEVINFO_NO_DEVICE (0x00000000) 44 42 #define MPI26_PCIE_DEVINFO_PCI_SWITCH (0x00000001) 45 43 #define MPI26_PCIE_DEVINFO_NVME (0x00000003) 46 - 44 + #define MPI26_PCIE_DEVINFO_SCSI (0x00000004) 47 45 48 46 /**************************************************************************** 49 47 * NVMe Encapsulated message ··· 77 75 #define MPI26_NVME_FLAGS_SUBMISSIONQ_IO (0x0000) 78 76 #define MPI26_NVME_FLAGS_SUBMISSIONQ_ADMIN (0x0010) 79 77 /*Error Response Address Space */ 80 - #define MPI26_NVME_FLAGS_MASK_ERROR_RSP_ADDR (0x000C) 81 - #define MPI26_NVME_FLAGS_MASK_ERROR_RSP_ADDR_MASK (0x000C) 82 - #define MPI26_NVME_FLAGS_SYSTEM_RSP_ADDR (0x0000) 83 - #define MPI26_NVME_FLAGS_IOCCTL_RSP_ADDR (0x0008) 78 + #define MPI26_NVME_FLAGS_ERR_RSP_ADDR_MASK (0x000C) 79 + #define MPI26_NVME_FLAGS_ERR_RSP_ADDR_SYSTEM (0x0000) 80 + #define MPI26_NVME_FLAGS_ERR_RSP_ADDR_IOCTL (0x0008) 84 81 /* Data Direction*/ 85 82 #define MPI26_NVME_FLAGS_DATADIRECTION_MASK (0x0003) 86 83 #define MPI26_NVME_FLAGS_NODATATRANSFER (0x0000)
+7 -6
drivers/scsi/mpt3sas/mpi/mpi2_tool.h
··· 7 7 * Title: MPI diagnostic tool structures and definitions 8 8 * Creation Date: March 26, 2007 9 9 * 10 - * mpi2_tool.h Version: 02.00.15 10 + * mpi2_tool.h Version: 02.00.16 11 11 * 12 12 * Version History 13 13 * --------------- ··· 40 40 * Tool Request Message. 41 41 * 07-22-18 02.00.15 Added defines for new TOOLBOX_PCIE_LANE_MARGINING tool. 42 42 * Added option for DeviceInfo field in ISTWI tool. 43 + * 12-17-18 02.00.16 Shorten some defines to be compatible with DOS. 43 44 * -------------------------------------------------------------------------- 44 45 */ 45 46 ··· 231 230 #define MPI2_TOOL_ISTWI_FLAG_PAGE_ADDR_MASK (0x07) 232 231 233 232 /*MPI26 TOOLBOX Request MsgFlags defines */ 234 - #define MPI26_TOOLBOX_REQ_MSGFLAGS_ADDRESSING_MASK (0x01) 233 + #define MPI26_TOOL_ISTWI_MSGFLG_ADDR_MASK (0x01) 235 234 /*Request uses Man Page 43 device index addressing */ 236 - #define MPI26_TOOLBOX_REQ_MSGFLAGS_ADDRESSING_DEVINDEX (0x00) 235 + #define MPI26_TOOL_ISTWI_MSGFLG_ADDR_INDEX (0x00) 237 236 /*Request uses Man Page 43 device info struct addressing */ 238 - #define MPI26_TOOLBOX_REQ_MSGFLAGS_ADDRESSING_DEVINFO (0x01) 237 + #define MPI26_TOOL_ISTWI_MSGFLG_ADDR_INFO (0x01) 239 238 240 239 /*Toolbox ISTWI Read Write Tool reply message */ 241 240 typedef struct _MPI2_TOOLBOX_ISTWI_REPLY { ··· 404 403 */ 405 404 406 405 /*Toolbox Backend Lane Margining Tool request message */ 407 - typedef struct _MPI26_TOOLBOX_LANE_MARGINING_REQUEST { 406 + typedef struct _MPI26_TOOLBOX_LANE_MARGIN_REQUEST { 408 407 U8 Tool; /*0x00 */ 409 408 U8 Reserved1; /*0x01 */ 410 409 U8 ChainOffset; /*0x02 */ ··· 435 434 436 435 437 436 /*Toolbox Backend Lane Margining Tool reply message */ 438 - typedef struct _MPI26_TOOLBOX_LANE_MARGINING_REPLY { 437 + typedef struct _MPI26_TOOLBOX_LANE_MARGIN_REPLY { 439 438 U8 Tool; /*0x00 */ 440 439 U8 Reserved1; /*0x01 */ 441 440 U8 MsgLength; /*0x02 */
+162 -13
drivers/scsi/mpt3sas/mpt3sas_base.c
··· 2260 2260 bool build_prp = true; 2261 2261 2262 2262 data_length = scsi_bufflen(scmd); 2263 + if (pcie_device && 2264 + (mpt3sas_scsih_is_pcie_scsi_device(pcie_device->device_info))) { 2265 + build_prp = false; 2266 + return build_prp; 2267 + } 2263 2268 2264 2269 /* If Datalenth is <= 16K and number of SGE’s entries are <= 2 2265 2270 * we built IEEE SGL ··· 3183 3178 } 3184 3179 } 3185 3180 3181 + static int 3182 + _base_diag_reset(struct MPT3SAS_ADAPTER *ioc); 3183 + 3184 + /** 3185 + * _base_check_for_fault_and_issue_reset - check if IOC is in fault state 3186 + * and if it is in fault state then issue diag reset. 3187 + * @ioc: per adapter object 3188 + * 3189 + * Returns: 0 for success, non-zero for failure. 3190 + */ 3191 + static int 3192 + _base_check_for_fault_and_issue_reset(struct MPT3SAS_ADAPTER *ioc) 3193 + { 3194 + u32 ioc_state; 3195 + int rc = -EFAULT; 3196 + 3197 + dinitprintk(ioc, pr_info("%s\n", __func__)); 3198 + if (ioc->pci_error_recovery) 3199 + return 0; 3200 + ioc_state = mpt3sas_base_get_iocstate(ioc, 0); 3201 + dhsprintk(ioc, pr_info("%s: ioc_state(0x%08x)\n", __func__, ioc_state)); 3202 + 3203 + if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) { 3204 + mpt3sas_base_fault_info(ioc, ioc_state & 3205 + MPI2_DOORBELL_DATA_MASK); 3206 + rc = _base_diag_reset(ioc); 3207 + } 3208 + 3209 + return rc; 3210 + } 3211 + 3186 3212 /** 3187 3213 * mpt3sas_base_map_resources - map in controller resources (io/irq/memap) 3188 3214 * @ioc: per adapter object ··· 3226 3190 struct pci_dev *pdev = ioc->pdev; 3227 3191 u32 memap_sz; 3228 3192 u32 pio_sz; 3229 - int i, r = 0; 3193 + int i, r = 0, rc; 3230 3194 u64 pio_chip = 0; 3231 3195 phys_addr_t chip_phys = 0; 3232 3196 struct adapter_reply_queue *reply_q; ··· 3287 3251 _base_mask_interrupts(ioc); 3288 3252 3289 3253 r = _base_get_ioc_facts(ioc); 3290 - if (r) 3291 - goto out_fail; 3254 + if (r) { 3255 + rc = _base_check_for_fault_and_issue_reset(ioc); 3256 + if (rc || (_base_get_ioc_facts(ioc))) 3257 + goto out_fail; 3258 + } 3292 3259 3293 3260 if (!ioc->rdpq_array_enable_assigned) { 3294 3261 ioc->rdpq_array_enable = ioc->rdpq_array_capable; ··· 5076 5037 _base_release_memory_pools(ioc); 5077 5038 goto retry_allocation; 5078 5039 } 5040 + memset(ioc->request, 0, sz); 5079 5041 5080 5042 if (retry_sz) 5081 5043 ioc_err(ioc, "request pool: dma_alloc_coherent succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), total(%d kb)\n", ··· 5450 5410 * 5451 5411 * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell. 5452 5412 */ 5453 - static int 5454 - _base_diag_reset(struct MPT3SAS_ADAPTER *ioc); 5455 5413 5456 5414 static int 5457 5415 _base_wait_for_doorbell_int(struct MPT3SAS_ADAPTER *ioc, int timeout) ··· 5906 5868 ioc->base_cmds.status = MPT3_CMD_PENDING; 5907 5869 request = mpt3sas_base_get_msg_frame(ioc, smid); 5908 5870 ioc->base_cmds.smid = smid; 5871 + memset(request, 0, ioc->request_sz); 5909 5872 memcpy(request, mpi_request, sizeof(Mpi2SepReply_t)); 5910 5873 init_completion(&ioc->base_cmds.done); 5911 5874 ioc->put_smid_default(ioc, smid); ··· 6725 6686 static int 6726 6687 _base_make_ioc_operational(struct MPT3SAS_ADAPTER *ioc) 6727 6688 { 6728 - int r, i, index; 6689 + int r, i, index, rc; 6729 6690 unsigned long flags; 6730 6691 u32 reply_address; 6731 6692 u16 smid; ··· 6828 6789 skip_init_reply_post_free_queue: 6829 6790 6830 6791 r = _base_send_ioc_init(ioc); 6831 - if (r) 6832 - return r; 6792 + if (r) { 6793 + /* 6794 + * No need to check IOC state for fault state & issue 6795 + * diag reset during host reset. This check is need 6796 + * only during driver load time. 6797 + */ 6798 + if (!ioc->is_driver_loading) 6799 + return r; 6800 + 6801 + rc = _base_check_for_fault_and_issue_reset(ioc); 6802 + if (rc || (_base_send_ioc_init(ioc))) 6803 + return r; 6804 + } 6833 6805 6834 6806 /* initialize reply free host index */ 6835 6807 ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1; ··· 6932 6882 int 6933 6883 mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc) 6934 6884 { 6935 - int r, i; 6885 + int r, i, rc; 6936 6886 int cpu_id, last_cpu_id = 0; 6937 6887 6938 6888 dinitprintk(ioc, ioc_info(ioc, "%s\n", __func__)); ··· 6976 6926 6977 6927 pci_set_drvdata(ioc->pdev, ioc->shost); 6978 6928 r = _base_get_ioc_facts(ioc); 6979 - if (r) 6980 - goto out_free_resources; 6929 + if (r) { 6930 + rc = _base_check_for_fault_and_issue_reset(ioc); 6931 + if (rc || (_base_get_ioc_facts(ioc))) 6932 + goto out_free_resources; 6933 + } 6981 6934 6982 6935 switch (ioc->hba_mpi_version_belonged) { 6983 6936 case MPI2_VERSION: ··· 7048 6995 7049 6996 for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) { 7050 6997 r = _base_get_port_facts(ioc, i); 7051 - if (r) 7052 - goto out_free_resources; 6998 + if (r) { 6999 + rc = _base_check_for_fault_and_issue_reset(ioc); 7000 + if (rc || (_base_get_port_facts(ioc, i))) 7001 + goto out_free_resources; 7002 + } 7053 7003 } 7054 7004 7055 7005 r = _base_allocate_memory_pools(ioc); ··· 7173 7117 r = _base_make_ioc_operational(ioc); 7174 7118 if (r) 7175 7119 goto out_free_resources; 7120 + 7121 + /* 7122 + * Copy current copy of IOCFacts in prev_fw_facts 7123 + * and it will be used during online firmware upgrade. 7124 + */ 7125 + memcpy(&ioc->prev_fw_facts, &ioc->facts, 7126 + sizeof(struct mpt3sas_facts)); 7176 7127 7177 7128 ioc->non_operational_loop = 0; 7178 7129 ioc->got_task_abort_from_ioctl = 0; ··· 7343 7280 } 7344 7281 7345 7282 /** 7283 + * _base_check_ioc_facts_changes - Look for increase/decrease of IOCFacts 7284 + * attributes during online firmware upgrade and update the corresponding 7285 + * IOC variables accordingly. 7286 + * 7287 + * @ioc: Pointer to MPT_ADAPTER structure 7288 + */ 7289 + static int 7290 + _base_check_ioc_facts_changes(struct MPT3SAS_ADAPTER *ioc) 7291 + { 7292 + u16 pd_handles_sz; 7293 + void *pd_handles = NULL, *blocking_handles = NULL; 7294 + void *pend_os_device_add = NULL, *device_remove_in_progress = NULL; 7295 + struct mpt3sas_facts *old_facts = &ioc->prev_fw_facts; 7296 + 7297 + if (ioc->facts.MaxDevHandle > old_facts->MaxDevHandle) { 7298 + pd_handles_sz = (ioc->facts.MaxDevHandle / 8); 7299 + if (ioc->facts.MaxDevHandle % 8) 7300 + pd_handles_sz++; 7301 + 7302 + pd_handles = krealloc(ioc->pd_handles, pd_handles_sz, 7303 + GFP_KERNEL); 7304 + if (!pd_handles) { 7305 + ioc_info(ioc, 7306 + "Unable to allocate the memory for pd_handles of sz: %d\n", 7307 + pd_handles_sz); 7308 + return -ENOMEM; 7309 + } 7310 + memset(pd_handles + ioc->pd_handles_sz, 0, 7311 + (pd_handles_sz - ioc->pd_handles_sz)); 7312 + ioc->pd_handles = pd_handles; 7313 + 7314 + blocking_handles = krealloc(ioc->blocking_handles, 7315 + pd_handles_sz, GFP_KERNEL); 7316 + if (!blocking_handles) { 7317 + ioc_info(ioc, 7318 + "Unable to allocate the memory for " 7319 + "blocking_handles of sz: %d\n", 7320 + pd_handles_sz); 7321 + return -ENOMEM; 7322 + } 7323 + memset(blocking_handles + ioc->pd_handles_sz, 0, 7324 + (pd_handles_sz - ioc->pd_handles_sz)); 7325 + ioc->blocking_handles = blocking_handles; 7326 + ioc->pd_handles_sz = pd_handles_sz; 7327 + 7328 + pend_os_device_add = krealloc(ioc->pend_os_device_add, 7329 + pd_handles_sz, GFP_KERNEL); 7330 + if (!pend_os_device_add) { 7331 + ioc_info(ioc, 7332 + "Unable to allocate the memory for pend_os_device_add of sz: %d\n", 7333 + pd_handles_sz); 7334 + return -ENOMEM; 7335 + } 7336 + memset(pend_os_device_add + ioc->pend_os_device_add_sz, 0, 7337 + (pd_handles_sz - ioc->pend_os_device_add_sz)); 7338 + ioc->pend_os_device_add = pend_os_device_add; 7339 + ioc->pend_os_device_add_sz = pd_handles_sz; 7340 + 7341 + device_remove_in_progress = krealloc( 7342 + ioc->device_remove_in_progress, pd_handles_sz, GFP_KERNEL); 7343 + if (!device_remove_in_progress) { 7344 + ioc_info(ioc, 7345 + "Unable to allocate the memory for " 7346 + "device_remove_in_progress of sz: %d\n " 7347 + , pd_handles_sz); 7348 + return -ENOMEM; 7349 + } 7350 + memset(device_remove_in_progress + 7351 + ioc->device_remove_in_progress_sz, 0, 7352 + (pd_handles_sz - ioc->device_remove_in_progress_sz)); 7353 + ioc->device_remove_in_progress = device_remove_in_progress; 7354 + ioc->device_remove_in_progress_sz = pd_handles_sz; 7355 + } 7356 + 7357 + memcpy(&ioc->prev_fw_facts, &ioc->facts, sizeof(struct mpt3sas_facts)); 7358 + return 0; 7359 + } 7360 + 7361 + /** 7346 7362 * mpt3sas_base_hard_reset_handler - reset controller 7347 7363 * @ioc: Pointer to MPT_ADAPTER structure 7348 7364 * @type: FORCE_BIG_HAMMER or SOFT_RESET ··· 7484 7342 if (r) 7485 7343 goto out; 7486 7344 7345 + r = _base_check_ioc_facts_changes(ioc); 7346 + if (r) { 7347 + ioc_info(ioc, 7348 + "Some of the parameters got changed in this new firmware" 7349 + " image and it requires system reboot\n"); 7350 + goto out; 7351 + } 7487 7352 if (ioc->rdpq_array_enable && !ioc->rdpq_array_capable) 7488 7353 panic("%s: Issue occurred with flashing controller firmware." 7489 7354 "Please reboot the system and ensure that the correct"
+28 -2
drivers/scsi/mpt3sas/mpt3sas_base.h
··· 76 76 #define MPT3SAS_DRIVER_NAME "mpt3sas" 77 77 #define MPT3SAS_AUTHOR "Avago Technologies <MPT-FusionLinux.pdl@avagotech.com>" 78 78 #define MPT3SAS_DESCRIPTION "LSI MPT Fusion SAS 3.0 Device Driver" 79 - #define MPT3SAS_DRIVER_VERSION "29.100.00.00" 80 - #define MPT3SAS_MAJOR_VERSION 29 79 + #define MPT3SAS_DRIVER_VERSION "31.100.00.00" 80 + #define MPT3SAS_MAJOR_VERSION 31 81 81 #define MPT3SAS_MINOR_VERSION 100 82 82 #define MPT3SAS_BUILD_VERSION 0 83 83 #define MPT3SAS_RELEASE_VERSION 00 ··· 583 583 * @enclosure_level: The level of device's enclosure from the controller 584 584 * @connector_name: ASCII value of the Connector's name 585 585 * @serial_number: pointer of serial number string allocated runtime 586 + * @access_status: Device's Access Status 586 587 * @refcount: reference count for deletion 587 588 */ 588 589 struct _pcie_device { ··· 605 604 u8 connector_name[4]; 606 605 u8 *serial_number; 607 606 u8 reset_timeout; 607 + u8 access_status; 608 608 struct kref refcount; 609 609 }; 610 610 /** ··· 1047 1045 * @schedule_dead_ioc_flush_running_cmds: callback to flush pending commands 1048 1046 * @thresh_hold: Max number of reply descriptors processed 1049 1047 * before updating Host Index 1048 + * @drv_support_bitmap: driver's supported feature bit map 1050 1049 * @scsi_io_cb_idx: shost generated commands 1051 1050 * @tm_cb_idx: task management commands 1052 1051 * @scsih_cb_idx: scsih internal commands ··· 1069 1066 * @event_log: event log pointer 1070 1067 * @event_masks: events that are masked 1071 1068 * @facts: static facts data 1069 + * @prev_fw_facts: previous fw facts data 1072 1070 * @pfacts: static port facts data 1073 1071 * @manu_pg0: static manufacturing page 0 1074 1072 * @manu_pg10: static manufacturing page 10 ··· 1231 1227 bool msix_load_balance; 1232 1228 u16 thresh_hold; 1233 1229 u8 high_iops_queues; 1230 + u32 drv_support_bitmap; 1231 + bool enable_sdev_max_qd; 1234 1232 1235 1233 /* internal commands, callback index */ 1236 1234 u8 scsi_io_cb_idx; ··· 1282 1276 1283 1277 /* static config pages */ 1284 1278 struct mpt3sas_facts facts; 1279 + struct mpt3sas_facts prev_fw_facts; 1285 1280 struct mpt3sas_port_facts *pfacts; 1286 1281 Mpi2ManufacturingPage0_t manu_pg0; 1287 1282 struct Mpi2ManufacturingPage10_t manu_pg10; ··· 1457 1450 GET_MSIX_INDEX get_msix_index_for_smlio; 1458 1451 }; 1459 1452 1453 + #define MPT_DRV_SUPPORT_BITMAP_MEMMOVE 0x00000001 1454 + 1460 1455 typedef u8 (*MPT_CALLBACK)(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, 1461 1456 u32 reply); 1462 1457 ··· 1588 1579 void mpt3sas_port_enable_complete(struct MPT3SAS_ADAPTER *ioc); 1589 1580 struct _raid_device * 1590 1581 mpt3sas_raid_device_find_by_handle(struct MPT3SAS_ADAPTER *ioc, u16 handle); 1582 + void mpt3sas_scsih_change_queue_depth(struct scsi_device *sdev, int qdepth); 1591 1583 1592 1584 /* config shared API */ 1593 1585 u8 mpt3sas_config_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index, ··· 1743 1733 /* NCQ Prio Handling Check */ 1744 1734 bool scsih_ncq_prio_supp(struct scsi_device *sdev); 1745 1735 1736 + /** 1737 + * _scsih_is_pcie_scsi_device - determines if device is an pcie scsi device 1738 + * @device_info: bitfield providing information about the device. 1739 + * Context: none 1740 + * 1741 + * Returns 1 if scsi device. 1742 + */ 1743 + static inline int 1744 + mpt3sas_scsih_is_pcie_scsi_device(u32 device_info) 1745 + { 1746 + if ((device_info & 1747 + MPI26_PCIE_DEVINFO_MASK_DEVICE_TYPE) == MPI26_PCIE_DEVINFO_SCSI) 1748 + return 1; 1749 + else 1750 + return 0; 1751 + } 1746 1752 #endif /* MPT3SAS_BASE_H_INCLUDED */
+166 -12
drivers/scsi/mpt3sas/mpt3sas_ctl.c
··· 596 596 if (priv_data->sas_target->handle != handle) 597 597 continue; 598 598 st = scsi_cmd_priv(scmd); 599 - tm_request->TaskMID = cpu_to_le16(st->smid); 600 - found = 1; 599 + 600 + /* 601 + * If the given TaskMID from the user space is zero, then the 602 + * first outstanding smid will be picked up. Otherwise, 603 + * targeted smid will be the one. 604 + */ 605 + if (!tm_request->TaskMID || tm_request->TaskMID == st->smid) { 606 + tm_request->TaskMID = cpu_to_le16(st->smid); 607 + found = 1; 608 + } 601 609 } 602 610 603 611 if (!found) { ··· 662 654 size_t data_in_sz = 0; 663 655 long ret; 664 656 u16 device_handle = MPT3SAS_INVALID_DEVICE_HANDLE; 665 - u8 tr_method = MPI26_SCSITASKMGMT_MSGFLAGS_PROTOCOL_LVL_RST_PCIE; 666 657 667 658 issue_reset = 0; 668 659 ··· 714 707 ioc->ctl_cmds.status = MPT3_CMD_PENDING; 715 708 memset(ioc->ctl_cmds.reply, 0, ioc->reply_sz); 716 709 request = mpt3sas_base_get_msg_frame(ioc, smid); 710 + memset(request, 0, ioc->request_sz); 717 711 memcpy(request, mpi_request, karg.data_sge_offset*4); 718 712 ioc->ctl_cmds.smid = smid; 719 713 data_out_sz = karg.data_out_size; ··· 929 921 Mpi2ToolboxCleanRequest_t *toolbox_request = 930 922 (Mpi2ToolboxCleanRequest_t *)mpi_request; 931 923 932 - if (toolbox_request->Tool == MPI2_TOOLBOX_DIAGNOSTIC_CLI_TOOL) { 924 + if ((toolbox_request->Tool == MPI2_TOOLBOX_DIAGNOSTIC_CLI_TOOL) 925 + || (toolbox_request->Tool == 926 + MPI26_TOOLBOX_BACKEND_PCIE_LANE_MARGIN)) 933 927 ioc->build_sg(ioc, psge, data_out_dma, data_out_sz, 934 928 data_in_dma, data_in_sz); 935 - } else { 929 + else if (toolbox_request->Tool == 930 + MPI2_TOOLBOX_MEMORY_MOVE_TOOL) { 931 + Mpi2ToolboxMemMoveRequest_t *mem_move_request = 932 + (Mpi2ToolboxMemMoveRequest_t *)request; 933 + Mpi2SGESimple64_t tmp, *src = NULL, *dst = NULL; 934 + 935 + ioc->build_sg_mpi(ioc, psge, data_out_dma, 936 + data_out_sz, data_in_dma, data_in_sz); 937 + if (data_out_sz && !data_in_sz) { 938 + dst = 939 + (Mpi2SGESimple64_t *)&mem_move_request->SGL; 940 + src = (void *)dst + ioc->sge_size; 941 + 942 + memcpy(&tmp, src, ioc->sge_size); 943 + memcpy(src, dst, ioc->sge_size); 944 + memcpy(dst, &tmp, ioc->sge_size); 945 + } 946 + if (ioc->logging_level & MPT_DEBUG_TM) { 947 + ioc_info(ioc, 948 + "Mpi2ToolboxMemMoveRequest_t request msg\n"); 949 + _debug_dump_mf(mem_move_request, 950 + ioc->request_sz/4); 951 + } 952 + } else 936 953 ioc->build_sg_mpi(ioc, psge, data_out_dma, data_out_sz, 937 - data_in_dma, data_in_sz); 938 - } 954 + data_in_dma, data_in_sz); 939 955 ioc->put_smid_default(ioc, smid); 940 956 break; 941 957 } ··· 1079 1047 mpt3sas_halt_firmware(ioc); 1080 1048 pcie_device = mpt3sas_get_pdev_by_handle(ioc, 1081 1049 le16_to_cpu(mpi_request->FunctionDependent1)); 1082 - if (pcie_device && (!ioc->tm_custom_handling)) 1050 + if (pcie_device && (!ioc->tm_custom_handling) && 1051 + (!(mpt3sas_scsih_is_pcie_scsi_device( 1052 + pcie_device->device_info)))) 1083 1053 mpt3sas_scsih_issue_locked_tm(ioc, 1084 1054 le16_to_cpu(mpi_request->FunctionDependent1), 1085 1055 0, MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET, 0, 1086 1056 0, pcie_device->reset_timeout, 1087 - tr_method); 1057 + MPI26_SCSITASKMGMT_MSGFLAGS_PROTOCOL_LVL_RST_PCIE); 1088 1058 else 1089 1059 mpt3sas_scsih_issue_locked_tm(ioc, 1090 1060 le16_to_cpu(mpi_request->FunctionDependent1), ··· 3312 3278 ssize_t sz; 3313 3279 3314 3280 spin_lock_irqsave(&ioc->diag_trigger_lock, flags); 3315 - sz = min(sizeof(struct SL_WH_SCSI_TRIGGERS_T), count); 3316 - memset(&ioc->diag_trigger_scsi, 0, 3317 - sizeof(struct SL_WH_EVENT_TRIGGERS_T)); 3281 + sz = min(sizeof(ioc->diag_trigger_scsi), count); 3282 + memset(&ioc->diag_trigger_scsi, 0, sizeof(ioc->diag_trigger_scsi)); 3318 3283 memcpy(&ioc->diag_trigger_scsi, buf, sz); 3319 3284 if (ioc->diag_trigger_scsi.ValidEntries > NUM_VALID_ENTRIES) 3320 3285 ioc->diag_trigger_scsi.ValidEntries = NUM_VALID_ENTRIES; ··· 3382 3349 3383 3350 /*****************************************/ 3384 3351 3352 + /** 3353 + * drv_support_bitmap_show - driver supported feature bitmap 3354 + * @cdev - pointer to embedded class device 3355 + * @buf - the buffer returned 3356 + * 3357 + * A sysfs 'read-only' shost attribute. 3358 + */ 3359 + static ssize_t 3360 + drv_support_bitmap_show(struct device *cdev, 3361 + struct device_attribute *attr, char *buf) 3362 + { 3363 + struct Scsi_Host *shost = class_to_shost(cdev); 3364 + struct MPT3SAS_ADAPTER *ioc = shost_priv(shost); 3365 + 3366 + return snprintf(buf, PAGE_SIZE, "0x%08x\n", ioc->drv_support_bitmap); 3367 + } 3368 + static DEVICE_ATTR_RO(drv_support_bitmap); 3369 + 3370 + /** 3371 + * enable_sdev_max_qd_show - display whether sdev max qd is enabled/disabled 3372 + * @cdev - pointer to embedded class device 3373 + * @buf - the buffer returned 3374 + * 3375 + * A sysfs read/write shost attribute. This attribute is used to set the 3376 + * targets queue depth to HBA IO queue depth if this attribute is enabled. 3377 + */ 3378 + static ssize_t 3379 + enable_sdev_max_qd_show(struct device *cdev, 3380 + struct device_attribute *attr, char *buf) 3381 + { 3382 + struct Scsi_Host *shost = class_to_shost(cdev); 3383 + struct MPT3SAS_ADAPTER *ioc = shost_priv(shost); 3384 + 3385 + return snprintf(buf, PAGE_SIZE, "%d\n", ioc->enable_sdev_max_qd); 3386 + } 3387 + 3388 + /** 3389 + * enable_sdev_max_qd_store - Enable/disable sdev max qd 3390 + * @cdev - pointer to embedded class device 3391 + * @buf - the buffer returned 3392 + * 3393 + * A sysfs read/write shost attribute. This attribute is used to set the 3394 + * targets queue depth to HBA IO queue depth if this attribute is enabled. 3395 + * If this attribute is disabled then targets will have corresponding default 3396 + * queue depth. 3397 + */ 3398 + static ssize_t 3399 + enable_sdev_max_qd_store(struct device *cdev, 3400 + struct device_attribute *attr, const char *buf, size_t count) 3401 + { 3402 + struct Scsi_Host *shost = class_to_shost(cdev); 3403 + struct MPT3SAS_ADAPTER *ioc = shost_priv(shost); 3404 + struct MPT3SAS_DEVICE *sas_device_priv_data; 3405 + struct MPT3SAS_TARGET *sas_target_priv_data; 3406 + int val = 0; 3407 + struct scsi_device *sdev; 3408 + struct _raid_device *raid_device; 3409 + int qdepth; 3410 + 3411 + if (kstrtoint(buf, 0, &val) != 0) 3412 + return -EINVAL; 3413 + 3414 + switch (val) { 3415 + case 0: 3416 + ioc->enable_sdev_max_qd = 0; 3417 + shost_for_each_device(sdev, ioc->shost) { 3418 + sas_device_priv_data = sdev->hostdata; 3419 + if (!sas_device_priv_data) 3420 + continue; 3421 + sas_target_priv_data = sas_device_priv_data->sas_target; 3422 + if (!sas_target_priv_data) 3423 + continue; 3424 + 3425 + if (sas_target_priv_data->flags & 3426 + MPT_TARGET_FLAGS_VOLUME) { 3427 + raid_device = 3428 + mpt3sas_raid_device_find_by_handle(ioc, 3429 + sas_target_priv_data->handle); 3430 + 3431 + switch (raid_device->volume_type) { 3432 + case MPI2_RAID_VOL_TYPE_RAID0: 3433 + if (raid_device->device_info & 3434 + MPI2_SAS_DEVICE_INFO_SSP_TARGET) 3435 + qdepth = 3436 + MPT3SAS_SAS_QUEUE_DEPTH; 3437 + else 3438 + qdepth = 3439 + MPT3SAS_SATA_QUEUE_DEPTH; 3440 + break; 3441 + case MPI2_RAID_VOL_TYPE_RAID1E: 3442 + case MPI2_RAID_VOL_TYPE_RAID1: 3443 + case MPI2_RAID_VOL_TYPE_RAID10: 3444 + case MPI2_RAID_VOL_TYPE_UNKNOWN: 3445 + default: 3446 + qdepth = MPT3SAS_RAID_QUEUE_DEPTH; 3447 + } 3448 + } else if (sas_target_priv_data->flags & 3449 + MPT_TARGET_FLAGS_PCIE_DEVICE) 3450 + qdepth = MPT3SAS_NVME_QUEUE_DEPTH; 3451 + else 3452 + qdepth = MPT3SAS_SAS_QUEUE_DEPTH; 3453 + 3454 + mpt3sas_scsih_change_queue_depth(sdev, qdepth); 3455 + } 3456 + break; 3457 + case 1: 3458 + ioc->enable_sdev_max_qd = 1; 3459 + shost_for_each_device(sdev, ioc->shost) 3460 + mpt3sas_scsih_change_queue_depth(sdev, 3461 + shost->can_queue); 3462 + break; 3463 + default: 3464 + return -EINVAL; 3465 + } 3466 + 3467 + return strlen(buf); 3468 + } 3469 + static DEVICE_ATTR_RW(enable_sdev_max_qd); 3470 + 3385 3471 struct device_attribute *mpt3sas_host_attrs[] = { 3386 3472 &dev_attr_version_fw, 3387 3473 &dev_attr_version_bios, ··· 3526 3374 &dev_attr_diag_trigger_event, 3527 3375 &dev_attr_diag_trigger_scsi, 3528 3376 &dev_attr_diag_trigger_mpi, 3377 + &dev_attr_drv_support_bitmap, 3529 3378 &dev_attr_BRM_status, 3379 + &dev_attr_enable_sdev_max_qd, 3530 3380 NULL, 3531 3381 }; 3532 3382
+141 -55
drivers/scsi/mpt3sas/mpt3sas_scsih.c
··· 155 155 module_param(prot_mask, int, 0444); 156 156 MODULE_PARM_DESC(prot_mask, " host protection capabilities mask, def=7 "); 157 157 158 + static bool enable_sdev_max_qd; 159 + module_param(enable_sdev_max_qd, bool, 0444); 160 + MODULE_PARM_DESC(enable_sdev_max_qd, 161 + "Enable sdev max qd as can_queue, def=disabled(0)"); 158 162 159 163 /* raid transport support */ 160 164 static struct raid_template *mpt3sas_raid_template; ··· 1156 1152 list_add_tail(&pcie_device->list, &ioc->pcie_device_list); 1157 1153 spin_unlock_irqrestore(&ioc->pcie_device_lock, flags); 1158 1154 1155 + if (pcie_device->access_status == 1156 + MPI26_PCIEDEV0_ASTATUS_DEVICE_BLOCKED) { 1157 + clear_bit(pcie_device->handle, ioc->pend_os_device_add); 1158 + return; 1159 + } 1159 1160 if (scsi_add_device(ioc->shost, PCIE_CHANNEL, pcie_device->id, 0)) { 1160 1161 _scsih_pcie_device_remove(ioc, pcie_device); 1161 1162 } else if (!pcie_device->starget) { ··· 1205 1196 spin_lock_irqsave(&ioc->pcie_device_lock, flags); 1206 1197 pcie_device_get(pcie_device); 1207 1198 list_add_tail(&pcie_device->list, &ioc->pcie_device_init_list); 1208 - _scsih_determine_boot_device(ioc, pcie_device, PCIE_CHANNEL); 1199 + if (pcie_device->access_status != 1200 + MPI26_PCIEDEV0_ASTATUS_DEVICE_BLOCKED) 1201 + _scsih_determine_boot_device(ioc, pcie_device, PCIE_CHANNEL); 1209 1202 spin_unlock_irqrestore(&ioc->pcie_device_lock, flags); 1210 1203 } 1211 1204 /** ··· 1444 1433 } 1445 1434 1446 1435 /** 1447 - * _scsih_is_nvme_device - determines if device is an nvme device 1436 + * _scsih_is_nvme_pciescsi_device - determines if 1437 + * device is an pcie nvme/scsi device 1448 1438 * @device_info: bitfield providing information about the device. 1449 1439 * Context: none 1450 1440 * 1451 - * Return: 1 if nvme device. 1441 + * Returns 1 if device is pcie device type nvme/scsi. 1452 1442 */ 1453 1443 static int 1454 - _scsih_is_nvme_device(u32 device_info) 1444 + _scsih_is_nvme_pciescsi_device(u32 device_info) 1455 1445 { 1456 - if ((device_info & MPI26_PCIE_DEVINFO_MASK_DEVICE_TYPE) 1457 - == MPI26_PCIE_DEVINFO_NVME) 1446 + if (((device_info & MPI26_PCIE_DEVINFO_MASK_DEVICE_TYPE) 1447 + == MPI26_PCIE_DEVINFO_NVME) || 1448 + ((device_info & MPI26_PCIE_DEVINFO_MASK_DEVICE_TYPE) 1449 + == MPI26_PCIE_DEVINFO_SCSI)) 1458 1450 return 1; 1459 1451 else 1460 1452 return 0; ··· 1523 1509 1524 1510 max_depth = shost->can_queue; 1525 1511 1526 - /* limit max device queue for SATA to 32 */ 1512 + /* 1513 + * limit max device queue for SATA to 32 if enable_sdev_max_qd 1514 + * is disabled. 1515 + */ 1516 + if (ioc->enable_sdev_max_qd) 1517 + goto not_sata; 1518 + 1527 1519 sas_device_priv_data = sdev->hostdata; 1528 1520 if (!sas_device_priv_data) 1529 1521 goto not_sata; ··· 1556 1536 if (qdepth > max_depth) 1557 1537 qdepth = max_depth; 1558 1538 return scsi_change_queue_depth(sdev, qdepth); 1539 + } 1540 + 1541 + /** 1542 + * mpt3sas_scsih_change_queue_depth - setting device queue depth 1543 + * @sdev: scsi device struct 1544 + * @qdepth: requested queue depth 1545 + * 1546 + * Returns nothing. 1547 + */ 1548 + void 1549 + mpt3sas_scsih_change_queue_depth(struct scsi_device *sdev, int qdepth) 1550 + { 1551 + struct Scsi_Host *shost = sdev->host; 1552 + struct MPT3SAS_ADAPTER *ioc = shost_priv(shost); 1553 + 1554 + if (ioc->enable_sdev_max_qd) 1555 + qdepth = shost->can_queue; 1556 + 1557 + scsih_change_queue_depth(sdev, qdepth); 1559 1558 } 1560 1559 1561 1560 /** ··· 2335 2296 MPT3SAS_RAID_MAX_SECTORS); 2336 2297 } 2337 2298 2338 - scsih_change_queue_depth(sdev, qdepth); 2299 + mpt3sas_scsih_change_queue_depth(sdev, qdepth); 2339 2300 2340 2301 /* raid transport support */ 2341 2302 if (!ioc->is_warpdrive) ··· 2399 2360 2400 2361 pcie_device_put(pcie_device); 2401 2362 spin_unlock_irqrestore(&ioc->pcie_device_lock, flags); 2402 - scsih_change_queue_depth(sdev, qdepth); 2363 + mpt3sas_scsih_change_queue_depth(sdev, qdepth); 2403 2364 /* Enable QUEUE_FLAG_NOMERGES flag, so that IOs won't be 2404 2365 ** merged and can eliminate holes created during merging 2405 2366 ** operation. ··· 2459 2420 _scsih_display_sata_capabilities(ioc, handle, sdev); 2460 2421 2461 2422 2462 - scsih_change_queue_depth(sdev, qdepth); 2423 + mpt3sas_scsih_change_queue_depth(sdev, qdepth); 2463 2424 2464 2425 if (ssp_target) { 2465 2426 sas_read_port_mode_page(sdev); ··· 2911 2872 2912 2873 handle = sas_device_priv_data->sas_target->handle; 2913 2874 pcie_device = mpt3sas_get_pdev_by_handle(ioc, handle); 2914 - if (pcie_device && (!ioc->tm_custom_handling)) 2875 + if (pcie_device && (!ioc->tm_custom_handling) && 2876 + (!(mpt3sas_scsih_is_pcie_scsi_device(pcie_device->device_info)))) 2915 2877 timeout = ioc->nvme_abort_timeout; 2916 2878 r = mpt3sas_scsih_issue_locked_tm(ioc, handle, scmd->device->lun, 2917 2879 MPI2_SCSITASKMGMT_TASKTYPE_ABORT_TASK, ··· 2983 2943 2984 2944 pcie_device = mpt3sas_get_pdev_by_handle(ioc, handle); 2985 2945 2986 - if (pcie_device && (!ioc->tm_custom_handling)) { 2946 + if (pcie_device && (!ioc->tm_custom_handling) && 2947 + (!(mpt3sas_scsih_is_pcie_scsi_device(pcie_device->device_info)))) { 2987 2948 tr_timeout = pcie_device->reset_timeout; 2988 2949 tr_method = MPI26_SCSITASKMGMT_MSGFLAGS_PROTOCOL_LVL_RST_PCIE; 2989 2950 } else 2990 2951 tr_method = MPI2_SCSITASKMGMT_MSGFLAGS_LINK_RESET; 2952 + 2991 2953 r = mpt3sas_scsih_issue_locked_tm(ioc, handle, scmd->device->lun, 2992 2954 MPI2_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET, 0, 0, 2993 2955 tr_timeout, tr_method); ··· 3062 3020 3063 3021 pcie_device = mpt3sas_get_pdev_by_handle(ioc, handle); 3064 3022 3065 - if (pcie_device && (!ioc->tm_custom_handling)) { 3023 + if (pcie_device && (!ioc->tm_custom_handling) && 3024 + (!(mpt3sas_scsih_is_pcie_scsi_device(pcie_device->device_info)))) { 3066 3025 tr_timeout = pcie_device->reset_timeout; 3067 3026 tr_method = MPI26_SCSITASKMGMT_MSGFLAGS_PROTOCOL_LVL_RST_PCIE; 3068 3027 } else ··· 3641 3598 sas_address = pcie_device->wwid; 3642 3599 } 3643 3600 spin_unlock_irqrestore(&ioc->pcie_device_lock, flags); 3644 - if (pcie_device && (!ioc->tm_custom_handling)) 3601 + if (pcie_device && (!ioc->tm_custom_handling) && 3602 + (!(mpt3sas_scsih_is_pcie_scsi_device( 3603 + pcie_device->device_info)))) 3645 3604 tr_method = 3646 3605 MPI26_SCSITASKMGMT_MSGFLAGS_PROTOCOL_LVL_RST_PCIE; 3647 3606 else ··· 4699 4654 * since we're lockless at this point 4700 4655 */ 4701 4656 do { 4702 - if (test_bit(0, &sas_device_priv_data->ata_command_pending)) { 4703 - scmd->result = SAM_STAT_BUSY; 4704 - scmd->scsi_done(scmd); 4705 - return 0; 4706 - } 4657 + if (test_bit(0, &sas_device_priv_data->ata_command_pending)) 4658 + return SCSI_MLQUEUE_DEVICE_BUSY; 4707 4659 } while (_scsih_set_satl_pending(scmd, true)); 4708 4660 4709 4661 if (scmd->sc_data_direction == DMA_FROM_DEVICE) ··· 6498 6456 /** 6499 6457 * _scsih_sas_device_status_change_event - handle device status change 6500 6458 * @ioc: per adapter object 6501 - * @fw_event: The fw_event_work object 6459 + * @event_data: The fw event 6502 6460 * Context: user. 6503 6461 */ 6504 6462 static void 6505 6463 _scsih_sas_device_status_change_event(struct MPT3SAS_ADAPTER *ioc, 6506 - struct fw_event_work *fw_event) 6464 + Mpi2EventDataSasDeviceStatusChange_t *event_data) 6507 6465 { 6508 6466 struct MPT3SAS_TARGET *target_priv_data; 6509 6467 struct _sas_device *sas_device; 6510 6468 u64 sas_address; 6511 6469 unsigned long flags; 6512 - Mpi2EventDataSasDeviceStatusChange_t *event_data = 6513 - (Mpi2EventDataSasDeviceStatusChange_t *) 6514 - fw_event->event_data; 6515 - 6516 - if (ioc->logging_level & MPT_DEBUG_EVENT_WORK_TASK) 6517 - _scsih_sas_device_status_change_event_debug(ioc, 6518 - event_data); 6519 6470 6520 6471 /* In MPI Revision K (0xC), the internal device reset complete was 6521 6472 * implemented, so avoid setting tm_busy flag for older firmware. ··· 6539 6504 target_priv_data->tm_busy = 1; 6540 6505 else 6541 6506 target_priv_data->tm_busy = 0; 6507 + 6508 + if (ioc->logging_level & MPT_DEBUG_EVENT_WORK_TASK) 6509 + ioc_info(ioc, 6510 + "%s tm_busy flag for handle(0x%04x)\n", 6511 + (target_priv_data->tm_busy == 1) ? "Enable" : "Disable", 6512 + target_priv_data->handle); 6542 6513 6543 6514 out: 6544 6515 if (sas_device) ··· 6580 6539 break; 6581 6540 case MPI26_PCIEDEV0_ASTATUS_DEVICE_BLOCKED: 6582 6541 desc = "PCIe device blocked"; 6542 + ioc_info(ioc, 6543 + "Device with Access Status (%s): wwid(0x%016llx), " 6544 + "handle(0x%04x)\n ll only be added to the internal list", 6545 + desc, (u64)wwid, handle); 6546 + rc = 0; 6583 6547 break; 6584 6548 case MPI26_PCIEDEV0_ASTATUS_MEMORY_SPACE_ACCESS_FAILED: 6585 6549 desc = "PCIe device mem space access failed"; ··· 6689 6643 pcie_device->enclosure_level, 6690 6644 pcie_device->connector_name); 6691 6645 6692 - if (pcie_device->starget) 6646 + if (pcie_device->starget && (pcie_device->access_status != 6647 + MPI26_PCIEDEV0_ASTATUS_DEVICE_BLOCKED)) 6693 6648 scsi_remove_target(&pcie_device->starget->dev); 6694 6649 dewtprintk(ioc, 6695 6650 ioc_info(ioc, "%s: exit: handle(0x%04x), wwid(0x%016llx)\n", ··· 6741 6694 6742 6695 /* check if this is end device */ 6743 6696 device_info = le32_to_cpu(pcie_device_pg0.DeviceInfo); 6744 - if (!(_scsih_is_nvme_device(device_info))) 6697 + if (!(_scsih_is_nvme_pciescsi_device(device_info))) 6745 6698 return; 6746 6699 6747 6700 wwid = le64_to_cpu(pcie_device_pg0.WWID); ··· 6756 6709 if (unlikely(pcie_device->handle != handle)) { 6757 6710 starget = pcie_device->starget; 6758 6711 sas_target_priv_data = starget->hostdata; 6712 + pcie_device->access_status = pcie_device_pg0.AccessStatus; 6759 6713 starget_printk(KERN_INFO, starget, 6760 6714 "handle changed from(0x%04x) to (0x%04x)!!!\n", 6761 6715 pcie_device->handle, handle); ··· 6851 6803 pcie_device_pg0.AccessStatus)) 6852 6804 return 0; 6853 6805 6854 - if (!(_scsih_is_nvme_device(le32_to_cpu(pcie_device_pg0.DeviceInfo)))) 6806 + if (!(_scsih_is_nvme_pciescsi_device(le32_to_cpu 6807 + (pcie_device_pg0.DeviceInfo)))) 6855 6808 return 0; 6856 6809 6857 6810 pcie_device = mpt3sas_get_pdev_by_wwid(ioc, wwid); ··· 6860 6811 clear_bit(handle, ioc->pend_os_device_add); 6861 6812 pcie_device_put(pcie_device); 6862 6813 return 0; 6814 + } 6815 + 6816 + /* PCIe Device Page 2 contains read-only information about a 6817 + * specific NVMe device; therefore, this page is only 6818 + * valid for NVMe devices and skip for pcie devices of type scsi. 6819 + */ 6820 + if (!(mpt3sas_scsih_is_pcie_scsi_device( 6821 + le32_to_cpu(pcie_device_pg0.DeviceInfo)))) { 6822 + if (mpt3sas_config_get_pcie_device_pg2(ioc, &mpi_reply, 6823 + &pcie_device_pg2, MPI2_SAS_DEVICE_PGAD_FORM_HANDLE, 6824 + handle)) { 6825 + ioc_err(ioc, 6826 + "failure at %s:%d/%s()!\n", __FILE__, 6827 + __LINE__, __func__); 6828 + return 0; 6829 + } 6830 + 6831 + ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & 6832 + MPI2_IOCSTATUS_MASK; 6833 + if (ioc_status != MPI2_IOCSTATUS_SUCCESS) { 6834 + ioc_err(ioc, 6835 + "failure at %s:%d/%s()!\n", __FILE__, 6836 + __LINE__, __func__); 6837 + return 0; 6838 + } 6863 6839 } 6864 6840 6865 6841 pcie_device = kzalloc(sizeof(struct _pcie_device), GFP_KERNEL); ··· 6898 6824 pcie_device->id = ioc->pcie_target_id++; 6899 6825 pcie_device->channel = PCIE_CHANNEL; 6900 6826 pcie_device->handle = handle; 6827 + pcie_device->access_status = pcie_device_pg0.AccessStatus; 6901 6828 pcie_device->device_info = le32_to_cpu(pcie_device_pg0.DeviceInfo); 6902 6829 pcie_device->wwid = wwid; 6903 6830 pcie_device->port_num = pcie_device_pg0.PortNum; ··· 6930 6855 le64_to_cpu(enclosure_dev->pg0.EnclosureLogicalID); 6931 6856 } 6932 6857 /* TODO -- Add device name once FW supports it */ 6933 - if (mpt3sas_config_get_pcie_device_pg2(ioc, &mpi_reply, 6934 - &pcie_device_pg2, MPI2_SAS_DEVICE_PGAD_FORM_HANDLE, handle)) { 6935 - ioc_err(ioc, "failure at %s:%d/%s()!\n", 6936 - __FILE__, __LINE__, __func__); 6937 - kfree(pcie_device); 6938 - return 0; 6939 - } 6940 - 6941 - ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK; 6942 - if (ioc_status != MPI2_IOCSTATUS_SUCCESS) { 6943 - ioc_err(ioc, "failure at %s:%d/%s()!\n", 6944 - __FILE__, __LINE__, __func__); 6945 - kfree(pcie_device); 6946 - return 0; 6947 - } 6948 - pcie_device->nvme_mdts = 6949 - le32_to_cpu(pcie_device_pg2.MaximumDataTransferSize); 6950 - if (pcie_device_pg2.ControllerResetTO) 6951 - pcie_device->reset_timeout = 6952 - pcie_device_pg2.ControllerResetTO; 6953 - else 6858 + if (!(mpt3sas_scsih_is_pcie_scsi_device( 6859 + le32_to_cpu(pcie_device_pg0.DeviceInfo)))) { 6860 + pcie_device->nvme_mdts = 6861 + le32_to_cpu(pcie_device_pg2.MaximumDataTransferSize); 6862 + if (pcie_device_pg2.ControllerResetTO) 6863 + pcie_device->reset_timeout = 6864 + pcie_device_pg2.ControllerResetTO; 6865 + else 6866 + pcie_device->reset_timeout = 30; 6867 + } else 6954 6868 pcie_device->reset_timeout = 30; 6955 6869 6956 6870 if (ioc->wait_for_discovery_to_complete) ··· 8571 8507 if ((pcie_device->wwid == le64_to_cpu(pcie_device_pg0->WWID)) 8572 8508 && (pcie_device->slot == le16_to_cpu( 8573 8509 pcie_device_pg0->Slot))) { 8510 + pcie_device->access_status = 8511 + pcie_device_pg0->AccessStatus; 8574 8512 pcie_device->responding = 1; 8575 8513 starget = pcie_device->starget; 8576 8514 if (starget && starget->hostdata) { ··· 8660 8594 } 8661 8595 handle = le16_to_cpu(pcie_device_pg0.DevHandle); 8662 8596 device_info = le32_to_cpu(pcie_device_pg0.DeviceInfo); 8663 - if (!(_scsih_is_nvme_device(device_info))) 8597 + if (!(_scsih_is_nvme_pciescsi_device(device_info))) 8664 8598 continue; 8665 8599 _scsih_mark_responding_pcie_device(ioc, &pcie_device_pg0); 8666 8600 } ··· 9241 9175 break; 9242 9176 } 9243 9177 handle = le16_to_cpu(pcie_device_pg0.DevHandle); 9244 - if (!(_scsih_is_nvme_device( 9178 + if (!(_scsih_is_nvme_pciescsi_device( 9245 9179 le32_to_cpu(pcie_device_pg0.DeviceInfo)))) 9246 9180 continue; 9247 9181 pcie_device = mpt3sas_get_pdev_by_wwid(ioc, ··· 9374 9308 _scsih_sas_topology_change_event(ioc, fw_event); 9375 9309 break; 9376 9310 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE: 9377 - _scsih_sas_device_status_change_event(ioc, fw_event); 9311 + if (ioc->logging_level & MPT_DEBUG_EVENT_WORK_TASK) 9312 + _scsih_sas_device_status_change_event_debug(ioc, 9313 + (Mpi2EventDataSasDeviceStatusChange_t *) 9314 + fw_event->event_data); 9378 9315 break; 9379 9316 case MPI2_EVENT_SAS_DISCOVERY: 9380 9317 _scsih_sas_discovery_event(ioc, fw_event); ··· 9550 9481 break; 9551 9482 } 9552 9483 case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE: 9484 + _scsih_sas_device_status_change_event(ioc, 9485 + (Mpi2EventDataSasDeviceStatusChange_t *) 9486 + mpi_reply->EventData); 9487 + break; 9553 9488 case MPI2_EVENT_IR_OPERATION_STATUS: 9554 9489 case MPI2_EVENT_SAS_DISCOVERY: 9555 9490 case MPI2_EVENT_SAS_DEVICE_DISCOVERY_ERROR: ··· 10112 10039 pcie_device_put(pcie_device); 10113 10040 continue; 10114 10041 } 10042 + if (pcie_device->access_status == 10043 + MPI26_PCIEDEV0_ASTATUS_DEVICE_BLOCKED) { 10044 + pcie_device_make_active(ioc, pcie_device); 10045 + pcie_device_put(pcie_device); 10046 + continue; 10047 + } 10115 10048 rc = scsi_add_device(ioc->shost, PCIE_CHANNEL, 10116 10049 pcie_device->id, 0); 10117 10050 if (rc) { ··· 10532 10453 ioc->tm_sas_control_cb_idx = tm_sas_control_cb_idx; 10533 10454 ioc->logging_level = logging_level; 10534 10455 ioc->schedule_dead_ioc_flush_running_cmds = &_scsih_flush_running_cmds; 10456 + /* 10457 + * Enable MEMORY MOVE support flag. 10458 + */ 10459 + ioc->drv_support_bitmap |= MPT_DRV_SUPPORT_BITMAP_MEMMOVE; 10460 + 10461 + ioc->enable_sdev_max_qd = enable_sdev_max_qd; 10462 + 10535 10463 /* misc semaphores and spin locks */ 10536 10464 mutex_init(&ioc->reset_in_progress_mutex); 10537 10465 /* initializing pci_access_mutex lock */
+4
drivers/scsi/ncr53c8xx.c
··· 3910 3910 np->scsi_mode = SMODE_HVD; 3911 3911 break; 3912 3912 } 3913 + /* fall through */ 3913 3914 case 3: /* SYMBIOS controllers report HVD through GPIO3 */ 3914 3915 if (INB(nc_gpreg) & 0x08) 3915 3916 break; 3917 + /* fall through */ 3916 3918 case 2: /* Set HVD unconditionally */ 3917 3919 np->scsi_mode = SMODE_HVD; 3920 + /* fall through */ 3918 3921 case 1: /* Trust previous settings for HVD */ 3919 3922 if (np->sv_stest2 & 0x20) 3920 3923 np->scsi_mode = SMODE_HVD; ··· 6717 6714 OUTL_DSP (scr_to_cpu(tp->lp[0]->jump_ccb[0])); 6718 6715 return; 6719 6716 } 6717 + /* fall through */ 6720 6718 case SIR_RESEL_BAD_TARGET: /* Will send a TARGET RESET message */ 6721 6719 case SIR_RESEL_BAD_LUN: /* Will send a TARGET RESET message */ 6722 6720 case SIR_RESEL_BAD_I_T_L_Q: /* Will send an ABORT TAG message */
+3 -10
drivers/scsi/pm8001/pm8001_sas.c
··· 1308 1308 1309 1309 int pm8001_abort_task_set(struct domain_device *dev, u8 *lun) 1310 1310 { 1311 - int rc = TMF_RESP_FUNC_FAILED; 1312 1311 struct pm8001_tmf_task tmf_task; 1313 1312 1314 1313 tmf_task.tmf = TMF_ABORT_TASK_SET; 1315 - rc = pm8001_issue_ssp_tmf(dev, lun, &tmf_task); 1316 - return rc; 1314 + return pm8001_issue_ssp_tmf(dev, lun, &tmf_task); 1317 1315 } 1318 1316 1319 1317 int pm8001_clear_aca(struct domain_device *dev, u8 *lun) 1320 1318 { 1321 - int rc = TMF_RESP_FUNC_FAILED; 1322 1319 struct pm8001_tmf_task tmf_task; 1323 1320 1324 1321 tmf_task.tmf = TMF_CLEAR_ACA; 1325 - rc = pm8001_issue_ssp_tmf(dev, lun, &tmf_task); 1326 - 1327 - return rc; 1322 + return pm8001_issue_ssp_tmf(dev, lun, &tmf_task); 1328 1323 } 1329 1324 1330 1325 int pm8001_clear_task_set(struct domain_device *dev, u8 *lun) 1331 1326 { 1332 - int rc = TMF_RESP_FUNC_FAILED; 1333 1327 struct pm8001_tmf_task tmf_task; 1334 1328 struct pm8001_device *pm8001_dev = dev->lldd_dev; 1335 1329 struct pm8001_hba_info *pm8001_ha = pm8001_find_ha_by_dev(dev); ··· 1332 1338 pm8001_printk("I_T_L_Q clear task set[%x]\n", 1333 1339 pm8001_dev->device_id)); 1334 1340 tmf_task.tmf = TMF_CLEAR_TASK_SET; 1335 - rc = pm8001_issue_ssp_tmf(dev, lun, &tmf_task); 1336 - return rc; 1341 + return pm8001_issue_ssp_tmf(dev, lun, &tmf_task); 1337 1342 } 1338 1343
+1 -1
drivers/scsi/pmcraid.c
··· 5841 5841 } 5842 5842 5843 5843 /* 5844 - * PCI driver structure of pcmraid driver 5844 + * PCI driver structure of pmcraid driver 5845 5845 */ 5846 5846 static struct pci_driver pmcraid_driver = { 5847 5847 .name = PMCRAID_DRIVER_NAME,
+1
drivers/scsi/qedf/qedf.h
··· 49 49 #define QEDF_ABORT_TIMEOUT (10 * 1000) 50 50 #define QEDF_CLEANUP_TIMEOUT 1 51 51 #define QEDF_MAX_CDB_LEN 16 52 + #define QEDF_LL2_BUF_SIZE 2500 /* Buffer size required for LL2 Rx */ 52 53 53 54 #define UPSTREAM_REMOVE 1 54 55 #define UPSTREAM_KEEP 1
+8 -8
drivers/scsi/qedf/qedf_debugfs.c
··· 47 47 * @pf: the pf that is stopping 48 48 **/ 49 49 void 50 - qedf_dbg_host_exit(struct qedf_dbg_ctx *qedf) 50 + qedf_dbg_host_exit(struct qedf_dbg_ctx *qedf_dbg) 51 51 { 52 - QEDF_INFO(qedf, QEDF_LOG_DEBUGFS, "Destroying debugfs host " 52 + QEDF_INFO(qedf_dbg, QEDF_LOG_DEBUGFS, "Destroying debugfs host " 53 53 "entry\n"); 54 54 /* remove debugfs entries of this PF */ 55 - debugfs_remove_recursive(qedf->bdf_dentry); 56 - qedf->bdf_dentry = NULL; 55 + debugfs_remove_recursive(qedf_dbg->bdf_dentry); 56 + qedf_dbg->bdf_dentry = NULL; 57 57 } 58 58 59 59 /** ··· 140 140 loff_t *ppos) 141 141 { 142 142 int cnt; 143 - struct qedf_dbg_ctx *qedf = 143 + struct qedf_dbg_ctx *qedf_dbg = 144 144 (struct qedf_dbg_ctx *)filp->private_data; 145 145 146 - QEDF_INFO(qedf, QEDF_LOG_DEBUGFS, "entered\n"); 146 + QEDF_INFO(qedf_dbg, QEDF_LOG_DEBUGFS, "debug mask=0x%x\n", qedf_debug); 147 147 cnt = sprintf(buffer, "debug mask = 0x%x\n", qedf_debug); 148 148 149 149 cnt = min_t(int, count, cnt - *ppos); ··· 158 158 uint32_t val; 159 159 void *kern_buf; 160 160 int rval; 161 - struct qedf_dbg_ctx *qedf = 161 + struct qedf_dbg_ctx *qedf_dbg = 162 162 (struct qedf_dbg_ctx *)filp->private_data; 163 163 164 164 if (!count || *ppos) ··· 178 178 else 179 179 qedf_debug = val; 180 180 181 - QEDF_INFO(qedf, QEDF_LOG_DEBUGFS, "Setting debug=0x%x.\n", val); 181 + QEDF_INFO(qedf_dbg, QEDF_LOG_DEBUGFS, "Setting debug=0x%x.\n", val); 182 182 return count; 183 183 } 184 184
+30 -8
drivers/scsi/qedf/qedf_els.c
··· 179 179 180 180 orig_io_req = cb_arg->aborted_io_req; 181 181 182 - if (!orig_io_req) 182 + if (!orig_io_req) { 183 + QEDF_ERR(&qedf->dbg_ctx, 184 + "Original io_req is NULL, rrq_req = %p.\n", rrq_req); 183 185 goto out_free; 186 + } 184 187 185 188 if (rrq_req->event != QEDF_IOREQ_EV_ELS_TMO && 186 189 rrq_req->event != QEDF_IOREQ_EV_ELS_ERR_DETECT) ··· 353 350 u32 port_id; 354 351 unsigned long flags; 355 352 356 - if (!fcport) 353 + if (!fcport) { 354 + QEDF_ERR(NULL, "fcport is NULL.\n"); 357 355 return; 356 + } 358 357 359 358 spin_lock_irqsave(&fcport->rport_lock, flags); 360 359 if (test_bit(QEDF_RPORT_IN_RESET, &fcport->flags) || ··· 423 418 * If we are flushing the command just free the cb_arg as none of the 424 419 * response data will be valid. 425 420 */ 426 - if (els_req->event == QEDF_IOREQ_EV_ELS_FLUSH) 421 + if (els_req->event == QEDF_IOREQ_EV_ELS_FLUSH) { 422 + QEDF_ERR(NULL, "els_req xid=0x%x event is flush.\n", 423 + els_req->xid); 427 424 goto free_arg; 425 + } 428 426 429 427 fcport = els_req->fcport; 430 428 mp_req = &(els_req->mp_req); ··· 540 532 541 533 orig_io_req = cb_arg->aborted_io_req; 542 534 543 - if (!orig_io_req) 535 + if (!orig_io_req) { 536 + QEDF_ERR(NULL, "orig_io_req is NULL.\n"); 544 537 goto out_free; 538 + } 545 539 546 540 clear_bit(QEDF_CMD_SRR_SENT, &orig_io_req->flags); 547 541 ··· 557 547 orig_io_req, orig_io_req->xid, srr_req->xid, refcount); 558 548 559 549 /* If a SRR times out, simply free resources */ 560 - if (srr_req->event == QEDF_IOREQ_EV_ELS_TMO) 550 + if (srr_req->event == QEDF_IOREQ_EV_ELS_TMO) { 551 + QEDF_ERR(&qedf->dbg_ctx, 552 + "ELS timeout rec_xid=0x%x.\n", srr_req->xid); 561 553 goto out_put; 554 + } 562 555 563 556 /* Normalize response data into struct fc_frame */ 564 557 mp_req = &(srr_req->mp_req); ··· 734 721 cb_arg = io_req->cb_arg; 735 722 736 723 /* If we timed out just free resources */ 737 - if (io_req->event == QEDF_IOREQ_EV_ELS_TMO || !cqe) 724 + if (io_req->event == QEDF_IOREQ_EV_ELS_TMO || !cqe) { 725 + QEDF_ERR(&qedf->dbg_ctx, 726 + "cqe is NULL or timeout event (0x%x)", io_req->event); 738 727 goto free; 728 + } 739 729 740 730 /* Kill the timer we put on the request */ 741 731 cancel_delayed_work_sync(&io_req->timeout_work); ··· 841 825 842 826 orig_io_req = cb_arg->aborted_io_req; 843 827 844 - if (!orig_io_req) 828 + if (!orig_io_req) { 829 + QEDF_ERR(NULL, "orig_io_req is NULL.\n"); 845 830 goto out_free; 831 + } 846 832 847 833 if (rec_req->event != QEDF_IOREQ_EV_ELS_TMO && 848 834 rec_req->event != QEDF_IOREQ_EV_ELS_ERR_DETECT) ··· 856 838 orig_io_req, orig_io_req->xid, rec_req->xid, refcount); 857 839 858 840 /* If a REC times out, free resources */ 859 - if (rec_req->event == QEDF_IOREQ_EV_ELS_TMO) 841 + if (rec_req->event == QEDF_IOREQ_EV_ELS_TMO) { 842 + QEDF_ERR(&qedf->dbg_ctx, 843 + "Got TMO event, orig_io_req %p orig_io_xid=0x%x.\n", 844 + orig_io_req, orig_io_req->xid); 860 845 goto out_put; 846 + } 861 847 862 848 /* Normalize response data into struct fc_frame */ 863 849 mp_req = &(rec_req->mp_req);
+21 -12
drivers/scsi/qedf/qedf_fip.c
··· 23 23 int rc = -1; 24 24 25 25 skb = dev_alloc_skb(sizeof(struct fip_vlan)); 26 - if (!skb) 26 + if (!skb) { 27 + QEDF_ERR(&qedf->dbg_ctx, 28 + "Failed to allocate skb.\n"); 27 29 return; 30 + } 28 31 29 32 eth_fr = (char *)skb->data; 30 33 vlan = (struct fip_vlan *)eth_fr; ··· 253 250 fc_wwpn_valid = true; 254 251 break; 255 252 case FIP_DT_VN_ID: 253 + fabric_id_valid = false; 256 254 vp = (struct fip_vn_desc *)desc; 257 - QEDF_INFO(&qedf->dbg_ctx, QEDF_LOG_DISC, 258 - "vx_port fd_fc_id=%x fd_mac=%pM.\n", 259 - ntoh24(vp->fd_fc_id), vp->fd_mac); 260 - /* Check vx_port fabric ID */ 261 - if (ntoh24(vp->fd_fc_id) != 262 - qedf->lport->port_id) 263 - fabric_id_valid = false; 264 - /* Check vx_port MAC */ 265 - if (!ether_addr_equal(vp->fd_mac, 266 - qedf->data_src_addr)) 267 - fabric_id_valid = false; 255 + 256 + QEDF_ERR(&qedf->dbg_ctx, 257 + "CVL vx_port fd_fc_id=0x%x fd_mac=%pM fd_wwpn=%016llx.\n", 258 + ntoh24(vp->fd_fc_id), vp->fd_mac, 259 + get_unaligned_be64(&vp->fd_wwpn)); 260 + /* Check for vx_port wwpn OR Check vx_port 261 + * fabric ID OR Check vx_port MAC 262 + */ 263 + if ((get_unaligned_be64(&vp->fd_wwpn) == 264 + qedf->wwpn) || 265 + (ntoh24(vp->fd_fc_id) == 266 + qedf->lport->port_id) || 267 + (ether_addr_equal(vp->fd_mac, 268 + qedf->data_src_addr))) { 269 + fabric_id_valid = true; 270 + } 268 271 break; 269 272 default: 270 273 /* Ignore anything else */
+56 -11
drivers/scsi/qedf/qedf_io.c
··· 104 104 qedf_process_seq_cleanup_compl(qedf, NULL, io_req); 105 105 break; 106 106 default: 107 + QEDF_INFO(&qedf->dbg_ctx, QEDF_LOG_IO, 108 + "Hit default case, xid=0x%x.\n", io_req->xid); 107 109 break; 108 110 } 109 111 } ··· 124 122 num_ios = max_xid - min_xid + 1; 125 123 126 124 /* Free fcoe_bdt_ctx structures */ 127 - if (!cmgr->io_bdt_pool) 125 + if (!cmgr->io_bdt_pool) { 126 + QEDF_ERR(&qedf->dbg_ctx, "io_bdt_pool is NULL.\n"); 128 127 goto free_cmd_pool; 128 + } 129 129 130 130 bd_tbl_sz = QEDF_MAX_BDS_PER_CMD * sizeof(struct scsi_sge); 131 131 for (i = 0; i < num_ios; i++) { ··· 230 226 io_req->sense_buffer = dma_alloc_coherent(&qedf->pdev->dev, 231 227 QEDF_SCSI_SENSE_BUFFERSIZE, &io_req->sense_buffer_dma, 232 228 GFP_KERNEL); 233 - if (!io_req->sense_buffer) 229 + if (!io_req->sense_buffer) { 230 + QEDF_ERR(&qedf->dbg_ctx, 231 + "Failed to alloc sense buffer.\n"); 234 232 goto mem_err; 233 + } 235 234 236 235 /* Allocate task parameters to pass to f/w init funcions */ 237 236 io_req->task_params = kzalloc(sizeof(*io_req->task_params), ··· 444 437 struct qedf_rport *fcport = io_req->fcport; 445 438 unsigned long flags; 446 439 447 - if (io_req->cmd_type == QEDF_SCSI_CMD) 440 + if (io_req->cmd_type == QEDF_SCSI_CMD) { 441 + QEDF_WARN(&fcport->qedf->dbg_ctx, 442 + "Cmd released called without scsi_done called, io_req %p xid=0x%x.\n", 443 + io_req, io_req->xid); 448 444 WARN_ON(io_req->sc_cmd); 445 + } 449 446 450 447 if (io_req->cmd_type == QEDF_ELS || 451 448 io_req->cmd_type == QEDF_TASK_MGMT_CMD) ··· 458 447 atomic_inc(&cmd_mgr->free_list_cnt); 459 448 atomic_dec(&fcport->num_active_ios); 460 449 atomic_set(&io_req->state, QEDF_CMD_ST_INACTIVE); 461 - if (atomic_read(&fcport->num_active_ios) < 0) 450 + if (atomic_read(&fcport->num_active_ios) < 0) { 462 451 QEDF_WARN(&(fcport->qedf->dbg_ctx), "active_ios < 0.\n"); 452 + WARN_ON(1); 453 + } 463 454 464 455 /* Increment task retry identifier now that the request is released */ 465 456 io_req->task_retry_identifier++; ··· 964 951 965 952 if (test_bit(QEDF_UNLOADING, &qedf->flags) || 966 953 test_bit(QEDF_DBG_STOP_IO, &qedf->flags)) { 954 + QEDF_INFO(&qedf->dbg_ctx, QEDF_LOG_IO, 955 + "Returning DNC as unloading or stop io, flags 0x%lx.\n", 956 + qedf->flags); 967 957 sc_cmd->result = DID_NO_CONNECT << 16; 968 958 sc_cmd->scsi_done(sc_cmd); 969 959 return 0; ··· 983 967 984 968 rval = fc_remote_port_chkready(rport); 985 969 if (rval) { 970 + QEDF_INFO(&qedf->dbg_ctx, QEDF_LOG_IO, 971 + "fc_remote_port_chkready failed=0x%x for port_id=0x%06x.\n", 972 + rval, rport->port_id); 986 973 sc_cmd->result = rval; 987 974 sc_cmd->scsi_done(sc_cmd); 988 975 return 0; ··· 993 974 994 975 /* Retry command if we are doing a qed drain operation */ 995 976 if (test_bit(QEDF_DRAIN_ACTIVE, &qedf->flags)) { 977 + QEDF_INFO(&qedf->dbg_ctx, QEDF_LOG_IO, "Drain active.\n"); 996 978 rc = SCSI_MLQUEUE_HOST_BUSY; 997 979 goto exit_qcmd; 998 980 } 999 981 1000 982 if (lport->state != LPORT_ST_READY || 1001 983 atomic_read(&qedf->link_state) != QEDF_LINK_UP) { 984 + QEDF_INFO(&qedf->dbg_ctx, QEDF_LOG_IO, "Link down.\n"); 1002 985 rc = SCSI_MLQUEUE_HOST_BUSY; 1003 986 goto exit_qcmd; 1004 987 } ··· 1318 1297 struct scsi_cmnd *sc_cmd; 1319 1298 int refcount; 1320 1299 1321 - if (!io_req) 1300 + if (!io_req) { 1301 + QEDF_INFO(&qedf->dbg_ctx, QEDF_LOG_IO, "io_req is NULL\n"); 1322 1302 return; 1303 + } 1323 1304 1324 1305 if (test_and_set_bit(QEDF_CMD_ERR_SCSI_DONE, &io_req->flags)) { 1325 1306 QEDF_INFO(&qedf->dbg_ctx, QEDF_LOG_IO, ··· 1437 1414 u64 err_warn_bit_map; 1438 1415 u8 err_warn = 0xff; 1439 1416 1440 - if (!cqe) 1417 + if (!cqe) { 1418 + QEDF_INFO(&qedf->dbg_ctx, QEDF_LOG_IO, 1419 + "cqe is NULL for io_req %p xid=0x%x\n", 1420 + io_req, io_req->xid); 1441 1421 return; 1422 + } 1442 1423 1443 1424 QEDF_ERR(&(io_req->fcport->qedf->dbg_ctx), "Warning CQE, " 1444 1425 "xid=0x%x\n", io_req->xid); ··· 1504 1477 { 1505 1478 int rval; 1506 1479 1507 - if (!cqe) 1480 + if (!cqe) { 1481 + QEDF_INFO(&qedf->dbg_ctx, QEDF_LOG_IO, 1482 + "cqe is NULL for io_req %p\n", io_req); 1508 1483 return; 1484 + } 1509 1485 1510 1486 QEDF_ERR(&(io_req->fcport->qedf->dbg_ctx), "Error detection CQE, " 1511 1487 "xid=0x%x\n", io_req->xid); ··· 1573 1543 int wait_cnt = 100; 1574 1544 int refcount = 0; 1575 1545 1576 - if (!fcport) 1546 + if (!fcport) { 1547 + QEDF_ERR(NULL, "fcport is NULL\n"); 1577 1548 return; 1549 + } 1578 1550 1579 1551 /* Check that fcport is still offloaded */ 1580 1552 if (!test_bit(QEDF_RPORT_SESSION_READY, &fcport->flags)) { ··· 2008 1976 clear_bit(QEDF_CMD_IN_ABORT, &io_req->flags); 2009 1977 2010 1978 if (io_req->sc_cmd) { 1979 + if (!io_req->return_scsi_cmd_on_abts) 1980 + QEDF_INFO(&qedf->dbg_ctx, QEDF_LOG_SCSI_TM, 1981 + "Not call scsi_done for xid=0x%x.\n", 1982 + io_req->xid); 2011 1983 if (io_req->return_scsi_cmd_on_abts) 2012 1984 qedf_scsi_done(qedf, io_req, DID_ERROR); 2013 1985 } ··· 2237 2201 } 2238 2202 2239 2203 if (io_req->sc_cmd) { 2204 + if (!io_req->return_scsi_cmd_on_abts) 2205 + QEDF_INFO(&qedf->dbg_ctx, QEDF_LOG_SCSI_TM, 2206 + "Not call scsi_done for xid=0x%x.\n", 2207 + io_req->xid); 2240 2208 if (io_req->return_scsi_cmd_on_abts) 2241 2209 qedf_scsi_done(qedf, io_req, DID_ERROR); 2242 2210 } ··· 2281 2241 u16 sqe_idx; 2282 2242 2283 2243 if (!sc_cmd) { 2284 - QEDF_ERR(&(qedf->dbg_ctx), "invalid arg\n"); 2244 + QEDF_ERR(&qedf->dbg_ctx, "sc_cmd is NULL\n"); 2285 2245 return FAILED; 2286 2246 } 2287 2247 ··· 2403 2363 2404 2364 QEDF_ERR(NULL, 2405 2365 "tm_flags 0x%x sc_cmd %p op = 0x%02x target_id = 0x%x lun=%d\n", 2406 - tm_flags, sc_cmd, sc_cmd->cmnd[0], rport->scsi_target_id, 2407 - (int)sc_cmd->device->lun); 2366 + tm_flags, sc_cmd, sc_cmd->cmd_len ? sc_cmd->cmnd[0] : 0xff, 2367 + rport->scsi_target_id, (int)sc_cmd->device->lun); 2408 2368 2409 2369 if (!rdata || !kref_get_unless_zero(&rdata->kref)) { 2410 2370 QEDF_ERR(NULL, "stale rport\n"); ··· 2554 2514 /* Copy data from BDQ buffer into fc_frame struct */ 2555 2515 fh = (struct fc_frame_header *)fc_frame_header_get(fp); 2556 2516 memcpy(fh, (void *)bdq_addr, pktlen); 2517 + 2518 + QEDF_WARN(&qedf->dbg_ctx, 2519 + "Processing Unsolicated frame, src=%06x dest=%06x r_ctl=0x%x type=0x%x cmd=%02x\n", 2520 + ntoh24(fh->fh_s_id), ntoh24(fh->fh_d_id), fh->fh_r_ctl, 2521 + fh->fh_type, fc_frame_payload_op(fp)); 2557 2522 2558 2523 /* Initialize the frame so libfc sees it as a valid frame */ 2559 2524 crc = fcoe_fc_crc(fp);
+113 -65
drivers/scsi/qedf/qedf_main.c
··· 27 27 28 28 static int qedf_probe(struct pci_dev *pdev, const struct pci_device_id *id); 29 29 static void qedf_remove(struct pci_dev *pdev); 30 + static void qedf_shutdown(struct pci_dev *pdev); 30 31 31 32 /* 32 33 * Driver module parameters. ··· 111 110 112 111 void qedf_set_vlan_id(struct qedf_ctx *qedf, int vlan_id) 113 112 { 114 - qedf->vlan_id = vlan_id; 115 - qedf->vlan_id |= qedf->prio << VLAN_PRIO_SHIFT; 116 - QEDF_INFO(&(qedf->dbg_ctx), QEDF_LOG_DISC, "Setting vlan_id=%04x " 117 - "prio=%d.\n", vlan_id, qedf->prio); 113 + int vlan_id_tmp = 0; 114 + 115 + vlan_id_tmp = vlan_id | (qedf->prio << VLAN_PRIO_SHIFT); 116 + qedf->vlan_id = vlan_id_tmp; 117 + QEDF_INFO(&qedf->dbg_ctx, QEDF_LOG_DISC, 118 + "Setting vlan_id=0x%04x prio=%d.\n", 119 + vlan_id_tmp, qedf->prio); 118 120 } 119 121 120 122 /* Returns true if we have a valid vlan, false otherwise */ 121 123 static bool qedf_initiate_fipvlan_req(struct qedf_ctx *qedf) 122 124 { 123 - int rc; 124 125 125 126 while (qedf->fipvlan_retries--) { 126 127 /* This is to catch if link goes down during fipvlan retries */ ··· 131 128 return false; 132 129 } 133 130 134 - if (qedf->vlan_id > 0) 131 + if (test_bit(QEDF_UNLOADING, &qedf->flags)) { 132 + QEDF_ERR(&qedf->dbg_ctx, "Driver unloading.\n"); 133 + return false; 134 + } 135 + 136 + if (qedf->vlan_id > 0) { 137 + QEDF_INFO(&qedf->dbg_ctx, QEDF_LOG_DISC, 138 + "vlan = 0x%x already set, calling ctlr_link_up.\n", 139 + qedf->vlan_id); 140 + if (atomic_read(&qedf->link_state) == QEDF_LINK_UP) 141 + fcoe_ctlr_link_up(&qedf->ctlr); 135 142 return true; 143 + } 136 144 137 145 QEDF_INFO(&(qedf->dbg_ctx), QEDF_LOG_DISC, 138 146 "Retry %d.\n", qedf->fipvlan_retries); 139 147 init_completion(&qedf->fipvlan_compl); 140 148 qedf_fcoe_send_vlan_req(qedf); 141 - rc = wait_for_completion_timeout(&qedf->fipvlan_compl, 142 - 1 * HZ); 143 - if (rc > 0 && 144 - (atomic_read(&qedf->link_state) == QEDF_LINK_UP)) { 145 - fcoe_ctlr_link_up(&qedf->ctlr); 146 - return true; 147 - } 149 + wait_for_completion_timeout(&qedf->fipvlan_compl, 1 * HZ); 148 150 } 149 151 150 152 return false; ··· 170 162 return; 171 163 172 164 if (atomic_read(&qedf->link_state) != QEDF_LINK_UP) { 165 + QEDF_INFO(&qedf->dbg_ctx, QEDF_LOG_DISC, 166 + "Link is down, resetting vlan_id.\n"); 173 167 qedf->vlan_id = 0; 174 168 return; 175 169 } ··· 321 311 322 312 lport = qedf->lport; 323 313 324 - if (!lport->tt.elsct_send) 314 + if (!lport->tt.elsct_send) { 315 + QEDF_ERR(&qedf->dbg_ctx, "tt.elsct_send not set.\n"); 325 316 return -EINVAL; 317 + } 326 318 327 319 fp = fc_frame_alloc(lport, sizeof(struct fc_els_flogi)); 328 320 if (!fp) { ··· 342 330 return 0; 343 331 } 344 332 345 - struct qedf_tmp_rdata_item { 346 - struct fc_rport_priv *rdata; 347 - struct list_head list; 348 - }; 349 - 350 333 /* 351 334 * This function is called if link_down_tmo is in use. If we get a link up and 352 335 * link_down_tmo has not expired then use just FLOGI/ADISC to recover our ··· 351 344 { 352 345 struct qedf_ctx *qedf = 353 346 container_of(work, struct qedf_ctx, link_recovery.work); 354 - struct qedf_rport *fcport; 347 + struct fc_lport *lport = qedf->lport; 355 348 struct fc_rport_priv *rdata; 356 - struct qedf_tmp_rdata_item *rdata_item, *tmp_rdata_item; 357 349 bool rc; 358 350 int retries = 30; 359 351 int rval, i; ··· 419 413 * Call lport->tt.rport_login which will cause libfc to send an 420 414 * ADISC since the rport is in state ready. 421 415 */ 422 - rcu_read_lock(); 423 - list_for_each_entry_rcu(fcport, &qedf->fcports, peers) { 424 - rdata = fcport->rdata; 425 - if (rdata == NULL) 426 - continue; 427 - rdata_item = kzalloc(sizeof(struct qedf_tmp_rdata_item), 428 - GFP_ATOMIC); 429 - if (!rdata_item) 430 - continue; 416 + mutex_lock(&lport->disc.disc_mutex); 417 + list_for_each_entry_rcu(rdata, &lport->disc.rports, peers) { 431 418 if (kref_get_unless_zero(&rdata->kref)) { 432 - rdata_item->rdata = rdata; 433 - list_add(&rdata_item->list, &rdata_login_list); 434 - } else 435 - kfree(rdata_item); 419 + fc_rport_login(rdata); 420 + kref_put(&rdata->kref, fc_rport_destroy); 421 + } 436 422 } 437 - rcu_read_unlock(); 438 - /* 439 - * Do the fc_rport_login outside of the rcu lock so we don't take a 440 - * mutex in an atomic context. 441 - */ 442 - list_for_each_entry_safe(rdata_item, tmp_rdata_item, &rdata_login_list, 443 - list) { 444 - list_del(&rdata_item->list); 445 - fc_rport_login(rdata_item->rdata); 446 - kref_put(&rdata_item->rdata->kref, fc_rport_destroy); 447 - kfree(rdata_item); 448 - } 423 + mutex_unlock(&lport->disc.disc_mutex); 449 424 } 450 425 451 426 static void qedf_update_link_speed(struct qedf_ctx *qedf, ··· 454 467 case 100000: 455 468 lport->link_speed = FC_PORTSPEED_100GBIT; 456 469 break; 470 + case 20000: 471 + lport->link_speed = FC_PORTSPEED_20GBIT; 472 + break; 457 473 default: 458 474 lport->link_speed = FC_PORTSPEED_UNKNOWN; 459 475 break; ··· 466 476 * Set supported link speed by querying the supported 467 477 * capabilities of the link. 468 478 */ 469 - if (link->supported_caps & SUPPORTED_10000baseKR_Full) 479 + if ((link->supported_caps & QED_LM_10000baseT_Full_BIT) || 480 + (link->supported_caps & QED_LM_10000baseKX4_Full_BIT) || 481 + (link->supported_caps & QED_LM_10000baseR_FEC_BIT) || 482 + (link->supported_caps & QED_LM_10000baseCR_Full_BIT) || 483 + (link->supported_caps & QED_LM_10000baseSR_Full_BIT) || 484 + (link->supported_caps & QED_LM_10000baseLR_Full_BIT) || 485 + (link->supported_caps & QED_LM_10000baseLRM_Full_BIT) || 486 + (link->supported_caps & QED_LM_10000baseKR_Full_BIT)) { 470 487 lport->link_supported_speeds |= FC_PORTSPEED_10GBIT; 471 - if (link->supported_caps & SUPPORTED_25000baseKR_Full) 488 + } 489 + if ((link->supported_caps & QED_LM_25000baseKR_Full_BIT) || 490 + (link->supported_caps & QED_LM_25000baseCR_Full_BIT) || 491 + (link->supported_caps & QED_LM_25000baseSR_Full_BIT)) { 472 492 lport->link_supported_speeds |= FC_PORTSPEED_25GBIT; 473 - if (link->supported_caps & SUPPORTED_40000baseLR4_Full) 493 + } 494 + if ((link->supported_caps & QED_LM_40000baseLR4_Full_BIT) || 495 + (link->supported_caps & QED_LM_40000baseKR4_Full_BIT) || 496 + (link->supported_caps & QED_LM_40000baseCR4_Full_BIT) || 497 + (link->supported_caps & QED_LM_40000baseSR4_Full_BIT)) { 474 498 lport->link_supported_speeds |= FC_PORTSPEED_40GBIT; 475 - if (link->supported_caps & SUPPORTED_50000baseKR2_Full) 499 + } 500 + if ((link->supported_caps & QED_LM_50000baseKR2_Full_BIT) || 501 + (link->supported_caps & QED_LM_50000baseCR2_Full_BIT) || 502 + (link->supported_caps & QED_LM_50000baseSR2_Full_BIT)) { 476 503 lport->link_supported_speeds |= FC_PORTSPEED_50GBIT; 477 - if (link->supported_caps & SUPPORTED_100000baseKR4_Full) 504 + } 505 + if ((link->supported_caps & QED_LM_100000baseKR4_Full_BIT) || 506 + (link->supported_caps & QED_LM_100000baseSR4_Full_BIT) || 507 + (link->supported_caps & QED_LM_100000baseCR4_Full_BIT) || 508 + (link->supported_caps & QED_LM_100000baseLR4_ER4_Full_BIT)) { 478 509 lport->link_supported_speeds |= FC_PORTSPEED_100GBIT; 510 + } 511 + if (link->supported_caps & QED_LM_20000baseKR2_Full_BIT) 512 + lport->link_supported_speeds |= FC_PORTSPEED_20GBIT; 479 513 fc_host_supported_speeds(lport->host) = lport->link_supported_speeds; 480 514 } 481 515 482 516 static void qedf_link_update(void *dev, struct qed_link_output *link) 483 517 { 484 518 struct qedf_ctx *qedf = (struct qedf_ctx *)dev; 519 + 520 + /* 521 + * Prevent race where we're removing the module and we get link update 522 + * for qed. 523 + */ 524 + if (test_bit(QEDF_UNLOADING, &qedf->flags)) { 525 + QEDF_ERR(&qedf->dbg_ctx, 526 + "Ignore link update, driver getting unload.\n"); 527 + return; 528 + } 485 529 486 530 if (link->link_up) { 487 531 if (atomic_read(&qedf->link_state) == QEDF_LINK_UP) { ··· 2364 2340 fr_dev(fp) = lport; 2365 2341 fr_sof(fp) = hp->fcoe_sof; 2366 2342 if (skb_copy_bits(skb, fr_len, &crc_eof, sizeof(crc_eof))) { 2343 + QEDF_INFO(NULL, QEDF_LOG_LL2, "skb_copy_bits failed.\n"); 2367 2344 kfree_skb(skb); 2368 2345 return; 2369 2346 } 2370 2347 fr_eof(fp) = crc_eof.fcoe_eof; 2371 2348 fr_crc(fp) = crc_eof.fcoe_crc32; 2372 2349 if (pskb_trim(skb, fr_len)) { 2350 + QEDF_INFO(NULL, QEDF_LOG_LL2, "pskb_trim failed.\n"); 2373 2351 kfree_skb(skb); 2374 2352 return; 2375 2353 } ··· 2432 2406 * empty then this is not addressed to our port so simply drop it. 2433 2407 */ 2434 2408 if (lport->port_id != ntoh24(fh->fh_d_id) && !vn_port) { 2435 - QEDF_INFO(&(qedf->dbg_ctx), QEDF_LOG_LL2, 2436 - "Dropping frame due to destination mismatch: lport->port_id=%x fh->d_id=%x.\n", 2437 - lport->port_id, ntoh24(fh->fh_d_id)); 2409 + QEDF_INFO(&qedf->dbg_ctx, QEDF_LOG_LL2, 2410 + "Dropping frame due to destination mismatch: lport->port_id=0x%x fh->d_id=0x%x.\n", 2411 + lport->port_id, ntoh24(fh->fh_d_id)); 2438 2412 kfree_skb(skb); 2439 2413 return; 2440 2414 } ··· 2443 2417 if ((fh->fh_type == FC_TYPE_BLS) && (f_ctl & FC_FC_SEQ_CTX) && 2444 2418 (f_ctl & FC_FC_EX_CTX)) { 2445 2419 /* Drop incoming ABTS response that has both SEQ/EX CTX set */ 2420 + QEDF_INFO(&qedf->dbg_ctx, QEDF_LOG_LL2, 2421 + "Dropping ABTS response as both SEQ/EX CTX set.\n"); 2446 2422 kfree_skb(skb); 2447 2423 return; 2448 2424 } ··· 2588 2560 sizeof(struct status_block_e4), &sb_phys, GFP_KERNEL); 2589 2561 2590 2562 if (!sb_virt) { 2591 - QEDF_ERR(&(qedf->dbg_ctx), "Status block allocation failed " 2592 - "for id = %d.\n", sb_id); 2563 + QEDF_ERR(&qedf->dbg_ctx, 2564 + "Status block allocation failed for id = %d.\n", 2565 + sb_id); 2593 2566 return -ENOMEM; 2594 2567 } 2595 2568 ··· 2598 2569 sb_id, QED_SB_TYPE_STORAGE); 2599 2570 2600 2571 if (ret) { 2601 - QEDF_ERR(&(qedf->dbg_ctx), "Status block initialization " 2602 - "failed for id = %d.\n", sb_id); 2572 + QEDF_ERR(&qedf->dbg_ctx, 2573 + "Status block initialization failed (0x%x) for id = %d.\n", 2574 + ret, sb_id); 2603 2575 return ret; 2604 2576 } 2605 2577 ··· 2684 2654 io_req = &qedf->cmd_mgr->cmds[xid]; 2685 2655 2686 2656 /* Completion not for a valid I/O anymore so just return */ 2687 - if (!io_req) 2657 + if (!io_req) { 2658 + QEDF_ERR(&qedf->dbg_ctx, 2659 + "io_req is NULL for xid=0x%x.\n", xid); 2688 2660 return; 2661 + } 2689 2662 2690 2663 fcport = io_req->fcport; 2691 2664 2692 2665 if (fcport == NULL) { 2693 - QEDF_ERR(&(qedf->dbg_ctx), "fcport is NULL.\n"); 2666 + QEDF_ERR(&qedf->dbg_ctx, 2667 + "fcport is NULL for xid=0x%x io_req=%p.\n", 2668 + xid, io_req); 2694 2669 return; 2695 2670 } 2696 2671 ··· 2704 2669 * isn't valid and shouldn't be taken. We should just return. 2705 2670 */ 2706 2671 if (!test_bit(QEDF_RPORT_SESSION_READY, &fcport->flags)) { 2707 - QEDF_ERR(&(qedf->dbg_ctx), "Session not offloaded yet.\n"); 2672 + QEDF_ERR(&qedf->dbg_ctx, 2673 + "Session not offloaded yet, fcport = %p.\n", fcport); 2708 2674 return; 2709 2675 } 2710 2676 ··· 2917 2881 */ 2918 2882 if (!qedf->p_cpuq) { 2919 2883 status = 1; 2884 + QEDF_ERR(&qedf->dbg_ctx, "p_cpuq is NULL.\n"); 2920 2885 goto mem_alloc_failure; 2921 2886 } 2922 2887 ··· 2933 2896 2934 2897 /* Allocate DMA coherent buffers for BDQ */ 2935 2898 rc = qedf_alloc_bdq(qedf); 2936 - if (rc) 2899 + if (rc) { 2900 + QEDF_ERR(&qedf->dbg_ctx, "Unable to allocate bdq.\n"); 2937 2901 goto mem_alloc_failure; 2902 + } 2938 2903 2939 2904 /* Allocate a CQ and an associated PBL for each MSI-X vector */ 2940 2905 for (i = 0; i < qedf->num_queues; i++) { ··· 3146 3107 .id_table = qedf_pci_tbl, 3147 3108 .probe = qedf_probe, 3148 3109 .remove = qedf_remove, 3110 + .shutdown = qedf_shutdown, 3149 3111 }; 3150 3112 3151 3113 static int __qedf_probe(struct pci_dev *pdev, int mode) ··· 3249 3209 qed_params.is_vf = is_vf; 3250 3210 qedf->cdev = qed_ops->common->probe(pdev, &qed_params); 3251 3211 if (!qedf->cdev) { 3212 + QEDF_ERR(&qedf->dbg_ctx, "common probe failed.\n"); 3252 3213 rc = -ENODEV; 3253 3214 goto err1; 3254 3215 } ··· 3318 3277 3319 3278 /* Setup interrupts */ 3320 3279 rc = qedf_setup_int(qedf); 3321 - if (rc) 3280 + if (rc) { 3281 + QEDF_ERR(&qedf->dbg_ctx, "Setup interrupts failed.\n"); 3322 3282 goto err3; 3283 + } 3323 3284 3324 3285 rc = qed_ops->start(qedf->cdev, &qedf->tasks); 3325 3286 if (rc) { ··· 3403 3360 } 3404 3361 3405 3362 memset(&params, 0, sizeof(params)); 3406 - params.mtu = 9000; 3363 + params.mtu = QEDF_LL2_BUF_SIZE; 3407 3364 ether_addr_copy(params.ll2_mac_address, qedf->mac); 3408 3365 3409 3366 /* Start LL2 processing thread */ ··· 3762 3719 fcoe->scsi_tsk_full = qedf->task_set_fulls; 3763 3720 } 3764 3721 3722 + static void qedf_shutdown(struct pci_dev *pdev) 3723 + { 3724 + __qedf_remove(pdev, QEDF_MODE_NORMAL); 3725 + } 3726 + 3765 3727 /* Generic TLV data callback */ 3766 3728 void qedf_get_generic_tlv_data(void *dev, struct qed_generic_tlvs *data) 3767 3729 { ··· 3893 3845 } 3894 3846 3895 3847 MODULE_LICENSE("GPL"); 3896 - MODULE_DESCRIPTION("QLogic QEDF 25/40/50/100Gb FCoE Driver"); 3848 + MODULE_DESCRIPTION("QLogic FastLinQ 4xxxx FCoE Module"); 3897 3849 MODULE_AUTHOR("QLogic Corporation"); 3898 3850 MODULE_VERSION(QEDF_VERSION); 3899 3851 module_init(qedf_init);
+4 -4
drivers/scsi/qedf/qedf_version.h
··· 4 4 * Copyright (c) 2016-2018 Cavium Inc. 5 5 */ 6 6 7 - #define QEDF_VERSION "8.37.25.20" 7 + #define QEDF_VERSION "8.42.3.0" 8 8 #define QEDF_DRIVER_MAJOR_VER 8 9 - #define QEDF_DRIVER_MINOR_VER 37 10 - #define QEDF_DRIVER_REV_VER 25 11 - #define QEDF_DRIVER_ENG_VER 20 9 + #define QEDF_DRIVER_MINOR_VER 42 10 + #define QEDF_DRIVER_REV_VER 3 11 + #define QEDF_DRIVER_ENG_VER 0 12 12
+6 -6
drivers/scsi/qla2xxx/qla_attr.c
··· 382 382 ha->optrom_region_size = size; 383 383 384 384 ha->optrom_state = QLA_SREADING; 385 - ha->optrom_buffer = vmalloc(ha->optrom_region_size); 385 + ha->optrom_buffer = vzalloc(ha->optrom_region_size); 386 386 if (ha->optrom_buffer == NULL) { 387 387 ql_log(ql_log_warn, vha, 0x7062, 388 388 "Unable to allocate memory for optrom retrieval " ··· 404 404 "Reading flash region -- 0x%x/0x%x.\n", 405 405 ha->optrom_region_start, ha->optrom_region_size); 406 406 407 - memset(ha->optrom_buffer, 0, ha->optrom_region_size); 408 407 ha->isp_ops->read_optrom(vha, ha->optrom_buffer, 409 408 ha->optrom_region_start, ha->optrom_region_size); 410 409 break; ··· 456 457 ha->optrom_region_size = size; 457 458 458 459 ha->optrom_state = QLA_SWRITING; 459 - ha->optrom_buffer = vmalloc(ha->optrom_region_size); 460 + ha->optrom_buffer = vzalloc(ha->optrom_region_size); 460 461 if (ha->optrom_buffer == NULL) { 461 462 ql_log(ql_log_warn, vha, 0x7066, 462 463 "Unable to allocate memory for optrom update " ··· 471 472 "Staging flash region write -- 0x%x/0x%x.\n", 472 473 ha->optrom_region_start, ha->optrom_region_size); 473 474 474 - memset(ha->optrom_buffer, 0, ha->optrom_region_size); 475 475 break; 476 476 case 3: 477 477 if (ha->optrom_state != QLA_SWRITING) { ··· 724 726 break; 725 727 } else { 726 728 /* Make sure FC side is not in reset */ 727 - qla2x00_wait_for_hba_online(vha); 729 + WARN_ON_ONCE(qla2x00_wait_for_hba_online(vha) != 730 + QLA_SUCCESS); 728 731 729 732 /* Issue MPI reset */ 730 733 scsi_block_requests(vha->host); ··· 1125 1126 char pci_info[30]; 1126 1127 1127 1128 return scnprintf(buf, PAGE_SIZE, "%s\n", 1128 - vha->hw->isp_ops->pci_info_str(vha, pci_info)); 1129 + vha->hw->isp_ops->pci_info_str(vha, pci_info, 1130 + sizeof(pci_info))); 1129 1131 } 1130 1132 1131 1133 static ssize_t
+11 -12
drivers/scsi/qla2xxx/qla_bsg.c
··· 12 12 #include <linux/bsg-lib.h> 13 13 14 14 /* BSG support for ELS/CT pass through */ 15 - void 16 - qla2x00_bsg_job_done(void *ptr, int res) 15 + void qla2x00_bsg_job_done(srb_t *sp, int res) 17 16 { 18 - srb_t *sp = ptr; 19 17 struct bsg_job *bsg_job = sp->u.bsg_job; 20 18 struct fc_bsg_reply *bsg_reply = bsg_job->reply; 21 19 ··· 23 25 sp->free(sp); 24 26 } 25 27 26 - void 27 - qla2x00_bsg_sp_free(void *ptr) 28 + void qla2x00_bsg_sp_free(srb_t *sp) 28 29 { 29 - srb_t *sp = ptr; 30 30 struct qla_hw_data *ha = sp->vha->hw; 31 31 struct bsg_job *bsg_job = sp->u.bsg_job; 32 32 struct fc_bsg_request *bsg_request = bsg_job->request; ··· 337 341 dma_map_sg(&ha->pdev->dev, bsg_job->request_payload.sg_list, 338 342 bsg_job->request_payload.sg_cnt, DMA_TO_DEVICE); 339 343 if (!req_sg_cnt) { 344 + dma_unmap_sg(&ha->pdev->dev, bsg_job->request_payload.sg_list, 345 + bsg_job->request_payload.sg_cnt, DMA_TO_DEVICE); 340 346 rval = -ENOMEM; 341 347 goto done_free_fcport; 342 348 } ··· 346 348 rsp_sg_cnt = dma_map_sg(&ha->pdev->dev, bsg_job->reply_payload.sg_list, 347 349 bsg_job->reply_payload.sg_cnt, DMA_FROM_DEVICE); 348 350 if (!rsp_sg_cnt) { 351 + dma_unmap_sg(&ha->pdev->dev, bsg_job->reply_payload.sg_list, 352 + bsg_job->reply_payload.sg_cnt, DMA_FROM_DEVICE); 349 353 rval = -ENOMEM; 350 354 goto done_free_fcport; 351 355 } ··· 1778 1778 uint16_t nextlid = 0; 1779 1779 uint32_t tot_dsds; 1780 1780 srb_t *sp = NULL; 1781 - uint32_t req_data_len = 0; 1782 - uint32_t rsp_data_len = 0; 1781 + uint32_t req_data_len; 1782 + uint32_t rsp_data_len; 1783 1783 1784 1784 /* Check the type of the adapter */ 1785 1785 if (!IS_BIDI_CAPABLE(ha)) { ··· 1884 1884 goto done_unmap_sg; 1885 1885 } 1886 1886 1887 + req_data_len = bsg_job->request_payload.payload_len; 1888 + rsp_data_len = bsg_job->reply_payload.payload_len; 1889 + 1887 1890 if (req_data_len != rsp_data_len) { 1888 1891 rval = EXT_STATUS_BUSY; 1889 1892 ql_log(ql_log_warn, vha, 0x70aa, 1890 1893 "req_data_len != rsp_data_len\n"); 1891 1894 goto done_unmap_sg; 1892 1895 } 1893 - 1894 - req_data_len = bsg_job->request_payload.payload_len; 1895 - rsp_data_len = bsg_job->reply_payload.payload_len; 1896 - 1897 1896 1898 1897 /* Alloc SRB structure */ 1899 1898 sp = qla2x00_get_sp(vha, &(vha->bidir_fcport), GFP_KERNEL);
+2 -1
drivers/scsi/qla2xxx/qla_dbg.c
··· 2743 2743 2744 2744 2745 2745 void 2746 - ql_dump_buffer(uint level, scsi_qla_host_t *vha, uint id, void *buf, uint size) 2746 + ql_dump_buffer(uint level, scsi_qla_host_t *vha, uint id, const void *buf, 2747 + uint size) 2747 2748 { 2748 2749 uint cnt; 2749 2750
+95 -37
drivers/scsi/qla2xxx/qla_def.h
··· 34 34 #include <scsi/scsi_transport_fc.h> 35 35 #include <scsi/scsi_bsg_fc.h> 36 36 37 + /* Big endian Fibre Channel S_ID (source ID) or D_ID (destination ID). */ 38 + typedef struct { 39 + uint8_t domain; 40 + uint8_t area; 41 + uint8_t al_pa; 42 + } be_id_t; 43 + 44 + /* Little endian Fibre Channel S_ID (source ID) or D_ID (destination ID). */ 45 + typedef struct { 46 + uint8_t al_pa; 47 + uint8_t area; 48 + uint8_t domain; 49 + } le_id_t; 50 + 37 51 #include "qla_bsg.h" 38 52 #include "qla_dsd.h" 39 53 #include "qla_nx.h" ··· 131 117 #define RD_REG_BYTE_RELAXED(addr) readb_relaxed(addr) 132 118 #define RD_REG_WORD_RELAXED(addr) readw_relaxed(addr) 133 119 #define RD_REG_DWORD_RELAXED(addr) readl_relaxed(addr) 134 - #define WRT_REG_BYTE(addr, data) writeb(data,addr) 135 - #define WRT_REG_WORD(addr, data) writew(data,addr) 136 - #define WRT_REG_DWORD(addr, data) writel(data,addr) 120 + #define WRT_REG_BYTE(addr, data) writeb(data, addr) 121 + #define WRT_REG_WORD(addr, data) writew(data, addr) 122 + #define WRT_REG_DWORD(addr, data) writel(data, addr) 137 123 138 124 /* 139 125 * ISP83XX specific remote register addresses ··· 221 207 * 133Mhz slot. 222 208 */ 223 209 #define RD_REG_WORD_PIO(addr) (inw((unsigned long)addr)) 224 - #define WRT_REG_WORD_PIO(addr, data) (outw(data,(unsigned long)addr)) 210 + #define WRT_REG_WORD_PIO(addr, data) (outw(data, (unsigned long)addr)) 225 211 226 212 /* 227 213 * Fibre Channel device definitions. ··· 317 303 uint32_t request_sense_length; 318 304 uint32_t fw_sense_length; 319 305 uint8_t *request_sense_ptr; 320 - void *ctx; 306 + struct ct6_dsd *ct6_ctx; 307 + struct crc_context *crc_ctx; 321 308 }; 322 309 323 310 /* ··· 357 342 } b; 358 343 } port_id_t; 359 344 #define INVALID_PORT_ID 0xFFFFFF 345 + 346 + static inline le_id_t be_id_to_le(be_id_t id) 347 + { 348 + le_id_t res; 349 + 350 + res.domain = id.domain; 351 + res.area = id.area; 352 + res.al_pa = id.al_pa; 353 + 354 + return res; 355 + } 356 + 357 + static inline be_id_t le_id_to_be(le_id_t id) 358 + { 359 + be_id_t res; 360 + 361 + res.domain = id.domain; 362 + res.area = id.area; 363 + res.al_pa = id.al_pa; 364 + 365 + return res; 366 + } 367 + 368 + static inline port_id_t be_to_port_id(be_id_t id) 369 + { 370 + port_id_t res; 371 + 372 + res.b.domain = id.domain; 373 + res.b.area = id.area; 374 + res.b.al_pa = id.al_pa; 375 + res.b.rsvd_1 = 0; 376 + 377 + return res; 378 + } 379 + 380 + static inline be_id_t port_id_to_be_id(port_id_t port_id) 381 + { 382 + be_id_t res; 383 + 384 + res.domain = port_id.b.domain; 385 + res.area = port_id.b.area; 386 + res.al_pa = port_id.b.al_pa; 387 + 388 + return res; 389 + } 360 390 361 391 struct els_logo_payload { 362 392 uint8_t opcode; ··· 455 395 struct els_logo_payload *els_logo_pyld; 456 396 dma_addr_t els_logo_pyld_dma; 457 397 } els_logo; 458 - struct { 398 + struct els_plogi { 459 399 #define ELS_DCMD_PLOGI 0x3 460 400 uint32_t flags; 461 401 uint32_t els_cmd; ··· 597 537 wait_queue_head_t nvme_ls_waitq; 598 538 struct fc_port *fcport; 599 539 struct scsi_qla_host *vha; 540 + unsigned int start_timer:1; 600 541 uint32_t handle; 601 542 uint16_t flags; 602 543 uint16_t type; ··· 615 554 struct bsg_job *bsg_job; 616 555 struct srb_cmd scmd; 617 556 } u; 618 - void (*done)(void *, int); 619 - void (*free)(void *); 557 + /* 558 + * Report completion status @res and call sp_put(@sp). @res is 559 + * an NVMe status code, a SCSI result (e.g. DID_OK << 16) or a 560 + * QLA_* status value. 561 + */ 562 + void (*done)(struct srb *sp, int res); 563 + /* Stop the timer and free @sp. Only used by the FCP code. */ 564 + void (*free)(struct srb *sp); 565 + /* 566 + * Call nvme_private->fd->done() and free @sp. Only used by the NVMe 567 + * code. 568 + */ 620 569 void (*put_fn)(struct kref *kref); 621 570 } srb_t; 622 571 623 572 #define GET_CMD_SP(sp) (sp->u.scmd.cmd) 624 - #define SET_CMD_SP(sp, cmd) (sp->u.scmd.cmd = cmd) 625 - #define GET_CMD_CTX_SP(sp) (sp->u.scmd.ctx) 626 573 627 574 #define GET_CMD_SENSE_LEN(sp) \ 628 575 (sp->u.scmd.request_sense_length) ··· 989 920 #define MBS_NOT_LOGGED_IN 0x400A 990 921 #define MBS_LINK_DOWN_ERROR 0x400B 991 922 #define MBS_DIAG_ECHO_TEST_ERROR 0x400C 923 + 924 + static inline bool qla2xxx_is_valid_mbs(unsigned int mbs) 925 + { 926 + return MBS_COMMAND_COMPLETE <= mbs && mbs <= MBS_DIAG_ECHO_TEST_ERROR; 927 + } 992 928 993 929 /* 994 930 * ISP mailbox asynchronous event status codes ··· 1925 1851 uint16_t reserved_2; 1926 1852 uint16_t reserved_3; 1927 1853 uint32_t reserved_4; 1928 - struct dsd64 data_dsd; 1854 + struct dsd64 data_dsd[1]; 1929 1855 uint32_t reserved_5[2]; 1930 1856 uint32_t reserved_6; 1931 1857 } nobundling; ··· 1935 1861 uint16_t reserved_1; 1936 1862 __le16 dseg_count; /* Data segment count */ 1937 1863 uint32_t reserved_2; 1938 - struct dsd64 data_dsd; 1864 + struct dsd64 data_dsd[1]; 1939 1865 struct dsd64 dif_dsd; 1940 1866 } bundling; 1941 1867 } u; ··· 2363 2289 DSC_LS_LOGO_PEND, 2364 2290 }; 2365 2291 2366 - enum fcport_mgt_event { 2367 - FCME_RELOGIN = 1, 2368 - FCME_RSCN, 2369 - FCME_PLOGI_DONE, /* Initiator side sent LLIOCB */ 2370 - FCME_PRLI_DONE, 2371 - FCME_GNL_DONE, 2372 - FCME_GPSC_DONE, 2373 - FCME_GPDB_DONE, 2374 - FCME_GPNID_DONE, 2375 - FCME_GFFID_DONE, 2376 - FCME_ADISC_DONE, 2377 - FCME_GNNID_DONE, 2378 - FCME_GFPNID_DONE, 2379 - FCME_ELS_PLOGI_DONE, 2380 - }; 2381 - 2382 2292 enum rscn_addr_format { 2383 2293 RSCN_PORT_ADDR, 2384 2294 RSCN_AREA_ADDR, ··· 2480 2422 #define QLA_FCPORT_FOUND 2 2481 2423 2482 2424 struct event_arg { 2483 - enum fcport_mgt_event event; 2484 2425 fc_port_t *fcport; 2485 2426 srb_t *sp; 2486 2427 port_id_t id; ··· 2802 2745 /* GA_NXT, GPN_ID, GNN_ID, GFT_ID, GFPN_ID */ 2803 2746 struct { 2804 2747 uint8_t reserved; 2805 - uint8_t port_id[3]; 2748 + be_id_t port_id; 2806 2749 } port_id; 2807 2750 2808 2751 struct { ··· 2821 2764 2822 2765 struct { 2823 2766 uint8_t reserved; 2824 - uint8_t port_id[3]; 2767 + be_id_t port_id; 2825 2768 uint8_t fc4_types[32]; 2826 2769 } rft_id; 2827 2770 2828 2771 struct { 2829 2772 uint8_t reserved; 2830 - uint8_t port_id[3]; 2773 + be_id_t port_id; 2831 2774 uint16_t reserved2; 2832 2775 uint8_t fc4_feature; 2833 2776 uint8_t fc4_type; ··· 2835 2778 2836 2779 struct { 2837 2780 uint8_t reserved; 2838 - uint8_t port_id[3]; 2781 + be_id_t port_id; 2839 2782 uint8_t node_name[8]; 2840 2783 } rnn_id; 2841 2784 ··· 2922 2865 2923 2866 struct ct_sns_gid_pt_data { 2924 2867 uint8_t control_byte; 2925 - uint8_t port_id[3]; 2868 + be_id_t port_id; 2926 2869 }; 2927 2870 2928 2871 /* It's the same for both GPN_FT and GNN_FT */ ··· 2952 2895 union { 2953 2896 struct { 2954 2897 uint8_t port_type; 2955 - uint8_t port_id[3]; 2898 + be_id_t port_id; 2956 2899 uint8_t port_name[8]; 2957 2900 uint8_t sym_port_name_len; 2958 2901 uint8_t sym_port_name[255]; ··· 3168 3111 void (*update_fw_options) (struct scsi_qla_host *); 3169 3112 int (*load_risc) (struct scsi_qla_host *, uint32_t *); 3170 3113 3171 - char * (*pci_info_str) (struct scsi_qla_host *, char *); 3114 + char * (*pci_info_str)(struct scsi_qla_host *, char *, size_t); 3172 3115 char * (*fw_version_str)(struct scsi_qla_host *, char *, size_t); 3173 3116 3174 3117 irq_handler_t intr_handler; ··· 3907 3850 3908 3851 /* NVRAM configuration data */ 3909 3852 #define MAX_NVRAM_SIZE 4096 3910 - #define VPD_OFFSET MAX_NVRAM_SIZE / 2 3853 + #define VPD_OFFSET (MAX_NVRAM_SIZE / 2) 3911 3854 uint16_t nvram_size; 3912 3855 uint16_t nvram_base; 3913 3856 void *nvram; ··· 4685 4628 #define QLA_SUSPENDED 0x106 4686 4629 #define QLA_BUSY 0x107 4687 4630 #define QLA_ALREADY_REGISTERED 0x109 4631 + #define QLA_OS_TIMER_EXPIRED 0x10a 4688 4632 4689 4633 #define NVRAM_DELAY() udelay(10) 4690 4634
+3 -6
drivers/scsi/qla2xxx/qla_dfs.c
··· 57 57 { 58 58 scsi_qla_host_t *vha = s->private; 59 59 struct qla_hw_data *ha = vha->hw; 60 - struct gid_list_info *gid_list; 60 + struct gid_list_info *gid_list, *gid; 61 61 dma_addr_t gid_list_dma; 62 62 fc_port_t fc_port; 63 - char *id_iter; 64 63 int rc, i; 65 64 uint16_t entries, loop_id; 66 65 struct qla_tgt *tgt = vha->vha_tgt.qla_tgt; ··· 81 82 if (rc != QLA_SUCCESS) 82 83 goto out_free_id_list; 83 84 84 - id_iter = (char *)gid_list; 85 + gid = gid_list; 85 86 86 87 seq_puts(s, "Port Name Port ID Loop ID\n"); 87 88 88 89 for (i = 0; i < entries; i++) { 89 - struct gid_list_info *gid = 90 - (struct gid_list_info *)id_iter; 91 90 loop_id = le16_to_cpu(gid->loop_id); 92 91 memset(&fc_port, 0, sizeof(fc_port_t)); 93 92 ··· 96 99 fc_port.port_name, fc_port.d_id.b.domain, 97 100 fc_port.d_id.b.area, fc_port.d_id.b.al_pa, 98 101 fc_port.loop_id); 99 - id_iter += ha->gid_list_info_size; 102 + gid = (void *)gid + ha->gid_list_info_size; 100 103 } 101 104 out_free_id_list: 102 105 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
+2
drivers/scsi/qla2xxx/qla_dsd.h
··· 1 1 #ifndef _QLA_DSD_H_ 2 2 #define _QLA_DSD_H_ 3 3 4 + #include <asm/unaligned.h> 5 + 4 6 /* 32-bit data segment descriptor (8 bytes) */ 5 7 struct dsd32 { 6 8 __le32 address;
+4 -4
drivers/scsi/qla2xxx/qla_fw.h
··· 761 761 #define ECF_CLR_PASSTHRU_PEND BIT_12 762 762 #define ECF_INCL_FRAME_HDR BIT_11 763 763 764 - uint32_t rx_byte_count; 765 - uint32_t tx_byte_count; 764 + __le32 rx_byte_count; 765 + __le32 tx_byte_count; 766 766 767 767 __le64 tx_address __packed; /* Data segment 0 address. */ 768 - uint32_t tx_len; /* Data segment 0 length. */ 768 + __le32 tx_len; /* Data segment 0 length. */ 769 769 __le64 rx_address __packed; /* Data segment 1 address. */ 770 - uint32_t rx_len; /* Data segment 1 length. */ 770 + __le32 rx_len; /* Data segment 1 length. */ 771 771 }; 772 772 773 773 struct els_sts_entry_24xx {
+20 -13
drivers/scsi/qla2xxx/qla_gbl.h
··· 45 45 46 46 extern int qla24xx_els_dcmd_iocb(scsi_qla_host_t *, int, port_id_t); 47 47 extern int qla24xx_els_dcmd2_iocb(scsi_qla_host_t *, int, fc_port_t *, bool); 48 + extern void qla2x00_els_dcmd2_free(scsi_qla_host_t *vha, 49 + struct els_plogi *els_plogi); 48 50 49 51 extern void qla2x00_update_fcports(scsi_qla_host_t *); 50 52 ··· 98 96 extern struct qla_qpair *qla2xxx_create_qpair(struct scsi_qla_host *, 99 97 int, int, bool); 100 98 extern int qla2xxx_delete_qpair(struct scsi_qla_host *, struct qla_qpair *); 101 - void qla2x00_fcport_event_handler(scsi_qla_host_t *, struct event_arg *); 99 + void qla2x00_handle_rscn(scsi_qla_host_t *vha, struct event_arg *ea); 100 + void qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, 101 + struct event_arg *ea); 102 + void qla24xx_handle_relogin_event(scsi_qla_host_t *vha, 103 + struct event_arg *ea); 102 104 int qla24xx_async_gpdb(struct scsi_qla_host *, fc_port_t *, u8); 103 105 int qla24xx_async_prli(struct scsi_qla_host *, fc_port_t *); 104 106 int qla24xx_async_notify_ack(scsi_qla_host_t *, fc_port_t *, ··· 219 213 220 214 extern int qla2x00_post_uevent_work(struct scsi_qla_host *, u32); 221 215 extern void qla2x00_disable_board_on_pci_error(struct work_struct *); 222 - extern void qla2x00_sp_compl(void *, int); 223 - extern void qla2xxx_qpair_sp_free_dma(void *); 224 - extern void qla2xxx_qpair_sp_compl(void *, int); 216 + extern void qla2x00_sp_compl(srb_t *sp, int); 217 + extern void qla2xxx_qpair_sp_free_dma(srb_t *sp); 218 + extern void qla2xxx_qpair_sp_compl(srb_t *sp, int); 225 219 extern void qla24xx_sched_upd_fcport(fc_port_t *); 226 220 void qla2x00_handle_login_done_event(struct scsi_qla_host *, fc_port_t *, 227 221 uint16_t *); ··· 250 244 extern int qla24xx_vport_create_req_sanity_check(struct fc_vport *); 251 245 extern scsi_qla_host_t *qla24xx_create_vhost(struct fc_vport *); 252 246 253 - extern void qla2x00_sp_free_dma(void *); 247 + extern void qla2x00_sp_free_dma(srb_t *sp); 254 248 extern char *qla2x00_get_fw_version_str(struct scsi_qla_host *, char *); 255 249 256 250 extern void qla2x00_mark_device_lost(scsi_qla_host_t *, fc_port_t *, int, int); ··· 278 272 extern void qla2x00_build_scsi_iocbs_64(srb_t *, cmd_entry_t *, uint16_t); 279 273 extern void qla24xx_build_scsi_iocbs(srb_t *, struct cmd_type_7 *, 280 274 uint16_t, struct req_que *); 275 + extern uint32_t qla2xxx_get_next_handle(struct req_que *req); 281 276 extern int qla2x00_start_scsi(srb_t *sp); 282 277 extern int qla24xx_start_scsi(srb_t *sp); 283 278 int qla2x00_marker(struct scsi_qla_host *, struct qla_qpair *, ··· 561 554 * Global Function Prototypes in qla_sup.c source file. 562 555 */ 563 556 extern void qla2x00_release_nvram_protection(scsi_qla_host_t *); 564 - extern uint32_t *qla24xx_read_flash_data(scsi_qla_host_t *, uint32_t *, 557 + extern int qla24xx_read_flash_data(scsi_qla_host_t *, uint32_t *, 565 558 uint32_t, uint32_t); 566 559 extern uint8_t *qla2x00_read_nvram_data(scsi_qla_host_t *, void *, uint32_t, 567 560 uint32_t); ··· 637 630 638 631 extern void qla2xxx_dump_post_process(scsi_qla_host_t *, int); 639 632 extern void ql_dump_regs(uint, scsi_qla_host_t *, uint); 640 - extern void ql_dump_buffer(uint, scsi_qla_host_t *, uint, void *, uint); 633 + extern void ql_dump_buffer(uint, scsi_qla_host_t *, uint, const void *, uint); 641 634 /* 642 635 * Global Function Prototypes in qla_gs.c source file. 643 636 */ ··· 739 732 extern int qlafx00_soft_reset(scsi_qla_host_t *); 740 733 extern int qlafx00_chip_diag(scsi_qla_host_t *); 741 734 extern void qlafx00_config_rings(struct scsi_qla_host *); 742 - extern char *qlafx00_pci_info_str(struct scsi_qla_host *, char *); 735 + extern char *qlafx00_pci_info_str(struct scsi_qla_host *, char *, size_t); 743 736 extern char *qlafx00_fw_version_str(struct scsi_qla_host *, char *, size_t); 744 737 extern irqreturn_t qlafx00_intr_handler(int, void *); 745 738 extern void qlafx00_enable_intrs(struct qla_hw_data *); ··· 797 790 798 791 /* IOCB related functions */ 799 792 extern int qla82xx_start_scsi(srb_t *); 800 - extern void qla2x00_sp_free(void *); 793 + extern void qla2x00_sp_free(srb_t *sp); 801 794 extern void qla2x00_sp_timeout(struct timer_list *); 802 - extern void qla2x00_bsg_job_done(void *, int); 803 - extern void qla2x00_bsg_sp_free(void *); 795 + extern void qla2x00_bsg_job_done(srb_t *sp, int); 796 + extern void qla2x00_bsg_sp_free(srb_t *sp); 804 797 extern void qla2x00_start_iocbs(struct scsi_qla_host *, struct req_que *); 805 798 806 799 /* Interrupt related */ ··· 829 822 extern void qla8xxx_dev_failed_handler(scsi_qla_host_t *); 830 823 extern void qla82xx_clear_qsnt_ready(scsi_qla_host_t *); 831 824 832 - extern void qla2x00_set_model_info(scsi_qla_host_t *, uint8_t *, 833 - size_t, char *); 825 + extern void qla2x00_set_model_info(scsi_qla_host_t *, uint8_t *, size_t, 826 + const char *); 834 827 extern int qla82xx_mbx_intr_enable(scsi_qla_host_t *); 835 828 extern int qla82xx_mbx_intr_disable(scsi_qla_host_t *); 836 829 extern void qla82xx_start_iocbs(scsi_qla_host_t *);
+106 -144
drivers/scsi/qla2xxx/qla_gs.c
··· 226 226 ct_rsp = &ha->ct_sns->p.rsp; 227 227 228 228 /* Prepare CT arguments -- port_id */ 229 - ct_req->req.port_id.port_id[0] = fcport->d_id.b.domain; 230 - ct_req->req.port_id.port_id[1] = fcport->d_id.b.area; 231 - ct_req->req.port_id.port_id[2] = fcport->d_id.b.al_pa; 229 + ct_req->req.port_id.port_id = port_id_to_be_id(fcport->d_id); 232 230 233 231 /* Execute MS IOCB */ 234 232 rval = qla2x00_issue_iocb(vha, ha->ms_iocb, ha->ms_iocb_dma, ··· 240 242 rval = QLA_FUNCTION_FAILED; 241 243 } else { 242 244 /* Populate fc_port_t entry. */ 243 - fcport->d_id.b.domain = ct_rsp->rsp.ga_nxt.port_id[0]; 244 - fcport->d_id.b.area = ct_rsp->rsp.ga_nxt.port_id[1]; 245 - fcport->d_id.b.al_pa = ct_rsp->rsp.ga_nxt.port_id[2]; 245 + fcport->d_id = be_to_port_id(ct_rsp->rsp.ga_nxt.port_id); 246 246 247 247 memcpy(fcport->node_name, ct_rsp->rsp.ga_nxt.node_name, 248 248 WWN_SIZE); ··· 333 337 /* Set port IDs in switch info list. */ 334 338 for (i = 0; i < ha->max_fibre_devices; i++) { 335 339 gid_data = &ct_rsp->rsp.gid_pt.entries[i]; 336 - list[i].d_id.b.domain = gid_data->port_id[0]; 337 - list[i].d_id.b.area = gid_data->port_id[1]; 338 - list[i].d_id.b.al_pa = gid_data->port_id[2]; 340 + list[i].d_id = be_to_port_id(gid_data->port_id); 339 341 memset(list[i].fabric_port_name, 0, WWN_SIZE); 340 342 list[i].fp_speed = PORT_SPEED_UNKNOWN; 341 343 ··· 397 403 ct_rsp = &ha->ct_sns->p.rsp; 398 404 399 405 /* Prepare CT arguments -- port_id */ 400 - ct_req->req.port_id.port_id[0] = list[i].d_id.b.domain; 401 - ct_req->req.port_id.port_id[1] = list[i].d_id.b.area; 402 - ct_req->req.port_id.port_id[2] = list[i].d_id.b.al_pa; 406 + ct_req->req.port_id.port_id = port_id_to_be_id(list[i].d_id); 403 407 404 408 /* Execute MS IOCB */ 405 409 rval = qla2x00_issue_iocb(vha, ha->ms_iocb, ha->ms_iocb_dma, ··· 464 472 ct_rsp = &ha->ct_sns->p.rsp; 465 473 466 474 /* Prepare CT arguments -- port_id */ 467 - ct_req->req.port_id.port_id[0] = list[i].d_id.b.domain; 468 - ct_req->req.port_id.port_id[1] = list[i].d_id.b.area; 469 - ct_req->req.port_id.port_id[2] = list[i].d_id.b.al_pa; 475 + ct_req->req.port_id.port_id = port_id_to_be_id(list[i].d_id); 470 476 471 477 /* Execute MS IOCB */ 472 478 rval = qla2x00_issue_iocb(vha, ha->ms_iocb, ha->ms_iocb_dma, ··· 499 509 return (rval); 500 510 } 501 511 502 - static void qla2x00_async_sns_sp_done(void *s, int rc) 512 + static void qla2x00_async_sns_sp_done(srb_t *sp, int rc) 503 513 { 504 - struct srb *sp = s; 505 514 struct scsi_qla_host *vha = sp->vha; 506 515 struct ct_sns_pkt *ct_sns; 507 516 struct qla_work_evt *e; ··· 628 639 ct_req = qla2x00_prep_ct_req(ct_sns, RFT_ID_CMD, RFT_ID_RSP_SIZE); 629 640 630 641 /* Prepare CT arguments -- port_id, FC-4 types */ 631 - ct_req->req.rft_id.port_id[0] = vha->d_id.b.domain; 632 - ct_req->req.rft_id.port_id[1] = vha->d_id.b.area; 633 - ct_req->req.rft_id.port_id[2] = vha->d_id.b.al_pa; 642 + ct_req->req.rft_id.port_id = port_id_to_be_id(vha->d_id); 634 643 ct_req->req.rft_id.fc4_types[2] = 0x01; /* FCP-3 */ 635 644 636 645 if (vha->flags.nvme_enabled) ··· 724 737 ct_req = qla2x00_prep_ct_req(ct_sns, RFF_ID_CMD, RFF_ID_RSP_SIZE); 725 738 726 739 /* Prepare CT arguments -- port_id, FC-4 feature, FC-4 type */ 727 - ct_req->req.rff_id.port_id[0] = d_id->b.domain; 728 - ct_req->req.rff_id.port_id[1] = d_id->b.area; 729 - ct_req->req.rff_id.port_id[2] = d_id->b.al_pa; 740 + ct_req->req.rff_id.port_id = port_id_to_be_id(*d_id); 730 741 ct_req->req.rff_id.fc4_feature = fc4feature; 731 742 ct_req->req.rff_id.fc4_type = fc4type; /* SCSI - FCP */ 732 743 ··· 815 830 ct_req = qla2x00_prep_ct_req(ct_sns, RNN_ID_CMD, RNN_ID_RSP_SIZE); 816 831 817 832 /* Prepare CT arguments -- port_id, node_name */ 818 - ct_req->req.rnn_id.port_id[0] = vha->d_id.b.domain; 819 - ct_req->req.rnn_id.port_id[1] = vha->d_id.b.area; 820 - ct_req->req.rnn_id.port_id[2] = vha->d_id.b.al_pa; 833 + ct_req->req.rnn_id.port_id = port_id_to_be_id(vha->d_id); 821 834 memcpy(ct_req->req.rnn_id.node_name, vha->node_name, WWN_SIZE); 822 835 823 836 sp->u.iocb_cmd.u.ctarg.req_size = RNN_ID_REQ_SIZE; ··· 1462 1479 return ct_pkt; 1463 1480 } 1464 1481 1465 - static inline ms_iocb_entry_t * 1482 + static void 1466 1483 qla2x00_update_ms_fdmi_iocb(scsi_qla_host_t *vha, uint32_t req_size) 1467 1484 { 1468 1485 struct qla_hw_data *ha = vha->hw; ··· 1476 1493 ms_pkt->req_bytecount = cpu_to_le32(req_size); 1477 1494 ms_pkt->req_dsd.length = ms_pkt->req_bytecount; 1478 1495 } 1479 - 1480 - return ms_pkt; 1481 1496 } 1482 1497 1483 1498 /** ··· 1538 1557 /* Attributes */ 1539 1558 ct_req->req.rhba.attrs.count = 1540 1559 cpu_to_be32(FDMI_HBA_ATTR_COUNT); 1541 - entries = ct_req->req.rhba.hba_identifier; 1560 + entries = &ct_req->req; 1542 1561 1543 1562 /* Nodename. */ 1544 1563 eiter = entries + size; ··· 1747 1766 1748 1767 /* Attributes */ 1749 1768 ct_req->req.rpa.attrs.count = cpu_to_be32(FDMI_PORT_ATTR_COUNT); 1750 - entries = ct_req->req.rpa.port_name; 1769 + entries = &ct_req->req; 1751 1770 1752 1771 /* FC4 types. */ 1753 1772 eiter = entries + size; ··· 1960 1979 1961 1980 /* Attributes */ 1962 1981 ct_req->req.rhba2.attrs.count = cpu_to_be32(FDMIV2_HBA_ATTR_COUNT); 1963 - entries = ct_req->req.rhba2.hba_identifier; 1982 + entries = &ct_req->req; 1964 1983 1965 1984 /* Nodename. */ 1966 1985 eiter = entries + size; ··· 2319 2338 2320 2339 /* Attributes */ 2321 2340 ct_req->req.rpa2.attrs.count = cpu_to_be32(FDMIV2_PORT_ATTR_COUNT); 2322 - entries = ct_req->req.rpa2.port_name; 2341 + entries = &ct_req->req; 2323 2342 2324 2343 /* FC4 types. */ 2325 2344 eiter = entries + size; ··· 2711 2730 ct_rsp = &ha->ct_sns->p.rsp; 2712 2731 2713 2732 /* Prepare CT arguments -- port_id */ 2714 - ct_req->req.port_id.port_id[0] = list[i].d_id.b.domain; 2715 - ct_req->req.port_id.port_id[1] = list[i].d_id.b.area; 2716 - ct_req->req.port_id.port_id[2] = list[i].d_id.b.al_pa; 2733 + ct_req->req.port_id.port_id = port_id_to_be_id(list[i].d_id); 2717 2734 2718 2735 /* Execute MS IOCB */ 2719 2736 rval = qla2x00_issue_iocb(vha, ha->ms_iocb, ha->ms_iocb_dma, ··· 2915 2936 ct_rsp = &ha->ct_sns->p.rsp; 2916 2937 2917 2938 /* Prepare CT arguments -- port_id */ 2918 - ct_req->req.port_id.port_id[0] = list[i].d_id.b.domain; 2919 - ct_req->req.port_id.port_id[1] = list[i].d_id.b.area; 2920 - ct_req->req.port_id.port_id[2] = list[i].d_id.b.al_pa; 2939 + ct_req->req.port_id.port_id = port_id_to_be_id(list[i].d_id); 2921 2940 2922 2941 /* Execute MS IOCB */ 2923 2942 rval = qla2x00_issue_iocb(vha, ha->ms_iocb, ha->ms_iocb_dma, ··· 2988 3011 qla_post_iidma_work(vha, fcport); 2989 3012 } 2990 3013 2991 - static void qla24xx_async_gpsc_sp_done(void *s, int res) 3014 + static void qla24xx_async_gpsc_sp_done(srb_t *sp, int res) 2992 3015 { 2993 - struct srb *sp = s; 2994 3016 struct scsi_qla_host *vha = sp->vha; 2995 3017 struct qla_hw_data *ha = vha->hw; 2996 3018 fc_port_t *fcport = sp->fcport; ··· 3031 3055 be16_to_cpu(ct_rsp->rsp.gpsc.speed)); 3032 3056 } 3033 3057 memset(&ea, 0, sizeof(ea)); 3034 - ea.event = FCME_GPSC_DONE; 3035 3058 ea.rc = res; 3036 3059 ea.fcport = fcport; 3037 3060 ea.sp = sp; 3038 - qla2x00_fcport_event_handler(vha, &ea); 3061 + qla24xx_handle_gpsc_event(vha, &ea); 3039 3062 3040 3063 done: 3041 3064 sp->free(sp); ··· 3119 3144 3120 3145 switch (sp->type) { 3121 3146 case SRB_ELS_DCMD: 3122 - if (c->u.els_plogi.els_plogi_pyld) 3123 - dma_free_coherent(&vha->hw->pdev->dev, 3124 - c->u.els_plogi.tx_size, 3125 - c->u.els_plogi.els_plogi_pyld, 3126 - c->u.els_plogi.els_plogi_pyld_dma); 3127 - 3128 - if (c->u.els_plogi.els_resp_pyld) 3129 - dma_free_coherent(&vha->hw->pdev->dev, 3130 - c->u.els_plogi.rx_size, 3131 - c->u.els_plogi.els_resp_pyld, 3132 - c->u.els_plogi.els_resp_pyld_dma); 3147 + qla2x00_els_dcmd2_free(vha, &c->u.els_plogi); 3133 3148 break; 3134 3149 case SRB_CT_PTHRU_CMD: 3135 3150 default: ··· 3245 3280 } 3246 3281 } 3247 3282 3248 - static void qla2x00_async_gpnid_sp_done(void *s, int res) 3283 + static void qla2x00_async_gpnid_sp_done(srb_t *sp, int res) 3249 3284 { 3250 - struct srb *sp = s; 3251 3285 struct scsi_qla_host *vha = sp->vha; 3252 3286 struct ct_sns_req *ct_req = 3253 3287 (struct ct_sns_req *)sp->u.iocb_cmd.u.ctarg.req; ··· 3259 3295 if (res) 3260 3296 ql_dbg(ql_dbg_disc, vha, 0x2066, 3261 3297 "Async done-%s fail res %x rscn gen %d ID %3phC. %8phC\n", 3262 - sp->name, res, sp->gen1, ct_req->req.port_id.port_id, 3298 + sp->name, res, sp->gen1, &ct_req->req.port_id.port_id, 3263 3299 ct_rsp->rsp.gpn_id.port_name); 3264 3300 else 3265 3301 ql_dbg(ql_dbg_disc, vha, 0x2066, 3266 3302 "Async done-%s good rscn gen %d ID %3phC. %8phC\n", 3267 - sp->name, sp->gen1, ct_req->req.port_id.port_id, 3303 + sp->name, sp->gen1, &ct_req->req.port_id.port_id, 3268 3304 ct_rsp->rsp.gpn_id.port_name); 3269 3305 3270 3306 memset(&ea, 0, sizeof(ea)); 3271 3307 memcpy(ea.port_name, ct_rsp->rsp.gpn_id.port_name, WWN_SIZE); 3272 3308 ea.sp = sp; 3273 - ea.id.b.domain = ct_req->req.port_id.port_id[0]; 3274 - ea.id.b.area = ct_req->req.port_id.port_id[1]; 3275 - ea.id.b.al_pa = ct_req->req.port_id.port_id[2]; 3309 + ea.id = be_to_port_id(ct_req->req.port_id.port_id); 3276 3310 ea.rc = res; 3277 - ea.event = FCME_GPNID_DONE; 3278 3311 3279 3312 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags); 3280 3313 list_del(&sp->elem); ··· 3290 3329 return; 3291 3330 } 3292 3331 3293 - qla2x00_fcport_event_handler(vha, &ea); 3332 + qla24xx_handle_gpnid_event(vha, &ea); 3294 3333 3295 3334 e = qla2x00_alloc_work(vha, QLA_EVT_UNMAP); 3296 3335 if (!e) { 3297 3336 /* please ignore kernel warning. otherwise, we have mem leak. */ 3298 - if (sp->u.iocb_cmd.u.ctarg.req) { 3299 - dma_free_coherent(&vha->hw->pdev->dev, 3300 - sp->u.iocb_cmd.u.ctarg.req_allocated_size, 3301 - sp->u.iocb_cmd.u.ctarg.req, 3302 - sp->u.iocb_cmd.u.ctarg.req_dma); 3303 - sp->u.iocb_cmd.u.ctarg.req = NULL; 3304 - } 3305 - if (sp->u.iocb_cmd.u.ctarg.rsp) { 3306 - dma_free_coherent(&vha->hw->pdev->dev, 3307 - sp->u.iocb_cmd.u.ctarg.rsp_allocated_size, 3308 - sp->u.iocb_cmd.u.ctarg.rsp, 3309 - sp->u.iocb_cmd.u.ctarg.rsp_dma); 3310 - sp->u.iocb_cmd.u.ctarg.rsp = NULL; 3311 - } 3337 + dma_free_coherent(&vha->hw->pdev->dev, 3338 + sp->u.iocb_cmd.u.ctarg.req_allocated_size, 3339 + sp->u.iocb_cmd.u.ctarg.req, 3340 + sp->u.iocb_cmd.u.ctarg.req_dma); 3341 + sp->u.iocb_cmd.u.ctarg.req = NULL; 3342 + 3343 + dma_free_coherent(&vha->hw->pdev->dev, 3344 + sp->u.iocb_cmd.u.ctarg.rsp_allocated_size, 3345 + sp->u.iocb_cmd.u.ctarg.rsp, 3346 + sp->u.iocb_cmd.u.ctarg.rsp_dma); 3347 + sp->u.iocb_cmd.u.ctarg.rsp = NULL; 3312 3348 3313 3349 sp->free(sp); 3314 3350 return; ··· 3377 3419 ct_req = qla2x00_prep_ct_req(ct_sns, GPN_ID_CMD, GPN_ID_RSP_SIZE); 3378 3420 3379 3421 /* GPN_ID req */ 3380 - ct_req->req.port_id.port_id[0] = id->b.domain; 3381 - ct_req->req.port_id.port_id[1] = id->b.area; 3382 - ct_req->req.port_id.port_id[2] = id->b.al_pa; 3422 + ct_req->req.port_id.port_id = port_id_to_be_id(*id); 3383 3423 3384 3424 sp->u.iocb_cmd.u.ctarg.req_size = GPN_ID_REQ_SIZE; 3385 3425 sp->u.iocb_cmd.u.ctarg.rsp_size = GPN_ID_RSP_SIZE; ··· 3388 3432 3389 3433 ql_dbg(ql_dbg_disc, vha, 0x2067, 3390 3434 "Async-%s hdl=%x ID %3phC.\n", sp->name, 3391 - sp->handle, ct_req->req.port_id.port_id); 3435 + sp->handle, &ct_req->req.port_id.port_id); 3392 3436 3393 3437 rval = qla2x00_start_sp(sp); 3394 3438 if (rval != QLA_SUCCESS) ··· 3423 3467 3424 3468 void qla24xx_handle_gffid_event(scsi_qla_host_t *vha, struct event_arg *ea) 3425 3469 { 3426 - fc_port_t *fcport = ea->fcport; 3470 + fc_port_t *fcport = ea->fcport; 3427 3471 3428 - qla24xx_post_gnl_work(vha, fcport); 3472 + qla24xx_post_gnl_work(vha, fcport); 3429 3473 } 3430 3474 3431 - void qla24xx_async_gffid_sp_done(void *s, int res) 3475 + void qla24xx_async_gffid_sp_done(srb_t *sp, int res) 3432 3476 { 3433 - struct srb *sp = s; 3434 - struct scsi_qla_host *vha = sp->vha; 3435 - fc_port_t *fcport = sp->fcport; 3436 - struct ct_sns_rsp *ct_rsp; 3437 - struct event_arg ea; 3477 + struct scsi_qla_host *vha = sp->vha; 3478 + fc_port_t *fcport = sp->fcport; 3479 + struct ct_sns_rsp *ct_rsp; 3480 + struct event_arg ea; 3438 3481 3439 - ql_dbg(ql_dbg_disc, vha, 0x2133, 3440 - "Async done-%s res %x ID %x. %8phC\n", 3441 - sp->name, res, fcport->d_id.b24, fcport->port_name); 3482 + ql_dbg(ql_dbg_disc, vha, 0x2133, 3483 + "Async done-%s res %x ID %x. %8phC\n", 3484 + sp->name, res, fcport->d_id.b24, fcport->port_name); 3442 3485 3443 - fcport->flags &= ~FCF_ASYNC_SENT; 3444 - ct_rsp = &fcport->ct_desc.ct_sns->p.rsp; 3445 - /* 3446 - * FC-GS-7, 5.2.3.12 FC-4 Features - format 3447 - * The format of the FC-4 Features object, as defined by the FC-4, 3448 - * Shall be an array of 4-bit values, one for each type code value 3449 - */ 3450 - if (!res) { 3451 - if (ct_rsp->rsp.gff_id.fc4_features[GFF_FCP_SCSI_OFFSET] & 0xf) { 3452 - /* w1 b00:03 */ 3453 - fcport->fc4_type = 3454 - ct_rsp->rsp.gff_id.fc4_features[GFF_FCP_SCSI_OFFSET]; 3455 - fcport->fc4_type &= 0xf; 3486 + fcport->flags &= ~FCF_ASYNC_SENT; 3487 + ct_rsp = &fcport->ct_desc.ct_sns->p.rsp; 3488 + /* 3489 + * FC-GS-7, 5.2.3.12 FC-4 Features - format 3490 + * The format of the FC-4 Features object, as defined by the FC-4, 3491 + * Shall be an array of 4-bit values, one for each type code value 3492 + */ 3493 + if (!res) { 3494 + if (ct_rsp->rsp.gff_id.fc4_features[GFF_FCP_SCSI_OFFSET] & 0xf) { 3495 + /* w1 b00:03 */ 3496 + fcport->fc4_type = 3497 + ct_rsp->rsp.gff_id.fc4_features[GFF_FCP_SCSI_OFFSET]; 3498 + fcport->fc4_type &= 0xf; 3456 3499 } 3457 3500 3458 - if (ct_rsp->rsp.gff_id.fc4_features[GFF_NVME_OFFSET] & 0xf) { 3459 - /* w5 [00:03]/28h */ 3460 - fcport->fc4f_nvme = 3461 - ct_rsp->rsp.gff_id.fc4_features[GFF_NVME_OFFSET]; 3462 - fcport->fc4f_nvme &= 0xf; 3463 - } 3464 - } 3501 + if (ct_rsp->rsp.gff_id.fc4_features[GFF_NVME_OFFSET] & 0xf) { 3502 + /* w5 [00:03]/28h */ 3503 + fcport->fc4f_nvme = 3504 + ct_rsp->rsp.gff_id.fc4_features[GFF_NVME_OFFSET]; 3505 + fcport->fc4f_nvme &= 0xf; 3506 + } 3507 + } 3465 3508 3466 - memset(&ea, 0, sizeof(ea)); 3467 - ea.sp = sp; 3468 - ea.fcport = sp->fcport; 3469 - ea.rc = res; 3470 - ea.event = FCME_GFFID_DONE; 3509 + memset(&ea, 0, sizeof(ea)); 3510 + ea.sp = sp; 3511 + ea.fcport = sp->fcport; 3512 + ea.rc = res; 3471 3513 3472 - qla2x00_fcport_event_handler(vha, &ea); 3473 - sp->free(sp); 3514 + qla24xx_handle_gffid_event(vha, &ea); 3515 + sp->free(sp); 3474 3516 } 3475 3517 3476 3518 /* Get FC4 Feature with Nport ID. */ ··· 3628 3674 list_for_each_entry(fcport, &vha->vp_fcports, list) { 3629 3675 if (memcmp(rp->port_name, fcport->port_name, WWN_SIZE)) 3630 3676 continue; 3631 - fcport->scan_needed = 0; 3632 3677 fcport->scan_state = QLA_FCPORT_FOUND; 3633 3678 found = true; 3634 3679 /* ··· 3636 3683 if ((fcport->flags & FCF_FABRIC_DEVICE) == 0) { 3637 3684 qla2x00_clear_loop_id(fcport); 3638 3685 fcport->flags |= FCF_FABRIC_DEVICE; 3639 - } else if (fcport->d_id.b24 != rp->id.b24) { 3686 + } else if (fcport->d_id.b24 != rp->id.b24 || 3687 + fcport->scan_needed) { 3640 3688 qlt_schedule_sess_for_deletion(fcport); 3641 3689 } 3642 3690 fcport->d_id.b24 = rp->id.b24; 3691 + fcport->scan_needed = 0; 3643 3692 break; 3644 3693 } 3645 3694 ··· 3853 3898 } 3854 3899 } 3855 3900 3856 - static void qla2x00_async_gpnft_gnnft_sp_done(void *s, int res) 3901 + static void qla2x00_async_gpnft_gnnft_sp_done(srb_t *sp, int res) 3857 3902 { 3858 - struct srb *sp = s; 3859 3903 struct scsi_qla_host *vha = sp->vha; 3860 3904 struct ct_sns_req *ct_req = 3861 3905 (struct ct_sns_req *)sp->u.iocb_cmd.u.ctarg.req; ··· 4007 4053 4008 4054 rval = qla2x00_start_sp(sp); 4009 4055 if (rval != QLA_SUCCESS) { 4010 - spin_lock_irqsave(&vha->work_lock, flags); 4011 - vha->scan.scan_flags &= ~SF_SCANNING; 4012 - spin_unlock_irqrestore(&vha->work_lock, flags); 4013 4056 goto done_free_sp; 4014 4057 } 4015 4058 ··· 4029 4078 } 4030 4079 4031 4080 sp->free(sp); 4081 + 4082 + spin_lock_irqsave(&vha->work_lock, flags); 4083 + vha->scan.scan_flags &= ~SF_SCANNING; 4084 + if (vha->scan.scan_flags == 0) { 4085 + ql_dbg(ql_dbg_disc, vha, 0xffff, 4086 + "%s: schedule\n", __func__); 4087 + vha->scan.scan_flags |= SF_QUEUED; 4088 + schedule_delayed_work(&vha->scan.scan_work, 5); 4089 + } 4090 + spin_unlock_irqrestore(&vha->work_lock, flags); 4091 + 4032 4092 4033 4093 return rval; 4034 4094 } /* GNNFT */ ··· 4114 4152 rspsz, 4115 4153 &sp->u.iocb_cmd.u.ctarg.rsp_dma, 4116 4154 GFP_KERNEL); 4117 - sp->u.iocb_cmd.u.ctarg.rsp_allocated_size = sizeof(struct ct_sns_pkt); 4155 + sp->u.iocb_cmd.u.ctarg.rsp_allocated_size = rspsz; 4118 4156 if (!sp->u.iocb_cmd.u.ctarg.rsp) { 4119 4157 ql_log(ql_log_warn, vha, 0xffff, 4120 4158 "Failed to allocate ct_sns request.\n"); ··· 4170 4208 4171 4209 rval = qla2x00_start_sp(sp); 4172 4210 if (rval != QLA_SUCCESS) { 4173 - spin_lock_irqsave(&vha->work_lock, flags); 4174 - vha->scan.scan_flags &= ~SF_SCANNING; 4175 - spin_unlock_irqrestore(&vha->work_lock, flags); 4176 4211 goto done_free_sp; 4177 4212 } 4178 4213 ··· 4192 4233 } 4193 4234 4194 4235 sp->free(sp); 4236 + 4237 + spin_lock_irqsave(&vha->work_lock, flags); 4238 + vha->scan.scan_flags &= ~SF_SCANNING; 4239 + if (vha->scan.scan_flags == 0) { 4240 + ql_dbg(ql_dbg_disc, vha, 0xffff, 4241 + "%s: schedule\n", __func__); 4242 + vha->scan.scan_flags |= SF_QUEUED; 4243 + schedule_delayed_work(&vha->scan.scan_work, 5); 4244 + } 4245 + spin_unlock_irqrestore(&vha->work_lock, flags); 4246 + 4195 4247 4196 4248 return rval; 4197 4249 } ··· 4231 4261 qla24xx_post_gnl_work(vha, ea->fcport); 4232 4262 } 4233 4263 4234 - static void qla2x00_async_gnnid_sp_done(void *s, int res) 4264 + static void qla2x00_async_gnnid_sp_done(srb_t *sp, int res) 4235 4265 { 4236 - struct srb *sp = s; 4237 4266 struct scsi_qla_host *vha = sp->vha; 4238 4267 fc_port_t *fcport = sp->fcport; 4239 4268 u8 *node_name = fcport->ct_desc.ct_sns->p.rsp.rsp.gnn_id.node_name; ··· 4248 4279 ea.fcport = fcport; 4249 4280 ea.sp = sp; 4250 4281 ea.rc = res; 4251 - ea.event = FCME_GNNID_DONE; 4252 4282 4253 4283 ql_dbg(ql_dbg_disc, vha, 0x204f, 4254 4284 "Async done-%s res %x, WWPN %8phC %8phC\n", 4255 4285 sp->name, res, fcport->port_name, fcport->node_name); 4256 4286 4257 - qla2x00_fcport_event_handler(vha, &ea); 4287 + qla24xx_handle_gnnid_event(vha, &ea); 4258 4288 4259 4289 sp->free(sp); 4260 4290 } ··· 4286 4318 GNN_ID_RSP_SIZE); 4287 4319 4288 4320 /* GNN_ID req */ 4289 - ct_req->req.port_id.port_id[0] = fcport->d_id.b.domain; 4290 - ct_req->req.port_id.port_id[1] = fcport->d_id.b.area; 4291 - ct_req->req.port_id.port_id[2] = fcport->d_id.b.al_pa; 4321 + ct_req->req.port_id.port_id = port_id_to_be_id(fcport->d_id); 4292 4322 4293 4323 4294 4324 /* req & rsp use the same buffer */ ··· 4362 4396 qla24xx_post_gpsc_work(vha, fcport); 4363 4397 } 4364 4398 4365 - static void qla2x00_async_gfpnid_sp_done(void *s, int res) 4399 + static void qla2x00_async_gfpnid_sp_done(srb_t *sp, int res) 4366 4400 { 4367 - struct srb *sp = s; 4368 4401 struct scsi_qla_host *vha = sp->vha; 4369 4402 fc_port_t *fcport = sp->fcport; 4370 4403 u8 *fpn = fcport->ct_desc.ct_sns->p.rsp.rsp.gfpn_id.port_name; ··· 4378 4413 ea.fcport = fcport; 4379 4414 ea.sp = sp; 4380 4415 ea.rc = res; 4381 - ea.event = FCME_GFPNID_DONE; 4382 4416 4383 4417 ql_dbg(ql_dbg_disc, vha, 0x204f, 4384 4418 "Async done-%s res %x, WWPN %8phC %8phC\n", 4385 4419 sp->name, res, fcport->port_name, fcport->fabric_port_name); 4386 4420 4387 - qla2x00_fcport_event_handler(vha, &ea); 4421 + qla24xx_handle_gfpnid_event(vha, &ea); 4388 4422 4389 4423 sp->free(sp); 4390 4424 } ··· 4414 4450 GFPN_ID_RSP_SIZE); 4415 4451 4416 4452 /* GFPN_ID req */ 4417 - ct_req->req.port_id.port_id[0] = fcport->d_id.b.domain; 4418 - ct_req->req.port_id.port_id[1] = fcport->d_id.b.area; 4419 - ct_req->req.port_id.port_id[2] = fcport->d_id.b.al_pa; 4453 + ct_req->req.port_id.port_id = port_id_to_be_id(fcport->d_id); 4420 4454 4421 4455 4422 4456 /* req & rsp use the same buffer */
+248 -308
drivers/scsi/qla2xxx/qla_init.c
··· 37 37 static int qla84xx_init_chip(scsi_qla_host_t *); 38 38 static int qla25xx_init_queues(struct qla_hw_data *); 39 39 static int qla24xx_post_prli_work(struct scsi_qla_host*, fc_port_t *); 40 - static void qla24xx_handle_plogi_done_event(struct scsi_qla_host *, 41 - struct event_arg *); 40 + static void qla24xx_handle_gpdb_event(scsi_qla_host_t *vha, 41 + struct event_arg *ea); 42 42 static void qla24xx_handle_prli_done_event(struct scsi_qla_host *, 43 43 struct event_arg *); 44 44 static void __qla24xx_handle_gpdb_event(scsi_qla_host_t *, struct event_arg *); ··· 63 63 iocb->timeout(sp); 64 64 } 65 65 66 - void 67 - qla2x00_sp_free(void *ptr) 66 + void qla2x00_sp_free(srb_t *sp) 68 67 { 69 - srb_t *sp = ptr; 70 68 struct srb_iocb *iocb = &sp->u.iocb_cmd; 71 69 72 70 del_timer(&iocb->timer); ··· 97 99 { 98 100 srb_t *sp = data; 99 101 struct srb_iocb *abt = &sp->u.iocb_cmd; 102 + struct qla_qpair *qpair = sp->qpair; 103 + u32 handle; 104 + unsigned long flags; 105 + 106 + spin_lock_irqsave(qpair->qp_lock_ptr, flags); 107 + for (handle = 1; handle < qpair->req->num_outstanding_cmds; handle++) { 108 + /* removing the abort */ 109 + if (qpair->req->outstanding_cmds[handle] == sp) { 110 + qpair->req->outstanding_cmds[handle] = NULL; 111 + break; 112 + } 113 + } 114 + spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 100 115 101 116 abt->u.abt.comp_status = CS_TIMEOUT; 102 - sp->done(sp, QLA_FUNCTION_TIMEOUT); 117 + sp->done(sp, QLA_OS_TIMER_EXPIRED); 103 118 } 104 119 105 - static void qla24xx_abort_sp_done(void *ptr, int res) 120 + static void qla24xx_abort_sp_done(srb_t *sp, int res) 106 121 { 107 - srb_t *sp = ptr; 108 122 struct srb_iocb *abt = &sp->u.iocb_cmd; 109 123 110 - if (del_timer(&sp->u.iocb_cmd.timer)) { 111 - if (sp->flags & SRB_WAKEUP_ON_COMP) 112 - complete(&abt->u.abt.comp); 113 - else 114 - sp->free(sp); 115 - } 124 + del_timer(&sp->u.iocb_cmd.timer); 125 + if (sp->flags & SRB_WAKEUP_ON_COMP) 126 + complete(&abt->u.abt.comp); 127 + else 128 + sp->free(sp); 116 129 } 117 130 118 131 static int qla24xx_async_abort_cmd(srb_t *cmd_sp, bool wait) ··· 136 127 sp = qla2xxx_get_qpair_sp(cmd_sp->vha, cmd_sp->qpair, cmd_sp->fcport, 137 128 GFP_ATOMIC); 138 129 if (!sp) 139 - goto done; 130 + return rval; 140 131 141 132 abt_iocb = &sp->u.iocb_cmd; 142 133 sp->type = SRB_ABT_CMD; ··· 160 151 cmd_sp->type); 161 152 162 153 rval = qla2x00_start_sp(sp); 163 - if (rval != QLA_SUCCESS) 164 - goto done_free_sp; 154 + if (rval != QLA_SUCCESS) { 155 + sp->free(sp); 156 + return rval; 157 + } 165 158 166 159 if (wait) { 167 160 wait_for_completion(&abt_iocb->u.abt.comp); 168 161 rval = abt_iocb->u.abt.comp_status == CS_COMPLETE ? 169 162 QLA_SUCCESS : QLA_FUNCTION_FAILED; 170 - } else { 171 - goto done; 163 + sp->free(sp); 172 164 } 173 165 174 - done_free_sp: 175 - sp->free(sp); 176 - done: 177 166 return rval; 178 167 } 179 168 ··· 241 234 sp->done(sp, QLA_FUNCTION_TIMEOUT); 242 235 } 243 236 break; 237 + default: 238 + WARN_ON_ONCE(true); 239 + sp->done(sp, QLA_FUNCTION_TIMEOUT); 240 + break; 244 241 } 245 242 } 246 243 247 - static void 248 - qla2x00_async_login_sp_done(void *ptr, int res) 244 + static void qla2x00_async_login_sp_done(srb_t *sp, int res) 249 245 { 250 - srb_t *sp = ptr; 251 246 struct scsi_qla_host *vha = sp->vha; 252 247 struct srb_iocb *lio = &sp->u.iocb_cmd; 253 248 struct event_arg ea; ··· 261 252 262 253 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 263 254 memset(&ea, 0, sizeof(ea)); 264 - ea.event = FCME_PLOGI_DONE; 265 255 ea.fcport = sp->fcport; 266 256 ea.data[0] = lio->u.logio.data[0]; 267 257 ea.data[1] = lio->u.logio.data[1]; 268 258 ea.iop[0] = lio->u.logio.iop[0]; 269 259 ea.iop[1] = lio->u.logio.iop[1]; 270 260 ea.sp = sp; 271 - qla2x00_fcport_event_handler(vha, &ea); 261 + qla24xx_handle_plogi_done_event(vha, &ea); 272 262 } 273 263 274 264 sp->free(sp); ··· 297 289 struct srb_iocb *lio; 298 290 int rval = QLA_FUNCTION_FAILED; 299 291 300 - if (!vha->flags.online) 301 - goto done; 292 + if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) || 293 + fcport->loop_id == FC_NO_LOOP_ID) { 294 + ql_log(ql_log_warn, vha, 0xffff, 295 + "%s: %8phC - not sending command.\n", 296 + __func__, fcport->port_name); 297 + return rval; 298 + } 302 299 303 300 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); 304 301 if (!sp) ··· 354 341 return rval; 355 342 } 356 343 357 - static void 358 - qla2x00_async_logout_sp_done(void *ptr, int res) 344 + static void qla2x00_async_logout_sp_done(srb_t *sp, int res) 359 345 { 360 - srb_t *sp = ptr; 361 - 362 346 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 363 347 sp->fcport->login_gen++; 364 348 qlt_logo_completion_handler(sp->fcport, res); ··· 368 358 srb_t *sp; 369 359 struct srb_iocb *lio; 370 360 int rval = QLA_FUNCTION_FAILED; 371 - 372 - if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 373 - return rval; 374 361 375 362 fcport->flags |= FCF_ASYNC_SENT; 376 363 sp = qla2x00_get_sp(vha, fcport, GFP_KERNEL); ··· 412 405 qlt_logo_completion_handler(fcport, data[0]); 413 406 } 414 407 415 - static void 416 - qla2x00_async_prlo_sp_done(void *s, int res) 408 + static void qla2x00_async_prlo_sp_done(srb_t *sp, int res) 417 409 { 418 - srb_t *sp = (srb_t *)s; 419 410 struct srb_iocb *lio = &sp->u.iocb_cmd; 420 411 struct scsi_qla_host *vha = sp->vha; 421 412 ··· 474 469 fcport->fw_login_state, ea->rc, fcport->login_gen, ea->sp->gen2, 475 470 fcport->rscn_gen, ea->sp->gen1, fcport->loop_id); 476 471 472 + WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 473 + ea->data[0]); 474 + 477 475 if (ea->data[0] != MBS_COMMAND_COMPLETE) { 478 476 ql_dbg(ql_dbg_disc, vha, 0x2066, 479 477 "%s %8phC: adisc fail: post delete\n", ··· 519 511 return qla2x00_post_work(vha, e); 520 512 } 521 513 522 - static void 523 - qla2x00_async_adisc_sp_done(void *ptr, int res) 514 + static void qla2x00_async_adisc_sp_done(srb_t *sp, int res) 524 515 { 525 - srb_t *sp = ptr; 526 516 struct scsi_qla_host *vha = sp->vha; 527 517 struct event_arg ea; 528 518 struct srb_iocb *lio = &sp->u.iocb_cmd; ··· 532 526 sp->fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 533 527 534 528 memset(&ea, 0, sizeof(ea)); 535 - ea.event = FCME_ADISC_DONE; 536 529 ea.rc = res; 537 530 ea.data[0] = lio->u.logio.data[0]; 538 531 ea.data[1] = lio->u.logio.data[1]; ··· 540 535 ea.fcport = sp->fcport; 541 536 ea.sp = sp; 542 537 543 - qla2x00_fcport_event_handler(vha, &ea); 538 + qla24xx_handle_adisc_event(vha, &ea); 544 539 545 540 sp->free(sp); 546 541 } ··· 808 803 fcport->fw_login_state = current_login_state; 809 804 fcport->d_id = id; 810 805 switch (current_login_state) { 806 + case DSC_LS_PRLI_PEND: 807 + /* 808 + * In the middle of PRLI. Let it finish. 809 + * Allow relogin code to recheck state again 810 + * with GNL. Push disc_state back to DELETED 811 + * so GNL can go out again 812 + */ 813 + fcport->disc_state = DSC_DELETED; 814 + break; 811 815 case DSC_LS_PRLI_COMP: 812 816 if ((e->prli_svc_param_word_3[0] & BIT_4) == 0) 813 817 fcport->port_type = FCT_INITIATOR; ··· 931 917 } 932 918 } /* gnl_event */ 933 919 934 - static void 935 - qla24xx_async_gnl_sp_done(void *s, int res) 920 + static void qla24xx_async_gnl_sp_done(srb_t *sp, int res) 936 921 { 937 - struct srb *sp = s; 938 922 struct scsi_qla_host *vha = sp->vha; 939 923 unsigned long flags; 940 924 struct fc_port *fcport = NULL, *tf; ··· 955 943 memset(&ea, 0, sizeof(ea)); 956 944 ea.sp = sp; 957 945 ea.rc = res; 958 - ea.event = FCME_GNL_DONE; 959 946 960 947 if (sp->u.iocb_cmd.u.mbx.in_mb[1] >= 961 948 sizeof(struct get_name_list_extended)) { ··· 993 982 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags); 994 983 ea.fcport = fcport; 995 984 996 - qla2x00_fcport_event_handler(vha, &ea); 985 + qla24xx_handle_gnl_done_event(vha, &ea); 997 986 } 998 987 999 988 /* create new fcport if fw has knowledge of new sessions */ ··· 1118 1107 return qla2x00_post_work(vha, e); 1119 1108 } 1120 1109 1121 - static 1122 - void qla24xx_async_gpdb_sp_done(void *s, int res) 1110 + static void qla24xx_async_gpdb_sp_done(srb_t *sp, int res) 1123 1111 { 1124 - struct srb *sp = s; 1125 1112 struct scsi_qla_host *vha = sp->vha; 1126 1113 struct qla_hw_data *ha = vha->hw; 1127 1114 fc_port_t *fcport = sp->fcport; ··· 1138 1129 1139 1130 fcport->flags &= ~(FCF_ASYNC_SENT | FCF_ASYNC_ACTIVE); 1140 1131 memset(&ea, 0, sizeof(ea)); 1141 - ea.event = FCME_GPDB_DONE; 1142 1132 ea.fcport = fcport; 1143 1133 ea.sp = sp; 1144 1134 1145 - qla2x00_fcport_event_handler(vha, &ea); 1135 + qla24xx_handle_gpdb_event(vha, &ea); 1146 1136 1147 1137 dma_pool_free(ha->s_dma_pool, sp->u.iocb_cmd.u.mbx.in, 1148 1138 sp->u.iocb_cmd.u.mbx.in_dma); ··· 1162 1154 return qla2x00_post_work(vha, e); 1163 1155 } 1164 1156 1165 - static void 1166 - qla2x00_async_prli_sp_done(void *ptr, int res) 1157 + static void qla2x00_async_prli_sp_done(srb_t *sp, int res) 1167 1158 { 1168 - srb_t *sp = ptr; 1169 1159 struct scsi_qla_host *vha = sp->vha; 1170 1160 struct srb_iocb *lio = &sp->u.iocb_cmd; 1171 1161 struct event_arg ea; ··· 1176 1170 1177 1171 if (!test_bit(UNLOADING, &vha->dpc_flags)) { 1178 1172 memset(&ea, 0, sizeof(ea)); 1179 - ea.event = FCME_PRLI_DONE; 1180 1173 ea.fcport = sp->fcport; 1181 1174 ea.data[0] = lio->u.logio.data[0]; 1182 1175 ea.data[1] = lio->u.logio.data[1]; ··· 1183 1178 ea.iop[1] = lio->u.logio.iop[1]; 1184 1179 ea.sp = sp; 1185 1180 1186 - qla2x00_fcport_event_handler(vha, &ea); 1181 + qla24xx_handle_prli_done_event(vha, &ea); 1187 1182 } 1188 1183 1189 1184 sp->free(sp); ··· 1267 1262 struct port_database_24xx *pd; 1268 1263 struct qla_hw_data *ha = vha->hw; 1269 1264 1270 - if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT)) 1265 + if (!vha->flags.online || (fcport->flags & FCF_ASYNC_SENT) || 1266 + fcport->loop_id == FC_NO_LOOP_ID) { 1267 + ql_log(ql_log_warn, vha, 0xffff, 1268 + "%s: %8phC - not sending command.\n", 1269 + __func__, fcport->port_name); 1271 1270 return rval; 1271 + } 1272 1272 1273 1273 fcport->disc_state = DSC_GPDB; 1274 1274 ··· 1483 1473 u64 wwn; 1484 1474 u16 sec; 1485 1475 1486 - ql_dbg(ql_dbg_disc + ql_dbg_verbose, vha, 0x20d8, 1476 + ql_dbg(ql_dbg_disc, vha, 0x20d8, 1487 1477 "%s %8phC DS %d LS %d P %d fl %x confl %p rscn %d|%d login %d lid %d scan %d\n", 1488 1478 __func__, fcport->port_name, fcport->disc_state, 1489 1479 fcport->fw_login_state, fcport->login_pause, fcport->flags, ··· 1494 1484 return 0; 1495 1485 1496 1486 if ((fcport->loop_id != FC_NO_LOOP_ID) && 1487 + qla_dual_mode_enabled(vha) && 1497 1488 ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1498 1489 (fcport->fw_login_state == DSC_LS_PRLI_PEND))) 1499 1490 return 0; ··· 1647 1636 return qla2x00_post_work(vha, e); 1648 1637 } 1649 1638 1650 - static 1639 + void qla2x00_handle_rscn(scsi_qla_host_t *vha, struct event_arg *ea) 1640 + { 1641 + fc_port_t *fcport; 1642 + unsigned long flags; 1643 + 1644 + fcport = qla2x00_find_fcport_by_nportid(vha, &ea->id, 1); 1645 + if (fcport) { 1646 + fcport->scan_needed = 1; 1647 + fcport->rscn_gen++; 1648 + } 1649 + 1650 + spin_lock_irqsave(&vha->work_lock, flags); 1651 + if (vha->scan.scan_flags == 0) { 1652 + ql_dbg(ql_dbg_disc, vha, 0xffff, "%s: schedule\n", __func__); 1653 + vha->scan.scan_flags |= SF_QUEUED; 1654 + schedule_delayed_work(&vha->scan.scan_work, 5); 1655 + } 1656 + spin_unlock_irqrestore(&vha->work_lock, flags); 1657 + } 1658 + 1651 1659 void qla24xx_handle_relogin_event(scsi_qla_host_t *vha, 1652 1660 struct event_arg *ea) 1653 1661 { 1654 1662 fc_port_t *fcport = ea->fcport; 1663 + 1664 + if (test_bit(UNLOADING, &vha->dpc_flags)) 1665 + return; 1655 1666 1656 1667 ql_dbg(ql_dbg_disc, vha, 0x2102, 1657 1668 "%s %8phC DS %d LS %d P %d del %d cnfl %p rscn %d|%d login %d|%d fl %x\n", ··· 1684 1651 fcport->last_login_gen, fcport->login_gen, 1685 1652 fcport->flags); 1686 1653 1687 - if ((fcport->fw_login_state == DSC_LS_PLOGI_PEND) || 1688 - (fcport->fw_login_state == DSC_LS_PRLI_PEND)) 1689 - return; 1690 - 1691 - if (fcport->fw_login_state == DSC_LS_PLOGI_COMP) { 1692 - if (time_before_eq(jiffies, fcport->plogi_nack_done_deadline)) { 1693 - set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1694 - return; 1695 - } 1696 - } 1697 - 1698 1654 if (fcport->last_rscn_gen != fcport->rscn_gen) { 1699 - ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gidpn\n", 1655 + ql_dbg(ql_dbg_disc, vha, 0x20e9, "%s %d %8phC post gnl\n", 1700 1656 __func__, __LINE__, fcport->port_name); 1701 - 1657 + qla24xx_post_gnl_work(vha, fcport); 1702 1658 return; 1703 1659 } 1704 1660 1705 1661 qla24xx_fcport_handle_login(vha, fcport); 1706 - } 1707 - 1708 - 1709 - static void qla_handle_els_plogi_done(scsi_qla_host_t *vha, 1710 - struct event_arg *ea) 1711 - { 1712 - ql_dbg(ql_dbg_disc, vha, 0x2118, 1713 - "%s %d %8phC post PRLI\n", 1714 - __func__, __LINE__, ea->fcport->port_name); 1715 - qla24xx_post_prli_work(vha, ea->fcport); 1716 - } 1717 - 1718 - void qla2x00_fcport_event_handler(scsi_qla_host_t *vha, struct event_arg *ea) 1719 - { 1720 - fc_port_t *fcport; 1721 - 1722 - switch (ea->event) { 1723 - case FCME_RELOGIN: 1724 - if (test_bit(UNLOADING, &vha->dpc_flags)) 1725 - return; 1726 - 1727 - qla24xx_handle_relogin_event(vha, ea); 1728 - break; 1729 - case FCME_RSCN: 1730 - if (test_bit(UNLOADING, &vha->dpc_flags)) 1731 - return; 1732 - { 1733 - unsigned long flags; 1734 - 1735 - fcport = qla2x00_find_fcport_by_nportid 1736 - (vha, &ea->id, 1); 1737 - if (fcport) { 1738 - fcport->scan_needed = 1; 1739 - fcport->rscn_gen++; 1740 - } 1741 - 1742 - spin_lock_irqsave(&vha->work_lock, flags); 1743 - if (vha->scan.scan_flags == 0) { 1744 - ql_dbg(ql_dbg_disc, vha, 0xffff, 1745 - "%s: schedule\n", __func__); 1746 - vha->scan.scan_flags |= SF_QUEUED; 1747 - schedule_delayed_work(&vha->scan.scan_work, 5); 1748 - } 1749 - spin_unlock_irqrestore(&vha->work_lock, flags); 1750 - } 1751 - break; 1752 - case FCME_GNL_DONE: 1753 - qla24xx_handle_gnl_done_event(vha, ea); 1754 - break; 1755 - case FCME_GPSC_DONE: 1756 - qla24xx_handle_gpsc_event(vha, ea); 1757 - break; 1758 - case FCME_PLOGI_DONE: /* Initiator side sent LLIOCB */ 1759 - qla24xx_handle_plogi_done_event(vha, ea); 1760 - break; 1761 - case FCME_PRLI_DONE: 1762 - qla24xx_handle_prli_done_event(vha, ea); 1763 - break; 1764 - case FCME_GPDB_DONE: 1765 - qla24xx_handle_gpdb_event(vha, ea); 1766 - break; 1767 - case FCME_GPNID_DONE: 1768 - qla24xx_handle_gpnid_event(vha, ea); 1769 - break; 1770 - case FCME_GFFID_DONE: 1771 - qla24xx_handle_gffid_event(vha, ea); 1772 - break; 1773 - case FCME_ADISC_DONE: 1774 - qla24xx_handle_adisc_event(vha, ea); 1775 - break; 1776 - case FCME_GNNID_DONE: 1777 - qla24xx_handle_gnnid_event(vha, ea); 1778 - break; 1779 - case FCME_GFPNID_DONE: 1780 - qla24xx_handle_gfpnid_event(vha, ea); 1781 - break; 1782 - case FCME_ELS_PLOGI_DONE: 1783 - qla_handle_els_plogi_done(vha, ea); 1784 - break; 1785 - default: 1786 - BUG_ON(1); 1787 - break; 1788 - } 1789 1662 } 1790 1663 1791 1664 /* ··· 1711 1772 1712 1773 if (fcport->scan_needed) { 1713 1774 memset(&ea, 0, sizeof(ea)); 1714 - ea.event = FCME_RSCN; 1715 1775 ea.id = fcport->d_id; 1716 1776 ea.id.b.rsvd_1 = RSCN_PORT_ADDR; 1717 - qla2x00_fcport_event_handler(fcport->vha, &ea); 1777 + qla2x00_handle_rscn(fcport->vha, &ea); 1718 1778 } 1719 1779 } 1720 1780 ··· 1727 1789 complete(&tmf->u.tmf.comp); 1728 1790 } 1729 1791 1730 - static void 1731 - qla2x00_tmf_sp_done(void *ptr, int res) 1792 + static void qla2x00_tmf_sp_done(srb_t *sp, int res) 1732 1793 { 1733 - srb_t *sp = ptr; 1734 1794 struct srb_iocb *tmf = &sp->u.iocb_cmd; 1735 1795 1736 1796 complete(&tmf->u.tmf.comp); ··· 1826 1890 static void 1827 1891 qla24xx_handle_prli_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1828 1892 { 1893 + WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 1894 + ea->data[0]); 1895 + 1829 1896 switch (ea->data[0]) { 1830 1897 case MBS_COMMAND_COMPLETE: 1831 1898 ql_dbg(ql_dbg_disc, vha, 0x2118, ··· 1868 1929 } 1869 1930 } 1870 1931 1871 - static void 1932 + void 1872 1933 qla24xx_handle_plogi_done_event(struct scsi_qla_host *vha, struct event_arg *ea) 1873 1934 { 1874 1935 port_id_t cid; /* conflict Nport id */ ··· 1892 1953 return; 1893 1954 } 1894 1955 1895 - if (fcport->disc_state == DSC_DELETE_PEND) 1956 + if ((fcport->disc_state == DSC_DELETE_PEND) || 1957 + (fcport->disc_state == DSC_DELETED)) { 1958 + set_bit(RELOGIN_NEEDED, &vha->dpc_flags); 1896 1959 return; 1960 + } 1897 1961 1898 1962 if (ea->sp->gen2 != fcport->login_gen) { 1899 1963 /* target side must have changed it. */ ··· 1913 1971 qlt_schedule_sess_for_deletion(fcport); 1914 1972 return; 1915 1973 } 1974 + 1975 + WARN_ONCE(!qla2xxx_is_valid_mbs(ea->data[0]), "mbs: %#x\n", 1976 + ea->data[0]); 1916 1977 1917 1978 switch (ea->data[0]) { 1918 1979 case MBS_COMMAND_COMPLETE: ··· 2210 2265 2211 2266 if (qla_ini_mode_enabled(vha) || qla_dual_mode_enabled(vha)) 2212 2267 rval = qla2x00_init_rings(vha); 2268 + 2269 + /* No point in continuing if firmware initialization failed. */ 2270 + if (rval != QLA_SUCCESS) 2271 + return rval; 2213 2272 2214 2273 ha->flags.chip_reset_done = 1; 2215 2274 ··· 3031 3082 } 3032 3083 3033 3084 static void 3034 - qla2x00_alloc_offload_mem(scsi_qla_host_t *vha) 3085 + qla2x00_init_fce_trace(scsi_qla_host_t *vha) 3035 3086 { 3036 3087 int rval; 3037 3088 dma_addr_t tc_dma; 3038 3089 void *tc; 3039 3090 struct qla_hw_data *ha = vha->hw; 3040 3091 3092 + if (!IS_FWI2_CAPABLE(ha)) 3093 + return; 3094 + 3095 + if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 3096 + !IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 3097 + return; 3098 + 3099 + if (ha->fce) { 3100 + ql_dbg(ql_dbg_init, vha, 0x00bd, 3101 + "%s: FCE Mem is already allocated.\n", 3102 + __func__); 3103 + return; 3104 + } 3105 + 3106 + /* Allocate memory for Fibre Channel Event Buffer. */ 3107 + tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 3108 + GFP_KERNEL); 3109 + if (!tc) { 3110 + ql_log(ql_log_warn, vha, 0x00be, 3111 + "Unable to allocate (%d KB) for FCE.\n", 3112 + FCE_SIZE / 1024); 3113 + return; 3114 + } 3115 + 3116 + rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 3117 + ha->fce_mb, &ha->fce_bufs); 3118 + if (rval) { 3119 + ql_log(ql_log_warn, vha, 0x00bf, 3120 + "Unable to initialize FCE (%d).\n", rval); 3121 + dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, tc_dma); 3122 + return; 3123 + } 3124 + 3125 + ql_dbg(ql_dbg_init, vha, 0x00c0, 3126 + "Allocated (%d KB) for FCE...\n", FCE_SIZE / 1024); 3127 + 3128 + ha->flags.fce_enabled = 1; 3129 + ha->fce_dma = tc_dma; 3130 + ha->fce = tc; 3131 + } 3132 + 3133 + static void 3134 + qla2x00_init_eft_trace(scsi_qla_host_t *vha) 3135 + { 3136 + int rval; 3137 + dma_addr_t tc_dma; 3138 + void *tc; 3139 + struct qla_hw_data *ha = vha->hw; 3140 + 3141 + if (!IS_FWI2_CAPABLE(ha)) 3142 + return; 3143 + 3041 3144 if (ha->eft) { 3042 3145 ql_dbg(ql_dbg_init, vha, 0x00bd, 3043 - "%s: Offload Mem is already allocated.\n", 3146 + "%s: EFT Mem is already allocated.\n", 3044 3147 __func__); 3045 3148 return; 3046 3149 } 3047 3150 3048 - if (IS_FWI2_CAPABLE(ha)) { 3049 - /* Allocate memory for Fibre Channel Event Buffer. */ 3050 - if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 3051 - !IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 3052 - goto try_eft; 3053 - 3054 - if (ha->fce) 3055 - dma_free_coherent(&ha->pdev->dev, 3056 - FCE_SIZE, ha->fce, ha->fce_dma); 3057 - 3058 - /* Allocate memory for Fibre Channel Event Buffer. */ 3059 - tc = dma_alloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, 3060 - GFP_KERNEL); 3061 - if (!tc) { 3062 - ql_log(ql_log_warn, vha, 0x00be, 3063 - "Unable to allocate (%d KB) for FCE.\n", 3064 - FCE_SIZE / 1024); 3065 - goto try_eft; 3066 - } 3067 - 3068 - rval = qla2x00_enable_fce_trace(vha, tc_dma, FCE_NUM_BUFFERS, 3069 - ha->fce_mb, &ha->fce_bufs); 3070 - if (rval) { 3071 - ql_log(ql_log_warn, vha, 0x00bf, 3072 - "Unable to initialize FCE (%d).\n", rval); 3073 - dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, 3074 - tc_dma); 3075 - ha->flags.fce_enabled = 0; 3076 - goto try_eft; 3077 - } 3078 - ql_dbg(ql_dbg_init, vha, 0x00c0, 3079 - "Allocate (%d KB) for FCE...\n", FCE_SIZE / 1024); 3080 - 3081 - ha->flags.fce_enabled = 1; 3082 - ha->fce_dma = tc_dma; 3083 - ha->fce = tc; 3084 - 3085 - try_eft: 3086 - if (ha->eft) 3087 - dma_free_coherent(&ha->pdev->dev, 3088 - EFT_SIZE, ha->eft, ha->eft_dma); 3089 - 3090 - /* Allocate memory for Extended Trace Buffer. */ 3091 - tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 3092 - GFP_KERNEL); 3093 - if (!tc) { 3094 - ql_log(ql_log_warn, vha, 0x00c1, 3095 - "Unable to allocate (%d KB) for EFT.\n", 3096 - EFT_SIZE / 1024); 3097 - goto eft_err; 3098 - } 3099 - 3100 - rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 3101 - if (rval) { 3102 - ql_log(ql_log_warn, vha, 0x00c2, 3103 - "Unable to initialize EFT (%d).\n", rval); 3104 - dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, 3105 - tc_dma); 3106 - goto eft_err; 3107 - } 3108 - ql_dbg(ql_dbg_init, vha, 0x00c3, 3109 - "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 3110 - 3111 - ha->eft_dma = tc_dma; 3112 - ha->eft = tc; 3151 + /* Allocate memory for Extended Trace Buffer. */ 3152 + tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 3153 + GFP_KERNEL); 3154 + if (!tc) { 3155 + ql_log(ql_log_warn, vha, 0x00c1, 3156 + "Unable to allocate (%d KB) for EFT.\n", 3157 + EFT_SIZE / 1024); 3158 + return; 3113 3159 } 3114 3160 3115 - eft_err: 3116 - return; 3161 + rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 3162 + if (rval) { 3163 + ql_log(ql_log_warn, vha, 0x00c2, 3164 + "Unable to initialize EFT (%d).\n", rval); 3165 + dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, tc_dma); 3166 + return; 3167 + } 3168 + 3169 + ql_dbg(ql_dbg_init, vha, 0x00c3, 3170 + "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 3171 + 3172 + ha->eft_dma = tc_dma; 3173 + ha->eft = tc; 3174 + } 3175 + 3176 + static void 3177 + qla2x00_alloc_offload_mem(scsi_qla_host_t *vha) 3178 + { 3179 + qla2x00_init_fce_trace(vha); 3180 + qla2x00_init_eft_trace(vha); 3117 3181 } 3118 3182 3119 3183 void 3120 3184 qla2x00_alloc_fw_dump(scsi_qla_host_t *vha) 3121 3185 { 3122 - int rval; 3123 3186 uint32_t dump_size, fixed_size, mem_size, req_q_size, rsp_q_size, 3124 3187 eft_size, fce_size, mq_size; 3125 3188 struct qla_hw_data *ha = vha->hw; 3126 3189 struct req_que *req = ha->req_q_map[0]; 3127 3190 struct rsp_que *rsp = ha->rsp_q_map[0]; 3128 3191 struct qla2xxx_fw_dump *fw_dump; 3129 - dma_addr_t tc_dma; 3130 - void *tc; 3131 3192 3132 3193 dump_size = fixed_size = mem_size = eft_size = fce_size = mq_size = 0; 3133 3194 req_q_size = rsp_q_size = 0; ··· 3175 3216 } 3176 3217 if (ha->tgt.atio_ring) 3177 3218 mq_size += ha->tgt.atio_q_length * sizeof(request_t); 3178 - /* Allocate memory for Fibre Channel Event Buffer. */ 3179 - if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && 3180 - !IS_QLA27XX(ha) && !IS_QLA28XX(ha)) 3181 - goto try_eft; 3182 3219 3183 - fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 3184 - try_eft: 3220 + qla2x00_init_fce_trace(vha); 3221 + if (ha->fce) 3222 + fce_size = sizeof(struct qla2xxx_fce_chain) + FCE_SIZE; 3223 + qla2x00_init_eft_trace(vha); 3185 3224 if (ha->eft) 3186 - dma_free_coherent(&ha->pdev->dev, 3187 - EFT_SIZE, ha->eft, ha->eft_dma); 3188 - 3189 - /* Allocate memory for Extended Trace Buffer. */ 3190 - tc = dma_alloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, 3191 - GFP_KERNEL); 3192 - if (!tc) { 3193 - ql_log(ql_log_warn, vha, 0x00c1, 3194 - "Unable to allocate (%d KB) for EFT.\n", 3195 - EFT_SIZE / 1024); 3196 - goto allocate; 3197 - } 3198 - 3199 - rval = qla2x00_enable_eft_trace(vha, tc_dma, EFT_NUM_BUFFERS); 3200 - if (rval) { 3201 - ql_log(ql_log_warn, vha, 0x00c2, 3202 - "Unable to initialize EFT (%d).\n", rval); 3203 - dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, 3204 - tc_dma); 3205 - } 3206 - ql_dbg(ql_dbg_init, vha, 0x00c3, 3207 - "Allocated (%d KB) EFT ...\n", EFT_SIZE / 1024); 3208 - eft_size = EFT_SIZE; 3225 + eft_size = EFT_SIZE; 3209 3226 } 3210 3227 3211 3228 if (IS_QLA27XX(ha) || IS_QLA28XX(ha)) { ··· 3203 3268 j, fwdt->dump_size); 3204 3269 dump_size += fwdt->dump_size; 3205 3270 } 3206 - goto allocate; 3271 + } else { 3272 + req_q_size = req->length * sizeof(request_t); 3273 + rsp_q_size = rsp->length * sizeof(response_t); 3274 + dump_size = offsetof(struct qla2xxx_fw_dump, isp); 3275 + dump_size += fixed_size + mem_size + req_q_size + rsp_q_size 3276 + + eft_size; 3277 + ha->chain_offset = dump_size; 3278 + dump_size += mq_size + fce_size; 3279 + if (ha->exchoffld_buf) 3280 + dump_size += sizeof(struct qla2xxx_offld_chain) + 3281 + ha->exchoffld_size; 3282 + if (ha->exlogin_buf) 3283 + dump_size += sizeof(struct qla2xxx_offld_chain) + 3284 + ha->exlogin_size; 3207 3285 } 3208 3286 3209 - req_q_size = req->length * sizeof(request_t); 3210 - rsp_q_size = rsp->length * sizeof(response_t); 3211 - dump_size = offsetof(struct qla2xxx_fw_dump, isp); 3212 - dump_size += fixed_size + mem_size + req_q_size + rsp_q_size + eft_size; 3213 - ha->chain_offset = dump_size; 3214 - dump_size += mq_size + fce_size; 3215 - 3216 - if (ha->exchoffld_buf) 3217 - dump_size += sizeof(struct qla2xxx_offld_chain) + 3218 - ha->exchoffld_size; 3219 - if (ha->exlogin_buf) 3220 - dump_size += sizeof(struct qla2xxx_offld_chain) + 3221 - ha->exlogin_size; 3222 - 3223 - allocate: 3224 3287 if (!ha->fw_dump_len || dump_size > ha->fw_dump_alloc_len) { 3225 3288 3226 3289 ql_dbg(ql_dbg_init, vha, 0x00c5, ··· 4333 4400 4334 4401 inline void 4335 4402 qla2x00_set_model_info(scsi_qla_host_t *vha, uint8_t *model, size_t len, 4336 - char *def) 4403 + const char *def) 4337 4404 { 4338 4405 char *st, *en; 4339 4406 uint16_t index; ··· 4345 4412 if (len > sizeof(zero)) 4346 4413 len = sizeof(zero); 4347 4414 if (memcmp(model, &zero, len) != 0) { 4348 - strncpy(ha->model_number, model, len); 4415 + memcpy(ha->model_number, model, len); 4349 4416 st = en = ha->model_number; 4350 4417 en += len - 1; 4351 4418 while (en > st) { ··· 4358 4425 if (use_tbl && 4359 4426 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4360 4427 index < QLA_MODEL_NAMES) 4361 - strncpy(ha->model_desc, 4428 + strlcpy(ha->model_desc, 4362 4429 qla2x00_model_name[index * 2 + 1], 4363 - sizeof(ha->model_desc) - 1); 4430 + sizeof(ha->model_desc)); 4364 4431 } else { 4365 4432 index = (ha->pdev->subsystem_device & 0xff); 4366 4433 if (use_tbl && 4367 4434 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && 4368 4435 index < QLA_MODEL_NAMES) { 4369 - strcpy(ha->model_number, 4370 - qla2x00_model_name[index * 2]); 4371 - strncpy(ha->model_desc, 4436 + strlcpy(ha->model_number, 4437 + qla2x00_model_name[index * 2], 4438 + sizeof(ha->model_number)); 4439 + strlcpy(ha->model_desc, 4372 4440 qla2x00_model_name[index * 2 + 1], 4373 - sizeof(ha->model_desc) - 1); 4441 + sizeof(ha->model_desc)); 4374 4442 } else { 4375 - strcpy(ha->model_number, def); 4443 + strlcpy(ha->model_number, def, 4444 + sizeof(ha->model_number)); 4376 4445 } 4377 4446 } 4378 4447 if (IS_FWI2_CAPABLE(ha)) ··· 4979 5044 4980 5045 uint16_t index; 4981 5046 uint16_t entries; 4982 - char *id_iter; 5047 + struct gid_list_info *gid; 4983 5048 uint16_t loop_id; 4984 5049 uint8_t domain, area, al_pa; 4985 5050 struct qla_hw_data *ha = vha->hw; ··· 5054 5119 new_fcport->flags &= ~FCF_FABRIC_DEVICE; 5055 5120 5056 5121 /* Add devices to port list. */ 5057 - id_iter = (char *)ha->gid_list; 5122 + gid = ha->gid_list; 5058 5123 for (index = 0; index < entries; index++) { 5059 - domain = ((struct gid_list_info *)id_iter)->domain; 5060 - area = ((struct gid_list_info *)id_iter)->area; 5061 - al_pa = ((struct gid_list_info *)id_iter)->al_pa; 5124 + domain = gid->domain; 5125 + area = gid->area; 5126 + al_pa = gid->al_pa; 5062 5127 if (IS_QLA2100(ha) || IS_QLA2200(ha)) 5063 - loop_id = (uint16_t) 5064 - ((struct gid_list_info *)id_iter)->loop_id_2100; 5128 + loop_id = gid->loop_id_2100; 5065 5129 else 5066 - loop_id = le16_to_cpu( 5067 - ((struct gid_list_info *)id_iter)->loop_id); 5068 - id_iter += ha->gid_list_info_size; 5130 + loop_id = le16_to_cpu(gid->loop_id); 5131 + gid = (void *)gid + ha->gid_list_info_size; 5069 5132 5070 5133 /* Bypass reserved domain fields. */ 5071 5134 if ((domain & 0xf0) == 0xf0) ··· 5288 5355 "%s %8phN. rport %p is %s mode\n", 5289 5356 __func__, fcport->port_name, rport, 5290 5357 (fcport->port_type == FCT_TARGET) ? "tgt" : 5291 - ((fcport->port_type & FCT_NVME) ? "nvme" :"ini")); 5358 + ((fcport->port_type & FCT_NVME) ? "nvme" : "ini")); 5292 5359 5293 5360 fc_remote_port_rolechg(rport, rport_ids.roles); 5294 5361 } ··· 6529 6596 LOOP_DOWN_TIME); 6530 6597 } 6531 6598 /* Wait for pending cmds to complete */ 6532 - qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST); 6599 + WARN_ON_ONCE(qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) 6600 + != QLA_SUCCESS); 6533 6601 } 6534 6602 6535 6603 void ··· 6618 6684 } 6619 6685 6620 6686 /* Clear all async request states across all VPs. */ 6621 - list_for_each_entry(fcport, &vha->vp_fcports, list) 6687 + list_for_each_entry(fcport, &vha->vp_fcports, list) { 6622 6688 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT); 6689 + fcport->scan_state = 0; 6690 + } 6623 6691 spin_lock_irqsave(&ha->vport_slock, flags); 6624 6692 list_for_each_entry(vp, &ha->vp_list, list) { 6625 6693 atomic_inc(&vp->vref_count); ··· 7455 7519 goto check_sec_image; 7456 7520 } 7457 7521 7458 - qla24xx_read_flash_data(vha, (void *)(&pri_image_status), 7459 - ha->flt_region_img_status_pri, sizeof(pri_image_status) >> 2); 7522 + if (qla24xx_read_flash_data(vha, (void *)(&pri_image_status), 7523 + ha->flt_region_img_status_pri, sizeof(pri_image_status) >> 2) != 7524 + QLA_SUCCESS) { 7525 + WARN_ON_ONCE(true); 7526 + goto check_sec_image; 7527 + } 7460 7528 qla27xx_print_image(vha, "Primary image", &pri_image_status); 7461 7529 7462 7530 if (qla27xx_check_image_status_signature(&pri_image_status)) { ··· 8214 8274 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ? 8215 8275 "primary" : "secondary"); 8216 8276 } 8217 - qla24xx_read_flash_data(vha, ha->vpd, faddr, ha->vpd_size >> 2); 8277 + ha->isp_ops->read_optrom(vha, ha->vpd, faddr << 2, ha->vpd_size); 8218 8278 8219 8279 /* Get NVRAM data into cache and calculate checksum. */ 8220 8280 faddr = ha->flt_region_nvram; ··· 8226 8286 "Loading %s nvram image.\n", 8227 8287 active_regions.aux.vpd_nvram == QLA27XX_PRIMARY_IMAGE ? 8228 8288 "primary" : "secondary"); 8229 - qla24xx_read_flash_data(vha, ha->nvram, faddr, ha->nvram_size >> 2); 8289 + ha->isp_ops->read_optrom(vha, ha->nvram, faddr << 2, ha->nvram_size); 8230 8290 8231 8291 dptr = (uint32_t *)nv; 8232 8292 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++, dptr++)
+15 -13
drivers/scsi/qla2xxx/qla_inline.h
··· 152 152 return (qla2x00_reset_active(vha) || !vha->hw->flags.fw_started); 153 153 } 154 154 155 + static void qla2xxx_init_sp(srb_t *sp, scsi_qla_host_t *vha, 156 + struct qla_qpair *qpair, fc_port_t *fcport) 157 + { 158 + memset(sp, 0, sizeof(*sp)); 159 + sp->fcport = fcport; 160 + sp->iocbs = 1; 161 + sp->vha = vha; 162 + sp->qpair = qpair; 163 + sp->cmd_type = TYPE_SRB; 164 + INIT_LIST_HEAD(&sp->elem); 165 + } 166 + 155 167 static inline srb_t * 156 168 qla2xxx_get_qpair_sp(scsi_qla_host_t *vha, struct qla_qpair *qpair, 157 169 fc_port_t *fcport, gfp_t flag) ··· 176 164 return NULL; 177 165 178 166 sp = mempool_alloc(qpair->srb_mempool, flag); 179 - if (!sp) 180 - goto done; 181 - 182 - memset(sp, 0, sizeof(*sp)); 183 - sp->fcport = fcport; 184 - sp->iocbs = 1; 185 - sp->vha = vha; 186 - sp->qpair = qpair; 187 - sp->cmd_type = TYPE_SRB; 188 - INIT_LIST_HEAD(&sp->elem); 189 - 190 - done: 191 - if (!sp) 167 + if (sp) 168 + qla2xxx_init_sp(sp, vha, qpair, fcport); 169 + else 192 170 QLA_QPAIR_MARK_NOT_BUSY(qpair); 193 171 return sp; 194 172 }
+82 -144
drivers/scsi/qla2xxx/qla_iocb.c
··· 292 292 } 293 293 } 294 294 295 + /* 296 + * Find the first handle that is not in use, starting from 297 + * req->current_outstanding_cmd + 1. The caller must hold the lock that is 298 + * associated with @req. 299 + */ 300 + uint32_t qla2xxx_get_next_handle(struct req_que *req) 301 + { 302 + uint32_t index, handle = req->current_outstanding_cmd; 303 + 304 + for (index = 1; index < req->num_outstanding_cmds; index++) { 305 + handle++; 306 + if (handle == req->num_outstanding_cmds) 307 + handle = 1; 308 + if (!req->outstanding_cmds[handle]) 309 + return handle; 310 + } 311 + 312 + return 0; 313 + } 314 + 295 315 /** 296 316 * qla2x00_start_scsi() - Send a SCSI command to the ISP 297 317 * @sp: command to send to the ISP ··· 326 306 scsi_qla_host_t *vha; 327 307 struct scsi_cmnd *cmd; 328 308 uint32_t *clr_ptr; 329 - uint32_t index; 330 309 uint32_t handle; 331 310 cmd_entry_t *cmd_pkt; 332 311 uint16_t cnt; ··· 358 339 /* Acquire ring specific lock */ 359 340 spin_lock_irqsave(&ha->hardware_lock, flags); 360 341 361 - /* Check for room in outstanding command list. */ 362 - handle = req->current_outstanding_cmd; 363 - for (index = 1; index < req->num_outstanding_cmds; index++) { 364 - handle++; 365 - if (handle == req->num_outstanding_cmds) 366 - handle = 1; 367 - if (!req->outstanding_cmds[handle]) 368 - break; 369 - } 370 - if (index == req->num_outstanding_cmds) 342 + handle = qla2xxx_get_next_handle(req); 343 + if (handle == 0) 371 344 goto queuing_error; 372 345 373 346 /* Map the sg table so we have an accurate count of sg entries needed */ ··· 621 610 } 622 611 623 612 cur_seg = scsi_sglist(cmd); 624 - ctx = GET_CMD_CTX_SP(sp); 613 + ctx = sp->u.scmd.ct6_ctx; 625 614 626 615 while (tot_dsds) { 627 616 avail_dsds = (tot_dsds > QLA_DSDS_PER_IOCB) ? ··· 954 943 955 944 if (sp) { 956 945 list_add_tail(&dsd_ptr->list, 957 - &((struct crc_context *) 958 - sp->u.scmd.ctx)->dsd_list); 946 + &sp->u.scmd.crc_ctx->dsd_list); 959 947 960 948 sp->flags |= SRB_CRC_CTX_DSD_VALID; 961 949 } else { ··· 1051 1041 1052 1042 if (sp) { 1053 1043 list_add_tail(&dsd_ptr->list, 1054 - &((struct crc_context *) 1055 - sp->u.scmd.ctx)->dsd_list); 1044 + &sp->u.scmd.crc_ctx->dsd_list); 1056 1045 1057 1046 sp->flags |= SRB_CRC_CTX_DSD_VALID; 1058 1047 } else { ··· 1097 1088 1098 1089 sgl = scsi_prot_sglist(cmd); 1099 1090 vha = sp->vha; 1100 - difctx = sp->u.scmd.ctx; 1091 + difctx = sp->u.scmd.crc_ctx; 1101 1092 direction_to_device = cmd->sc_data_direction == DMA_TO_DEVICE; 1102 1093 ql_dbg(ql_dbg_tgt + ql_dbg_verbose, vha, 0xe021, 1103 1094 "%s: scsi_cmnd: %p, crc_ctx: %p, sp: %p\n", ··· 1373 1364 cur_dsd++; 1374 1365 return 0; 1375 1366 } 1367 + 1376 1368 /** 1377 1369 * qla24xx_build_scsi_crc_2_iocbs() - Build IOCB command utilizing Command 1378 1370 * Type 6 IOCB types. ··· 1437 1427 bundling = 0; 1438 1428 1439 1429 /* Allocate CRC context from global pool */ 1440 - crc_ctx_pkt = sp->u.scmd.ctx = 1430 + crc_ctx_pkt = sp->u.scmd.crc_ctx = 1441 1431 dma_pool_zalloc(ha->dl_dma_pool, GFP_ATOMIC, &crc_ctx_dma); 1442 1432 1443 1433 if (!crc_ctx_pkt) ··· 1525 1515 } 1526 1516 1527 1517 if (!bundling) { 1528 - cur_dsd = &crc_ctx_pkt->u.nobundling.data_dsd; 1518 + cur_dsd = &crc_ctx_pkt->u.nobundling.data_dsd[0]; 1529 1519 } else { 1530 1520 /* 1531 1521 * Configure Bundling if we need to fetch interlaving ··· 1535 1525 crc_ctx_pkt->u.bundling.dif_byte_count = cpu_to_le32(dif_bytes); 1536 1526 crc_ctx_pkt->u.bundling.dseg_count = cpu_to_le16(tot_dsds - 1537 1527 tot_prot_dsds); 1538 - cur_dsd = &crc_ctx_pkt->u.bundling.data_dsd; 1528 + cur_dsd = &crc_ctx_pkt->u.bundling.data_dsd[0]; 1539 1529 } 1540 1530 1541 1531 /* Finish the common fields of CRC pkt */ ··· 1593 1583 int nseg; 1594 1584 unsigned long flags; 1595 1585 uint32_t *clr_ptr; 1596 - uint32_t index; 1597 1586 uint32_t handle; 1598 1587 struct cmd_type_7 *cmd_pkt; 1599 1588 uint16_t cnt; ··· 1620 1611 /* Acquire ring specific lock */ 1621 1612 spin_lock_irqsave(&ha->hardware_lock, flags); 1622 1613 1623 - /* Check for room in outstanding command list. */ 1624 - handle = req->current_outstanding_cmd; 1625 - for (index = 1; index < req->num_outstanding_cmds; index++) { 1626 - handle++; 1627 - if (handle == req->num_outstanding_cmds) 1628 - handle = 1; 1629 - if (!req->outstanding_cmds[handle]) 1630 - break; 1631 - } 1632 - if (index == req->num_outstanding_cmds) 1614 + handle = qla2xxx_get_next_handle(req); 1615 + if (handle == 0) 1633 1616 goto queuing_error; 1634 1617 1635 1618 /* Map the sg table so we have an accurate count of sg entries needed */ ··· 1724 1723 int nseg; 1725 1724 unsigned long flags; 1726 1725 uint32_t *clr_ptr; 1727 - uint32_t index; 1728 1726 uint32_t handle; 1729 1727 uint16_t cnt; 1730 1728 uint16_t req_cnt = 0; ··· 1764 1764 /* Acquire ring specific lock */ 1765 1765 spin_lock_irqsave(&ha->hardware_lock, flags); 1766 1766 1767 - /* Check for room in outstanding command list. */ 1768 - handle = req->current_outstanding_cmd; 1769 - for (index = 1; index < req->num_outstanding_cmds; index++) { 1770 - handle++; 1771 - if (handle == req->num_outstanding_cmds) 1772 - handle = 1; 1773 - if (!req->outstanding_cmds[handle]) 1774 - break; 1775 - } 1776 - 1777 - if (index == req->num_outstanding_cmds) 1767 + handle = qla2xxx_get_next_handle(req); 1768 + if (handle == 0) 1778 1769 goto queuing_error; 1779 1770 1780 1771 /* Compute number of required data segments */ ··· 1910 1919 int nseg; 1911 1920 unsigned long flags; 1912 1921 uint32_t *clr_ptr; 1913 - uint32_t index; 1914 1922 uint32_t handle; 1915 1923 struct cmd_type_7 *cmd_pkt; 1916 1924 uint16_t cnt; ··· 1940 1950 vha->marker_needed = 0; 1941 1951 } 1942 1952 1943 - /* Check for room in outstanding command list. */ 1944 - handle = req->current_outstanding_cmd; 1945 - for (index = 1; index < req->num_outstanding_cmds; index++) { 1946 - handle++; 1947 - if (handle == req->num_outstanding_cmds) 1948 - handle = 1; 1949 - if (!req->outstanding_cmds[handle]) 1950 - break; 1951 - } 1952 - if (index == req->num_outstanding_cmds) 1953 + handle = qla2xxx_get_next_handle(req); 1954 + if (handle == 0) 1953 1955 goto queuing_error; 1954 1956 1955 1957 /* Map the sg table so we have an accurate count of sg entries needed */ ··· 2045 2063 int nseg; 2046 2064 unsigned long flags; 2047 2065 uint32_t *clr_ptr; 2048 - uint32_t index; 2049 2066 uint32_t handle; 2050 2067 uint16_t cnt; 2051 2068 uint16_t req_cnt = 0; ··· 2099 2118 vha->marker_needed = 0; 2100 2119 } 2101 2120 2102 - /* Check for room in outstanding command list. */ 2103 - handle = req->current_outstanding_cmd; 2104 - for (index = 1; index < req->num_outstanding_cmds; index++) { 2105 - handle++; 2106 - if (handle == req->num_outstanding_cmds) 2107 - handle = 1; 2108 - if (!req->outstanding_cmds[handle]) 2109 - break; 2110 - } 2111 - 2112 - if (index == req->num_outstanding_cmds) 2121 + handle = qla2xxx_get_next_handle(req); 2122 + if (handle == 0) 2113 2123 goto queuing_error; 2114 2124 2115 2125 /* Compute number of required data segments */ ··· 2247 2275 struct qla_hw_data *ha = vha->hw; 2248 2276 struct req_que *req = qpair->req; 2249 2277 device_reg_t *reg = ISP_QUE_REG(ha, req->id); 2250 - uint32_t index, handle; 2278 + uint32_t handle; 2251 2279 request_t *pkt; 2252 2280 uint16_t cnt, req_cnt; 2253 2281 ··· 2287 2315 goto queuing_error; 2288 2316 2289 2317 if (sp) { 2290 - /* Check for room in outstanding command list. */ 2291 - handle = req->current_outstanding_cmd; 2292 - for (index = 1; index < req->num_outstanding_cmds; index++) { 2293 - handle++; 2294 - if (handle == req->num_outstanding_cmds) 2295 - handle = 1; 2296 - if (!req->outstanding_cmds[handle]) 2297 - break; 2298 - } 2299 - if (index == req->num_outstanding_cmds) { 2318 + handle = qla2xxx_get_next_handle(req); 2319 + if (handle == 0) { 2300 2320 ql_log(ql_log_warn, vha, 0x700b, 2301 2321 "No room on outstanding cmd array.\n"); 2302 2322 goto queuing_error; ··· 2504 2540 sp->free = qla2x00_sp_free; 2505 2541 if (IS_QLAFX00(sp->vha->hw) && sp->type == SRB_FXIOCB_DCMD) 2506 2542 init_completion(&sp->u.iocb_cmd.u.fxiocb.fxiocb_comp); 2507 - add_timer(&sp->u.iocb_cmd.timer); 2543 + sp->start_timer = 1; 2508 2544 } 2509 2545 2510 - static void 2511 - qla2x00_els_dcmd_sp_free(void *data) 2546 + static void qla2x00_els_dcmd_sp_free(srb_t *sp) 2512 2547 { 2513 - srb_t *sp = data; 2514 2548 struct srb_iocb *elsio = &sp->u.iocb_cmd; 2515 2549 2516 2550 kfree(sp->fcport); ··· 2538 2576 complete(&lio->u.els_logo.comp); 2539 2577 } 2540 2578 2541 - static void 2542 - qla2x00_els_dcmd_sp_done(void *ptr, int res) 2579 + static void qla2x00_els_dcmd_sp_done(srb_t *sp, int res) 2543 2580 { 2544 - srb_t *sp = ptr; 2545 2581 fc_port_t *fcport = sp->fcport; 2546 2582 struct srb_iocb *lio = &sp->u.iocb_cmd; 2547 2583 struct scsi_qla_host *vha = sp->vha; ··· 2659 2699 els_iocb->s_id[0] = vha->d_id.b.al_pa; 2660 2700 els_iocb->s_id[1] = vha->d_id.b.area; 2661 2701 els_iocb->s_id[2] = vha->d_id.b.domain; 2662 - els_iocb->control_flags = 0; 2663 2702 2664 2703 if (elsio->u.els_logo.els_cmd == ELS_DCMD_PLOGI) { 2704 + els_iocb->control_flags = 0; 2665 2705 els_iocb->tx_byte_count = els_iocb->tx_len = 2666 - sizeof(struct els_plogi_payload); 2706 + cpu_to_le32(sizeof(struct els_plogi_payload)); 2667 2707 put_unaligned_le64(elsio->u.els_plogi.els_plogi_pyld_dma, 2668 2708 &els_iocb->tx_address); 2669 2709 els_iocb->rx_dsd_count = 1; 2670 2710 els_iocb->rx_byte_count = els_iocb->rx_len = 2671 - sizeof(struct els_plogi_payload); 2711 + cpu_to_le32(sizeof(struct els_plogi_payload)); 2672 2712 put_unaligned_le64(elsio->u.els_plogi.els_resp_pyld_dma, 2673 2713 &els_iocb->rx_address); 2674 2714 ··· 2677 2717 ql_dump_buffer(ql_log_info, vha, 0x0109, 2678 2718 (uint8_t *)els_iocb, 0x70); 2679 2719 } else { 2680 - els_iocb->tx_byte_count = sizeof(struct els_logo_payload); 2720 + els_iocb->control_flags = 1 << 13; 2721 + els_iocb->tx_byte_count = 2722 + cpu_to_le32(sizeof(struct els_logo_payload)); 2681 2723 put_unaligned_le64(elsio->u.els_logo.els_logo_pyld_dma, 2682 2724 &els_iocb->tx_address); 2683 2725 els_iocb->tx_len = cpu_to_le32(sizeof(struct els_logo_payload)); ··· 2717 2755 sp->done(sp, QLA_FUNCTION_TIMEOUT); 2718 2756 } 2719 2757 2720 - static void 2721 - qla2x00_els_dcmd2_sp_done(void *ptr, int res) 2758 + void qla2x00_els_dcmd2_free(scsi_qla_host_t *vha, struct els_plogi *els_plogi) 2722 2759 { 2723 - srb_t *sp = ptr; 2760 + if (els_plogi->els_plogi_pyld) 2761 + dma_free_coherent(&vha->hw->pdev->dev, 2762 + els_plogi->tx_size, 2763 + els_plogi->els_plogi_pyld, 2764 + els_plogi->els_plogi_pyld_dma); 2765 + 2766 + if (els_plogi->els_resp_pyld) 2767 + dma_free_coherent(&vha->hw->pdev->dev, 2768 + els_plogi->rx_size, 2769 + els_plogi->els_resp_pyld, 2770 + els_plogi->els_resp_pyld_dma); 2771 + } 2772 + 2773 + static void qla2x00_els_dcmd2_sp_done(srb_t *sp, int res) 2774 + { 2724 2775 fc_port_t *fcport = sp->fcport; 2725 2776 struct srb_iocb *lio = &sp->u.iocb_cmd; 2726 2777 struct scsi_qla_host *vha = sp->vha; ··· 2755 2780 } else { 2756 2781 memset(&ea, 0, sizeof(ea)); 2757 2782 ea.fcport = fcport; 2758 - ea.rc = res; 2759 - ea.event = FCME_ELS_PLOGI_DONE; 2760 - qla2x00_fcport_event_handler(vha, &ea); 2783 + ea.data[0] = MBS_COMMAND_COMPLETE; 2784 + ea.sp = sp; 2785 + qla24xx_handle_plogi_done_event(vha, &ea); 2761 2786 } 2762 2787 2763 2788 e = qla2x00_alloc_work(vha, QLA_EVT_UNMAP); 2764 2789 if (!e) { 2765 2790 struct srb_iocb *elsio = &sp->u.iocb_cmd; 2766 2791 2767 - if (elsio->u.els_plogi.els_plogi_pyld) 2768 - dma_free_coherent(&sp->vha->hw->pdev->dev, 2769 - elsio->u.els_plogi.tx_size, 2770 - elsio->u.els_plogi.els_plogi_pyld, 2771 - elsio->u.els_plogi.els_plogi_pyld_dma); 2772 - 2773 - if (elsio->u.els_plogi.els_resp_pyld) 2774 - dma_free_coherent(&sp->vha->hw->pdev->dev, 2775 - elsio->u.els_plogi.rx_size, 2776 - elsio->u.els_plogi.els_resp_pyld, 2777 - elsio->u.els_plogi.els_resp_pyld_dma); 2792 + qla2x00_els_dcmd2_free(vha, &elsio->u.els_plogi); 2778 2793 sp->free(sp); 2779 2794 return; 2780 2795 } ··· 2864 2899 2865 2900 out: 2866 2901 fcport->flags &= ~(FCF_ASYNC_SENT); 2867 - if (elsio->u.els_plogi.els_plogi_pyld) 2868 - dma_free_coherent(&sp->vha->hw->pdev->dev, 2869 - elsio->u.els_plogi.tx_size, 2870 - elsio->u.els_plogi.els_plogi_pyld, 2871 - elsio->u.els_plogi.els_plogi_pyld_dma); 2872 - 2873 - if (elsio->u.els_plogi.els_resp_pyld) 2874 - dma_free_coherent(&sp->vha->hw->pdev->dev, 2875 - elsio->u.els_plogi.rx_size, 2876 - elsio->u.els_plogi.els_resp_pyld, 2877 - elsio->u.els_plogi.els_resp_pyld_dma); 2878 - 2902 + qla2x00_els_dcmd2_free(vha, &elsio->u.els_plogi); 2879 2903 sp->free(sp); 2880 2904 done: 2881 2905 return rval; ··· 3069 3115 unsigned long flags; 3070 3116 struct scsi_cmnd *cmd; 3071 3117 uint32_t *clr_ptr; 3072 - uint32_t index; 3073 3118 uint32_t handle; 3074 3119 uint16_t cnt; 3075 3120 uint16_t req_cnt; ··· 3108 3155 /* Acquire ring specific lock */ 3109 3156 spin_lock_irqsave(&ha->hardware_lock, flags); 3110 3157 3111 - /* Check for room in outstanding command list. */ 3112 - handle = req->current_outstanding_cmd; 3113 - for (index = 1; index < req->num_outstanding_cmds; index++) { 3114 - handle++; 3115 - if (handle == req->num_outstanding_cmds) 3116 - handle = 1; 3117 - if (!req->outstanding_cmds[handle]) 3118 - break; 3119 - } 3120 - if (index == req->num_outstanding_cmds) 3158 + handle = qla2xxx_get_next_handle(req); 3159 + if (handle == 0) 3121 3160 goto queuing_error; 3122 3161 3123 3162 /* Map the sg table so we have an accurate count of sg entries needed */ ··· 3180 3235 goto queuing_error; 3181 3236 } 3182 3237 3183 - ctx = sp->u.scmd.ctx = 3238 + ctx = sp->u.scmd.ct6_ctx = 3184 3239 mempool_alloc(ha->ctx_mempool, GFP_ATOMIC); 3185 3240 if (!ctx) { 3186 3241 ql_log(ql_log_fatal, vha, 0x3010, ··· 3376 3431 if (tot_dsds) 3377 3432 scsi_dma_unmap(cmd); 3378 3433 3379 - if (sp->u.scmd.ctx) { 3380 - mempool_free(sp->u.scmd.ctx, ha->ctx_mempool); 3381 - sp->u.scmd.ctx = NULL; 3434 + if (sp->u.scmd.crc_ctx) { 3435 + mempool_free(sp->u.scmd.crc_ctx, ha->ctx_mempool); 3436 + sp->u.scmd.crc_ctx = NULL; 3382 3437 } 3383 3438 spin_unlock_irqrestore(&ha->hardware_lock, flags); 3384 3439 ··· 3613 3668 break; 3614 3669 } 3615 3670 3671 + if (sp->start_timer) 3672 + add_timer(&sp->u.iocb_cmd.timer); 3673 + 3616 3674 wmb(); 3617 3675 qla2x00_start_iocbs(vha, qp->req); 3618 3676 done: ··· 3717 3769 struct qla_hw_data *ha = vha->hw; 3718 3770 unsigned long flags; 3719 3771 uint32_t handle; 3720 - uint32_t index; 3721 3772 uint16_t req_cnt; 3722 3773 uint16_t cnt; 3723 3774 uint32_t *clr_ptr; ··· 3741 3794 /* Acquire ring specific lock */ 3742 3795 spin_lock_irqsave(&ha->hardware_lock, flags); 3743 3796 3744 - /* Check for room in outstanding command list. */ 3745 - handle = req->current_outstanding_cmd; 3746 - for (index = 1; index < req->num_outstanding_cmds; index++) { 3747 - handle++; 3748 - if (handle == req->num_outstanding_cmds) 3749 - handle = 1; 3750 - if (!req->outstanding_cmds[handle]) 3751 - break; 3752 - } 3753 - 3754 - if (index == req->num_outstanding_cmds) { 3797 + handle = qla2xxx_get_next_handle(req); 3798 + if (handle == 0) { 3755 3799 rval = EXT_STATUS_BUSY; 3756 3800 goto queuing_error; 3757 3801 }
+11 -18
drivers/scsi/qla2xxx/qla_isr.c
··· 776 776 case MBA_LOOP_INIT_ERR: 777 777 ql_log(ql_log_warn, vha, 0x5090, 778 778 "LOOP INIT ERROR (%x).\n", mb[1]); 779 - ha->isp_ops->fw_dump(vha, 1); 780 779 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 781 780 break; 782 781 ··· 1118 1119 struct event_arg ea; 1119 1120 1120 1121 memset(&ea, 0, sizeof(ea)); 1121 - ea.event = FCME_RSCN; 1122 1122 ea.id.b24 = rscn_entry; 1123 1123 ea.id.b.rsvd_1 = rscn_entry >> 24; 1124 - qla2x00_fcport_event_handler(vha, &ea); 1124 + qla2x00_handle_rscn(vha, &ea); 1125 1125 qla2x00_post_aen_work(vha, FCH_EVT_RSCN, rscn_entry); 1126 1126 } 1127 1127 break; ··· 1512 1514 if (comp_status == CS_DATA_UNDERRUN) { 1513 1515 res = DID_OK << 16; 1514 1516 bsg_reply->reply_payload_rcv_len = 1515 - le16_to_cpu(((sts_entry_t *)pkt)->rsp_info_len); 1517 + le16_to_cpu(pkt->rsp_info_len); 1516 1518 1517 1519 ql_log(ql_log_warn, vha, 0x5048, 1518 1520 "CT pass-through-%s error comp_status=0x%x total_byte=0x%x.\n", ··· 2255 2257 struct bsg_job *bsg_job = NULL; 2256 2258 struct fc_bsg_request *bsg_request; 2257 2259 struct fc_bsg_reply *bsg_reply; 2258 - sts_entry_t *sts; 2259 - struct sts_entry_24xx *sts24; 2260 - 2261 - sts = (sts_entry_t *) pkt; 2262 - sts24 = (struct sts_entry_24xx *) pkt; 2260 + sts_entry_t *sts = pkt; 2261 + struct sts_entry_24xx *sts24 = pkt; 2263 2262 2264 2263 /* Validate handle. */ 2265 2264 if (index >= req->num_outstanding_cmds) { ··· 2402 2407 srb_t *sp; 2403 2408 fc_port_t *fcport; 2404 2409 struct scsi_cmnd *cp; 2405 - sts_entry_t *sts; 2406 - struct sts_entry_24xx *sts24; 2410 + sts_entry_t *sts = pkt; 2411 + struct sts_entry_24xx *sts24 = pkt; 2407 2412 uint16_t comp_status; 2408 2413 uint16_t scsi_status; 2409 2414 uint16_t ox_id; ··· 2421 2426 uint16_t state_flags = 0; 2422 2427 uint16_t retry_delay = 0; 2423 2428 2424 - sts = (sts_entry_t *) pkt; 2425 - sts24 = (struct sts_entry_24xx *) pkt; 2426 2429 if (IS_FWI2_CAPABLE(ha)) { 2427 2430 comp_status = le16_to_cpu(sts24->comp_status); 2428 2431 scsi_status = le16_to_cpu(sts24->scsi_status) & SS_MASK; ··· 2720 2727 "Port to be marked lost on fcport=%02x%02x%02x, current " 2721 2728 "port state= %s comp_status %x.\n", fcport->d_id.b.domain, 2722 2729 fcport->d_id.b.area, fcport->d_id.b.al_pa, 2723 - port_state_str[atomic_read(&fcport->state)], 2730 + port_state_str[FCS_ONLINE], 2724 2731 comp_status); 2725 2732 2726 2733 qla2x00_mark_device_lost(fcport->vha, fcport, 1, 1); ··· 2837 2844 if (sense_len == 0) { 2838 2845 rsp->status_srb = NULL; 2839 2846 sp->done(sp, cp->result); 2847 + } else { 2848 + WARN_ON_ONCE(true); 2840 2849 } 2841 2850 } 2842 2851 ··· 3466 3471 ha->msix_count, ret); 3467 3472 goto msix_out; 3468 3473 } else if (ret < ha->msix_count) { 3469 - ql_log(ql_log_warn, vha, 0x00c6, 3470 - "MSI-X: Failed to enable support " 3471 - "with %d vectors, using %d vectors.\n", 3472 - ha->msix_count, ret); 3474 + ql_log(ql_log_info, vha, 0x00c6, 3475 + "MSI-X: Using %d vectors\n", ret); 3473 3476 ha->msix_count = ret; 3474 3477 /* Recalculate queue values */ 3475 3478 if (ha->mqiobase && (ql2xmqsupport || ql2xnvmeenable)) {
+8 -18
drivers/scsi/qla2xxx/qla_mbx.c
··· 253 253 if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) { 254 254 set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); 255 255 256 - if (IS_P3P_TYPE(ha)) { 257 - if (RD_REG_DWORD(&reg->isp82.hint) & 258 - HINT_MBX_INT_PENDING) { 259 - ha->flags.mbox_busy = 0; 260 - spin_unlock_irqrestore(&ha->hardware_lock, 261 - flags); 262 - 263 - atomic_dec(&ha->num_pend_mbx_stage2); 264 - ql_dbg(ql_dbg_mbx, vha, 0x1010, 265 - "Pending mailbox timeout, exiting.\n"); 266 - rval = QLA_FUNCTION_TIMEOUT; 267 - goto premature_exit; 268 - } 256 + if (IS_P3P_TYPE(ha)) 269 257 WRT_REG_DWORD(&reg->isp82.hint, HINT_MBX_INT_PENDING); 270 - } else if (IS_FWI2_CAPABLE(ha)) 258 + else if (IS_FWI2_CAPABLE(ha)) 271 259 WRT_REG_DWORD(&reg->isp24.hccr, HCCRX_SET_HOST_INT); 272 260 else 273 261 WRT_REG_WORD(&reg->isp.hccr, HCCR_SET_HOST_INT); ··· 382 394 goto premature_exit; 383 395 } 384 396 385 - if (ha->mailbox_out[0] != MBS_COMMAND_COMPLETE) 397 + if (ha->mailbox_out[0] != MBS_COMMAND_COMPLETE) { 398 + ql_dbg(ql_dbg_mbx, vha, 0x11ff, 399 + "mb_out[0] = %#x <> %#x\n", ha->mailbox_out[0], 400 + MBS_COMMAND_COMPLETE); 386 401 rval = QLA_FUNCTION_FAILED; 402 + } 387 403 388 404 /* Load return mailbox registers. */ 389 405 iptr2 = mcp->mb; ··· 6205 6213 return rval; 6206 6214 } 6207 6215 6208 - static void qla2x00_async_mb_sp_done(void *s, int res) 6216 + static void qla2x00_async_mb_sp_done(srb_t *sp, int res) 6209 6217 { 6210 - struct srb *sp = s; 6211 - 6212 6218 sp->u.iocb_cmd.u.mbx.rc = res; 6213 6219 6214 6220 complete(&sp->u.iocb_cmd.u.mbx.comp);
+1 -3
drivers/scsi/qla2xxx/qla_mid.c
··· 901 901 return 0; 902 902 } 903 903 904 - static void qla_ctrlvp_sp_done(void *s, int res) 904 + static void qla_ctrlvp_sp_done(srb_t *sp, int res) 905 905 { 906 - struct srb *sp = s; 907 - 908 906 if (sp->comp) 909 907 complete(sp->comp); 910 908 /* don't free sp here. Let the caller do the free */
+30 -37
drivers/scsi/qla2xxx/qla_mr.c
··· 10 10 #include <linux/pci.h> 11 11 #include <linux/ratelimit.h> 12 12 #include <linux/vmalloc.h> 13 - #include <linux/bsg-lib.h> 14 13 #include <scsi/scsi_tcq.h> 15 14 #include <linux/utsname.h> 16 15 ··· 148 149 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code); 149 150 spin_unlock_irqrestore(&ha->hardware_lock, flags); 150 151 151 - wait_for_completion_timeout(&ha->mbx_intr_comp, mcp->tov * HZ); 152 + WARN_ON_ONCE(wait_for_completion_timeout(&ha->mbx_intr_comp, 153 + mcp->tov * HZ) != 0); 152 154 } else { 153 155 ql_dbg(ql_dbg_mbx, vha, 0x112c, 154 156 "Cmd=%x Polling Mode.\n", command); ··· 688 688 } 689 689 690 690 char * 691 - qlafx00_pci_info_str(struct scsi_qla_host *vha, char *str) 691 + qlafx00_pci_info_str(struct scsi_qla_host *vha, char *str, size_t str_len) 692 692 { 693 693 struct qla_hw_data *ha = vha->hw; 694 694 695 - if (pci_is_pcie(ha->pdev)) { 696 - strcpy(str, "PCIe iSA"); 697 - return str; 698 - } 695 + if (pci_is_pcie(ha->pdev)) 696 + strlcpy(str, "PCIe iSA", str_len); 699 697 return str; 700 698 } 701 699 ··· 1797 1799 complete(&lio->u.fxiocb.fxiocb_comp); 1798 1800 } 1799 1801 1800 - static void 1801 - qla2x00_fxdisc_sp_done(void *ptr, int res) 1802 + static void qla2x00_fxdisc_sp_done(srb_t *sp, int res) 1802 1803 { 1803 - srb_t *sp = ptr; 1804 1804 struct srb_iocb *lio = &sp->u.iocb_cmd; 1805 1805 1806 1806 complete(&lio->u.fxiocb.fxiocb_comp); ··· 1877 1881 phost_info = &preg_hsi->hsi; 1878 1882 memset(preg_hsi, 0, sizeof(struct register_host_info)); 1879 1883 phost_info->os_type = OS_TYPE_LINUX; 1880 - strncpy(phost_info->sysname, 1881 - p_sysid->sysname, SYSNAME_LENGTH); 1882 - strncpy(phost_info->nodename, 1883 - p_sysid->nodename, NODENAME_LENGTH); 1884 + strlcpy(phost_info->sysname, p_sysid->sysname, 1885 + sizeof(phost_info->sysname)); 1886 + strlcpy(phost_info->nodename, p_sysid->nodename, 1887 + sizeof(phost_info->nodename)); 1884 1888 if (!strcmp(phost_info->nodename, "(none)")) 1885 1889 ha->mr.host_info_resend = true; 1886 - strncpy(phost_info->release, 1887 - p_sysid->release, RELEASE_LENGTH); 1888 - strncpy(phost_info->version, 1889 - p_sysid->version, VERSION_LENGTH); 1890 - strncpy(phost_info->machine, 1891 - p_sysid->machine, MACHINE_LENGTH); 1892 - strncpy(phost_info->domainname, 1893 - p_sysid->domainname, DOMNAME_LENGTH); 1894 - strncpy(phost_info->hostdriver, 1895 - QLA2XXX_VERSION, VERSION_LENGTH); 1890 + strlcpy(phost_info->release, p_sysid->release, 1891 + sizeof(phost_info->release)); 1892 + strlcpy(phost_info->version, p_sysid->version, 1893 + sizeof(phost_info->version)); 1894 + strlcpy(phost_info->machine, p_sysid->machine, 1895 + sizeof(phost_info->machine)); 1896 + strlcpy(phost_info->domainname, p_sysid->domainname, 1897 + sizeof(phost_info->domainname)); 1898 + strlcpy(phost_info->hostdriver, QLA2XXX_VERSION, 1899 + sizeof(phost_info->hostdriver)); 1896 1900 preg_hsi->utc = (uint64_t)ktime_get_real_seconds(); 1897 1901 ql_dbg(ql_dbg_init, vha, 0x0149, 1898 1902 "ISP%04X: Host registration with firmware\n", ··· 1937 1941 if (fx_type == FXDISC_GET_CONFIG_INFO) { 1938 1942 struct config_info_data *pinfo = 1939 1943 (struct config_info_data *) fdisc->u.fxiocb.rsp_addr; 1940 - strcpy(vha->hw->model_number, pinfo->model_num); 1941 - strcpy(vha->hw->model_desc, pinfo->model_description); 1944 + strlcpy(vha->hw->model_number, pinfo->model_num, 1945 + ARRAY_SIZE(vha->hw->model_number)); 1946 + strlcpy(vha->hw->model_desc, pinfo->model_description, 1947 + ARRAY_SIZE(vha->hw->model_desc)); 1942 1948 memcpy(&vha->hw->mr.symbolic_name, pinfo->symbolic_name, 1943 1949 sizeof(vha->hw->mr.symbolic_name)); 1944 1950 memcpy(&vha->hw->mr.serial_num, pinfo->serial_num, ··· 2539 2541 2540 2542 if (rsp->status_srb == NULL) 2541 2543 sp->done(sp, res); 2544 + else 2545 + WARN_ON_ONCE(true); 2542 2546 } 2543 2547 2544 2548 /** ··· 2618 2618 if (sense_len == 0) { 2619 2619 rsp->status_srb = NULL; 2620 2620 sp->done(sp, cp->result); 2621 + } else { 2622 + WARN_ON_ONCE(true); 2621 2623 } 2622 2624 } 2623 2625 ··· 3075 3073 { 3076 3074 int nseg; 3077 3075 unsigned long flags; 3078 - uint32_t index; 3079 3076 uint32_t handle; 3080 3077 uint16_t cnt; 3081 3078 uint16_t req_cnt; ··· 3098 3097 /* Acquire ring specific lock */ 3099 3098 spin_lock_irqsave(&ha->hardware_lock, flags); 3100 3099 3101 - /* Check for room in outstanding command list. */ 3102 - handle = req->current_outstanding_cmd; 3103 - for (index = 1; index < req->num_outstanding_cmds; index++) { 3104 - handle++; 3105 - if (handle == req->num_outstanding_cmds) 3106 - handle = 1; 3107 - if (!req->outstanding_cmds[handle]) 3108 - break; 3109 - } 3110 - if (index == req->num_outstanding_cmds) 3100 + handle = qla2xxx_get_next_handle(req); 3101 + if (handle == 0) 3111 3102 goto queuing_error; 3112 3103 3113 3104 /* Map the sg table so we have an accurate count of sg entries needed */
+10 -22
drivers/scsi/qla2xxx/qla_nvme.c
··· 180 180 kref_put(&priv->sp->cmd_kref, qla_nvme_release_ls_cmd_kref); 181 181 } 182 182 183 - static void qla_nvme_sp_ls_done(void *ptr, int res) 183 + static void qla_nvme_sp_ls_done(srb_t *sp, int res) 184 184 { 185 - srb_t *sp = ptr; 186 - struct nvme_private *priv; 185 + struct nvme_private *priv = sp->priv; 187 186 188 187 if (WARN_ON_ONCE(kref_read(&sp->cmd_kref) == 0)) 189 188 return; ··· 190 191 if (res) 191 192 res = -EINVAL; 192 193 193 - priv = (struct nvme_private *)sp->priv; 194 194 priv->comp_status = res; 195 195 INIT_WORK(&priv->ls_work, qla_nvme_ls_complete); 196 196 schedule_work(&priv->ls_work); 197 197 } 198 198 199 199 /* it assumed that QPair lock is held. */ 200 - static void qla_nvme_sp_done(void *ptr, int res) 200 + static void qla_nvme_sp_done(srb_t *sp, int res) 201 201 { 202 - srb_t *sp = ptr; 203 - struct nvme_private *priv = (struct nvme_private *)sp->priv; 202 + struct nvme_private *priv = sp->priv; 204 203 205 204 priv->comp_status = res; 206 205 kref_put(&sp->cmd_kref, qla_nvme_release_fcp_cmd_kref); ··· 219 222 "%s called for sp=%p, hndl=%x on fcport=%p deleted=%d\n", 220 223 __func__, sp, sp->handle, fcport, fcport->deleted); 221 224 222 - if (!ha->flags.fw_started && (fcport && fcport->deleted)) 225 + if (!ha->flags.fw_started && fcport->deleted) 223 226 goto out; 224 227 225 228 if (ha->flags.host_shutting_down) { ··· 263 266 INIT_WORK(&priv->abort_work, qla_nvme_abort_work); 264 267 schedule_work(&priv->abort_work); 265 268 } 266 - 267 269 268 270 static int qla_nvme_ls_req(struct nvme_fc_local_port *lport, 269 271 struct nvme_fc_remote_port *rport, struct nvmefc_ls_req *fd) ··· 353 357 { 354 358 unsigned long flags; 355 359 uint32_t *clr_ptr; 356 - uint32_t index; 357 360 uint32_t handle; 358 361 struct cmd_nvme *cmd_pkt; 359 362 uint16_t cnt, i; ··· 376 381 /* Acquire qpair specific lock */ 377 382 spin_lock_irqsave(&qpair->qp_lock, flags); 378 383 379 - /* Check for room in outstanding command list. */ 380 - handle = req->current_outstanding_cmd; 381 - for (index = 1; index < req->num_outstanding_cmds; index++) { 382 - handle++; 383 - if (handle == req->num_outstanding_cmds) 384 - handle = 1; 385 - if (!req->outstanding_cmds[handle]) 386 - break; 387 - } 388 - 389 - if (index == req->num_outstanding_cmds) { 384 + handle = qla2xxx_get_next_handle(req); 385 + if (handle == 0) { 390 386 rval = -EBUSY; 391 387 goto queuing_error; 392 388 } ··· 639 653 "%s: unregister remoteport on %p %8phN\n", 640 654 __func__, fcport, fcport->port_name); 641 655 642 - nvme_fc_set_remoteport_devloss(fcport->nvme_remote_port, 0); 656 + if (test_bit(PFLG_DRIVER_REMOVING, &fcport->vha->pci_flags)) 657 + nvme_fc_set_remoteport_devloss(fcport->nvme_remote_port, 0); 658 + 643 659 init_completion(&fcport->nvme_del_done); 644 660 ret = nvme_fc_unregister_remoteport(fcport->nvme_remote_port); 645 661 if (ret)
+2 -3
drivers/scsi/qla2xxx/qla_nvme.h
··· 7 7 #ifndef __QLA_NVME_H 8 8 #define __QLA_NVME_H 9 9 10 - #include <linux/blk-mq.h> 11 10 #include <uapi/scsi/fc/fc_fs.h> 12 11 #include <uapi/scsi/fc/fc_els.h> 13 12 #include <linux/nvme-fc-driver.h> ··· 118 119 uint32_t exchange_address; 119 120 uint8_t d_id[3]; 120 121 uint8_t r_ctl; 121 - uint8_t s_id[3]; 122 + be_id_t s_id; 122 123 uint8_t cs_ctl; 123 124 uint8_t f_ctl[3]; 124 125 uint8_t type; ··· 143 144 void qla_nvme_delete(struct scsi_qla_host *); 144 145 void qla24xx_nvme_ls4_iocb(struct scsi_qla_host *, struct pt_ls4_request *, 145 146 struct req_que *); 146 - void qla24xx_async_gffid_sp_done(void *, int); 147 + void qla24xx_async_gffid_sp_done(struct srb *sp, int); 147 148 #endif
+13 -9
drivers/scsi/qla2xxx/qla_nx.c
··· 1977 1977 } while (--retries); 1978 1978 1979 1979 ql_log(ql_log_fatal, vha, 0x00ac, 1980 - "Rcv Peg initializatin failed: 0x%x.\n", val); 1980 + "Rcv Peg initialization failed: 0x%x.\n", val); 1981 1981 read_lock(&ha->hw_lock); 1982 1982 qla82xx_wr_32(ha, CRB_RCVPEG_STATE, PHAN_INITIALIZE_FAILED); 1983 1983 read_unlock(&ha->hw_lock); ··· 1985 1985 } 1986 1986 1987 1987 /* ISR related functions */ 1988 - static struct qla82xx_legacy_intr_set legacy_intr[] = \ 1988 + static struct qla82xx_legacy_intr_set legacy_intr[] = 1989 1989 QLA82XX_LEGACY_INTR_CONFIG; 1990 1990 1991 1991 /* ··· 2287 2287 { 2288 2288 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); 2289 2289 2290 - qla82xx_mbx_intr_disable(vha); 2290 + if (ha->interrupts_on) 2291 + qla82xx_mbx_intr_disable(vha); 2292 + 2291 2293 spin_lock_irq(&ha->hardware_lock); 2292 2294 if (IS_QLA8044(ha)) 2293 2295 qla8044_wr_reg(ha, LEG_INTR_MASK_OFFSET, 1); ··· 3288 3286 case QLA8XXX_DEV_NEED_QUIESCENT: 3289 3287 qla82xx_need_qsnt_handler(vha); 3290 3288 /* Reset timeout value after quiescence handler */ 3291 - dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout\ 3289 + dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout 3292 3290 * HZ); 3293 3291 break; 3294 3292 case QLA8XXX_DEV_QUIESCENT: ··· 3303 3301 qla82xx_idc_lock(ha); 3304 3302 3305 3303 /* Reset timeout value after quiescence handler */ 3306 - dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout\ 3304 + dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout 3307 3305 * HZ); 3308 3306 break; 3309 3307 case QLA8XXX_DEV_FAILED: ··· 3688 3686 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) { 3689 3687 sp = req->outstanding_cmds[cnt]; 3690 3688 if (sp) { 3691 - if ((!sp->u.scmd.ctx || 3689 + if ((!sp->u.scmd.crc_ctx || 3692 3690 (sp->flags & 3693 3691 SRB_FCP_CMND_DMA_VALID)) && 3694 3692 !ha->flags.isp82xx_fw_hung) { ··· 3712 3710 3713 3711 /* Wait for pending cmds (physical and virtual) to complete */ 3714 3712 if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, 3715 - WAIT_HOST)) { 3713 + WAIT_HOST) == QLA_SUCCESS) { 3716 3714 ql_dbg(ql_dbg_init, vha, 0x00b3, 3717 3715 "Done wait for " 3718 3716 "pending commands.\n"); 3717 + } else { 3718 + WARN_ON_ONCE(true); 3719 3719 } 3720 3720 } 3721 3721 } ··· 4236 4232 goto md_failed; 4237 4233 } 4238 4234 4239 - entry_hdr = (qla82xx_md_entry_hdr_t *) \ 4235 + entry_hdr = (qla82xx_md_entry_hdr_t *) 4240 4236 (((uint8_t *)ha->md_tmplt_hdr) + tmplt_hdr->first_entry_offset); 4241 4237 4242 4238 /* Walk through the entry headers */ ··· 4343 4339 data_collected = (uint8_t *)data_ptr - 4344 4340 (uint8_t *)ha->md_dump; 4345 4341 skip_nxt_entry: 4346 - entry_hdr = (qla82xx_md_entry_hdr_t *) \ 4342 + entry_hdr = (qla82xx_md_entry_hdr_t *) 4347 4343 (((uint8_t *)entry_hdr) + entry_hdr->entry_size); 4348 4344 } 4349 4345
+7 -7
drivers/scsi/qla2xxx/qla_nx.h
··· 486 486 #define QLA82XX_ADDR_QDR_NET (0x0000000300000000ULL) 487 487 #define QLA82XX_P3_ADDR_QDR_NET_MAX (0x0000000303ffffffULL) 488 488 489 - #define QLA82XX_PCI_CRBSPACE (unsigned long)0x06000000 490 - #define QLA82XX_PCI_DIRECT_CRB (unsigned long)0x04400000 491 - #define QLA82XX_PCI_CAMQM (unsigned long)0x04800000 492 - #define QLA82XX_PCI_CAMQM_MAX (unsigned long)0x04ffffff 493 - #define QLA82XX_PCI_DDR_NET (unsigned long)0x00000000 494 - #define QLA82XX_PCI_QDR_NET (unsigned long)0x04000000 495 - #define QLA82XX_PCI_QDR_NET_MAX (unsigned long)0x043fffff 489 + #define QLA82XX_PCI_CRBSPACE 0x06000000UL 490 + #define QLA82XX_PCI_DIRECT_CRB 0x04400000UL 491 + #define QLA82XX_PCI_CAMQM 0x04800000UL 492 + #define QLA82XX_PCI_CAMQM_MAX 0x04ffffffUL 493 + #define QLA82XX_PCI_DDR_NET 0x00000000UL 494 + #define QLA82XX_PCI_QDR_NET 0x04000000UL 495 + #define QLA82XX_PCI_QDR_NET_MAX 0x043fffffUL 496 496 497 497 /* 498 498 * Register offsets for MN
+1 -1
drivers/scsi/qla2xxx/qla_nx2.c
··· 2810 2810 2811 2811 #define ISP8044_PEX_DMA_ENGINE_INDEX 8 2812 2812 #define ISP8044_PEX_DMA_BASE_ADDRESS 0x77320000 2813 - #define ISP8044_PEX_DMA_NUM_OFFSET 0x10000 2813 + #define ISP8044_PEX_DMA_NUM_OFFSET 0x10000UL 2814 2814 #define ISP8044_PEX_DMA_CMD_ADDR_LOW 0x0 2815 2815 #define ISP8044_PEX_DMA_CMD_ADDR_HIGH 0x04 2816 2816 #define ISP8044_PEX_DMA_CMD_STS_AND_CNTRL 0x08
+107 -132
drivers/scsi/qla2xxx/qla_os.c
··· 69 69 "a Fabric scan. This is needed for several broken switches. " 70 70 "Default is 0 - no PLOGI. 1 - perform PLOGI."); 71 71 72 - int ql2xloginretrycount = 0; 72 + int ql2xloginretrycount; 73 73 module_param(ql2xloginretrycount, int, S_IRUGO); 74 74 MODULE_PARM_DESC(ql2xloginretrycount, 75 75 "Specify an alternate value for the NVRAM login retry count."); ··· 234 234 "0 - MiniDump disabled. " 235 235 "1 (Default) - MiniDump enabled."); 236 236 237 - int ql2xexlogins = 0; 237 + int ql2xexlogins; 238 238 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR); 239 239 MODULE_PARM_DESC(ql2xexlogins, 240 240 "Number of extended Logins. " ··· 250 250 MODULE_PARM_DESC(ql2xiniexchg, 251 251 "Number of initiator exchanges."); 252 252 253 - int ql2xfwholdabts = 0; 253 + int ql2xfwholdabts; 254 254 module_param(ql2xfwholdabts, int, S_IRUGO); 255 255 MODULE_PARM_DESC(ql2xfwholdabts, 256 256 "Allow FW to hold status IOCB until ABTS rsp received. " ··· 536 536 } 537 537 538 538 static char * 539 - qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str) 539 + qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str, size_t str_len) 540 540 { 541 541 struct qla_hw_data *ha = vha->hw; 542 - static char *pci_bus_modes[] = { 542 + static const char *const pci_bus_modes[] = { 543 543 "33", "66", "100", "133", 544 544 }; 545 545 uint16_t pci_bus; 546 546 547 - strcpy(str, "PCI"); 548 547 pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9; 549 548 if (pci_bus) { 550 - strcat(str, "-X ("); 551 - strcat(str, pci_bus_modes[pci_bus]); 549 + snprintf(str, str_len, "PCI-X (%s MHz)", 550 + pci_bus_modes[pci_bus]); 552 551 } else { 553 552 pci_bus = (ha->pci_attr & BIT_8) >> 8; 554 - strcat(str, " ("); 555 - strcat(str, pci_bus_modes[pci_bus]); 553 + snprintf(str, str_len, "PCI (%s MHz)", pci_bus_modes[pci_bus]); 556 554 } 557 - strcat(str, " MHz)"); 558 555 559 - return (str); 556 + return str; 560 557 } 561 558 562 559 static char * 563 - qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str) 560 + qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str, size_t str_len) 564 561 { 565 - static char *pci_bus_modes[] = { "33", "66", "100", "133", }; 562 + static const char *const pci_bus_modes[] = { 563 + "33", "66", "100", "133", 564 + }; 566 565 struct qla_hw_data *ha = vha->hw; 567 566 uint32_t pci_bus; 568 567 569 568 if (pci_is_pcie(ha->pdev)) { 570 - char lwstr[6]; 571 569 uint32_t lstat, lspeed, lwidth; 570 + const char *speed_str; 572 571 573 572 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat); 574 573 lspeed = lstat & PCI_EXP_LNKCAP_SLS; 575 574 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4; 576 575 577 - strcpy(str, "PCIe ("); 578 576 switch (lspeed) { 579 577 case 1: 580 - strcat(str, "2.5GT/s "); 578 + speed_str = "2.5GT/s"; 581 579 break; 582 580 case 2: 583 - strcat(str, "5.0GT/s "); 581 + speed_str = "5.0GT/s"; 584 582 break; 585 583 case 3: 586 - strcat(str, "8.0GT/s "); 584 + speed_str = "8.0GT/s"; 587 585 break; 588 586 default: 589 - strcat(str, "<unknown> "); 587 + speed_str = "<unknown>"; 590 588 break; 591 589 } 592 - snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth); 593 - strcat(str, lwstr); 590 + snprintf(str, str_len, "PCIe (%s x%d)", speed_str, lwidth); 594 591 595 592 return str; 596 593 } 597 594 598 - strcpy(str, "PCI"); 599 595 pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8; 600 - if (pci_bus == 0 || pci_bus == 8) { 601 - strcat(str, " ("); 602 - strcat(str, pci_bus_modes[pci_bus >> 3]); 603 - } else { 604 - strcat(str, "-X "); 605 - if (pci_bus & BIT_2) 606 - strcat(str, "Mode 2"); 607 - else 608 - strcat(str, "Mode 1"); 609 - strcat(str, " ("); 610 - strcat(str, pci_bus_modes[pci_bus & ~BIT_2]); 611 - } 612 - strcat(str, " MHz)"); 596 + if (pci_bus == 0 || pci_bus == 8) 597 + snprintf(str, str_len, "PCI (%s MHz)", 598 + pci_bus_modes[pci_bus >> 3]); 599 + else 600 + snprintf(str, str_len, "PCI-X Mode %d (%s MHz)", 601 + pci_bus & 4 ? 2 : 1, 602 + pci_bus_modes[pci_bus & 3]); 613 603 614 604 return str; 615 605 } ··· 652 662 return str; 653 663 } 654 664 655 - void 656 - qla2x00_sp_free_dma(void *ptr) 665 + void qla2x00_sp_free_dma(srb_t *sp) 657 666 { 658 - srb_t *sp = ptr; 659 667 struct qla_hw_data *ha = sp->vha->hw; 660 668 struct scsi_cmnd *cmd = GET_CMD_SP(sp); 661 - void *ctx = GET_CMD_CTX_SP(sp); 662 669 663 670 if (sp->flags & SRB_DMA_VALID) { 664 671 scsi_dma_unmap(cmd); ··· 668 681 sp->flags &= ~SRB_CRC_PROT_DMA_VALID; 669 682 } 670 683 671 - if (!ctx) 672 - return; 673 - 674 684 if (sp->flags & SRB_CRC_CTX_DSD_VALID) { 675 685 /* List assured to be having elements */ 676 - qla2x00_clean_dsd_pool(ha, ctx); 686 + qla2x00_clean_dsd_pool(ha, sp->u.scmd.crc_ctx); 677 687 sp->flags &= ~SRB_CRC_CTX_DSD_VALID; 678 688 } 679 689 680 690 if (sp->flags & SRB_CRC_CTX_DMA_VALID) { 681 - struct crc_context *ctx0 = ctx; 691 + struct crc_context *ctx0 = sp->u.scmd.crc_ctx; 682 692 683 693 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma); 684 694 sp->flags &= ~SRB_CRC_CTX_DMA_VALID; 685 695 } 686 696 687 697 if (sp->flags & SRB_FCP_CMND_DMA_VALID) { 688 - struct ct6_dsd *ctx1 = ctx; 698 + struct ct6_dsd *ctx1 = sp->u.scmd.ct6_ctx; 689 699 690 700 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd, 691 701 ctx1->fcp_cmnd_dma); ··· 693 709 } 694 710 } 695 711 696 - void 697 - qla2x00_sp_compl(void *ptr, int res) 712 + void qla2x00_sp_compl(srb_t *sp, int res) 698 713 { 699 - srb_t *sp = ptr; 700 714 struct scsi_cmnd *cmd = GET_CMD_SP(sp); 701 715 struct completion *comp = sp->comp; 702 716 ··· 709 727 cmd->scsi_done(cmd); 710 728 if (comp) 711 729 complete(comp); 712 - qla2x00_rel_sp(sp); 713 730 } 714 731 715 - void 716 - qla2xxx_qpair_sp_free_dma(void *ptr) 732 + void qla2xxx_qpair_sp_free_dma(srb_t *sp) 717 733 { 718 - srb_t *sp = (srb_t *)ptr; 719 734 struct scsi_cmnd *cmd = GET_CMD_SP(sp); 720 735 struct qla_hw_data *ha = sp->fcport->vha->hw; 721 - void *ctx = GET_CMD_CTX_SP(sp); 722 736 723 737 if (sp->flags & SRB_DMA_VALID) { 724 738 scsi_dma_unmap(cmd); ··· 727 749 sp->flags &= ~SRB_CRC_PROT_DMA_VALID; 728 750 } 729 751 730 - if (!ctx) 731 - return; 732 - 733 752 if (sp->flags & SRB_CRC_CTX_DSD_VALID) { 734 753 /* List assured to be having elements */ 735 - qla2x00_clean_dsd_pool(ha, ctx); 754 + qla2x00_clean_dsd_pool(ha, sp->u.scmd.crc_ctx); 736 755 sp->flags &= ~SRB_CRC_CTX_DSD_VALID; 737 756 } 738 757 739 758 if (sp->flags & SRB_DIF_BUNDL_DMA_VALID) { 740 - struct crc_context *difctx = ctx; 759 + struct crc_context *difctx = sp->u.scmd.crc_ctx; 741 760 struct dsd_dma *dif_dsd, *nxt_dsd; 742 761 743 762 list_for_each_entry_safe(dif_dsd, nxt_dsd, ··· 770 795 } 771 796 772 797 if (sp->flags & SRB_FCP_CMND_DMA_VALID) { 773 - struct ct6_dsd *ctx1 = ctx; 798 + struct ct6_dsd *ctx1 = sp->u.scmd.ct6_ctx; 774 799 775 800 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd, 776 801 ctx1->fcp_cmnd_dma); ··· 782 807 } 783 808 784 809 if (sp->flags & SRB_CRC_CTX_DMA_VALID) { 785 - struct crc_context *ctx0 = ctx; 810 + struct crc_context *ctx0 = sp->u.scmd.crc_ctx; 786 811 787 - dma_pool_free(ha->dl_dma_pool, ctx, ctx0->crc_ctx_dma); 812 + dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma); 788 813 sp->flags &= ~SRB_CRC_CTX_DMA_VALID; 789 814 } 790 815 } 791 816 792 - void 793 - qla2xxx_qpair_sp_compl(void *ptr, int res) 817 + void qla2xxx_qpair_sp_compl(srb_t *sp, int res) 794 818 { 795 - srb_t *sp = ptr; 796 819 struct scsi_cmnd *cmd = GET_CMD_SP(sp); 797 820 struct completion *comp = sp->comp; 798 821 ··· 805 832 cmd->scsi_done(cmd); 806 833 if (comp) 807 834 complete(comp); 808 - qla2xxx_rel_qpair_sp(sp->qpair, sp); 809 835 } 810 836 811 837 static int ··· 817 845 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); 818 846 srb_t *sp; 819 847 int rval; 820 - struct qla_qpair *qpair = NULL; 821 - uint32_t tag; 822 - uint16_t hwq; 823 848 824 849 if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags)) || 825 850 WARN_ON_ONCE(!rport)) { ··· 825 856 } 826 857 827 858 if (ha->mqenable) { 859 + uint32_t tag; 860 + uint16_t hwq; 861 + struct qla_qpair *qpair = NULL; 862 + 828 863 tag = blk_mq_unique_tag(cmd->request); 829 864 hwq = blk_mq_unique_tag_to_hwq(tag); 830 865 qpair = ha->queue_pair_map[hwq]; ··· 898 925 else 899 926 goto qc24_target_busy; 900 927 901 - sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC); 902 - if (!sp) 903 - goto qc24_host_busy; 928 + sp = scsi_cmd_priv(cmd); 929 + qla2xxx_init_sp(sp, vha, vha->hw->base_qpair, fcport); 904 930 905 931 sp->u.scmd.cmd = cmd; 906 932 sp->type = SRB_SCSI_CMD; ··· 919 947 920 948 qc24_host_busy_free_sp: 921 949 sp->free(sp); 922 - 923 - qc24_host_busy: 924 - return SCSI_MLQUEUE_HOST_BUSY; 925 950 926 951 qc24_target_busy: 927 952 return SCSI_MLQUEUE_TARGET_BUSY; ··· 980 1011 else 981 1012 goto qc24_target_busy; 982 1013 983 - sp = qla2xxx_get_qpair_sp(vha, qpair, fcport, GFP_ATOMIC); 984 - if (!sp) 985 - goto qc24_host_busy; 1014 + sp = scsi_cmd_priv(cmd); 1015 + qla2xxx_init_sp(sp, vha, qpair, fcport); 986 1016 987 1017 sp->u.scmd.cmd = cmd; 988 1018 sp->type = SRB_SCSI_CMD; ··· 1005 1037 qc24_host_busy_free_sp: 1006 1038 sp->free(sp); 1007 1039 1008 - qc24_host_busy: 1009 - return SCSI_MLQUEUE_HOST_BUSY; 1010 - 1011 1040 qc24_target_busy: 1012 1041 return SCSI_MLQUEUE_TARGET_BUSY; 1013 1042 ··· 1023 1058 * cmd = Scsi Command to wait on. 1024 1059 * 1025 1060 * Return: 1026 - * Not Found : 0 1027 - * Found : 1 1061 + * Completed in time : QLA_SUCCESS 1062 + * Did not complete in time : QLA_FUNCTION_FAILED 1028 1063 */ 1029 1064 static int 1030 1065 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd) ··· 1234 1269 qla2xxx_eh_abort(struct scsi_cmnd *cmd) 1235 1270 { 1236 1271 scsi_qla_host_t *vha = shost_priv(cmd->device->host); 1272 + DECLARE_COMPLETION_ONSTACK(comp); 1237 1273 srb_t *sp; 1238 1274 int ret; 1239 1275 unsigned int id; 1240 1276 uint64_t lun; 1241 - unsigned long flags; 1242 1277 int rval; 1243 1278 struct qla_hw_data *ha = vha->hw; 1244 - struct qla_qpair *qpair; 1245 1279 1246 1280 if (qla2x00_isp_reg_stat(ha)) { 1247 1281 ql_log(ql_log_info, vha, 0x8042, ··· 1252 1288 if (ret != 0) 1253 1289 return ret; 1254 1290 1255 - sp = (srb_t *) CMD_SP(cmd); 1256 - if (!sp) 1291 + sp = scsi_cmd_priv(cmd); 1292 + 1293 + if (sp->fcport && sp->fcport->deleted) 1257 1294 return SUCCESS; 1258 1295 1259 - qpair = sp->qpair; 1260 - if (!qpair) 1296 + /* Return if the command has already finished. */ 1297 + if (sp_get(sp)) 1261 1298 return SUCCESS; 1262 - 1263 - spin_lock_irqsave(qpair->qp_lock_ptr, flags); 1264 - if (sp->type != SRB_SCSI_CMD || GET_CMD_SP(sp) != cmd) { 1265 - /* there's a chance an interrupt could clear 1266 - the ptr as part of done & free */ 1267 - spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 1268 - return SUCCESS; 1269 - } 1270 - 1271 - if (sp_get(sp)){ 1272 - /* ref_count is already 0 */ 1273 - spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 1274 - return SUCCESS; 1275 - } 1276 - spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 1277 1299 1278 1300 id = cmd->device->id; 1279 1301 lun = cmd->device->lun; ··· 1281 1331 sp->done(sp, DID_ABORT << 16); 1282 1332 ret = SUCCESS; 1283 1333 break; 1334 + case QLA_FUNCTION_PARAMETER_ERROR: { 1335 + /* Wait for the command completion. */ 1336 + uint32_t ratov = ha->r_a_tov/10; 1337 + uint32_t ratov_j = msecs_to_jiffies(4 * ratov * 1000); 1338 + 1339 + WARN_ON_ONCE(sp->comp); 1340 + sp->comp = &comp; 1341 + if (!wait_for_completion_timeout(&comp, ratov_j)) { 1342 + ql_dbg(ql_dbg_taskm, vha, 0xffff, 1343 + "%s: Abort wait timer (4 * R_A_TOV[%d]) expired\n", 1344 + __func__, ha->r_a_tov); 1345 + ret = FAILED; 1346 + } else { 1347 + ret = SUCCESS; 1348 + } 1349 + break; 1350 + } 1284 1351 default: 1285 1352 /* 1286 1353 * Either abort failed or abort and completion raced. Let ··· 1307 1340 break; 1308 1341 } 1309 1342 1343 + sp->comp = NULL; 1344 + atomic_dec(&sp->ref_count); 1310 1345 ql_log(ql_log_info, vha, 0x801c, 1311 1346 "Abort command issued nexus=%ld:%d:%llu -- %x.\n", 1312 1347 vha->host_no, id, lun, ret); ··· 1316 1347 return ret; 1317 1348 } 1318 1349 1350 + /* 1351 + * Returns: QLA_SUCCESS or QLA_FUNCTION_FAILED. 1352 + */ 1319 1353 int 1320 1354 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t, 1321 1355 uint64_t l, enum nexus_wait_type type) ··· 1391 1419 err = fc_block_scsi_eh(cmd); 1392 1420 if (err != 0) 1393 1421 return err; 1422 + 1423 + if (fcport->deleted) 1424 + return SUCCESS; 1394 1425 1395 1426 ql_log(ql_log_info, vha, 0x8009, 1396 1427 "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no, ··· 1508 1533 if (ret != 0) 1509 1534 return ret; 1510 1535 ret = FAILED; 1536 + 1537 + if (qla2x00_chip_is_down(vha)) 1538 + return ret; 1511 1539 1512 1540 ql_log(ql_log_info, vha, 0x8012, 1513 1541 "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun); ··· 1724 1746 spin_lock_irqsave(qp->qp_lock_ptr, *flags); 1725 1747 sp->comp = NULL; 1726 1748 } 1749 + 1750 + atomic_dec(&sp->ref_count); 1727 1751 } 1728 1752 1729 1753 static void ··· 1780 1800 int que; 1781 1801 struct qla_hw_data *ha = vha->hw; 1782 1802 1803 + /* Continue only if initialization complete. */ 1804 + if (!ha->base_qpair) 1805 + return; 1783 1806 __qla2x00_abort_all_cmds(ha->base_qpair, res); 1784 1807 1808 + if (!ha->queue_pair_map) 1809 + return; 1785 1810 for (que = 0; que < ha->max_qpairs; que++) { 1786 1811 if (!ha->queue_pair_map[que]) 1787 1812 continue; ··· 2462 2477 .config_rings = qla24xx_config_rings, 2463 2478 .reset_adapter = qla24xx_reset_adapter, 2464 2479 .nvram_config = qla81xx_nvram_config, 2465 - .update_fw_options = qla81xx_update_fw_options, 2480 + .update_fw_options = qla24xx_update_fw_options, 2466 2481 .load_risc = qla81xx_load_risc, 2467 2482 .pci_info_str = qla24xx_pci_info_str, 2468 2483 .fw_version_str = qla24xx_fw_version_str, ··· 3139 3154 ql_log(ql_log_fatal, base_vha, 0x003d, 3140 3155 "Failed to allocate memory for queue pointers..." 3141 3156 "aborting.\n"); 3157 + ret = -ENODEV; 3142 3158 goto probe_failed; 3143 3159 } 3144 3160 ··· 3404 3418 "QLogic %s - %s.\n", ha->model_number, ha->model_desc); 3405 3419 ql_log(ql_log_info, base_vha, 0x00fc, 3406 3420 "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n", 3407 - pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info), 3421 + pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info, 3422 + sizeof(pci_info)), 3408 3423 pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-', 3409 3424 base_vha->host_no, 3410 3425 ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str))); ··· 4585 4598 4586 4599 ha->fce = NULL; 4587 4600 ha->fce_dma = 0; 4601 + ha->flags.fce_enabled = 0; 4588 4602 ha->eft = NULL; 4589 4603 ha->eft_dma = 0; 4590 4604 ha->fw_dumped = 0; ··· 4704 4716 mempool_destroy(ha->ctx_mempool); 4705 4717 ha->ctx_mempool = NULL; 4706 4718 4707 - if (ql2xenabledif) { 4719 + if (ql2xenabledif && ha->dif_bundl_pool) { 4708 4720 struct dsd_dma *dsd, *nxt; 4709 4721 4710 4722 list_for_each_entry_safe(dsd, nxt, &ha->pool.unusable.head, ··· 4727 4739 } 4728 4740 } 4729 4741 4730 - if (ha->dif_bundl_pool) 4731 - dma_pool_destroy(ha->dif_bundl_pool); 4742 + dma_pool_destroy(ha->dif_bundl_pool); 4732 4743 ha->dif_bundl_pool = NULL; 4733 4744 4734 4745 qlt_mem_free(ha); ··· 4799 4812 if (!vha->gnl.l) { 4800 4813 ql_log(ql_log_fatal, vha, 0xd04a, 4801 4814 "Alloc failed for name list.\n"); 4802 - scsi_remove_host(vha->host); 4815 + scsi_host_put(vha->host); 4803 4816 return NULL; 4804 4817 } 4805 4818 ··· 4812 4825 dma_free_coherent(&ha->pdev->dev, vha->gnl.size, 4813 4826 vha->gnl.l, vha->gnl.ldma); 4814 4827 vha->gnl.l = NULL; 4815 - scsi_remove_host(vha->host); 4828 + scsi_host_put(vha->host); 4816 4829 return NULL; 4817 4830 } 4818 4831 INIT_DELAYED_WORK(&vha->scan.scan_work, qla_scan_work_fn); ··· 5041 5054 "%s %8phC mem alloc fail.\n", 5042 5055 __func__, e->u.new_sess.port_name); 5043 5056 5044 - if (pla) 5057 + if (pla) { 5058 + list_del(&pla->list); 5045 5059 kmem_cache_free(qla_tgt_plogi_cachep, pla); 5060 + } 5046 5061 return; 5047 5062 } 5048 5063 ··· 5075 5086 if (fcport) { 5076 5087 fcport->id_changed = 1; 5077 5088 fcport->scan_state = QLA_FCPORT_FOUND; 5089 + fcport->chip_reset = vha->hw->base_qpair->chip_reset; 5078 5090 memcpy(fcport->node_name, e->u.new_sess.node_name, WWN_SIZE); 5079 5091 5080 5092 if (pla) { ··· 5155 5165 5156 5166 if (free_fcport) { 5157 5167 qla2x00_free_fcport(fcport); 5158 - if (pla) 5168 + if (pla) { 5169 + list_del(&pla->list); 5159 5170 kmem_cache_free(qla_tgt_plogi_cachep, pla); 5171 + } 5160 5172 } 5161 5173 } 5162 5174 ··· 5338 5346 } else { 5339 5347 if (vha->hw->current_topology != ISP_CFG_NL) { 5340 5348 memset(&ea, 0, sizeof(ea)); 5341 - ea.event = FCME_RELOGIN; 5342 5349 ea.fcport = fcport; 5343 - qla2x00_fcport_event_handler(vha, &ea); 5350 + qla24xx_handle_relogin_event(vha, &ea); 5344 5351 } else if (vha->hw->current_topology == 5345 5352 ISP_CFG_NL) { 5346 5353 fcport->login_retry--; ··· 5677 5686 void 5678 5687 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id) 5679 5688 { 5680 - uint16_t options = (requester_id << 15) | BIT_6; 5681 5689 uint32_t data; 5682 5690 uint32_t lock_owner; 5683 5691 struct qla_hw_data *ha = base_vha->hw; ··· 5706 5716 "IDC Lock recovery FAILED.\n"); 5707 5717 } 5708 5718 5709 - } 5710 - 5711 - return; 5712 - 5713 - /* XXX: IDC-lock implementation using access-control mbx */ 5714 - retry_lock2: 5715 - if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) { 5716 - ql_dbg(ql_dbg_p3p, base_vha, 0xb072, 5717 - "Failed to acquire IDC lock. retrying...\n"); 5718 - /* Retry/Perform IDC-Lock recovery */ 5719 - if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) { 5720 - qla83xx_wait_logic(); 5721 - goto retry_lock2; 5722 - } else 5723 - ql_log(ql_log_warn, base_vha, 0xb076, 5724 - "IDC Lock recovery FAILED.\n"); 5725 5719 } 5726 5720 5727 5721 return; ··· 7130 7156 7131 7157 .supported_mode = MODE_INITIATOR, 7132 7158 .track_queue_depth = 1, 7159 + .cmd_size = sizeof(srb_t), 7133 7160 }; 7134 7161 7135 7162 static const struct pci_error_handlers qla2xxx_err_handler = {
+9 -7
drivers/scsi/qla2xxx/qla_sup.c
··· 473 473 return QLA_FUNCTION_TIMEOUT; 474 474 } 475 475 476 - uint32_t * 476 + int 477 477 qla24xx_read_flash_data(scsi_qla_host_t *vha, uint32_t *dwptr, uint32_t faddr, 478 478 uint32_t dwords) 479 479 { 480 480 ulong i; 481 + int ret = QLA_SUCCESS; 481 482 struct qla_hw_data *ha = vha->hw; 482 483 483 484 /* Dword reads to flash. */ 484 485 faddr = flash_data_addr(ha, faddr); 485 486 for (i = 0; i < dwords; i++, faddr++, dwptr++) { 486 - if (qla24xx_read_flash_dword(ha, faddr, dwptr)) 487 + ret = qla24xx_read_flash_dword(ha, faddr, dwptr); 488 + if (ret != QLA_SUCCESS) 487 489 break; 488 490 cpu_to_le32s(dwptr); 489 491 } 490 492 491 - return dwptr; 493 + return ret; 492 494 } 493 495 494 496 static int ··· 682 680 683 681 ha->flt_region_flt = flt_addr; 684 682 wptr = (uint16_t *)ha->flt; 685 - qla24xx_read_flash_data(vha, (void *)flt, flt_addr, 686 - (sizeof(struct qla_flt_header) + FLT_REGIONS_SIZE) >> 2); 683 + ha->isp_ops->read_optrom(vha, (void *)flt, flt_addr << 2, 684 + (sizeof(struct qla_flt_header) + FLT_REGIONS_SIZE)); 687 685 688 686 if (le16_to_cpu(*wptr) == 0xffff) 689 687 goto no_flash_data; ··· 950 948 struct req_que *req = ha->req_q_map[0]; 951 949 uint16_t cnt, chksum; 952 950 uint16_t *wptr = (void *)req->ring; 953 - struct qla_fdt_layout *fdt = (void *)req->ring; 951 + struct qla_fdt_layout *fdt = (struct qla_fdt_layout *)req->ring; 954 952 uint8_t man_id, flash_id; 955 953 uint16_t mid = 0, fid = 0; 956 954 957 - qla24xx_read_flash_data(vha, (void *)fdt, ha->flt_region_fdt, 955 + ha->isp_ops->read_optrom(vha, fdt, ha->flt_region_fdt << 2, 958 956 OPTROM_BURST_DWORDS); 959 957 if (le16_to_cpu(*wptr) == 0xffff) 960 958 goto no_flash_data;
+82 -130
drivers/scsi/qla2xxx/qla_target.c
··· 188 188 189 189 static inline 190 190 struct scsi_qla_host *qlt_find_host_by_d_id(struct scsi_qla_host *vha, 191 - uint8_t *d_id) 191 + be_id_t d_id) 192 192 { 193 193 struct scsi_qla_host *host; 194 - uint32_t key = 0; 194 + uint32_t key; 195 195 196 - if ((vha->d_id.b.area == d_id[1]) && (vha->d_id.b.domain == d_id[0]) && 197 - (vha->d_id.b.al_pa == d_id[2])) 196 + if (vha->d_id.b.area == d_id.area && 197 + vha->d_id.b.domain == d_id.domain && 198 + vha->d_id.b.al_pa == d_id.al_pa) 198 199 return vha; 199 200 200 - key = (uint32_t)d_id[0] << 16; 201 - key |= (uint32_t)d_id[1] << 8; 202 - key |= (uint32_t)d_id[2]; 201 + key = be_to_port_id(d_id).b24; 203 202 204 203 host = btree_lookup32(&vha->hw->tgt.host_map, key); 205 204 if (!host) ··· 356 357 ql_dbg(ql_dbg_tgt, vha, 0xe03e, 357 358 "qla_target(%d): Received ATIO_TYPE7 " 358 359 "with unknown d_id %x:%x:%x\n", vha->vp_idx, 359 - atio->u.isp24.fcp_hdr.d_id[0], 360 - atio->u.isp24.fcp_hdr.d_id[1], 361 - atio->u.isp24.fcp_hdr.d_id[2]); 360 + atio->u.isp24.fcp_hdr.d_id.domain, 361 + atio->u.isp24.fcp_hdr.d_id.area, 362 + atio->u.isp24.fcp_hdr.d_id.al_pa); 362 363 363 364 364 365 qlt_queue_unknown_atio(vha, atio, ha_locked); ··· 559 560 return qla2x00_post_work(vha, e); 560 561 } 561 562 562 - static 563 - void qla2x00_async_nack_sp_done(void *s, int res) 563 + static void qla2x00_async_nack_sp_done(srb_t *sp, int res) 564 564 { 565 - struct srb *sp = (struct srb *)s; 566 565 struct scsi_qla_host *vha = sp->vha; 567 566 unsigned long flags; 568 567 ··· 785 788 struct imm_ntfy_from_isp *iocb) 786 789 { 787 790 struct qlt_plogi_ack_t *pla; 791 + 792 + lockdep_assert_held(&vha->hw->hardware_lock); 788 793 789 794 list_for_each_entry(pla, &vha->plogi_ack_list, list) { 790 795 if (pla->id.b24 == id->b24) { ··· 1208 1209 sess->logout_on_delete = 0; 1209 1210 sess->logo_ack_needed = 0; 1210 1211 sess->fw_login_state = DSC_LS_PORT_UNAVAIL; 1211 - sess->scan_state = 0; 1212 1212 } 1213 1213 } 1214 1214 ··· 1282 1284 /* At this point tgt could be already dead */ 1283 1285 } 1284 1286 1285 - static int qla24xx_get_loop_id(struct scsi_qla_host *vha, const uint8_t *s_id, 1287 + static int qla24xx_get_loop_id(struct scsi_qla_host *vha, be_id_t s_id, 1286 1288 uint16_t *loop_id) 1287 1289 { 1288 1290 struct qla_hw_data *ha = vha->hw; 1289 1291 dma_addr_t gid_list_dma; 1290 - struct gid_list_info *gid_list; 1291 - char *id_iter; 1292 + struct gid_list_info *gid_list, *gid; 1292 1293 int res, rc, i; 1293 1294 uint16_t entries; 1294 1295 ··· 1310 1313 goto out_free_id_list; 1311 1314 } 1312 1315 1313 - id_iter = (char *)gid_list; 1316 + gid = gid_list; 1314 1317 res = -ENOENT; 1315 1318 for (i = 0; i < entries; i++) { 1316 - struct gid_list_info *gid = (struct gid_list_info *)id_iter; 1317 - 1318 - if ((gid->al_pa == s_id[2]) && 1319 - (gid->area == s_id[1]) && 1320 - (gid->domain == s_id[0])) { 1319 + if (gid->al_pa == s_id.al_pa && 1320 + gid->area == s_id.area && 1321 + gid->domain == s_id.domain) { 1321 1322 *loop_id = le16_to_cpu(gid->loop_id); 1322 1323 res = 0; 1323 1324 break; 1324 1325 } 1325 - id_iter += ha->gid_list_info_size; 1326 + gid = (void *)gid + ha->gid_list_info_size; 1326 1327 } 1327 1328 1328 1329 out_free_id_list: ··· 1577 1582 struct qla_qpair_hint *h; 1578 1583 struct qla_hw_data *ha = vha->hw; 1579 1584 1580 - if ((vha->vha_tgt.qla_tgt != NULL) && !tgt->tgt_stop && 1581 - !tgt->tgt_stopped) 1585 + if (!tgt->tgt_stop && !tgt->tgt_stopped) 1582 1586 qlt_stop_phase1(tgt); 1583 1587 1584 - if ((vha->vha_tgt.qla_tgt != NULL) && !tgt->tgt_stopped) 1588 + if (!tgt->tgt_stopped) 1585 1589 qlt_stop_phase2(tgt); 1586 1590 1587 1591 for (i = 0; i < vha->hw->max_qpairs + 1; i++) { ··· 1766 1772 resp->fcp_hdr_le.f_ctl[1] = *p++; 1767 1773 resp->fcp_hdr_le.f_ctl[2] = *p; 1768 1774 1769 - resp->fcp_hdr_le.d_id[0] = abts->fcp_hdr_le.s_id[0]; 1770 - resp->fcp_hdr_le.d_id[1] = abts->fcp_hdr_le.s_id[1]; 1771 - resp->fcp_hdr_le.d_id[2] = abts->fcp_hdr_le.s_id[2]; 1772 - resp->fcp_hdr_le.s_id[0] = abts->fcp_hdr_le.d_id[0]; 1773 - resp->fcp_hdr_le.s_id[1] = abts->fcp_hdr_le.d_id[1]; 1774 - resp->fcp_hdr_le.s_id[2] = abts->fcp_hdr_le.d_id[2]; 1775 + resp->fcp_hdr_le.d_id = abts->fcp_hdr_le.s_id; 1776 + resp->fcp_hdr_le.s_id = abts->fcp_hdr_le.d_id; 1775 1777 1776 1778 resp->exchange_addr_to_abort = abts->exchange_addr_to_abort; 1777 1779 if (mcmd->fc_tm_rsp == FCP_TMF_CMPL) { ··· 1838 1848 resp->fcp_hdr_le.f_ctl[1] = *p++; 1839 1849 resp->fcp_hdr_le.f_ctl[2] = *p; 1840 1850 if (ids_reversed) { 1841 - resp->fcp_hdr_le.d_id[0] = abts->fcp_hdr_le.d_id[0]; 1842 - resp->fcp_hdr_le.d_id[1] = abts->fcp_hdr_le.d_id[1]; 1843 - resp->fcp_hdr_le.d_id[2] = abts->fcp_hdr_le.d_id[2]; 1844 - resp->fcp_hdr_le.s_id[0] = abts->fcp_hdr_le.s_id[0]; 1845 - resp->fcp_hdr_le.s_id[1] = abts->fcp_hdr_le.s_id[1]; 1846 - resp->fcp_hdr_le.s_id[2] = abts->fcp_hdr_le.s_id[2]; 1851 + resp->fcp_hdr_le.d_id = abts->fcp_hdr_le.d_id; 1852 + resp->fcp_hdr_le.s_id = abts->fcp_hdr_le.s_id; 1847 1853 } else { 1848 - resp->fcp_hdr_le.d_id[0] = abts->fcp_hdr_le.s_id[0]; 1849 - resp->fcp_hdr_le.d_id[1] = abts->fcp_hdr_le.s_id[1]; 1850 - resp->fcp_hdr_le.d_id[2] = abts->fcp_hdr_le.s_id[2]; 1851 - resp->fcp_hdr_le.s_id[0] = abts->fcp_hdr_le.d_id[0]; 1852 - resp->fcp_hdr_le.s_id[1] = abts->fcp_hdr_le.d_id[1]; 1853 - resp->fcp_hdr_le.s_id[2] = abts->fcp_hdr_le.d_id[2]; 1854 + resp->fcp_hdr_le.d_id = abts->fcp_hdr_le.s_id; 1855 + resp->fcp_hdr_le.s_id = abts->fcp_hdr_le.d_id; 1854 1856 } 1855 1857 resp->exchange_addr_to_abort = abts->exchange_addr_to_abort; 1856 1858 if (status == FCP_TMF_CMPL) { ··· 1909 1927 tmp = (CTIO7_FLAGS_STATUS_MODE_1 | CTIO7_FLAGS_TERMINATE); 1910 1928 1911 1929 if (mcmd) { 1912 - ctio->initiator_id[0] = entry->fcp_hdr_le.s_id[0]; 1913 - ctio->initiator_id[1] = entry->fcp_hdr_le.s_id[1]; 1914 - ctio->initiator_id[2] = entry->fcp_hdr_le.s_id[2]; 1930 + ctio->initiator_id = entry->fcp_hdr_le.s_id; 1915 1931 1916 1932 if (mcmd->flags & QLA24XX_MGMT_ABORT_IO_ATTR_VALID) 1917 1933 tmp |= (mcmd->abort_io_attr << 9); 1918 1934 else if (qpair->retry_term_cnt & 1) 1919 1935 tmp |= (0x4 << 9); 1920 1936 } else { 1921 - ctio->initiator_id[0] = entry->fcp_hdr_le.d_id[0]; 1922 - ctio->initiator_id[1] = entry->fcp_hdr_le.d_id[1]; 1923 - ctio->initiator_id[2] = entry->fcp_hdr_le.d_id[2]; 1937 + ctio->initiator_id = entry->fcp_hdr_le.d_id; 1924 1938 1925 1939 if (qpair->retry_term_cnt & 1) 1926 1940 tmp |= (0x4 << 9); ··· 1950 1972 * XXX does not go through the list of other port (which may have cmds 1951 1973 * for the same lun) 1952 1974 */ 1953 - static void abort_cmds_for_lun(struct scsi_qla_host *vha, 1954 - u64 lun, uint8_t *s_id) 1975 + static void abort_cmds_for_lun(struct scsi_qla_host *vha, u64 lun, be_id_t s_id) 1955 1976 { 1956 1977 struct qla_tgt_sess_op *op; 1957 1978 struct qla_tgt_cmd *cmd; ··· 2126 2149 struct qla_hw_data *ha = vha->hw; 2127 2150 struct fc_port *sess; 2128 2151 uint32_t tag = abts->exchange_addr_to_abort; 2129 - uint8_t s_id[3]; 2152 + be_id_t s_id; 2130 2153 int rc; 2131 2154 unsigned long flags; 2132 2155 ··· 2150 2173 2151 2174 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf011, 2152 2175 "qla_target(%d): task abort (s_id=%x:%x:%x, " 2153 - "tag=%d, param=%x)\n", vha->vp_idx, abts->fcp_hdr_le.s_id[2], 2154 - abts->fcp_hdr_le.s_id[1], abts->fcp_hdr_le.s_id[0], tag, 2176 + "tag=%d, param=%x)\n", vha->vp_idx, abts->fcp_hdr_le.s_id.domain, 2177 + abts->fcp_hdr_le.s_id.area, abts->fcp_hdr_le.s_id.al_pa, tag, 2155 2178 le32_to_cpu(abts->fcp_hdr_le.parameter)); 2156 2179 2157 - s_id[0] = abts->fcp_hdr_le.s_id[2]; 2158 - s_id[1] = abts->fcp_hdr_le.s_id[1]; 2159 - s_id[2] = abts->fcp_hdr_le.s_id[0]; 2180 + s_id = le_id_to_be(abts->fcp_hdr_le.s_id); 2160 2181 2161 2182 spin_lock_irqsave(&ha->tgt.sess_lock, flags); 2162 2183 sess = ha->tgt.tgt_ops->find_sess_by_s_id(vha, s_id); ··· 2218 2243 ctio->nport_handle = mcmd->sess->loop_id; 2219 2244 ctio->timeout = cpu_to_le16(QLA_TGT_TIMEOUT); 2220 2245 ctio->vp_index = ha->vp_idx; 2221 - ctio->initiator_id[0] = atio->u.isp24.fcp_hdr.s_id[2]; 2222 - ctio->initiator_id[1] = atio->u.isp24.fcp_hdr.s_id[1]; 2223 - ctio->initiator_id[2] = atio->u.isp24.fcp_hdr.s_id[0]; 2246 + ctio->initiator_id = be_id_to_le(atio->u.isp24.fcp_hdr.s_id); 2224 2247 ctio->exchange_addr = atio->u.isp24.exchange_addr; 2225 2248 temp = (atio->u.isp24.attr << 9)| 2226 2249 CTIO7_FLAGS_STATUS_MODE_1 | CTIO7_FLAGS_SEND_STATUS; ··· 2275 2302 ctio->nport_handle = cmd->sess->loop_id; 2276 2303 ctio->timeout = cpu_to_le16(QLA_TGT_TIMEOUT); 2277 2304 ctio->vp_index = vha->vp_idx; 2278 - ctio->initiator_id[0] = atio->u.isp24.fcp_hdr.s_id[2]; 2279 - ctio->initiator_id[1] = atio->u.isp24.fcp_hdr.s_id[1]; 2280 - ctio->initiator_id[2] = atio->u.isp24.fcp_hdr.s_id[0]; 2305 + ctio->initiator_id = be_id_to_le(atio->u.isp24.fcp_hdr.s_id); 2281 2306 ctio->exchange_addr = atio->u.isp24.exchange_addr; 2282 2307 temp = (atio->u.isp24.attr << 9) | 2283 2308 CTIO7_FLAGS_STATUS_MODE_1 | CTIO7_FLAGS_SEND_STATUS; ··· 2576 2605 pkt->handle |= CTIO_COMPLETION_HANDLE_MARK; 2577 2606 pkt->nport_handle = cpu_to_le16(prm->cmd->loop_id); 2578 2607 pkt->timeout = cpu_to_le16(QLA_TGT_TIMEOUT); 2579 - pkt->initiator_id[0] = atio->u.isp24.fcp_hdr.s_id[2]; 2580 - pkt->initiator_id[1] = atio->u.isp24.fcp_hdr.s_id[1]; 2581 - pkt->initiator_id[2] = atio->u.isp24.fcp_hdr.s_id[0]; 2608 + pkt->initiator_id = be_id_to_le(atio->u.isp24.fcp_hdr.s_id); 2582 2609 pkt->exchange_addr = atio->u.isp24.exchange_addr; 2583 2610 temp = atio->u.isp24.attr << 9; 2584 2611 pkt->u.status0.flags |= cpu_to_le16(temp); ··· 3089 3120 pkt->handle |= CTIO_COMPLETION_HANDLE_MARK; 3090 3121 pkt->nport_handle = cpu_to_le16(prm->cmd->loop_id); 3091 3122 pkt->timeout = cpu_to_le16(QLA_TGT_TIMEOUT); 3092 - pkt->initiator_id[0] = atio->u.isp24.fcp_hdr.s_id[2]; 3093 - pkt->initiator_id[1] = atio->u.isp24.fcp_hdr.s_id[1]; 3094 - pkt->initiator_id[2] = atio->u.isp24.fcp_hdr.s_id[0]; 3123 + pkt->initiator_id = be_id_to_le(atio->u.isp24.fcp_hdr.s_id); 3095 3124 pkt->exchange_addr = atio->u.isp24.exchange_addr; 3096 3125 3097 3126 /* silence compile warning */ ··· 3131 3164 pkt->crc_context_len = CRC_CONTEXT_LEN_FW; 3132 3165 3133 3166 if (!bundling) { 3134 - cur_dsd = &crc_ctx_pkt->u.nobundling.data_dsd; 3167 + cur_dsd = &crc_ctx_pkt->u.nobundling.data_dsd[0]; 3135 3168 } else { 3136 3169 /* 3137 3170 * Configure Bundling if we need to fetch interlaving ··· 3141 3174 crc_ctx_pkt->u.bundling.dif_byte_count = cpu_to_le32(dif_bytes); 3142 3175 crc_ctx_pkt->u.bundling.dseg_count = 3143 3176 cpu_to_le16(prm->tot_dsds - prm->prot_seg_cnt); 3144 - cur_dsd = &crc_ctx_pkt->u.bundling.data_dsd; 3177 + cur_dsd = &crc_ctx_pkt->u.bundling.data_dsd[0]; 3145 3178 } 3146 3179 3147 3180 /* Finish the common fields of CRC pkt */ ··· 3206 3239 if (!qpair->fw_started || (cmd->reset_count != qpair->chip_reset) || 3207 3240 (cmd->sess && cmd->sess->deleted)) { 3208 3241 cmd->state = QLA_TGT_STATE_PROCESSED; 3209 - return 0; 3242 + res = 0; 3243 + goto free; 3210 3244 } 3211 3245 3212 3246 ql_dbg_qp(ql_dbg_tgt, qpair, 0xe018, ··· 3218 3250 3219 3251 res = qlt_pre_xmit_response(cmd, &prm, xmit_type, scsi_status, 3220 3252 &full_req_cnt); 3221 - if (unlikely(res != 0)) { 3222 - return res; 3223 - } 3253 + if (unlikely(res != 0)) 3254 + goto free; 3224 3255 3225 3256 spin_lock_irqsave(qpair->qp_lock_ptr, flags); 3226 3257 ··· 3239 3272 vha->flags.online, qla2x00_reset_active(vha), 3240 3273 cmd->reset_count, qpair->chip_reset); 3241 3274 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 3242 - return 0; 3275 + res = 0; 3276 + goto free; 3243 3277 } 3244 3278 3245 3279 /* Does F/W have an IOCBs for this request */ ··· 3343 3375 qlt_unmap_sg(vha, cmd); 3344 3376 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags); 3345 3377 3378 + free: 3379 + vha->hw->tgt.tgt_ops->free_cmd(cmd); 3346 3380 return res; 3347 3381 } 3348 3382 EXPORT_SYMBOL(qlt_xmit_response); ··· 3642 3672 ctio24->nport_handle = CTIO7_NHANDLE_UNRECOGNIZED; 3643 3673 ctio24->timeout = cpu_to_le16(QLA_TGT_TIMEOUT); 3644 3674 ctio24->vp_index = vha->vp_idx; 3645 - ctio24->initiator_id[0] = atio->u.isp24.fcp_hdr.s_id[2]; 3646 - ctio24->initiator_id[1] = atio->u.isp24.fcp_hdr.s_id[1]; 3647 - ctio24->initiator_id[2] = atio->u.isp24.fcp_hdr.s_id[0]; 3675 + ctio24->initiator_id = be_id_to_le(atio->u.isp24.fcp_hdr.s_id); 3648 3676 ctio24->exchange_addr = atio->u.isp24.exchange_addr; 3649 3677 temp = (atio->u.isp24.attr << 9) | CTIO7_FLAGS_STATUS_MODE_1 | 3650 3678 CTIO7_FLAGS_TERMINATE; ··· 4075 4107 return fcp_task_attr; 4076 4108 } 4077 4109 4078 - static struct fc_port *qlt_make_local_sess(struct scsi_qla_host *, 4079 - uint8_t *); 4080 4110 /* 4081 4111 * Process context for I/O path into tcm_qla2xxx code 4082 4112 */ ··· 4318 4352 return -ENODEV; 4319 4353 } 4320 4354 4321 - id.b.al_pa = atio->u.isp24.fcp_hdr.s_id[2]; 4322 - id.b.area = atio->u.isp24.fcp_hdr.s_id[1]; 4323 - id.b.domain = atio->u.isp24.fcp_hdr.s_id[0]; 4355 + id = be_to_port_id(atio->u.isp24.fcp_hdr.s_id); 4324 4356 if (IS_SW_RESV_ADDR(id)) 4325 4357 return -EBUSY; 4326 4358 ··· 4680 4716 struct qlt_plogi_ack_t *pla; 4681 4717 unsigned long flags; 4682 4718 4719 + lockdep_assert_held(&vha->hw->hardware_lock); 4720 + 4683 4721 wwn = wwn_to_u64(iocb->u.isp24.port_name); 4684 4722 4685 4723 port_id.b.domain = iocb->u.isp24.port_id[2]; ··· 4765 4799 __func__, sess->port_name, sec); 4766 4800 } 4767 4801 4768 - if (!conflict_sess) 4802 + if (!conflict_sess) { 4803 + list_del(&pla->list); 4769 4804 kmem_cache_free(qla_tgt_plogi_cachep, pla); 4805 + } 4770 4806 4771 4807 qlt_send_term_imm_notif(vha, iocb, 1); 4772 4808 goto out; ··· 4856 4888 uint16_t wd3_lo; 4857 4889 int res = 0; 4858 4890 unsigned long flags; 4891 + 4892 + lockdep_assert_held(&ha->hardware_lock); 4859 4893 4860 4894 wwn = wwn_to_u64(iocb->u.isp24.port_name); 4861 4895 ··· 5135 5165 int send_notify_ack = 1; 5136 5166 uint16_t status; 5137 5167 5168 + lockdep_assert_held(&ha->hardware_lock); 5169 + 5138 5170 status = le16_to_cpu(iocb->u.isp2x.status); 5139 5171 switch (status) { 5140 5172 case IMM_NTFY_LIP_RESET: ··· 5274 5302 u16 temp; 5275 5303 port_id_t id; 5276 5304 5277 - id.b.al_pa = atio->u.isp24.fcp_hdr.s_id[2]; 5278 - id.b.area = atio->u.isp24.fcp_hdr.s_id[1]; 5279 - id.b.domain = atio->u.isp24.fcp_hdr.s_id[0]; 5280 - id.b.rsvd_1 = 0; 5305 + id = be_to_port_id(atio->u.isp24.fcp_hdr.s_id); 5281 5306 5282 5307 spin_lock_irqsave(&ha->tgt.sess_lock, flags); 5283 5308 sess = qla2x00_find_fcport_by_nportid(vha, &id, 1); ··· 5302 5333 ctio24->nport_handle = sess->loop_id; 5303 5334 ctio24->timeout = cpu_to_le16(QLA_TGT_TIMEOUT); 5304 5335 ctio24->vp_index = vha->vp_idx; 5305 - ctio24->initiator_id[0] = atio->u.isp24.fcp_hdr.s_id[2]; 5306 - ctio24->initiator_id[1] = atio->u.isp24.fcp_hdr.s_id[1]; 5307 - ctio24->initiator_id[2] = atio->u.isp24.fcp_hdr.s_id[0]; 5336 + ctio24->initiator_id = be_id_to_le(atio->u.isp24.fcp_hdr.s_id); 5308 5337 ctio24->exchange_addr = atio->u.isp24.exchange_addr; 5309 5338 temp = (atio->u.isp24.attr << 9) | 5310 5339 CTIO7_FLAGS_STATUS_MODE_1 | CTIO7_FLAGS_SEND_STATUS | ··· 5734 5767 entry->error_subcode2); 5735 5768 ha->tgt.tgt_ops->free_mcmd(mcmd); 5736 5769 } 5737 - } else { 5770 + } else if (mcmd) { 5738 5771 ha->tgt.tgt_ops->free_mcmd(mcmd); 5739 5772 } 5740 5773 } ··· 6088 6121 6089 6122 /* Must be called under tgt_mutex */ 6090 6123 static struct fc_port *qlt_make_local_sess(struct scsi_qla_host *vha, 6091 - uint8_t *s_id) 6124 + be_id_t s_id) 6092 6125 { 6093 6126 struct fc_port *sess = NULL; 6094 6127 fc_port_t *fcport = NULL; 6095 6128 int rc, global_resets; 6096 6129 uint16_t loop_id = 0; 6097 6130 6098 - if ((s_id[0] == 0xFF) && (s_id[1] == 0xFC)) { 6131 + if (s_id.domain == 0xFF && s_id.area == 0xFC) { 6099 6132 /* 6100 6133 * This is Domain Controller, so it should be 6101 6134 * OK to drop SCSI commands from it. 6102 6135 */ 6103 6136 ql_dbg(ql_dbg_tgt_mgt, vha, 0xf042, 6104 6137 "Unable to find initiator with S_ID %x:%x:%x", 6105 - s_id[0], s_id[1], s_id[2]); 6138 + s_id.domain, s_id.area, s_id.al_pa); 6106 6139 return NULL; 6107 6140 } 6108 6141 ··· 6119 6152 ql_log(ql_log_info, vha, 0xf071, 6120 6153 "qla_target(%d): Unable to find " 6121 6154 "initiator with S_ID %x:%x:%x", 6122 - vha->vp_idx, s_id[0], s_id[1], 6123 - s_id[2]); 6155 + vha->vp_idx, s_id.domain, s_id.area, s_id.al_pa); 6124 6156 6125 6157 if (rc == -ENOENT) { 6126 6158 qlt_port_logo_t logo; 6127 6159 6128 - sid_to_portid(s_id, &logo.id); 6160 + logo.id = be_to_port_id(s_id); 6129 6161 logo.cmd_count = 1; 6130 6162 qlt_send_first_logo(vha, &logo); 6131 6163 } ··· 6163 6197 struct qla_hw_data *ha = vha->hw; 6164 6198 struct fc_port *sess = NULL; 6165 6199 unsigned long flags = 0, flags2 = 0; 6166 - uint32_t be_s_id; 6167 - uint8_t s_id[3]; 6200 + be_id_t s_id; 6168 6201 int rc; 6169 6202 6170 6203 spin_lock_irqsave(&ha->tgt.sess_lock, flags2); ··· 6171 6206 if (tgt->tgt_stop) 6172 6207 goto out_term2; 6173 6208 6174 - s_id[0] = prm->abts.fcp_hdr_le.s_id[2]; 6175 - s_id[1] = prm->abts.fcp_hdr_le.s_id[1]; 6176 - s_id[2] = prm->abts.fcp_hdr_le.s_id[0]; 6209 + s_id = le_id_to_be(prm->abts.fcp_hdr_le.s_id); 6177 6210 6178 - sess = ha->tgt.tgt_ops->find_sess_by_s_id(vha, 6179 - (unsigned char *)&be_s_id); 6211 + sess = ha->tgt.tgt_ops->find_sess_by_s_id(vha, s_id); 6180 6212 if (!sess) { 6181 6213 spin_unlock_irqrestore(&ha->tgt.sess_lock, flags2); 6182 6214 ··· 6210 6248 out_term2: 6211 6249 spin_unlock_irqrestore(&ha->tgt.sess_lock, flags2); 6212 6250 6213 - if (sess) 6214 - ha->tgt.tgt_ops->put_sess(sess); 6215 - 6216 6251 out_term: 6217 6252 spin_lock_irqsave(&ha->hardware_lock, flags); 6218 6253 qlt_24xx_send_abts_resp(ha->base_qpair, &prm->abts, ··· 6225 6266 struct qla_hw_data *ha = vha->hw; 6226 6267 struct fc_port *sess; 6227 6268 unsigned long flags; 6228 - uint8_t *s_id = NULL; /* to hide compiler warnings */ 6269 + be_id_t s_id; 6229 6270 int rc; 6230 6271 u64 unpacked_lun; 6231 6272 int fn; ··· 6454 6495 static void qlt_lport_dump(struct scsi_qla_host *vha, u64 wwpn, 6455 6496 unsigned char *b) 6456 6497 { 6457 - int i; 6458 - 6459 - pr_debug("qla2xxx HW vha->node_name: "); 6460 - for (i = 0; i < WWN_SIZE; i++) 6461 - pr_debug("%02x ", vha->node_name[i]); 6462 - pr_debug("\n"); 6463 - pr_debug("qla2xxx HW vha->port_name: "); 6464 - for (i = 0; i < WWN_SIZE; i++) 6465 - pr_debug("%02x ", vha->port_name[i]); 6466 - pr_debug("\n"); 6467 - 6468 - pr_debug("qla2xxx passed configfs WWPN: "); 6498 + pr_debug("qla2xxx HW vha->node_name: %8phC\n", vha->node_name); 6499 + pr_debug("qla2xxx HW vha->port_name: %8phC\n", vha->port_name); 6469 6500 put_unaligned_be64(wwpn, b); 6470 - for (i = 0; i < WWN_SIZE; i++) 6471 - pr_debug("%02x ", b[i]); 6472 - pr_debug("\n"); 6501 + pr_debug("qla2xxx passed configfs WWPN: %8phC\n", b); 6473 6502 } 6474 6503 6475 6504 /** ··· 6618 6671 if (vha->qlini_mode == QLA2XXX_INI_MODE_ENABLED) 6619 6672 return; 6620 6673 6674 + if (ha->tgt.num_act_qpairs > ha->max_qpairs) 6675 + ha->tgt.num_act_qpairs = ha->max_qpairs; 6621 6676 spin_lock_irqsave(&ha->hardware_lock, flags); 6622 6677 tgt->tgt_stopped = 0; 6623 6678 qlt_set_mode(vha); ··· 6634 6685 } else { 6635 6686 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags); 6636 6687 qla2xxx_wake_dpc(base_vha); 6637 - qla2x00_wait_for_hba_online(base_vha); 6688 + WARN_ON_ONCE(qla2x00_wait_for_hba_online(base_vha) != 6689 + QLA_SUCCESS); 6638 6690 } 6639 6691 mutex_unlock(&ha->optrom_mutex); 6640 6692 } ··· 6666 6716 6667 6717 set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags); 6668 6718 qla2xxx_wake_dpc(vha); 6669 - qla2x00_wait_for_hba_online(vha); 6719 + if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) 6720 + ql_dbg(ql_dbg_tgt, vha, 0xe081, 6721 + "qla2x00_wait_for_hba_online() failed\n"); 6670 6722 } 6671 6723 6672 6724 /* ··· 6767 6815 */ 6768 6816 ql_log(ql_log_warn, vha, 0xd03c, 6769 6817 "corrupted fcp frame SID[%3phN] OXID[%04x] EXCG[%x] %64phN\n", 6770 - pkt->u.isp24.fcp_hdr.s_id, 6818 + &pkt->u.isp24.fcp_hdr.s_id, 6771 6819 be16_to_cpu(pkt->u.isp24.fcp_hdr.ox_id), 6772 6820 le32_to_cpu(pkt->u.isp24.exchange_addr), pkt); 6773 6821
+12 -23
drivers/scsi/qla2xxx/qla_target.h
··· 247 247 248 248 struct fcp_hdr { 249 249 uint8_t r_ctl; 250 - uint8_t d_id[3]; 250 + be_id_t d_id; 251 251 uint8_t cs_ctl; 252 - uint8_t s_id[3]; 252 + be_id_t s_id; 253 253 uint8_t type; 254 254 uint8_t f_ctl[3]; 255 255 uint8_t seq_id; ··· 261 261 } __packed; 262 262 263 263 struct fcp_hdr_le { 264 - uint8_t d_id[3]; 264 + le_id_t d_id; 265 265 uint8_t r_ctl; 266 - uint8_t s_id[3]; 266 + le_id_t s_id; 267 267 uint8_t cs_ctl; 268 268 uint8_t f_ctl[3]; 269 269 uint8_t type; ··· 402 402 uint16_t dseg_count; /* Data segment count. */ 403 403 uint8_t vp_index; 404 404 uint8_t add_flags; 405 - uint8_t initiator_id[3]; 405 + le_id_t initiator_id; 406 406 uint8_t reserved; 407 407 uint32_t exchange_addr; 408 408 union { ··· 498 498 uint8_t add_flags; /* additional flags */ 499 499 #define CTIO_CRC2_AF_DIF_DSD_ENA BIT_3 500 500 501 - uint8_t initiator_id[3]; /* initiator ID */ 501 + le_id_t initiator_id; /* initiator ID */ 502 502 uint8_t reserved1; 503 503 uint32_t exchange_addr; /* rcv exchange address */ 504 504 uint16_t reserved2; ··· 682 682 struct fc_port *(*find_sess_by_loop_id)(struct scsi_qla_host *, 683 683 const uint16_t); 684 684 struct fc_port *(*find_sess_by_s_id)(struct scsi_qla_host *, 685 - const uint8_t *); 685 + const be_id_t); 686 686 void (*clear_nacl_from_fcport_map)(struct fc_port *); 687 687 void (*put_sess)(struct fc_port *); 688 688 void (*shutdown_sess)(struct fc_port *); ··· 912 912 uint8_t scsi_status, sense_key, asc, ascq; 913 913 914 914 struct crc_context *ctx; 915 - uint8_t *cdb; 915 + const uint8_t *cdb; 916 916 uint64_t lba; 917 917 uint16_t a_guard, e_guard, a_app_tag, e_app_tag; 918 918 uint32_t a_ref_tag, e_ref_tag; ··· 1030 1030 return (ha->host->active_mode == MODE_DUAL); 1031 1031 } 1032 1032 1033 - static inline uint32_t sid_to_key(const uint8_t *s_id) 1033 + static inline uint32_t sid_to_key(const be_id_t s_id) 1034 1034 { 1035 - uint32_t key; 1036 - 1037 - key = (((unsigned long)s_id[0] << 16) | 1038 - ((unsigned long)s_id[1] << 8) | 1039 - (unsigned long)s_id[2]); 1040 - return key; 1041 - } 1042 - 1043 - static inline void sid_to_portid(const uint8_t *s_id, port_id_t *p) 1044 - { 1045 - memset(p, 0, sizeof(*p)); 1046 - p->b.domain = s_id[0]; 1047 - p->b.area = s_id[1]; 1048 - p->b.al_pa = s_id[2]; 1035 + return s_id.domain << 16 | 1036 + s_id.area << 8 | 1037 + s_id.al_pa; 1049 1038 } 1050 1039 1051 1040 /*
+4 -3
drivers/scsi/qla2xxx/qla_tmpl.c
··· 429 429 ql_dbg(ql_dbg_misc, vha, 0xd20a, 430 430 "%s: reset risc [%lx]\n", __func__, *len); 431 431 if (buf) 432 - qla24xx_soft_reset(vha->hw); 432 + WARN_ON_ONCE(qla24xx_soft_reset(vha->hw) != QLA_SUCCESS); 433 433 434 434 return qla27xx_next_entry(ent); 435 435 } ··· 860 860 { 861 861 uint8_t v[] = { 0, 0, 0, 0, 0, 0 }; 862 862 863 - sscanf(qla2x00_version_str, "%hhu.%hhu.%hhu.%hhu.%hhu.%hhu", 864 - v+0, v+1, v+2, v+3, v+4, v+5); 863 + WARN_ON_ONCE(sscanf(qla2x00_version_str, 864 + "%hhu.%hhu.%hhu.%hhu.%hhu.%hhu", 865 + v+0, v+1, v+2, v+3, v+4, v+5) != 6); 865 866 866 867 tmp->driver_info[0] = v[3] << 24 | v[2] << 16 | v[1] << 8 | v[0]; 867 868 tmp->driver_info[1] = v[5] << 8 | v[4];
+1 -1
drivers/scsi/qla2xxx/qla_version.h
··· 7 7 /* 8 8 * Driver version 9 9 */ 10 - #define QLA2XXX_VERSION "10.01.00.16-k" 10 + #define QLA2XXX_VERSION "10.01.00.19-k" 11 11 12 12 #define QLA_DRIVER_MAJOR_VER 10 13 13 #define QLA_DRIVER_MINOR_VER 1
+10 -17
drivers/scsi/qla2xxx/tcm_qla2xxx.c
··· 620 620 { 621 621 struct qla_tgt_cmd *cmd = container_of(se_cmd, 622 622 struct qla_tgt_cmd, se_cmd); 623 + struct scsi_qla_host *vha = cmd->vha; 623 624 624 625 if (cmd->aborted) { 625 626 /* Cmd can loop during Q-full. tcm_qla2xxx_aborted_task ··· 633 632 cmd->se_cmd.transport_state, 634 633 cmd->se_cmd.t_state, 635 634 cmd->se_cmd.se_cmd_flags); 635 + vha->hw->tgt.tgt_ops->free_cmd(cmd); 636 636 return 0; 637 637 } 638 638 ··· 661 659 { 662 660 struct qla_tgt_cmd *cmd = container_of(se_cmd, 663 661 struct qla_tgt_cmd, se_cmd); 662 + struct scsi_qla_host *vha = cmd->vha; 664 663 int xmit_type = QLA_TGT_XMIT_STATUS; 665 664 666 665 if (cmd->aborted) { ··· 675 672 cmd, kref_read(&cmd->se_cmd.cmd_kref), 676 673 cmd->se_cmd.transport_state, cmd->se_cmd.t_state, 677 674 cmd->se_cmd.se_cmd_flags); 675 + vha->hw->tgt.tgt_ops->free_cmd(cmd); 678 676 return 0; 679 677 } 680 678 cmd->bufflen = se_cmd->data_length; ··· 1140 1136 /* 1141 1137 * Expected to be called with struct qla_hw_data->tgt.sess_lock held 1142 1138 */ 1143 - static struct fc_port *tcm_qla2xxx_find_sess_by_s_id( 1144 - scsi_qla_host_t *vha, 1145 - const uint8_t *s_id) 1139 + static struct fc_port *tcm_qla2xxx_find_sess_by_s_id(scsi_qla_host_t *vha, 1140 + const be_id_t s_id) 1146 1141 { 1147 1142 struct tcm_qla2xxx_lport *lport; 1148 1143 struct se_node_acl *se_nacl; ··· 1184 1181 struct tcm_qla2xxx_nacl *nacl, 1185 1182 struct se_session *se_sess, 1186 1183 struct fc_port *fc_port, 1187 - uint8_t *s_id) 1184 + be_id_t s_id) 1188 1185 { 1189 1186 u32 key; 1190 1187 void *slot; ··· 1351 1348 struct tcm_qla2xxx_nacl *nacl, struct fc_port *sess) 1352 1349 { 1353 1350 struct se_session *se_sess = sess->se_sess; 1354 - unsigned char be_sid[3]; 1355 - 1356 - be_sid[0] = sess->d_id.b.domain; 1357 - be_sid[1] = sess->d_id.b.area; 1358 - be_sid[2] = sess->d_id.b.al_pa; 1359 1351 1360 1352 tcm_qla2xxx_set_sess_by_s_id(lport, NULL, nacl, se_sess, 1361 - sess, be_sid); 1353 + sess, port_id_to_be_id(sess->d_id)); 1362 1354 tcm_qla2xxx_set_sess_by_loop_id(lport, NULL, nacl, se_sess, 1363 1355 sess, sess->loop_id); 1364 1356 } ··· 1399 1401 struct fc_port *qlat_sess = p; 1400 1402 uint16_t loop_id = qlat_sess->loop_id; 1401 1403 unsigned long flags; 1402 - unsigned char be_sid[3]; 1403 - 1404 - be_sid[0] = qlat_sess->d_id.b.domain; 1405 - be_sid[1] = qlat_sess->d_id.b.area; 1406 - be_sid[2] = qlat_sess->d_id.b.al_pa; 1407 1404 1408 1405 /* 1409 1406 * And now setup se_nacl and session pointers into HW lport internal 1410 1407 * mappings for fabric S_ID and LOOP_ID. 1411 1408 */ 1412 1409 spin_lock_irqsave(&ha->tgt.sess_lock, flags); 1413 - tcm_qla2xxx_set_sess_by_s_id(lport, se_nacl, nacl, 1414 - se_sess, qlat_sess, be_sid); 1410 + tcm_qla2xxx_set_sess_by_s_id(lport, se_nacl, nacl, se_sess, qlat_sess, 1411 + port_id_to_be_id(qlat_sess->d_id)); 1415 1412 tcm_qla2xxx_set_sess_by_loop_id(lport, se_nacl, nacl, 1416 1413 se_sess, qlat_sess, loop_id); 1417 1414 spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
+10
drivers/scsi/qlogicpti.c
··· 200 200 /* Write mailbox command registers. */ 201 201 switch (mbox_param[param[0]] >> 4) { 202 202 case 6: sbus_writew(param[5], qpti->qregs + MBOX5); 203 + /* Fall through */ 203 204 case 5: sbus_writew(param[4], qpti->qregs + MBOX4); 205 + /* Fall through */ 204 206 case 4: sbus_writew(param[3], qpti->qregs + MBOX3); 207 + /* Fall through */ 205 208 case 3: sbus_writew(param[2], qpti->qregs + MBOX2); 209 + /* Fall through */ 206 210 case 2: sbus_writew(param[1], qpti->qregs + MBOX1); 211 + /* Fall through */ 207 212 case 1: sbus_writew(param[0], qpti->qregs + MBOX0); 208 213 } 209 214 ··· 259 254 /* Read back output parameters. */ 260 255 switch (mbox_param[param[0]] & 0xf) { 261 256 case 6: param[5] = sbus_readw(qpti->qregs + MBOX5); 257 + /* Fall through */ 262 258 case 5: param[4] = sbus_readw(qpti->qregs + MBOX4); 259 + /* Fall through */ 263 260 case 4: param[3] = sbus_readw(qpti->qregs + MBOX3); 261 + /* Fall through */ 264 262 case 3: param[2] = sbus_readw(qpti->qregs + MBOX2); 263 + /* Fall through */ 265 264 case 2: param[1] = sbus_readw(qpti->qregs + MBOX1); 265 + /* Fall through */ 266 266 case 1: param[0] = sbus_readw(qpti->qregs + MBOX0); 267 267 } 268 268
+2 -3
drivers/scsi/scsi_debugfs.c
··· 1 1 // SPDX-License-Identifier: GPL-2.0 2 + #include <linux/bitops.h> 2 3 #include <linux/seq_file.h> 3 4 #include <scsi/scsi_cmnd.h> 4 5 #include <scsi/scsi_dbg.h> ··· 19 18 bool sep = false; 20 19 int i; 21 20 22 - for (i = 0; i < sizeof(flags) * BITS_PER_BYTE; i++) { 23 - if (!(flags & BIT(i))) 24 - continue; 21 + for_each_set_bit(i, &flags, BITS_PER_LONG) { 25 22 if (sep) 26 23 seq_puts(m, "|"); 27 24 sep = true;
+48 -4
drivers/scsi/scsi_lib.c
··· 1678 1678 blk_mq_start_request(req); 1679 1679 } 1680 1680 1681 + cmd->flags &= SCMD_PRESERVED_FLAGS; 1681 1682 if (sdev->simple_tags) 1682 1683 cmd->flags |= SCMD_TAGGED; 1683 - else 1684 - cmd->flags &= ~SCMD_TAGGED; 1684 + if (bd->last) 1685 + cmd->flags |= SCMD_LAST; 1685 1686 1686 1687 scsi_init_cmd_errh(cmd); 1687 1688 cmd->scsi_done = scsi_mq_done; ··· 1822 1821 } 1823 1822 EXPORT_SYMBOL_GPL(__scsi_init_queue); 1824 1823 1824 + static const struct blk_mq_ops scsi_mq_ops_no_commit = { 1825 + .get_budget = scsi_mq_get_budget, 1826 + .put_budget = scsi_mq_put_budget, 1827 + .queue_rq = scsi_queue_rq, 1828 + .complete = scsi_softirq_done, 1829 + .timeout = scsi_timeout, 1830 + #ifdef CONFIG_BLK_DEBUG_FS 1831 + .show_rq = scsi_show_rq, 1832 + #endif 1833 + .init_request = scsi_mq_init_request, 1834 + .exit_request = scsi_mq_exit_request, 1835 + .initialize_rq_fn = scsi_initialize_rq, 1836 + .busy = scsi_mq_lld_busy, 1837 + .map_queues = scsi_map_queues, 1838 + }; 1839 + 1840 + 1841 + static void scsi_commit_rqs(struct blk_mq_hw_ctx *hctx) 1842 + { 1843 + struct request_queue *q = hctx->queue; 1844 + struct scsi_device *sdev = q->queuedata; 1845 + struct Scsi_Host *shost = sdev->host; 1846 + 1847 + shost->hostt->commit_rqs(shost, hctx->queue_num); 1848 + } 1849 + 1825 1850 static const struct blk_mq_ops scsi_mq_ops = { 1826 1851 .get_budget = scsi_mq_get_budget, 1827 1852 .put_budget = scsi_mq_put_budget, 1828 1853 .queue_rq = scsi_queue_rq, 1854 + .commit_rqs = scsi_commit_rqs, 1829 1855 .complete = scsi_softirq_done, 1830 1856 .timeout = scsi_timeout, 1831 1857 #ifdef CONFIG_BLK_DEBUG_FS ··· 1889 1861 sizeof(struct scatterlist) * SCSI_INLINE_PROT_SG_CNT; 1890 1862 1891 1863 memset(&shost->tag_set, 0, sizeof(shost->tag_set)); 1892 - shost->tag_set.ops = &scsi_mq_ops; 1864 + if (shost->hostt->commit_rqs) 1865 + shost->tag_set.ops = &scsi_mq_ops; 1866 + else 1867 + shost->tag_set.ops = &scsi_mq_ops_no_commit; 1893 1868 shost->tag_set.nr_hw_queues = shost->nr_hw_queues ? : 1; 1894 1869 shost->tag_set.queue_depth = shost->can_queue; 1895 1870 shost->tag_set.cmd_size = cmd_size; ··· 2722 2691 int scsi_internal_device_unblock_nowait(struct scsi_device *sdev, 2723 2692 enum scsi_device_state new_state) 2724 2693 { 2694 + switch (new_state) { 2695 + case SDEV_RUNNING: 2696 + case SDEV_TRANSPORT_OFFLINE: 2697 + break; 2698 + default: 2699 + return -EINVAL; 2700 + } 2701 + 2725 2702 /* 2726 2703 * Try to transition the scsi device to SDEV_RUNNING or one of the 2727 2704 * offlined states and goose the device queue if successful. ··· 2787 2748 static void 2788 2749 device_block(struct scsi_device *sdev, void *data) 2789 2750 { 2790 - scsi_internal_device_block(sdev); 2751 + int ret; 2752 + 2753 + ret = scsi_internal_device_block(sdev); 2754 + 2755 + WARN_ONCE(ret, "scsi_internal_device_block(%s) failed: ret = %d\n", 2756 + dev_name(&sdev->sdev_gendev), ret); 2791 2757 } 2792 2758 2793 2759 static int
+3 -45
drivers/scsi/scsi_logging.c
··· 15 15 #include <scsi/scsi_eh.h> 16 16 #include <scsi/scsi_dbg.h> 17 17 18 - #define SCSI_LOG_SPOOLSIZE 4096 19 - 20 - #if (SCSI_LOG_SPOOLSIZE / SCSI_LOG_BUFSIZE) > BITS_PER_LONG 21 - #warning SCSI logging bitmask too large 22 - #endif 23 - 24 - struct scsi_log_buf { 25 - char buffer[SCSI_LOG_SPOOLSIZE]; 26 - unsigned long map; 27 - }; 28 - 29 - static DEFINE_PER_CPU(struct scsi_log_buf, scsi_format_log); 30 - 31 18 static char *scsi_log_reserve_buffer(size_t *len) 32 19 { 33 - struct scsi_log_buf *buf; 34 - unsigned long map_bits = sizeof(buf->buffer) / SCSI_LOG_BUFSIZE; 35 - unsigned long idx = 0; 36 - 37 - preempt_disable(); 38 - buf = this_cpu_ptr(&scsi_format_log); 39 - idx = find_first_zero_bit(&buf->map, map_bits); 40 - if (likely(idx < map_bits)) { 41 - while (test_and_set_bit(idx, &buf->map)) { 42 - idx = find_next_zero_bit(&buf->map, map_bits, idx); 43 - if (idx >= map_bits) 44 - break; 45 - } 46 - } 47 - if (WARN_ON(idx >= map_bits)) { 48 - preempt_enable(); 49 - return NULL; 50 - } 51 - *len = SCSI_LOG_BUFSIZE; 52 - return buf->buffer + idx * SCSI_LOG_BUFSIZE; 20 + *len = 128; 21 + return kmalloc(*len, GFP_ATOMIC); 53 22 } 54 23 55 24 static void scsi_log_release_buffer(char *bufptr) 56 25 { 57 - struct scsi_log_buf *buf; 58 - unsigned long idx; 59 - int ret; 60 - 61 - buf = this_cpu_ptr(&scsi_format_log); 62 - if (bufptr >= buf->buffer && 63 - bufptr < buf->buffer + SCSI_LOG_SPOOLSIZE) { 64 - idx = (bufptr - buf->buffer) / SCSI_LOG_BUFSIZE; 65 - ret = test_and_clear_bit(idx, &buf->map); 66 - WARN_ON(!ret); 67 - } 68 - preempt_enable(); 26 + kfree(bufptr); 69 27 } 70 28 71 29 static inline const char *scmd_name(const struct scsi_cmnd *scmd)
+1
drivers/scsi/sd.c
··· 1981 1981 sd_printk(KERN_INFO, sdkp, 1982 1982 "Unaligned partial completion (resid=%u, sector_sz=%u)\n", 1983 1983 resid, sector_size); 1984 + scsi_print_command(SCpnt); 1984 1985 resid = min(scsi_bufflen(SCpnt), 1985 1986 round_up(resid, sector_size)); 1986 1987 scsi_set_resid(SCpnt, resid);
+2
drivers/scsi/smartpqi/Kconfig
··· 1 1 # 2 2 # Kernel configuration file for the SMARTPQI 3 3 # 4 + # Copyright (c) 2019 Microchip Technology Inc. and its subsidiaries 5 + # Copyright (c) 2017-2018 Microsemi Corporation 4 6 # Copyright (c) 2016 Microsemi Corporation 5 7 # Copyright (c) 2016 PMC-Sierra, Inc. 6 8 # (mailto:esc.storagedev@microsemi.com)
+18 -2
drivers/scsi/smartpqi/smartpqi.h
··· 822 822 #define PQI_HBA_BUS 2 823 823 #define PQI_EXTERNAL_RAID_VOLUME_BUS 3 824 824 #define PQI_MAX_BUS PQI_EXTERNAL_RAID_VOLUME_BUS 825 + #define PQI_VSEP_CISS_BTL 379 825 826 826 827 struct report_lun_header { 827 828 __be32 list_length; ··· 931 930 u8 active_path_index; 932 931 u8 path_map; 933 932 u8 bay; 933 + u8 box_index; 934 + u8 phys_box_on_bus; 935 + u8 phy_connected_dev_type; 934 936 u8 box[8]; 935 937 u16 phys_connector[8]; 936 938 bool raid_bypass_configured; /* RAID bypass configured */ ··· 1077 1073 unsigned int ctrl_id; 1078 1074 struct pci_dev *pci_dev; 1079 1075 char firmware_version[11]; 1076 + char serial_number[17]; 1077 + char model[17]; 1078 + char vendor[9]; 1080 1079 void __iomem *iomem_base; 1081 1080 struct pqi_ctrl_registers __iomem *registers; 1082 1081 struct pqi_device_registers __iomem *pqi_registers; ··· 1231 1224 __le16 extended_logical_unit_count; 1232 1225 u8 reserved1[34]; 1233 1226 __le16 firmware_build_number; 1234 - u8 reserved2[100]; 1227 + u8 reserved2[8]; 1228 + u8 vendor_id[8]; 1229 + u8 product_id[16]; 1230 + u8 reserved3[68]; 1235 1231 u8 controller_mode; 1236 - u8 reserved3[32]; 1232 + u8 reserved4[32]; 1233 + }; 1234 + 1235 + struct bmic_sense_subsystem_info { 1236 + u8 reserved[44]; 1237 + u8 ctrl_serial_number[16]; 1237 1238 }; 1238 1239 1239 1240 #define SA_EXPANDER_SMP_DEVICE 0x05 1241 + #define SA_CONTROLLER_DEVICE 0x07 1240 1242 /*SCSI Invalid Device Type for SAS devices*/ 1241 1243 #define PQI_SAS_SCSI_INVALID_DEVTYPE 0xff 1242 1244
+205 -31
drivers/scsi/smartpqi/smartpqi_init.c
··· 33 33 #define BUILD_TIMESTAMP 34 34 #endif 35 35 36 - #define DRIVER_VERSION "1.2.6-015" 36 + #define DRIVER_VERSION "1.2.8-026" 37 37 #define DRIVER_MAJOR 1 38 38 #define DRIVER_MINOR 2 39 - #define DRIVER_RELEASE 6 40 - #define DRIVER_REVISION 15 39 + #define DRIVER_RELEASE 8 40 + #define DRIVER_REVISION 26 41 41 42 42 #define DRIVER_NAME "Microsemi PQI Driver (v" \ 43 43 DRIVER_VERSION BUILD_TIMESTAMP ")" ··· 144 144 MODULE_PARM_DESC(lockup_action, "Action to take when controller locked up.\n" 145 145 "\t\tSupported: none, reboot, panic\n" 146 146 "\t\tDefault: none"); 147 + 148 + static int pqi_expose_ld_first; 149 + module_param_named(expose_ld_first, 150 + pqi_expose_ld_first, int, 0644); 151 + MODULE_PARM_DESC(expose_ld_first, 152 + "Expose logical drives before physical drives."); 153 + 154 + static int pqi_hide_vsep; 155 + module_param_named(hide_vsep, 156 + pqi_hide_vsep, int, 0644); 157 + MODULE_PARM_DESC(hide_vsep, 158 + "Hide the virtual SEP for direct attached drives."); 147 159 148 160 static char *raid_levels[] = { 149 161 "RAID-0", ··· 484 472 /* fall through */ 485 473 case BMIC_IDENTIFY_CONTROLLER: 486 474 case BMIC_IDENTIFY_PHYSICAL_DEVICE: 475 + case BMIC_SENSE_SUBSYSTEM_INFORMATION: 487 476 request->data_direction = SOP_READ_FLAG; 488 477 cdb[0] = BMIC_READ; 489 478 cdb[6] = cmd; ··· 611 598 { 612 599 return pqi_send_ctrl_raid_request(ctrl_info, BMIC_IDENTIFY_CONTROLLER, 613 600 buffer, sizeof(*buffer)); 601 + } 602 + 603 + static inline int pqi_sense_subsystem_info(struct pqi_ctrl_info *ctrl_info, 604 + struct bmic_sense_subsystem_info *sense_info) 605 + { 606 + return pqi_send_ctrl_raid_request(ctrl_info, 607 + BMIC_SENSE_SUBSYSTEM_INFORMATION, 608 + sense_info, sizeof(*sense_info)); 614 609 } 615 610 616 611 static inline int pqi_scsi_inquiry(struct pqi_ctrl_info *ctrl_info, ··· 1413 1392 device->queue_depth = PQI_PHYSICAL_DISK_DEFAULT_MAX_QUEUE_DEPTH; 1414 1393 return; 1415 1394 } 1416 - 1395 + device->box_index = id_phys->box_index; 1396 + device->phys_box_on_bus = id_phys->phys_box_on_bus; 1397 + device->phy_connected_dev_type = id_phys->phy_connected_dev_type[0]; 1417 1398 device->queue_depth = 1418 1399 get_unaligned_le16(&id_phys->current_queue_depth_limit); 1419 1400 device->device_type = id_phys->device_type; ··· 1742 1719 existing_device->active_path_index = new_device->active_path_index; 1743 1720 existing_device->path_map = new_device->path_map; 1744 1721 existing_device->bay = new_device->bay; 1722 + existing_device->box_index = new_device->box_index; 1723 + existing_device->phys_box_on_bus = new_device->phys_box_on_bus; 1724 + existing_device->phy_connected_dev_type = 1725 + new_device->phy_connected_dev_type; 1745 1726 memcpy(existing_device->box, new_device->box, 1746 1727 sizeof(existing_device->box)); 1747 1728 memcpy(existing_device->phys_connector, new_device->phys_connector, ··· 1972 1945 return false; 1973 1946 } 1974 1947 1948 + static inline void pqi_mask_device(u8 *scsi3addr) 1949 + { 1950 + scsi3addr[3] |= 0xc0; 1951 + } 1952 + 1975 1953 static inline bool pqi_is_device_with_sas_address(struct pqi_scsi_dev *device) 1976 1954 { 1977 1955 if (!device->is_physical_device) ··· 2020 1988 unsigned int num_valid_devices; 2021 1989 bool is_physical_device; 2022 1990 u8 *scsi3addr; 1991 + unsigned int physical_index; 1992 + unsigned int logical_index; 2023 1993 static char *out_of_memory_msg = 2024 1994 "failed to allocate memory, device discovery stopped"; 2025 1995 ··· 2057 2023 rc = -ENOMEM; 2058 2024 goto out; 2059 2025 } 2026 + if (pqi_hide_vsep) { 2027 + int i; 2028 + 2029 + for (i = num_physicals - 1; i >= 0; i--) { 2030 + phys_lun_ext_entry = 2031 + &physdev_list->lun_entries[i]; 2032 + if (CISS_GET_DRIVE_NUMBER( 2033 + phys_lun_ext_entry->lunid) == 2034 + PQI_VSEP_CISS_BTL) { 2035 + pqi_mask_device( 2036 + phys_lun_ext_entry->lunid); 2037 + break; 2038 + } 2039 + } 2040 + } 2060 2041 } 2061 2042 2062 2043 num_new_devices = num_physicals + num_logicals; ··· 2099 2050 2100 2051 device = NULL; 2101 2052 num_valid_devices = 0; 2053 + physical_index = 0; 2054 + logical_index = 0; 2102 2055 2103 2056 for (i = 0; i < num_new_devices; i++) { 2104 2057 2105 - if (i < num_physicals) { 2058 + if ((!pqi_expose_ld_first && i < num_physicals) || 2059 + (pqi_expose_ld_first && i >= num_logicals)) { 2106 2060 is_physical_device = true; 2107 - phys_lun_ext_entry = &physdev_list->lun_entries[i]; 2061 + phys_lun_ext_entry = 2062 + &physdev_list->lun_entries[physical_index++]; 2108 2063 log_lun_ext_entry = NULL; 2109 2064 scsi3addr = phys_lun_ext_entry->lunid; 2110 2065 } else { 2111 2066 is_physical_device = false; 2112 2067 phys_lun_ext_entry = NULL; 2113 2068 log_lun_ext_entry = 2114 - &logdev_list->lun_entries[i - num_physicals]; 2069 + &logdev_list->lun_entries[logical_index++]; 2115 2070 scsi3addr = log_lun_ext_entry->lunid; 2116 2071 } 2117 2072 ··· 2175 2122 device->aio_handle = 2176 2123 phys_lun_ext_entry->aio_handle; 2177 2124 } 2178 - if (device->devtype == TYPE_DISK || 2179 - device->devtype == TYPE_ZBC) { 2125 + 2180 2126 pqi_get_physical_disk_info(ctrl_info, 2181 2127 device, id_phys); 2182 - } 2128 + 2183 2129 } else { 2184 2130 memcpy(device->volume_id, log_lun_ext_entry->volume_id, 2185 2131 sizeof(device->volume_id)); ··· 2236 2184 2237 2185 static int pqi_scan_scsi_devices(struct pqi_ctrl_info *ctrl_info) 2238 2186 { 2239 - int rc; 2187 + int rc = 0; 2240 2188 2241 2189 if (pqi_ctrl_offline(ctrl_info)) 2242 2190 return -ENXIO; 2243 2191 2244 - mutex_lock(&ctrl_info->scan_mutex); 2245 - 2246 - rc = pqi_update_scsi_devices(ctrl_info); 2247 - if (rc) 2192 + if (!mutex_trylock(&ctrl_info->scan_mutex)) { 2248 2193 pqi_schedule_rescan_worker_delayed(ctrl_info); 2249 - 2250 - mutex_unlock(&ctrl_info->scan_mutex); 2194 + rc = -EINPROGRESS; 2195 + } else { 2196 + rc = pqi_update_scsi_devices(ctrl_info); 2197 + if (rc) 2198 + pqi_schedule_rescan_worker_delayed(ctrl_info); 2199 + mutex_unlock(&ctrl_info->scan_mutex); 2200 + } 2251 2201 2252 2202 return rc; 2253 2203 } ··· 6145 6091 return rc; 6146 6092 } 6147 6093 6148 - static ssize_t pqi_version_show(struct device *dev, 6094 + static ssize_t pqi_firmware_version_show(struct device *dev, 6149 6095 struct device_attribute *attr, char *buffer) 6150 6096 { 6151 - ssize_t count = 0; 6152 6097 struct Scsi_Host *shost; 6153 6098 struct pqi_ctrl_info *ctrl_info; 6154 6099 6155 6100 shost = class_to_shost(dev); 6156 6101 ctrl_info = shost_to_hba(shost); 6157 6102 6158 - count += snprintf(buffer + count, PAGE_SIZE - count, 6159 - " driver: %s\n", DRIVER_VERSION BUILD_TIMESTAMP); 6103 + return snprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->firmware_version); 6104 + } 6160 6105 6161 - count += snprintf(buffer + count, PAGE_SIZE - count, 6162 - "firmware: %s\n", ctrl_info->firmware_version); 6106 + static ssize_t pqi_driver_version_show(struct device *dev, 6107 + struct device_attribute *attr, char *buffer) 6108 + { 6109 + struct Scsi_Host *shost; 6110 + struct pqi_ctrl_info *ctrl_info; 6163 6111 6164 - return count; 6112 + shost = class_to_shost(dev); 6113 + ctrl_info = shost_to_hba(shost); 6114 + 6115 + return snprintf(buffer, PAGE_SIZE, 6116 + "%s\n", DRIVER_VERSION BUILD_TIMESTAMP); 6117 + } 6118 + 6119 + static ssize_t pqi_serial_number_show(struct device *dev, 6120 + struct device_attribute *attr, char *buffer) 6121 + { 6122 + struct Scsi_Host *shost; 6123 + struct pqi_ctrl_info *ctrl_info; 6124 + 6125 + shost = class_to_shost(dev); 6126 + ctrl_info = shost_to_hba(shost); 6127 + 6128 + return snprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->serial_number); 6129 + } 6130 + 6131 + static ssize_t pqi_model_show(struct device *dev, 6132 + struct device_attribute *attr, char *buffer) 6133 + { 6134 + struct Scsi_Host *shost; 6135 + struct pqi_ctrl_info *ctrl_info; 6136 + 6137 + shost = class_to_shost(dev); 6138 + ctrl_info = shost_to_hba(shost); 6139 + 6140 + return snprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->model); 6141 + } 6142 + 6143 + static ssize_t pqi_vendor_show(struct device *dev, 6144 + struct device_attribute *attr, char *buffer) 6145 + { 6146 + struct Scsi_Host *shost; 6147 + struct pqi_ctrl_info *ctrl_info; 6148 + 6149 + shost = class_to_shost(dev); 6150 + ctrl_info = shost_to_hba(shost); 6151 + 6152 + return snprintf(buffer, PAGE_SIZE, "%s\n", ctrl_info->vendor); 6165 6153 } 6166 6154 6167 6155 static ssize_t pqi_host_rescan_store(struct device *dev, ··· 6256 6160 return -EINVAL; 6257 6161 } 6258 6162 6259 - static DEVICE_ATTR(version, 0444, pqi_version_show, NULL); 6163 + static DEVICE_ATTR(driver_version, 0444, pqi_driver_version_show, NULL); 6164 + static DEVICE_ATTR(firmware_version, 0444, pqi_firmware_version_show, NULL); 6165 + static DEVICE_ATTR(model, 0444, pqi_model_show, NULL); 6166 + static DEVICE_ATTR(serial_number, 0444, pqi_serial_number_show, NULL); 6167 + static DEVICE_ATTR(vendor, 0444, pqi_vendor_show, NULL); 6260 6168 static DEVICE_ATTR(rescan, 0200, NULL, pqi_host_rescan_store); 6261 6169 static DEVICE_ATTR(lockup_action, 0644, 6262 6170 pqi_lockup_action_show, pqi_lockup_action_store); 6263 6171 6264 6172 static struct device_attribute *pqi_shost_attrs[] = { 6265 - &dev_attr_version, 6173 + &dev_attr_driver_version, 6174 + &dev_attr_firmware_version, 6175 + &dev_attr_model, 6176 + &dev_attr_serial_number, 6177 + &dev_attr_vendor, 6266 6178 &dev_attr_rescan, 6267 6179 &dev_attr_lockup_action, 6268 6180 NULL ··· 6662 6558 return rc; 6663 6559 } 6664 6560 6665 - static int pqi_get_ctrl_firmware_version(struct pqi_ctrl_info *ctrl_info) 6561 + static int pqi_get_ctrl_serial_number(struct pqi_ctrl_info *ctrl_info) 6562 + { 6563 + int rc; 6564 + struct bmic_sense_subsystem_info *sense_info; 6565 + 6566 + sense_info = kzalloc(sizeof(*sense_info), GFP_KERNEL); 6567 + if (!sense_info) 6568 + return -ENOMEM; 6569 + 6570 + rc = pqi_sense_subsystem_info(ctrl_info, sense_info); 6571 + if (rc) 6572 + goto out; 6573 + 6574 + memcpy(ctrl_info->serial_number, sense_info->ctrl_serial_number, 6575 + sizeof(sense_info->ctrl_serial_number)); 6576 + ctrl_info->serial_number[sizeof(sense_info->ctrl_serial_number)] = '\0'; 6577 + 6578 + out: 6579 + kfree(sense_info); 6580 + 6581 + return rc; 6582 + } 6583 + 6584 + static int pqi_get_ctrl_product_details(struct pqi_ctrl_info *ctrl_info) 6666 6585 { 6667 6586 int rc; 6668 6587 struct bmic_identify_controller *identify; ··· 6705 6578 strlen(ctrl_info->firmware_version), 6706 6579 sizeof(ctrl_info->firmware_version), 6707 6580 "-%u", get_unaligned_le16(&identify->firmware_build_number)); 6581 + 6582 + memcpy(ctrl_info->model, identify->product_id, 6583 + sizeof(identify->product_id)); 6584 + ctrl_info->model[sizeof(identify->product_id)] = '\0'; 6585 + 6586 + memcpy(ctrl_info->vendor, identify->vendor_id, 6587 + sizeof(identify->vendor_id)); 6588 + ctrl_info->vendor[sizeof(identify->vendor_id)] = '\0'; 6708 6589 6709 6590 out: 6710 6591 kfree(identify); ··· 7233 7098 if (rc) 7234 7099 return rc; 7235 7100 7236 - rc = pqi_get_ctrl_firmware_version(ctrl_info); 7101 + rc = pqi_get_ctrl_product_details(ctrl_info); 7237 7102 if (rc) { 7238 7103 dev_err(&ctrl_info->pci_dev->dev, 7239 - "error obtaining firmware version\n"); 7104 + "error obtaining product details\n"); 7105 + return rc; 7106 + } 7107 + 7108 + rc = pqi_get_ctrl_serial_number(ctrl_info); 7109 + if (rc) { 7110 + dev_err(&ctrl_info->pci_dev->dev, 7111 + "error obtaining ctrl serial number\n"); 7240 7112 return rc; 7241 7113 } 7242 7114 ··· 7383 7241 return rc; 7384 7242 } 7385 7243 7386 - rc = pqi_get_ctrl_firmware_version(ctrl_info); 7244 + rc = pqi_get_ctrl_product_details(ctrl_info); 7387 7245 if (rc) { 7388 7246 dev_err(&ctrl_info->pci_dev->dev, 7389 - "error obtaining firmware version\n"); 7247 + "error obtaining product detail\n"); 7390 7248 return rc; 7391 7249 } 7392 7250 ··· 8166 8024 }, 8167 8025 { 8168 8026 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8027 + 0x1bd4, 0x004f) 8028 + }, 8029 + { 8030 + PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8169 8031 0x19e5, 0xd227) 8170 8032 }, 8171 8033 { ··· 8231 8085 { 8232 8086 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8233 8087 PCI_VENDOR_ID_ADAPTEC2, 0x0807) 8088 + }, 8089 + { 8090 + PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8091 + PCI_VENDOR_ID_ADAPTEC2, 0x0808) 8092 + }, 8093 + { 8094 + PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8095 + PCI_VENDOR_ID_ADAPTEC2, 0x0809) 8234 8096 }, 8235 8097 { 8236 8098 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, ··· 8395 8241 { 8396 8242 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8397 8243 PCI_VENDOR_ID_HP, 0x1101) 8244 + }, 8245 + { 8246 + PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8247 + 0x1d8d, 0x0800) 8248 + }, 8249 + { 8250 + PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8251 + 0x1d8d, 0x0908) 8252 + }, 8253 + { 8254 + PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8255 + 0x1d8d, 0x0806) 8256 + }, 8257 + { 8258 + PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8259 + 0x1d8d, 0x0916) 8260 + }, 8261 + { 8262 + PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f, 8263 + PCI_VENDOR_ID_GIGABYTE, 0x1000) 8398 8264 }, 8399 8265 { 8400 8266 PCI_DEVICE_SUB(PCI_VENDOR_ID_ADAPTEC2, 0x028f,
+100 -2
drivers/scsi/smartpqi/smartpqi_sas_transport.c
··· 312 312 static int pqi_sas_get_enclosure_identifier(struct sas_rphy *rphy, 313 313 u64 *identifier) 314 314 { 315 - return 0; 315 + 316 + int rc; 317 + unsigned long flags; 318 + struct Scsi_Host *shost; 319 + struct pqi_ctrl_info *ctrl_info; 320 + struct pqi_scsi_dev *found_device; 321 + struct pqi_scsi_dev *device; 322 + 323 + if (!rphy) 324 + return -ENODEV; 325 + 326 + shost = rphy_to_shost(rphy); 327 + ctrl_info = shost_to_hba(shost); 328 + spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 329 + found_device = pqi_find_device_by_sas_rphy(ctrl_info, rphy); 330 + 331 + if (!found_device) { 332 + rc = -ENODEV; 333 + goto out; 334 + } 335 + 336 + if (found_device->devtype == TYPE_ENCLOSURE) { 337 + *identifier = get_unaligned_be64(&found_device->wwid); 338 + rc = 0; 339 + goto out; 340 + } 341 + 342 + if (found_device->box_index == 0xff || 343 + found_device->phys_box_on_bus == 0 || 344 + found_device->bay == 0xff) { 345 + rc = -EINVAL; 346 + goto out; 347 + } 348 + 349 + list_for_each_entry(device, &ctrl_info->scsi_device_list, 350 + scsi_device_list_entry) { 351 + if (device->devtype == TYPE_ENCLOSURE && 352 + device->box_index == found_device->box_index && 353 + device->phys_box_on_bus == 354 + found_device->phys_box_on_bus && 355 + memcmp(device->phys_connector, 356 + found_device->phys_connector, 2) == 0) { 357 + *identifier = 358 + get_unaligned_be64(&device->wwid); 359 + rc = 0; 360 + goto out; 361 + } 362 + } 363 + 364 + if (found_device->phy_connected_dev_type != SA_CONTROLLER_DEVICE) { 365 + rc = -EINVAL; 366 + goto out; 367 + } 368 + 369 + list_for_each_entry(device, &ctrl_info->scsi_device_list, 370 + scsi_device_list_entry) { 371 + if (device->devtype == TYPE_ENCLOSURE && 372 + CISS_GET_DRIVE_NUMBER(device->scsi3addr) == 373 + PQI_VSEP_CISS_BTL) { 374 + *identifier = get_unaligned_be64(&device->wwid); 375 + rc = 0; 376 + goto out; 377 + } 378 + } 379 + 380 + rc = -EINVAL; 381 + out: 382 + spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 383 + 384 + return rc; 385 + 316 386 } 317 387 318 388 static int pqi_sas_get_bay_identifier(struct sas_rphy *rphy) 319 389 { 320 - return -ENXIO; 390 + 391 + int rc; 392 + unsigned long flags; 393 + struct pqi_ctrl_info *ctrl_info; 394 + struct pqi_scsi_dev *device; 395 + struct Scsi_Host *shost; 396 + 397 + if (!rphy) 398 + return -ENODEV; 399 + 400 + shost = rphy_to_shost(rphy); 401 + ctrl_info = shost_to_hba(shost); 402 + spin_lock_irqsave(&ctrl_info->scsi_device_list_lock, flags); 403 + device = pqi_find_device_by_sas_rphy(ctrl_info, rphy); 404 + 405 + if (!device) { 406 + rc = -ENODEV; 407 + goto out; 408 + } 409 + 410 + if (device->bay == 0xff) 411 + rc = -EINVAL; 412 + else 413 + rc = device->bay; 414 + 415 + out: 416 + spin_unlock_irqrestore(&ctrl_info->scsi_device_list_lock, flags); 417 + 418 + return rc; 321 419 } 322 420 323 421 static int pqi_sas_phy_reset(struct sas_phy *phy, int hard_reset)
+2
drivers/scsi/sun3_scsi.c
··· 397 397 case CSR_LEFT_3: 398 398 *vaddr = (dregs->bpack_lo & 0xff00) >> 8; 399 399 vaddr--; 400 + /* Fall through */ 400 401 401 402 case CSR_LEFT_2: 402 403 *vaddr = (dregs->bpack_hi & 0x00ff); 403 404 vaddr--; 405 + /* Fall through */ 404 406 405 407 case CSR_LEFT_1: 406 408 *vaddr = (dregs->bpack_hi & 0xff00) >> 8;
+1 -1
drivers/scsi/sym53c8xx_2/sym_nvram.c
··· 648 648 { 649 649 u_char gpcntl, gpreg; 650 650 u_char old_gpcntl, old_gpreg; 651 - int retv = 1; 651 + int retv; 652 652 653 653 /* save current state of GPCNTL and GPREG */ 654 654 old_gpreg = INB(np, nc_gpreg);
+33 -7
drivers/scsi/ufs/cdns-pltfrm.c
··· 62 62 } 63 63 64 64 /** 65 - * Sets clocks used by the controller 65 + * Called before and after HCE enable bit is set. 66 66 * @hba: host controller instance 67 - * @on: if true, enable clocks, otherwise disable 68 67 * @status: notify stage (pre, post change) 69 68 * 70 69 * Return zero for success and non-zero for failure 71 70 */ 72 - static int cdns_ufs_setup_clocks(struct ufs_hba *hba, bool on, 73 - enum ufs_notify_change_status status) 71 + static int cdns_ufs_hce_enable_notify(struct ufs_hba *hba, 72 + enum ufs_notify_change_status status) 74 73 { 75 - if ((!on) || (status == PRE_CHANGE)) 74 + if (status != PRE_CHANGE) 76 75 return 0; 77 76 78 77 return cdns_ufs_set_hclkdiv(hba); 78 + } 79 + 80 + /** 81 + * Called before and after Link startup is carried out. 82 + * @hba: host controller instance 83 + * @status: notify stage (pre, post change) 84 + * 85 + * Return zero for success and non-zero for failure 86 + */ 87 + static int cdns_ufs_link_startup_notify(struct ufs_hba *hba, 88 + enum ufs_notify_change_status status) 89 + { 90 + if (status != PRE_CHANGE) 91 + return 0; 92 + 93 + /* 94 + * Some UFS devices have issues if LCC is enabled. 95 + * So we are setting PA_Local_TX_LCC_Enable to 0 96 + * before link startup which will make sure that both host 97 + * and device TX LCC are disabled once link startup is 98 + * completed. 99 + */ 100 + ufshcd_dme_set(hba, UIC_ARG_MIB(PA_LOCAL_TX_LCC_ENABLE), 0); 101 + 102 + return 0; 79 103 } 80 104 81 105 /** ··· 138 114 139 115 static const struct ufs_hba_variant_ops cdns_ufs_pltfm_hba_vops = { 140 116 .name = "cdns-ufs-pltfm", 141 - .setup_clocks = cdns_ufs_setup_clocks, 117 + .hce_enable_notify = cdns_ufs_hce_enable_notify, 118 + .link_startup_notify = cdns_ufs_link_startup_notify, 142 119 }; 143 120 144 121 static const struct ufs_hba_variant_ops cdns_ufs_m31_16nm_pltfm_hba_vops = { 145 122 .name = "cdns-ufs-pltfm", 146 123 .init = cdns_ufs_init, 147 - .setup_clocks = cdns_ufs_setup_clocks, 124 + .hce_enable_notify = cdns_ufs_hce_enable_notify, 125 + .link_startup_notify = cdns_ufs_link_startup_notify, 148 126 .phy_initialization = cdns_ufs_m31_16nm_phy_initialization, 149 127 }; 150 128
+1 -3
drivers/scsi/ufs/ufs-hisi.c
··· 447 447 448 448 static int ufs_hisi_get_resource(struct ufs_hisi_host *host) 449 449 { 450 - struct resource *mem_res; 451 450 struct device *dev = host->hba->dev; 452 451 struct platform_device *pdev = to_platform_device(dev); 453 452 454 453 /* get resource of ufs sys ctrl */ 455 - mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 1); 456 - host->ufs_sys_ctrl = devm_ioremap_resource(dev, mem_res); 454 + host->ufs_sys_ctrl = devm_platform_ioremap_resource(pdev, 1); 457 455 if (IS_ERR(host->ufs_sys_ctrl)) 458 456 return PTR_ERR(host->ufs_sys_ctrl); 459 457
+37 -4
drivers/scsi/ufs/ufs-qcom.c
··· 8 8 #include <linux/of.h> 9 9 #include <linux/platform_device.h> 10 10 #include <linux/phy/phy.h> 11 + #include <linux/gpio/consumer.h> 11 12 #include <linux/reset-controller.h> 12 13 13 14 #include "ufshcd.h" ··· 801 800 struct ufs_pa_layer_attr *dev_max_params, 802 801 struct ufs_pa_layer_attr *dev_req_params) 803 802 { 804 - u32 val; 805 803 struct ufs_qcom_host *host = ufshcd_get_variant(hba); 806 804 struct ufs_dev_params ufs_qcom_cap; 807 805 int ret = 0; ··· 868 868 */ 869 869 ret = -EINVAL; 870 870 } 871 - 872 - val = ~(MAX_U32 << dev_req_params->lane_tx); 873 871 874 872 /* cache the power mode parameters to use internally */ 875 873 memcpy(&host->dev_req_params, ··· 1136 1138 dev_err(dev, "%s: PHY get failed %d\n", __func__, err); 1137 1139 goto out_variant_clear; 1138 1140 } 1141 + } 1142 + 1143 + host->device_reset = devm_gpiod_get_optional(dev, "reset", 1144 + GPIOD_OUT_HIGH); 1145 + if (IS_ERR(host->device_reset)) { 1146 + err = PTR_ERR(host->device_reset); 1147 + if (err != -EPROBE_DEFER) 1148 + dev_err(dev, "failed to acquire reset gpio: %d\n", err); 1149 + goto out_variant_clear; 1139 1150 } 1140 1151 1141 1152 err = ufs_qcom_bus_register(host); ··· 1553 1546 } 1554 1547 1555 1548 /** 1549 + * ufs_qcom_device_reset() - toggle the (optional) device reset line 1550 + * @hba: per-adapter instance 1551 + * 1552 + * Toggles the (optional) reset line to reset the attached device. 1553 + */ 1554 + static void ufs_qcom_device_reset(struct ufs_hba *hba) 1555 + { 1556 + struct ufs_qcom_host *host = ufshcd_get_variant(hba); 1557 + 1558 + /* reset gpio is optional */ 1559 + if (!host->device_reset) 1560 + return; 1561 + 1562 + /* 1563 + * The UFS device shall detect reset pulses of 1us, sleep for 10us to 1564 + * be on the safe side. 1565 + */ 1566 + gpiod_set_value_cansleep(host->device_reset, 1); 1567 + usleep_range(10, 15); 1568 + 1569 + gpiod_set_value_cansleep(host->device_reset, 0); 1570 + usleep_range(10, 15); 1571 + } 1572 + 1573 + /** 1556 1574 * struct ufs_hba_qcom_vops - UFS QCOM specific variant operations 1557 1575 * 1558 1576 * The variant operations configure the necessary controller and PHY 1559 1577 * handshake during initialization. 1560 1578 */ 1561 - static struct ufs_hba_variant_ops ufs_hba_qcom_vops = { 1579 + static const struct ufs_hba_variant_ops ufs_hba_qcom_vops = { 1562 1580 .name = "qcom", 1563 1581 .init = ufs_qcom_init, 1564 1582 .exit = ufs_qcom_exit, ··· 1597 1565 .suspend = ufs_qcom_suspend, 1598 1566 .resume = ufs_qcom_resume, 1599 1567 .dbg_register_dump = ufs_qcom_dump_dbg_regs, 1568 + .device_reset = ufs_qcom_device_reset, 1600 1569 }; 1601 1570 1602 1571 /**
+4
drivers/scsi/ufs/ufs-qcom.h
··· 195 195 u8 select_minor; 196 196 }; 197 197 198 + struct gpio_desc; 199 + 198 200 struct ufs_qcom_host { 199 201 /* 200 202 * Set this capability if host controller supports the QUniPro mode ··· 234 232 struct ufs_qcom_testbus testbus; 235 233 236 234 struct reset_controller_dev rcdev; 235 + 236 + struct gpio_desc *device_reset; 237 237 }; 238 238 239 239 static inline u32
+9 -9
drivers/scsi/ufs/ufs-sysfs.c
··· 571 571 int ret; \ 572 572 int desc_len = QUERY_DESC_MAX_SIZE; \ 573 573 u8 *desc_buf; \ 574 + \ 574 575 desc_buf = kzalloc(QUERY_DESC_MAX_SIZE, GFP_ATOMIC); \ 575 - if (!desc_buf) \ 576 - return -ENOMEM; \ 576 + if (!desc_buf) \ 577 + return -ENOMEM; \ 577 578 ret = ufshcd_query_descriptor_retry(hba, \ 578 579 UPIU_QUERY_OPCODE_READ_DESC, QUERY_DESC_IDN_DEVICE, \ 579 580 0, 0, desc_buf, &desc_len); \ ··· 583 582 goto out; \ 584 583 } \ 585 584 index = desc_buf[DEVICE_DESC_PARAM##_pname]; \ 586 - memset(desc_buf, 0, QUERY_DESC_MAX_SIZE); \ 587 - if (ufshcd_read_string_desc(hba, index, desc_buf, \ 588 - QUERY_DESC_MAX_SIZE, true)) { \ 589 - ret = -EINVAL; \ 585 + kfree(desc_buf); \ 586 + desc_buf = NULL; \ 587 + ret = ufshcd_read_string_desc(hba, index, &desc_buf, \ 588 + SD_ASCII_STD); \ 589 + if (ret < 0) \ 590 590 goto out; \ 591 - } \ 592 - ret = snprintf(buf, PAGE_SIZE, "%s\n", \ 593 - desc_buf + QUERY_DESC_HDR_SIZE); \ 591 + ret = snprintf(buf, PAGE_SIZE, "%s\n", desc_buf); \ 594 592 out: \ 595 593 kfree(desc_buf); \ 596 594 return ret; \
+1 -1
drivers/scsi/ufs/ufs.h
··· 541 541 */ 542 542 struct ufs_dev_desc { 543 543 u16 wmanufacturerid; 544 - char model[MAX_MODEL_LEN + 1]; 544 + u8 *model; 545 545 }; 546 546 547 547 /**
+1 -3
drivers/scsi/ufs/ufshcd-pltfrm.c
··· 391 391 { 392 392 struct ufs_hba *hba; 393 393 void __iomem *mmio_base; 394 - struct resource *mem_res; 395 394 int irq, err; 396 395 struct device *dev = &pdev->dev; 397 396 398 - mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 399 - mmio_base = devm_ioremap_resource(dev, mem_res); 397 + mmio_base = devm_platform_ioremap_resource(pdev, 0); 400 398 if (IS_ERR(mmio_base)) { 401 399 err = PTR_ERR(mmio_base); 402 400 goto out;
+166 -115
drivers/scsi/ufs/ufshcd.c
··· 299 299 scsi_block_requests(hba->host); 300 300 } 301 301 302 - /* replace non-printable or non-ASCII characters with spaces */ 303 - static inline void ufshcd_remove_non_printable(char *val) 304 - { 305 - if (!val) 306 - return; 307 - 308 - if (*val < 0x20 || *val > 0x7e) 309 - *val = ' '; 310 - } 311 - 312 302 static void ufshcd_add_cmd_upiu_trace(struct ufs_hba *hba, unsigned int tag, 313 303 const char *str) 314 304 { ··· 380 390 } 381 391 } 382 392 383 - static void ufshcd_print_uic_err_hist(struct ufs_hba *hba, 384 - struct ufs_uic_err_reg_hist *err_hist, char *err_name) 393 + static void ufshcd_print_err_hist(struct ufs_hba *hba, 394 + struct ufs_err_reg_hist *err_hist, 395 + char *err_name) 385 396 { 386 397 int i; 387 398 bool found = false; 388 399 389 - for (i = 0; i < UIC_ERR_REG_HIST_LENGTH; i++) { 390 - int p = (i + err_hist->pos) % UIC_ERR_REG_HIST_LENGTH; 400 + for (i = 0; i < UFS_ERR_REG_HIST_LENGTH; i++) { 401 + int p = (i + err_hist->pos) % UFS_ERR_REG_HIST_LENGTH; 391 402 392 403 if (err_hist->reg[p] == 0) 393 404 continue; 394 - dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, i, 405 + dev_err(hba->dev, "%s[%d] = 0x%x at %lld us\n", err_name, p, 395 406 err_hist->reg[p], ktime_to_us(err_hist->tstamp[p])); 396 407 found = true; 397 408 } 398 409 399 410 if (!found) 400 - dev_err(hba->dev, "No record of %s uic errors\n", err_name); 411 + dev_err(hba->dev, "No record of %s errors\n", err_name); 401 412 } 402 413 403 414 static void ufshcd_print_host_regs(struct ufs_hba *hba) ··· 414 423 ktime_to_us(hba->ufs_stats.last_hibern8_exit_tstamp), 415 424 hba->ufs_stats.hibern8_exit_cnt); 416 425 417 - ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.pa_err, "pa_err"); 418 - ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.dl_err, "dl_err"); 419 - ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.nl_err, "nl_err"); 420 - ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.tl_err, "tl_err"); 421 - ufshcd_print_uic_err_hist(hba, &hba->ufs_stats.dme_err, "dme_err"); 426 + ufshcd_print_err_hist(hba, &hba->ufs_stats.pa_err, "pa_err"); 427 + ufshcd_print_err_hist(hba, &hba->ufs_stats.dl_err, "dl_err"); 428 + ufshcd_print_err_hist(hba, &hba->ufs_stats.nl_err, "nl_err"); 429 + ufshcd_print_err_hist(hba, &hba->ufs_stats.tl_err, "tl_err"); 430 + ufshcd_print_err_hist(hba, &hba->ufs_stats.dme_err, "dme_err"); 431 + ufshcd_print_err_hist(hba, &hba->ufs_stats.auto_hibern8_err, 432 + "auto_hibern8_err"); 433 + ufshcd_print_err_hist(hba, &hba->ufs_stats.fatal_err, "fatal_err"); 434 + ufshcd_print_err_hist(hba, &hba->ufs_stats.link_startup_err, 435 + "link_startup_fail"); 436 + ufshcd_print_err_hist(hba, &hba->ufs_stats.resume_err, "resume_fail"); 437 + ufshcd_print_err_hist(hba, &hba->ufs_stats.suspend_err, 438 + "suspend_fail"); 439 + ufshcd_print_err_hist(hba, &hba->ufs_stats.dev_reset, "dev_reset"); 440 + ufshcd_print_err_hist(hba, &hba->ufs_stats.host_reset, "host_reset"); 441 + ufshcd_print_err_hist(hba, &hba->ufs_stats.task_abort, "task_abort"); 422 442 423 443 ufshcd_print_clk_freqs(hba); 424 444 ··· 3201 3199 static inline int ufshcd_read_desc(struct ufs_hba *hba, 3202 3200 enum desc_idn desc_id, 3203 3201 int desc_index, 3204 - u8 *buf, 3202 + void *buf, 3205 3203 u32 size) 3206 3204 { 3207 3205 return ufshcd_read_desc_param(hba, desc_id, desc_index, 0, buf, size); ··· 3220 3218 } 3221 3219 3222 3220 /** 3221 + * struct uc_string_id - unicode string 3222 + * 3223 + * @len: size of this descriptor inclusive 3224 + * @type: descriptor type 3225 + * @uc: unicode string character 3226 + */ 3227 + struct uc_string_id { 3228 + u8 len; 3229 + u8 type; 3230 + wchar_t uc[0]; 3231 + } __packed; 3232 + 3233 + /* replace non-printable or non-ASCII characters with spaces */ 3234 + static inline char ufshcd_remove_non_printable(u8 ch) 3235 + { 3236 + return (ch >= 0x20 && ch <= 0x7e) ? ch : ' '; 3237 + } 3238 + 3239 + /** 3223 3240 * ufshcd_read_string_desc - read string descriptor 3224 3241 * @hba: pointer to adapter instance 3225 3242 * @desc_index: descriptor index 3226 - * @buf: pointer to buffer where descriptor would be read 3227 - * @size: size of buf 3243 + * @buf: pointer to buffer where descriptor would be read, 3244 + * the caller should free the memory. 3228 3245 * @ascii: if true convert from unicode to ascii characters 3246 + * null terminated string. 3229 3247 * 3230 - * Return 0 in case of success, non-zero otherwise 3248 + * Return: 3249 + * * string size on success. 3250 + * * -ENOMEM: on allocation failure 3251 + * * -EINVAL: on a wrong parameter 3231 3252 */ 3232 - int ufshcd_read_string_desc(struct ufs_hba *hba, int desc_index, 3233 - u8 *buf, u32 size, bool ascii) 3253 + int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index, 3254 + u8 **buf, bool ascii) 3234 3255 { 3235 - int err = 0; 3256 + struct uc_string_id *uc_str; 3257 + u8 *str; 3258 + int ret; 3236 3259 3237 - err = ufshcd_read_desc(hba, 3238 - QUERY_DESC_IDN_STRING, desc_index, buf, size); 3260 + if (!buf) 3261 + return -EINVAL; 3239 3262 3240 - if (err) { 3241 - dev_err(hba->dev, "%s: reading String Desc failed after %d retries. err = %d\n", 3242 - __func__, QUERY_REQ_RETRIES, err); 3263 + uc_str = kzalloc(QUERY_DESC_MAX_SIZE, GFP_KERNEL); 3264 + if (!uc_str) 3265 + return -ENOMEM; 3266 + 3267 + ret = ufshcd_read_desc(hba, QUERY_DESC_IDN_STRING, 3268 + desc_index, uc_str, 3269 + QUERY_DESC_MAX_SIZE); 3270 + if (ret < 0) { 3271 + dev_err(hba->dev, "Reading String Desc failed after %d retries. err = %d\n", 3272 + QUERY_REQ_RETRIES, ret); 3273 + str = NULL; 3274 + goto out; 3275 + } 3276 + 3277 + if (uc_str->len <= QUERY_DESC_HDR_SIZE) { 3278 + dev_dbg(hba->dev, "String Desc is of zero length\n"); 3279 + str = NULL; 3280 + ret = 0; 3243 3281 goto out; 3244 3282 } 3245 3283 3246 3284 if (ascii) { 3247 - int desc_len; 3248 - int ascii_len; 3285 + ssize_t ascii_len; 3249 3286 int i; 3250 - char *buff_ascii; 3251 - 3252 - desc_len = buf[0]; 3253 3287 /* remove header and divide by 2 to move from UTF16 to UTF8 */ 3254 - ascii_len = (desc_len - QUERY_DESC_HDR_SIZE) / 2 + 1; 3255 - if (size < ascii_len + QUERY_DESC_HDR_SIZE) { 3256 - dev_err(hba->dev, "%s: buffer allocated size is too small\n", 3257 - __func__); 3258 - err = -ENOMEM; 3259 - goto out; 3260 - } 3261 - 3262 - buff_ascii = kmalloc(ascii_len, GFP_KERNEL); 3263 - if (!buff_ascii) { 3264 - err = -ENOMEM; 3288 + ascii_len = (uc_str->len - QUERY_DESC_HDR_SIZE) / 2 + 1; 3289 + str = kzalloc(ascii_len, GFP_KERNEL); 3290 + if (!str) { 3291 + ret = -ENOMEM; 3265 3292 goto out; 3266 3293 } 3267 3294 ··· 3298 3267 * the descriptor contains string in UTF16 format 3299 3268 * we need to convert to utf-8 so it can be displayed 3300 3269 */ 3301 - utf16s_to_utf8s((wchar_t *)&buf[QUERY_DESC_HDR_SIZE], 3302 - desc_len - QUERY_DESC_HDR_SIZE, 3303 - UTF16_BIG_ENDIAN, buff_ascii, ascii_len); 3270 + ret = utf16s_to_utf8s(uc_str->uc, 3271 + uc_str->len - QUERY_DESC_HDR_SIZE, 3272 + UTF16_BIG_ENDIAN, str, ascii_len); 3304 3273 3305 3274 /* replace non-printable or non-ASCII characters with spaces */ 3306 - for (i = 0; i < ascii_len; i++) 3307 - ufshcd_remove_non_printable(&buff_ascii[i]); 3275 + for (i = 0; i < ret; i++) 3276 + str[i] = ufshcd_remove_non_printable(str[i]); 3308 3277 3309 - memset(buf + QUERY_DESC_HDR_SIZE, 0, 3310 - size - QUERY_DESC_HDR_SIZE); 3311 - memcpy(buf + QUERY_DESC_HDR_SIZE, buff_ascii, ascii_len); 3312 - buf[QUERY_DESC_LENGTH_OFFSET] = ascii_len + QUERY_DESC_HDR_SIZE; 3313 - kfree(buff_ascii); 3278 + str[ret++] = '\0'; 3279 + 3280 + } else { 3281 + str = kmemdup(uc_str, uc_str->len, GFP_KERNEL); 3282 + if (!str) { 3283 + ret = -ENOMEM; 3284 + goto out; 3285 + } 3286 + ret = uc_str->len; 3314 3287 } 3315 3288 out: 3316 - return err; 3289 + *buf = str; 3290 + kfree(uc_str); 3291 + return ret; 3317 3292 } 3318 3293 3319 3294 /** ··· 4251 4214 { 4252 4215 int retry; 4253 4216 4254 - /* 4255 - * msleep of 1 and 5 used in this function might result in msleep(20), 4256 - * but it was necessary to send the UFS FPGA to reset mode during 4257 - * development and testing of this driver. msleep can be changed to 4258 - * mdelay and retry count can be reduced based on the controller. 4259 - */ 4260 4217 if (!ufshcd_is_hba_active(hba)) 4261 4218 /* change controller state to "reset state" */ 4262 4219 ufshcd_hba_stop(hba, true); ··· 4273 4242 * instruction might be read back. 4274 4243 * This delay can be changed based on the controller. 4275 4244 */ 4276 - msleep(1); 4245 + usleep_range(1000, 1100); 4277 4246 4278 4247 /* wait for the host controller to complete initialization */ 4279 4248 retry = 10; ··· 4285 4254 "Controller enable failed\n"); 4286 4255 return -EIO; 4287 4256 } 4288 - msleep(5); 4257 + usleep_range(5000, 5100); 4289 4258 } 4290 4259 4291 4260 /* enable UIC related interrupts */ ··· 4357 4326 return ufshcd_disable_tx_lcc(hba, true); 4358 4327 } 4359 4328 4329 + static void ufshcd_update_reg_hist(struct ufs_err_reg_hist *reg_hist, 4330 + u32 reg) 4331 + { 4332 + reg_hist->reg[reg_hist->pos] = reg; 4333 + reg_hist->tstamp[reg_hist->pos] = ktime_get(); 4334 + reg_hist->pos = (reg_hist->pos + 1) % UFS_ERR_REG_HIST_LENGTH; 4335 + } 4336 + 4360 4337 /** 4361 4338 * ufshcd_link_startup - Initialize unipro link startup 4362 4339 * @hba: per adapter instance ··· 4392 4353 4393 4354 /* check if device is detected by inter-connect layer */ 4394 4355 if (!ret && !ufshcd_is_device_present(hba)) { 4356 + ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err, 4357 + 0); 4395 4358 dev_err(hba->dev, "%s: Device not present\n", __func__); 4396 4359 ret = -ENXIO; 4397 4360 goto out; ··· 4404 4363 * but we can't be sure if the link is up until link startup 4405 4364 * succeeds. So reset the local Uni-Pro and try again. 4406 4365 */ 4407 - if (ret && ufshcd_hba_enable(hba)) 4366 + if (ret && ufshcd_hba_enable(hba)) { 4367 + ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err, 4368 + (u32)ret); 4408 4369 goto out; 4370 + } 4409 4371 } while (ret && retries--); 4410 4372 4411 - if (ret) 4373 + if (ret) { 4412 4374 /* failed to get the link up... retire */ 4375 + ufshcd_update_reg_hist(&hba->ufs_stats.link_startup_err, 4376 + (u32)ret); 4413 4377 goto out; 4378 + } 4414 4379 4415 4380 if (link_startup_again) { 4416 4381 link_startup_again = false; ··· 5392 5345 pm_runtime_put_sync(hba->dev); 5393 5346 } 5394 5347 5395 - static void ufshcd_update_uic_reg_hist(struct ufs_uic_err_reg_hist *reg_hist, 5396 - u32 reg) 5397 - { 5398 - reg_hist->reg[reg_hist->pos] = reg; 5399 - reg_hist->tstamp[reg_hist->pos] = ktime_get(); 5400 - reg_hist->pos = (reg_hist->pos + 1) % UIC_ERR_REG_HIST_LENGTH; 5401 - } 5402 - 5403 5348 /** 5404 5349 * ufshcd_update_uic_error - check and set fatal UIC error flags. 5405 5350 * @hba: per-adapter instance ··· 5410 5371 * must be checked but this error is handled separately. 5411 5372 */ 5412 5373 dev_dbg(hba->dev, "%s: UIC Lane error reported\n", __func__); 5413 - ufshcd_update_uic_reg_hist(&hba->ufs_stats.pa_err, reg); 5374 + ufshcd_update_reg_hist(&hba->ufs_stats.pa_err, reg); 5414 5375 } 5415 5376 5416 5377 /* PA_INIT_ERROR is fatal and needs UIC reset */ 5417 5378 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DATA_LINK_LAYER); 5418 5379 if (reg) 5419 - ufshcd_update_uic_reg_hist(&hba->ufs_stats.dl_err, reg); 5380 + ufshcd_update_reg_hist(&hba->ufs_stats.dl_err, reg); 5420 5381 5421 5382 if (reg & UIC_DATA_LINK_LAYER_ERROR_PA_INIT) 5422 5383 hba->uic_error |= UFSHCD_UIC_DL_PA_INIT_ERROR; ··· 5432 5393 /* UIC NL/TL/DME errors needs software retry */ 5433 5394 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_NETWORK_LAYER); 5434 5395 if (reg) { 5435 - ufshcd_update_uic_reg_hist(&hba->ufs_stats.nl_err, reg); 5396 + ufshcd_update_reg_hist(&hba->ufs_stats.nl_err, reg); 5436 5397 hba->uic_error |= UFSHCD_UIC_NL_ERROR; 5437 5398 } 5438 5399 5439 5400 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_TRANSPORT_LAYER); 5440 5401 if (reg) { 5441 - ufshcd_update_uic_reg_hist(&hba->ufs_stats.tl_err, reg); 5402 + ufshcd_update_reg_hist(&hba->ufs_stats.tl_err, reg); 5442 5403 hba->uic_error |= UFSHCD_UIC_TL_ERROR; 5443 5404 } 5444 5405 5445 5406 reg = ufshcd_readl(hba, REG_UIC_ERROR_CODE_DME); 5446 5407 if (reg) { 5447 - ufshcd_update_uic_reg_hist(&hba->ufs_stats.dme_err, reg); 5408 + ufshcd_update_reg_hist(&hba->ufs_stats.dme_err, reg); 5448 5409 hba->uic_error |= UFSHCD_UIC_DME_ERROR; 5449 5410 } 5450 5411 ··· 5477 5438 { 5478 5439 bool queue_eh_work = false; 5479 5440 5480 - if (hba->errors & INT_FATAL_ERRORS) 5441 + if (hba->errors & INT_FATAL_ERRORS) { 5442 + ufshcd_update_reg_hist(&hba->ufs_stats.fatal_err, hba->errors); 5481 5443 queue_eh_work = true; 5444 + } 5482 5445 5483 5446 if (hba->errors & UIC_ERROR) { 5484 5447 hba->uic_error = 0; ··· 5495 5454 __func__, (hba->errors & UIC_HIBERNATE_ENTER) ? 5496 5455 "Enter" : "Exit", 5497 5456 hba->errors, ufshcd_get_upmcrs(hba)); 5457 + ufshcd_update_reg_hist(&hba->ufs_stats.auto_hibern8_err, 5458 + hba->errors); 5498 5459 queue_eh_work = true; 5499 5460 } 5500 5461 ··· 5695 5652 memcpy(treq, hba->utmrdl_base_addr + free_slot, sizeof(*treq)); 5696 5653 5697 5654 ufshcd_add_tm_upiu_trace(hba, task_tag, "tm_complete"); 5698 - 5699 - spin_lock_irqsave(hba->host->host_lock, flags); 5700 - __clear_bit(free_slot, &hba->outstanding_tasks); 5701 - spin_unlock_irqrestore(hba->host->host_lock, flags); 5702 - 5703 5655 } 5656 + 5657 + spin_lock_irqsave(hba->host->host_lock, flags); 5658 + __clear_bit(free_slot, &hba->outstanding_tasks); 5659 + spin_unlock_irqrestore(hba->host->host_lock, flags); 5704 5660 5705 5661 clear_bit(free_slot, &hba->tm_condition); 5706 5662 ufshcd_put_tm_slot(hba, free_slot); ··· 5983 5941 5984 5942 out: 5985 5943 hba->req_abort_count = 0; 5944 + ufshcd_update_reg_hist(&hba->ufs_stats.dev_reset, (u32)err); 5986 5945 if (!err) { 5987 5946 err = SUCCESS; 5988 5947 } else { ··· 6077 6034 */ 6078 6035 scsi_print_command(hba->lrb[tag].cmd); 6079 6036 if (!hba->req_abort_count) { 6037 + ufshcd_update_reg_hist(&hba->ufs_stats.task_abort, 0); 6080 6038 ufshcd_print_host_regs(hba); 6081 6039 ufshcd_print_host_state(hba); 6082 6040 ufshcd_print_pwr_info(hba); ··· 6213 6169 out: 6214 6170 if (err) 6215 6171 dev_err(hba->dev, "%s: Host init failed %d\n", __func__, err); 6216 - 6172 + ufshcd_update_reg_hist(&hba->ufs_stats.host_reset, (u32)err); 6217 6173 return err; 6218 6174 } 6219 6175 ··· 6233 6189 int retries = MAX_HOST_RESET_RETRIES; 6234 6190 6235 6191 do { 6192 + /* Reset the attached device */ 6193 + ufshcd_vops_device_reset(hba); 6194 + 6236 6195 err = ufshcd_host_reset_and_restore(hba); 6237 6196 } while (err && --retries); 6238 6197 ··· 6500 6453 u8 model_index; 6501 6454 u8 *desc_buf; 6502 6455 6456 + if (!dev_desc) 6457 + return -EINVAL; 6458 + 6503 6459 buff_len = max_t(size_t, hba->desc_size.dev_desc, 6504 6460 QUERY_DESC_MAX_SIZE + 1); 6505 6461 desc_buf = kmalloc(buff_len, GFP_KERNEL); ··· 6526 6476 desc_buf[DEVICE_DESC_PARAM_MANF_ID + 1]; 6527 6477 6528 6478 model_index = desc_buf[DEVICE_DESC_PARAM_PRDCT_NAME]; 6529 - 6530 - /* Zero-pad entire buffer for string termination. */ 6531 - memset(desc_buf, 0, buff_len); 6532 - 6533 - err = ufshcd_read_string_desc(hba, model_index, desc_buf, 6534 - QUERY_DESC_MAX_SIZE, true/*ASCII*/); 6535 - if (err) { 6479 + err = ufshcd_read_string_desc(hba, model_index, 6480 + &dev_desc->model, SD_ASCII_STD); 6481 + if (err < 0) { 6536 6482 dev_err(hba->dev, "%s: Failed reading Product Name. err = %d\n", 6537 6483 __func__, err); 6538 6484 goto out; 6539 6485 } 6540 6486 6541 - desc_buf[QUERY_DESC_MAX_SIZE] = '\0'; 6542 - strlcpy(dev_desc->model, (desc_buf + QUERY_DESC_HDR_SIZE), 6543 - min_t(u8, desc_buf[QUERY_DESC_LENGTH_OFFSET], 6544 - MAX_MODEL_LEN)); 6545 - 6546 - /* Null terminate the model string */ 6547 - dev_desc->model[MAX_MODEL_LEN] = '\0'; 6487 + /* 6488 + * ufshcd_read_string_desc returns size of the string 6489 + * reset the error value 6490 + */ 6491 + err = 0; 6548 6492 6549 6493 out: 6550 6494 kfree(desc_buf); 6551 6495 return err; 6496 + } 6497 + 6498 + static void ufs_put_device_desc(struct ufs_dev_desc *dev_desc) 6499 + { 6500 + kfree(dev_desc->model); 6501 + dev_desc->model = NULL; 6552 6502 } 6553 6503 6554 6504 static void ufs_fixup_device_setup(struct ufs_hba *hba, ··· 6559 6509 for (f = ufs_fixups; f->quirk; f++) { 6560 6510 if ((f->card.wmanufacturerid == dev_desc->wmanufacturerid || 6561 6511 f->card.wmanufacturerid == UFS_ANY_VENDOR) && 6562 - (STR_PRFX_EQUAL(f->card.model, dev_desc->model) || 6563 - !strcmp(f->card.model, UFS_ANY_MODEL))) 6512 + ((dev_desc->model && 6513 + STR_PRFX_EQUAL(f->card.model, dev_desc->model)) || 6514 + !strcmp(f->card.model, UFS_ANY_MODEL))) 6564 6515 hba->dev_quirks |= f->quirk; 6565 6516 } 6566 6517 } ··· 6732 6681 6733 6682 static void ufshcd_clear_dbg_ufs_stats(struct ufs_hba *hba) 6734 6683 { 6735 - int err_reg_hist_size = sizeof(struct ufs_uic_err_reg_hist); 6736 - 6737 6684 hba->ufs_stats.hibern8_exit_cnt = 0; 6738 6685 hba->ufs_stats.last_hibern8_exit_tstamp = ktime_set(0, 0); 6739 - 6740 - memset(&hba->ufs_stats.pa_err, 0, err_reg_hist_size); 6741 - memset(&hba->ufs_stats.dl_err, 0, err_reg_hist_size); 6742 - memset(&hba->ufs_stats.nl_err, 0, err_reg_hist_size); 6743 - memset(&hba->ufs_stats.tl_err, 0, err_reg_hist_size); 6744 - memset(&hba->ufs_stats.dme_err, 0, err_reg_hist_size); 6745 - 6746 6686 hba->req_abort_count = 0; 6747 6687 } 6748 6688 ··· 6903 6861 } 6904 6862 6905 6863 ufs_fixup_device_setup(hba, &card); 6864 + ufs_put_device_desc(&card); 6865 + 6906 6866 ufshcd_tune_unipro_params(hba); 6907 6867 6908 6868 /* UFS device is also active now */ ··· 7867 7823 ufshcd_release(hba); 7868 7824 out: 7869 7825 hba->pm_op_in_progress = 0; 7826 + if (ret) 7827 + ufshcd_update_reg_hist(&hba->ufs_stats.suspend_err, (u32)ret); 7870 7828 return ret; 7871 7829 } 7872 7830 ··· 7971 7925 ufshcd_setup_clocks(hba, false); 7972 7926 out: 7973 7927 hba->pm_op_in_progress = 0; 7928 + if (ret) 7929 + ufshcd_update_reg_hist(&hba->ufs_stats.resume_err, (u32)ret); 7974 7930 return ret; 7975 7931 } 7976 7932 ··· 8371 8323 dev_err(hba->dev, "scsi_add_host failed\n"); 8372 8324 goto exit_gating; 8373 8325 } 8326 + 8327 + /* Reset the attached device */ 8328 + ufshcd_vops_device_reset(hba); 8374 8329 8375 8330 /* Host controller enable */ 8376 8331 err = ufshcd_hba_enable(hba);
+45 -12
drivers/scsi/ufs/ufshcd.h
··· 298 298 * @resume: called during host controller PM callback 299 299 * @dbg_register_dump: used to dump controller debug information 300 300 * @phy_initialization: used to initialize phys 301 + * @device_reset: called to issue a reset pulse on the UFS device 301 302 */ 302 303 struct ufs_hba_variant_ops { 303 304 const char *name; ··· 327 326 int (*resume)(struct ufs_hba *, enum ufs_pm_op); 328 327 void (*dbg_register_dump)(struct ufs_hba *hba); 329 328 int (*phy_initialization)(struct ufs_hba *); 329 + void (*device_reset)(struct ufs_hba *hba); 330 330 }; 331 331 332 332 /* clock gating state */ ··· 414 412 u32 icc_level; 415 413 }; 416 414 417 - #define UIC_ERR_REG_HIST_LENGTH 8 415 + #define UFS_ERR_REG_HIST_LENGTH 8 418 416 /** 419 - * struct ufs_uic_err_reg_hist - keeps history of uic errors 417 + * struct ufs_err_reg_hist - keeps history of errors 420 418 * @pos: index to indicate cyclic buffer position 421 419 * @reg: cyclic buffer for registers value 422 420 * @tstamp: cyclic buffer for time stamp 423 421 */ 424 - struct ufs_uic_err_reg_hist { 422 + struct ufs_err_reg_hist { 425 423 int pos; 426 - u32 reg[UIC_ERR_REG_HIST_LENGTH]; 427 - ktime_t tstamp[UIC_ERR_REG_HIST_LENGTH]; 424 + u32 reg[UFS_ERR_REG_HIST_LENGTH]; 425 + ktime_t tstamp[UFS_ERR_REG_HIST_LENGTH]; 428 426 }; 429 427 430 428 /** ··· 438 436 * @nl_err: tracks nl-uic errors 439 437 * @tl_err: tracks tl-uic errors 440 438 * @dme_err: tracks dme errors 439 + * @auto_hibern8_err: tracks auto-hibernate errors 440 + * @fatal_err: tracks fatal errors 441 + * @linkup_err: tracks link-startup errors 442 + * @resume_err: tracks resume errors 443 + * @suspend_err: tracks suspend errors 444 + * @dev_reset: tracks device reset events 445 + * @host_reset: tracks host reset events 446 + * @tsk_abort: tracks task abort events 441 447 */ 442 448 struct ufs_stats { 443 449 u32 hibern8_exit_cnt; 444 450 ktime_t last_hibern8_exit_tstamp; 445 - struct ufs_uic_err_reg_hist pa_err; 446 - struct ufs_uic_err_reg_hist dl_err; 447 - struct ufs_uic_err_reg_hist nl_err; 448 - struct ufs_uic_err_reg_hist tl_err; 449 - struct ufs_uic_err_reg_hist dme_err; 451 + 452 + /* uic specific errors */ 453 + struct ufs_err_reg_hist pa_err; 454 + struct ufs_err_reg_hist dl_err; 455 + struct ufs_err_reg_hist nl_err; 456 + struct ufs_err_reg_hist tl_err; 457 + struct ufs_err_reg_hist dme_err; 458 + 459 + /* fatal errors */ 460 + struct ufs_err_reg_hist auto_hibern8_err; 461 + struct ufs_err_reg_hist fatal_err; 462 + struct ufs_err_reg_hist link_startup_err; 463 + struct ufs_err_reg_hist resume_err; 464 + struct ufs_err_reg_hist suspend_err; 465 + 466 + /* abnormal events */ 467 + struct ufs_err_reg_hist dev_reset; 468 + struct ufs_err_reg_hist host_reset; 469 + struct ufs_err_reg_hist task_abort; 450 470 }; 451 471 452 472 /** ··· 915 891 enum attr_idn idn, u8 index, u8 selector, u32 *attr_val); 916 892 int ufshcd_query_flag(struct ufs_hba *hba, enum query_opcode opcode, 917 893 enum flag_idn idn, bool *flag_res); 918 - int ufshcd_read_string_desc(struct ufs_hba *hba, int desc_index, 919 - u8 *buf, u32 size, bool ascii); 894 + 895 + #define SD_ASCII_STD true 896 + #define SD_RAW false 897 + int ufshcd_read_string_desc(struct ufs_hba *hba, u8 desc_index, 898 + u8 **buf, bool ascii); 920 899 921 900 int ufshcd_hold(struct ufs_hba *hba, bool async); 922 901 void ufshcd_release(struct ufs_hba *hba); ··· 1070 1043 { 1071 1044 if (hba->vops && hba->vops->dbg_register_dump) 1072 1045 hba->vops->dbg_register_dump(hba); 1046 + } 1047 + 1048 + static inline void ufshcd_vops_device_reset(struct ufs_hba *hba) 1049 + { 1050 + if (hba->vops && hba->vops->device_reset) 1051 + hba->vops->device_reset(hba); 1073 1052 } 1074 1053 1075 1054 extern struct ufs_pm_lvl_states ufs_pm_lvl_states[];
+73 -15
drivers/scsi/virtio_scsi.c
··· 30 30 #include <linux/seqlock.h> 31 31 #include <linux/blk-mq-virtio.h> 32 32 33 + #include "sd.h" 34 + 33 35 #define VIRTIO_SCSI_MEMPOOL_SZ 64 34 36 #define VIRTIO_SCSI_EVENT_LEN 8 35 37 #define VIRTIO_SCSI_VQ_BASE 2 ··· 326 324 scsi_device_put(sdev); 327 325 } 328 326 327 + static void virtscsi_rescan_hotunplug(struct virtio_scsi *vscsi) 328 + { 329 + struct scsi_device *sdev; 330 + struct Scsi_Host *shost = virtio_scsi_host(vscsi->vdev); 331 + unsigned char scsi_cmd[MAX_COMMAND_SIZE]; 332 + int result, inquiry_len, inq_result_len = 256; 333 + char *inq_result = kmalloc(inq_result_len, GFP_KERNEL); 334 + 335 + shost_for_each_device(sdev, shost) { 336 + inquiry_len = sdev->inquiry_len ? sdev->inquiry_len : 36; 337 + 338 + memset(scsi_cmd, 0, sizeof(scsi_cmd)); 339 + scsi_cmd[0] = INQUIRY; 340 + scsi_cmd[4] = (unsigned char) inquiry_len; 341 + 342 + memset(inq_result, 0, inq_result_len); 343 + 344 + result = scsi_execute_req(sdev, scsi_cmd, DMA_FROM_DEVICE, 345 + inq_result, inquiry_len, NULL, 346 + SD_TIMEOUT, SD_MAX_RETRIES, NULL); 347 + 348 + if (result == 0 && inq_result[0] >> 5) { 349 + /* PQ indicates the LUN is not attached */ 350 + scsi_remove_device(sdev); 351 + } 352 + } 353 + 354 + kfree(inq_result); 355 + } 356 + 329 357 static void virtscsi_handle_event(struct work_struct *work) 330 358 { 331 359 struct virtio_scsi_event_node *event_node = ··· 367 335 cpu_to_virtio32(vscsi->vdev, VIRTIO_SCSI_T_EVENTS_MISSED)) { 368 336 event->event &= ~cpu_to_virtio32(vscsi->vdev, 369 337 VIRTIO_SCSI_T_EVENTS_MISSED); 338 + virtscsi_rescan_hotunplug(vscsi); 370 339 scsi_scan_host(virtio_scsi_host(vscsi->vdev)); 371 340 } 372 341 ··· 402 369 virtscsi_vq_done(vscsi, &vscsi->event_vq, virtscsi_complete_event); 403 370 }; 404 371 405 - /** 406 - * virtscsi_add_cmd - add a virtio_scsi_cmd to a virtqueue 407 - * @vq : the struct virtqueue we're talking about 408 - * @cmd : command structure 409 - * @req_size : size of the request buffer 410 - * @resp_size : size of the response buffer 411 - */ 412 - static int virtscsi_add_cmd(struct virtqueue *vq, 372 + static int __virtscsi_add_cmd(struct virtqueue *vq, 413 373 struct virtio_scsi_cmd *cmd, 414 374 size_t req_size, size_t resp_size) 415 375 { ··· 447 421 return virtqueue_add_sgs(vq, sgs, out_num, in_num, cmd, GFP_ATOMIC); 448 422 } 449 423 450 - static int virtscsi_kick_cmd(struct virtio_scsi_vq *vq, 424 + static void virtscsi_kick_vq(struct virtio_scsi_vq *vq) 425 + { 426 + bool needs_kick; 427 + unsigned long flags; 428 + 429 + spin_lock_irqsave(&vq->vq_lock, flags); 430 + needs_kick = virtqueue_kick_prepare(vq->vq); 431 + spin_unlock_irqrestore(&vq->vq_lock, flags); 432 + 433 + if (needs_kick) 434 + virtqueue_notify(vq->vq); 435 + } 436 + 437 + /** 438 + * virtscsi_add_cmd - add a virtio_scsi_cmd to a virtqueue, optionally kick it 439 + * @vq : the struct virtqueue we're talking about 440 + * @cmd : command structure 441 + * @req_size : size of the request buffer 442 + * @resp_size : size of the response buffer 443 + * @kick : whether to kick the virtqueue immediately 444 + */ 445 + static int virtscsi_add_cmd(struct virtio_scsi_vq *vq, 451 446 struct virtio_scsi_cmd *cmd, 452 - size_t req_size, size_t resp_size) 447 + size_t req_size, size_t resp_size, 448 + bool kick) 453 449 { 454 450 unsigned long flags; 455 451 int err; 456 452 bool needs_kick = false; 457 453 458 454 spin_lock_irqsave(&vq->vq_lock, flags); 459 - err = virtscsi_add_cmd(vq->vq, cmd, req_size, resp_size); 460 - if (!err) 455 + err = __virtscsi_add_cmd(vq->vq, cmd, req_size, resp_size); 456 + if (!err && kick) 461 457 needs_kick = virtqueue_kick_prepare(vq->vq); 462 458 463 459 spin_unlock_irqrestore(&vq->vq_lock, flags); ··· 544 496 struct virtio_scsi *vscsi = shost_priv(shost); 545 497 struct virtio_scsi_vq *req_vq = virtscsi_pick_vq_mq(vscsi, sc); 546 498 struct virtio_scsi_cmd *cmd = scsi_cmd_priv(sc); 499 + bool kick; 547 500 unsigned long flags; 548 501 int req_size; 549 502 int ret; ··· 574 525 req_size = sizeof(cmd->req.cmd); 575 526 } 576 527 577 - ret = virtscsi_kick_cmd(req_vq, cmd, req_size, sizeof(cmd->resp.cmd)); 528 + kick = (sc->flags & SCMD_LAST) != 0; 529 + ret = virtscsi_add_cmd(req_vq, cmd, req_size, sizeof(cmd->resp.cmd), kick); 578 530 if (ret == -EIO) { 579 531 cmd->resp.cmd.response = VIRTIO_SCSI_S_BAD_TARGET; 580 532 spin_lock_irqsave(&req_vq->vq_lock, flags); ··· 593 543 int ret = FAILED; 594 544 595 545 cmd->comp = &comp; 596 - if (virtscsi_kick_cmd(&vscsi->ctrl_vq, cmd, 597 - sizeof cmd->req.tmf, sizeof cmd->resp.tmf) < 0) 546 + if (virtscsi_add_cmd(&vscsi->ctrl_vq, cmd, 547 + sizeof cmd->req.tmf, sizeof cmd->resp.tmf, true) < 0) 598 548 goto out; 599 549 600 550 wait_for_completion(&comp); ··· 708 658 return blk_mq_virtio_map_queues(qmap, vscsi->vdev, 2); 709 659 } 710 660 661 + static void virtscsi_commit_rqs(struct Scsi_Host *shost, u16 hwq) 662 + { 663 + struct virtio_scsi *vscsi = shost_priv(shost); 664 + 665 + virtscsi_kick_vq(&vscsi->req_vqs[hwq]); 666 + } 667 + 711 668 /* 712 669 * The host guarantees to respond to each command, although I/O 713 670 * latencies might be higher than on bare metal. Reset the timer ··· 732 675 .this_id = -1, 733 676 .cmd_size = sizeof(struct virtio_scsi_cmd), 734 677 .queuecommand = virtscsi_queuecommand, 678 + .commit_rqs = virtscsi_commit_rqs, 735 679 .change_queue_depth = virtscsi_change_queue_depth, 736 680 .eh_abort_handler = virtscsi_abort, 737 681 .eh_device_reset_handler = virtscsi_device_reset,
+1
drivers/scsi/wd33c93.c
··· 1854 1854 case 1: --x; 1855 1855 break; 1856 1856 case 2: ++x; 1857 + /* fall through */ 1857 1858 case 3: ++x; 1858 1859 } 1859 1860 return x;
+20
drivers/target/target_core_user.c
··· 1712 1712 return 0; 1713 1713 } 1714 1714 1715 + static void tcmu_destroy_genl_cmd_reply(struct tcmu_dev *udev) 1716 + { 1717 + struct tcmu_nl_cmd *nl_cmd = &udev->curr_nl_cmd; 1718 + 1719 + if (!tcmu_kern_cmd_reply_supported) 1720 + return; 1721 + 1722 + if (udev->nl_reply_supported <= 0) 1723 + return; 1724 + 1725 + mutex_lock(&tcmu_nl_cmd_mutex); 1726 + 1727 + list_del(&nl_cmd->nl_list); 1728 + memset(nl_cmd, 0, sizeof(*nl_cmd)); 1729 + 1730 + mutex_unlock(&tcmu_nl_cmd_mutex); 1731 + } 1732 + 1715 1733 static int tcmu_wait_genl_cmd_reply(struct tcmu_dev *udev) 1716 1734 { 1717 1735 struct tcmu_nl_cmd *nl_cmd = &udev->curr_nl_cmd; ··· 1810 1792 if (ret == 0 || 1811 1793 (ret == -ESRCH && cmd == TCMU_CMD_ADDED_DEVICE)) 1812 1794 return tcmu_wait_genl_cmd_reply(udev); 1795 + else 1796 + tcmu_destroy_genl_cmd_reply(udev); 1813 1797 1814 1798 return ret; 1815 1799 }
+2
include/linux/nvme-fc-driver.h
··· 6 6 #ifndef _NVME_FC_DRIVER_H 7 7 #define _NVME_FC_DRIVER_H 1 8 8 9 + #include <linux/scatterlist.h> 10 + 9 11 10 12 /* 11 13 * ********************** LLDD FC-NVME Host API ********************
+1
include/scsi/scsi_cmnd.h
··· 57 57 #define SCMD_TAGGED (1 << 0) 58 58 #define SCMD_UNCHECKED_ISA_DMA (1 << 1) 59 59 #define SCMD_INITIALIZED (1 << 2) 60 + #define SCMD_LAST (1 << 3) 60 61 /* flags preserved across unprep / reprep */ 61 62 #define SCMD_PRESERVED_FLAGS (SCMD_UNCHECKED_ISA_DMA | SCMD_INITIALIZED) 62 63
-2
include/scsi/scsi_dbg.h
··· 6 6 struct scsi_device; 7 7 struct scsi_sense_hdr; 8 8 9 - #define SCSI_LOG_BUFSIZE 128 10 - 11 9 extern void scsi_print_command(struct scsi_cmnd *); 12 10 extern size_t __scsi_format_command(char *, size_t, 13 11 const unsigned char *, size_t);
+14 -2
include/scsi/scsi_host.h
··· 80 80 * command block to the LLDD. When the driver finished 81 81 * processing the command the done callback is invoked. 82 82 * 83 - * If queuecommand returns 0, then the HBA has accepted the 84 - * command. The done() function must be called on the command 83 + * If queuecommand returns 0, then the driver has accepted the 84 + * command. It must also push it to the HBA if the scsi_cmnd 85 + * flag SCMD_LAST is set, or if the driver does not implement 86 + * commit_rqs. The done() function must be called on the command 85 87 * when the driver has finished with it. (you may call done on the 86 88 * command before queuecommand returns, but in this case you 87 89 * *must* return 0 from queuecommand). ··· 110 108 * STATUS: REQUIRED 111 109 */ 112 110 int (* queuecommand)(struct Scsi_Host *, struct scsi_cmnd *); 111 + 112 + /* 113 + * The commit_rqs function is used to trigger a hardware 114 + * doorbell after some requests have been queued with 115 + * queuecommand, when an error is encountered before sending 116 + * the request with SCMD_LAST set. 117 + * 118 + * STATUS: OPTIONAL 119 + */ 120 + void (*commit_rqs)(struct Scsi_Host *, u16); 113 121 114 122 /* 115 123 * This is an error handling strategy routine. You don't need to
+28 -26
include/uapi/scsi/scsi_bsg_fc.h
··· 8 8 #ifndef SCSI_BSG_FC_H 9 9 #define SCSI_BSG_FC_H 10 10 11 + #include <linux/types.h> 12 + 11 13 /* 12 14 * This file intended to be included by both kernel and user space 13 15 */ ··· 68 66 * with the transport upon completion of the login. 69 67 */ 70 68 struct fc_bsg_host_add_rport { 71 - uint8_t reserved; 69 + __u8 reserved; 72 70 73 71 /* FC Address Identier of the remote port to login to */ 74 - uint8_t port_id[3]; 72 + __u8 port_id[3]; 75 73 }; 76 74 77 75 /* Response: ··· 89 87 * remain logged in with the remote port. 90 88 */ 91 89 struct fc_bsg_host_del_rport { 92 - uint8_t reserved; 90 + __u8 reserved; 93 91 94 92 /* FC Address Identier of the remote port to logout of */ 95 - uint8_t port_id[3]; 93 + __u8 port_id[3]; 96 94 }; 97 95 98 96 /* Response: ··· 113 111 * ELS Command Code being sent (must be the same as byte 0 114 112 * of the payload) 115 113 */ 116 - uint8_t command_code; 114 + __u8 command_code; 117 115 118 116 /* FC Address Identier of the remote port to send the ELS to */ 119 - uint8_t port_id[3]; 117 + __u8 port_id[3]; 120 118 }; 121 119 122 120 /* Response: ··· 153 151 * Note: x_RJT/BSY status will indicae that the rjt_data field 154 152 * is valid and contains the reason/explanation values. 155 153 */ 156 - uint32_t status; /* See FC_CTELS_STATUS_xxx */ 154 + __u32 status; /* See FC_CTELS_STATUS_xxx */ 157 155 158 156 /* valid if status is not FC_CTELS_STATUS_OK */ 159 157 struct { 160 - uint8_t action; /* fragment_id for CT REJECT */ 161 - uint8_t reason_code; 162 - uint8_t reason_explanation; 163 - uint8_t vendor_unique; 158 + __u8 action; /* fragment_id for CT REJECT */ 159 + __u8 reason_code; 160 + __u8 reason_explanation; 161 + __u8 vendor_unique; 164 162 } rjt_data; 165 163 }; 166 164 ··· 176 174 * and whether to tear it down after the request. 177 175 */ 178 176 struct fc_bsg_host_ct { 179 - uint8_t reserved; 177 + __u8 reserved; 180 178 181 179 /* FC Address Identier of the remote port to send the ELS to */ 182 - uint8_t port_id[3]; 180 + __u8 port_id[3]; 183 181 184 182 /* 185 183 * We need words 0-2 of the generic preamble for the LLD's 186 184 */ 187 - uint32_t preamble_word0; /* revision & IN_ID */ 188 - uint32_t preamble_word1; /* GS_Type, GS_SubType, Options, Rsvd */ 189 - uint32_t preamble_word2; /* Cmd Code, Max Size */ 185 + __u32 preamble_word0; /* revision & IN_ID */ 186 + __u32 preamble_word1; /* GS_Type, GS_SubType, Options, Rsvd */ 187 + __u32 preamble_word2; /* Cmd Code, Max Size */ 190 188 191 189 }; 192 190 /* Response: ··· 206 204 * Identifies the vendor that the message is formatted for. This 207 205 * should be the recipient of the message. 208 206 */ 209 - uint64_t vendor_id; 207 + __u64 vendor_id; 210 208 211 209 /* start of vendor command area */ 212 - uint32_t vendor_cmd[0]; 210 + __u32 vendor_cmd[0]; 213 211 }; 214 212 215 213 /* Response: 216 214 */ 217 215 struct fc_bsg_host_vendor_reply { 218 216 /* start of vendor response area */ 219 - uint32_t vendor_rsp[0]; 217 + __u32 vendor_rsp[0]; 220 218 }; 221 219 222 220 ··· 235 233 * ELS Command Code being sent (must be the same as 236 234 * byte 0 of the payload) 237 235 */ 238 - uint8_t els_code; 236 + __u8 els_code; 239 237 }; 240 238 241 239 /* Response: ··· 253 251 /* 254 252 * We need words 0-2 of the generic preamble for the LLD's 255 253 */ 256 - uint32_t preamble_word0; /* revision & IN_ID */ 257 - uint32_t preamble_word1; /* GS_Type, GS_SubType, Options, Rsvd */ 258 - uint32_t preamble_word2; /* Cmd Code, Max Size */ 254 + __u32 preamble_word0; /* revision & IN_ID */ 255 + __u32 preamble_word1; /* GS_Type, GS_SubType, Options, Rsvd */ 256 + __u32 preamble_word2; /* Cmd Code, Max Size */ 259 257 }; 260 258 /* Response: 261 259 * ··· 267 265 268 266 /* request (CDB) structure of the sg_io_v4 */ 269 267 struct fc_bsg_request { 270 - uint32_t msgcode; 268 + __u32 msgcode; 271 269 union { 272 270 struct fc_bsg_host_add_rport h_addrport; 273 271 struct fc_bsg_host_del_rport h_delrport; ··· 291 289 * msg and status fields. The per-msgcode reply structure 292 290 * will contain valid data. 293 291 */ 294 - uint32_t result; 292 + __u32 result; 295 293 296 294 /* If there was reply_payload, how much was recevied ? */ 297 - uint32_t reply_payload_rcv_len; 295 + __u32 reply_payload_rcv_len; 298 296 299 297 union { 300 298 struct fc_bsg_host_vendor_reply vendor_reply;
+10 -10
include/uapi/scsi/scsi_netlink.h
··· 26 26 27 27 /* SCSI_TRANSPORT_MSG event message header */ 28 28 struct scsi_nl_hdr { 29 - uint8_t version; 30 - uint8_t transport; 31 - uint16_t magic; 32 - uint16_t msgtype; 33 - uint16_t msglen; 34 - } __attribute__((aligned(sizeof(uint64_t)))); 29 + __u8 version; 30 + __u8 transport; 31 + __u16 magic; 32 + __u16 msgtype; 33 + __u16 msglen; 34 + } __attribute__((aligned(sizeof(__u64)))); 35 35 36 36 /* scsi_nl_hdr->version value */ 37 37 #define SCSI_NL_VERSION 1 ··· 75 75 */ 76 76 struct scsi_nl_host_vendor_msg { 77 77 struct scsi_nl_hdr snlh; /* must be 1st element ! */ 78 - uint64_t vendor_id; 79 - uint16_t host_no; 80 - uint16_t vmsg_datalen; 81 - } __attribute__((aligned(sizeof(uint64_t)))); 78 + __u64 vendor_id; 79 + __u16 host_no; 80 + __u16 vmsg_datalen; 81 + } __attribute__((aligned(sizeof(__u64)))); 82 82 83 83 84 84 /*