Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

mfd: mc13xxx: Use regmap irq framework for interrupts

This patch convert mc13xxx MFD driver to use regmap irq framework
for interrupt registration.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

authored by

Alexander Shiyan and committed by
Lee Jones
10f9edae 215cd99a

+65 -281
+1
drivers/mfd/Kconfig
··· 187 187 tristate 188 188 depends on (SPI_MASTER || I2C) 189 189 select MFD_CORE 190 + select REGMAP_IRQ 190 191 help 191 192 Enable support for the Freescale MC13783 and MC13892 PMICs. 192 193 This driver provides common support for accessing the device,
+41 -269
drivers/mfd/mc13xxx-core.c
··· 10 10 * Free Software Foundation. 11 11 */ 12 12 13 - #include <linux/slab.h> 14 13 #include <linux/module.h> 15 - #include <linux/platform_device.h> 16 - #include <linux/mutex.h> 17 - #include <linux/interrupt.h> 18 - #include <linux/mfd/core.h> 19 - #include <linux/mfd/mc13xxx.h> 20 14 #include <linux/of.h> 21 15 #include <linux/of_device.h> 22 - #include <linux/of_gpio.h> 16 + #include <linux/platform_device.h> 17 + #include <linux/mfd/core.h> 23 18 24 19 #include "mc13xxx.h" 25 20 26 21 #define MC13XXX_IRQSTAT0 0 27 - #define MC13XXX_IRQSTAT0_ADCDONEI (1 << 0) 28 - #define MC13XXX_IRQSTAT0_ADCBISDONEI (1 << 1) 29 - #define MC13XXX_IRQSTAT0_TSI (1 << 2) 30 - #define MC13783_IRQSTAT0_WHIGHI (1 << 3) 31 - #define MC13783_IRQSTAT0_WLOWI (1 << 4) 32 - #define MC13XXX_IRQSTAT0_CHGDETI (1 << 6) 33 - #define MC13783_IRQSTAT0_CHGOVI (1 << 7) 34 - #define MC13XXX_IRQSTAT0_CHGREVI (1 << 8) 35 - #define MC13XXX_IRQSTAT0_CHGSHORTI (1 << 9) 36 - #define MC13XXX_IRQSTAT0_CCCVI (1 << 10) 37 - #define MC13XXX_IRQSTAT0_CHGCURRI (1 << 11) 38 - #define MC13XXX_IRQSTAT0_BPONI (1 << 12) 39 - #define MC13XXX_IRQSTAT0_LOBATLI (1 << 13) 40 - #define MC13XXX_IRQSTAT0_LOBATHI (1 << 14) 41 - #define MC13783_IRQSTAT0_UDPI (1 << 15) 42 - #define MC13783_IRQSTAT0_USBI (1 << 16) 43 - #define MC13783_IRQSTAT0_IDI (1 << 19) 44 - #define MC13783_IRQSTAT0_SE1I (1 << 21) 45 - #define MC13783_IRQSTAT0_CKDETI (1 << 22) 46 - #define MC13783_IRQSTAT0_UDMI (1 << 23) 47 - 48 22 #define MC13XXX_IRQMASK0 1 49 - #define MC13XXX_IRQMASK0_ADCDONEM MC13XXX_IRQSTAT0_ADCDONEI 50 - #define MC13XXX_IRQMASK0_ADCBISDONEM MC13XXX_IRQSTAT0_ADCBISDONEI 51 - #define MC13XXX_IRQMASK0_TSM MC13XXX_IRQSTAT0_TSI 52 - #define MC13783_IRQMASK0_WHIGHM MC13783_IRQSTAT0_WHIGHI 53 - #define MC13783_IRQMASK0_WLOWM MC13783_IRQSTAT0_WLOWI 54 - #define MC13XXX_IRQMASK0_CHGDETM MC13XXX_IRQSTAT0_CHGDETI 55 - #define MC13783_IRQMASK0_CHGOVM MC13783_IRQSTAT0_CHGOVI 56 - #define MC13XXX_IRQMASK0_CHGREVM MC13XXX_IRQSTAT0_CHGREVI 57 - #define MC13XXX_IRQMASK0_CHGSHORTM MC13XXX_IRQSTAT0_CHGSHORTI 58 - #define MC13XXX_IRQMASK0_CCCVM MC13XXX_IRQSTAT0_CCCVI 59 - #define MC13XXX_IRQMASK0_CHGCURRM MC13XXX_IRQSTAT0_CHGCURRI 60 - #define MC13XXX_IRQMASK0_BPONM MC13XXX_IRQSTAT0_BPONI 61 - #define MC13XXX_IRQMASK0_LOBATLM MC13XXX_IRQSTAT0_LOBATLI 62 - #define MC13XXX_IRQMASK0_LOBATHM MC13XXX_IRQSTAT0_LOBATHI 63 - #define MC13783_IRQMASK0_UDPM MC13783_IRQSTAT0_UDPI 64 - #define MC13783_IRQMASK0_USBM MC13783_IRQSTAT0_USBI 65 - #define MC13783_IRQMASK0_IDM MC13783_IRQSTAT0_IDI 66 - #define MC13783_IRQMASK0_SE1M MC13783_IRQSTAT0_SE1I 67 - #define MC13783_IRQMASK0_CKDETM MC13783_IRQSTAT0_CKDETI 68 - #define MC13783_IRQMASK0_UDMM MC13783_IRQSTAT0_UDMI 69 - 70 23 #define MC13XXX_IRQSTAT1 3 71 - #define MC13XXX_IRQSTAT1_1HZI (1 << 0) 72 - #define MC13XXX_IRQSTAT1_TODAI (1 << 1) 73 - #define MC13783_IRQSTAT1_ONOFD1I (1 << 3) 74 - #define MC13783_IRQSTAT1_ONOFD2I (1 << 4) 75 - #define MC13783_IRQSTAT1_ONOFD3I (1 << 5) 76 - #define MC13XXX_IRQSTAT1_SYSRSTI (1 << 6) 77 - #define MC13XXX_IRQSTAT1_RTCRSTI (1 << 7) 78 - #define MC13XXX_IRQSTAT1_PCI (1 << 8) 79 - #define MC13XXX_IRQSTAT1_WARMI (1 << 9) 80 - #define MC13XXX_IRQSTAT1_MEMHLDI (1 << 10) 81 - #define MC13783_IRQSTAT1_PWRRDYI (1 << 11) 82 - #define MC13XXX_IRQSTAT1_THWARNLI (1 << 12) 83 - #define MC13XXX_IRQSTAT1_THWARNHI (1 << 13) 84 - #define MC13XXX_IRQSTAT1_CLKI (1 << 14) 85 - #define MC13783_IRQSTAT1_SEMAFI (1 << 15) 86 - #define MC13783_IRQSTAT1_MC2BI (1 << 17) 87 - #define MC13783_IRQSTAT1_HSDETI (1 << 18) 88 - #define MC13783_IRQSTAT1_HSLI (1 << 19) 89 - #define MC13783_IRQSTAT1_ALSPTHI (1 << 20) 90 - #define MC13783_IRQSTAT1_AHSSHORTI (1 << 21) 91 - 92 24 #define MC13XXX_IRQMASK1 4 93 - #define MC13XXX_IRQMASK1_1HZM MC13XXX_IRQSTAT1_1HZI 94 - #define MC13XXX_IRQMASK1_TODAM MC13XXX_IRQSTAT1_TODAI 95 - #define MC13783_IRQMASK1_ONOFD1M MC13783_IRQSTAT1_ONOFD1I 96 - #define MC13783_IRQMASK1_ONOFD2M MC13783_IRQSTAT1_ONOFD2I 97 - #define MC13783_IRQMASK1_ONOFD3M MC13783_IRQSTAT1_ONOFD3I 98 - #define MC13XXX_IRQMASK1_SYSRSTM MC13XXX_IRQSTAT1_SYSRSTI 99 - #define MC13XXX_IRQMASK1_RTCRSTM MC13XXX_IRQSTAT1_RTCRSTI 100 - #define MC13XXX_IRQMASK1_PCM MC13XXX_IRQSTAT1_PCI 101 - #define MC13XXX_IRQMASK1_WARMM MC13XXX_IRQSTAT1_WARMI 102 - #define MC13XXX_IRQMASK1_MEMHLDM MC13XXX_IRQSTAT1_MEMHLDI 103 - #define MC13783_IRQMASK1_PWRRDYM MC13783_IRQSTAT1_PWRRDYI 104 - #define MC13XXX_IRQMASK1_THWARNLM MC13XXX_IRQSTAT1_THWARNLI 105 - #define MC13XXX_IRQMASK1_THWARNHM MC13XXX_IRQSTAT1_THWARNHI 106 - #define MC13XXX_IRQMASK1_CLKM MC13XXX_IRQSTAT1_CLKI 107 - #define MC13783_IRQMASK1_SEMAFM MC13783_IRQSTAT1_SEMAFI 108 - #define MC13783_IRQMASK1_MC2BM MC13783_IRQSTAT1_MC2BI 109 - #define MC13783_IRQMASK1_HSDETM MC13783_IRQSTAT1_HSDETI 110 - #define MC13783_IRQMASK1_HSLM MC13783_IRQSTAT1_HSLI 111 - #define MC13783_IRQMASK1_ALSPTHM MC13783_IRQSTAT1_ALSPTHI 112 - #define MC13783_IRQMASK1_AHSSHORTM MC13783_IRQSTAT1_AHSSHORTI 113 25 114 26 #define MC13XXX_REVISION 7 115 27 #define MC13XXX_REVISION_REVMETAL (0x07 << 0) ··· 101 189 102 190 int mc13xxx_irq_mask(struct mc13xxx *mc13xxx, int irq) 103 191 { 104 - int ret; 105 - unsigned int offmask = irq < 24 ? MC13XXX_IRQMASK0 : MC13XXX_IRQMASK1; 106 - u32 irqbit = 1 << (irq < 24 ? irq : irq - 24); 107 - u32 mask; 192 + int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq); 108 193 109 - if (irq < 0 || irq >= MC13XXX_NUM_IRQ) 110 - return -EINVAL; 194 + disable_irq_nosync(virq); 111 195 112 - ret = mc13xxx_reg_read(mc13xxx, offmask, &mask); 113 - if (ret) 114 - return ret; 115 - 116 - if (mask & irqbit) 117 - /* already masked */ 118 - return 0; 119 - 120 - return mc13xxx_reg_write(mc13xxx, offmask, mask | irqbit); 196 + return 0; 121 197 } 122 198 EXPORT_SYMBOL(mc13xxx_irq_mask); 123 199 124 200 int mc13xxx_irq_unmask(struct mc13xxx *mc13xxx, int irq) 125 201 { 126 - int ret; 127 - unsigned int offmask = irq < 24 ? MC13XXX_IRQMASK0 : MC13XXX_IRQMASK1; 128 - u32 irqbit = 1 << (irq < 24 ? irq : irq - 24); 129 - u32 mask; 202 + int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq); 130 203 131 - if (irq < 0 || irq >= MC13XXX_NUM_IRQ) 132 - return -EINVAL; 204 + enable_irq(virq); 133 205 134 - ret = mc13xxx_reg_read(mc13xxx, offmask, &mask); 135 - if (ret) 136 - return ret; 137 - 138 - if (!(mask & irqbit)) 139 - /* already unmasked */ 140 - return 0; 141 - 142 - return mc13xxx_reg_write(mc13xxx, offmask, mask & ~irqbit); 206 + return 0; 143 207 } 144 208 EXPORT_SYMBOL(mc13xxx_irq_unmask); 145 209 ··· 127 239 unsigned int offstat = irq < 24 ? MC13XXX_IRQSTAT0 : MC13XXX_IRQSTAT1; 128 240 u32 irqbit = 1 << (irq < 24 ? irq : irq - 24); 129 241 130 - if (irq < 0 || irq >= MC13XXX_NUM_IRQ) 242 + if (irq < 0 || irq >= ARRAY_SIZE(mc13xxx->irqs)) 131 243 return -EINVAL; 132 244 133 245 if (enabled) { ··· 154 266 } 155 267 EXPORT_SYMBOL(mc13xxx_irq_status); 156 268 157 - int mc13xxx_irq_ack(struct mc13xxx *mc13xxx, int irq) 158 - { 159 - unsigned int offstat = irq < 24 ? MC13XXX_IRQSTAT0 : MC13XXX_IRQSTAT1; 160 - unsigned int val = 1 << (irq < 24 ? irq : irq - 24); 161 - 162 - BUG_ON(irq < 0 || irq >= MC13XXX_NUM_IRQ); 163 - 164 - return mc13xxx_reg_write(mc13xxx, offstat, val); 165 - } 166 - EXPORT_SYMBOL(mc13xxx_irq_ack); 167 - 168 - int mc13xxx_irq_request_nounmask(struct mc13xxx *mc13xxx, int irq, 169 - irq_handler_t handler, const char *name, void *dev) 170 - { 171 - BUG_ON(!mutex_is_locked(&mc13xxx->lock)); 172 - BUG_ON(!handler); 173 - 174 - if (irq < 0 || irq >= MC13XXX_NUM_IRQ) 175 - return -EINVAL; 176 - 177 - if (mc13xxx->irqhandler[irq]) 178 - return -EBUSY; 179 - 180 - mc13xxx->irqhandler[irq] = handler; 181 - mc13xxx->irqdata[irq] = dev; 182 - 183 - return 0; 184 - } 185 - EXPORT_SYMBOL(mc13xxx_irq_request_nounmask); 186 - 187 269 int mc13xxx_irq_request(struct mc13xxx *mc13xxx, int irq, 188 270 irq_handler_t handler, const char *name, void *dev) 189 271 { 190 - int ret; 272 + int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq); 191 273 192 - ret = mc13xxx_irq_request_nounmask(mc13xxx, irq, handler, name, dev); 193 - if (ret) 194 - return ret; 195 - 196 - ret = mc13xxx_irq_unmask(mc13xxx, irq); 197 - if (ret) { 198 - mc13xxx->irqhandler[irq] = NULL; 199 - mc13xxx->irqdata[irq] = NULL; 200 - return ret; 201 - } 202 - 203 - return 0; 274 + return devm_request_threaded_irq(mc13xxx->dev, virq, NULL, handler, 275 + 0, name, dev); 204 276 } 205 277 EXPORT_SYMBOL(mc13xxx_irq_request); 206 278 207 279 int mc13xxx_irq_free(struct mc13xxx *mc13xxx, int irq, void *dev) 208 280 { 209 - int ret; 210 - BUG_ON(!mutex_is_locked(&mc13xxx->lock)); 281 + int virq = regmap_irq_get_virq(mc13xxx->irq_data, irq); 211 282 212 - if (irq < 0 || irq >= MC13XXX_NUM_IRQ || !mc13xxx->irqhandler[irq] || 213 - mc13xxx->irqdata[irq] != dev) 214 - return -EINVAL; 215 - 216 - ret = mc13xxx_irq_mask(mc13xxx, irq); 217 - if (ret) 218 - return ret; 219 - 220 - mc13xxx->irqhandler[irq] = NULL; 221 - mc13xxx->irqdata[irq] = NULL; 283 + devm_free_irq(mc13xxx->dev, virq, dev); 222 284 223 285 return 0; 224 286 } 225 287 EXPORT_SYMBOL(mc13xxx_irq_free); 226 - 227 - static inline irqreturn_t mc13xxx_irqhandler(struct mc13xxx *mc13xxx, int irq) 228 - { 229 - return mc13xxx->irqhandler[irq](irq, mc13xxx->irqdata[irq]); 230 - } 231 - 232 - /* 233 - * returns: number of handled irqs or negative error 234 - * locking: holds mc13xxx->lock 235 - */ 236 - static int mc13xxx_irq_handle(struct mc13xxx *mc13xxx, 237 - unsigned int offstat, unsigned int offmask, int baseirq) 238 - { 239 - u32 stat, mask; 240 - int ret = mc13xxx_reg_read(mc13xxx, offstat, &stat); 241 - int num_handled = 0; 242 - 243 - if (ret) 244 - return ret; 245 - 246 - ret = mc13xxx_reg_read(mc13xxx, offmask, &mask); 247 - if (ret) 248 - return ret; 249 - 250 - while (stat & ~mask) { 251 - int irq = __ffs(stat & ~mask); 252 - 253 - stat &= ~(1 << irq); 254 - 255 - if (likely(mc13xxx->irqhandler[baseirq + irq])) { 256 - irqreturn_t handled; 257 - 258 - handled = mc13xxx_irqhandler(mc13xxx, baseirq + irq); 259 - if (handled == IRQ_HANDLED) 260 - num_handled++; 261 - } else { 262 - dev_err(mc13xxx->dev, 263 - "BUG: irq %u but no handler\n", 264 - baseirq + irq); 265 - 266 - mask |= 1 << irq; 267 - 268 - ret = mc13xxx_reg_write(mc13xxx, offmask, mask); 269 - } 270 - } 271 - 272 - return num_handled; 273 - } 274 - 275 - static irqreturn_t mc13xxx_irq_thread(int irq, void *data) 276 - { 277 - struct mc13xxx *mc13xxx = data; 278 - irqreturn_t ret; 279 - int handled = 0; 280 - 281 - mc13xxx_lock(mc13xxx); 282 - 283 - ret = mc13xxx_irq_handle(mc13xxx, MC13XXX_IRQSTAT0, 284 - MC13XXX_IRQMASK0, 0); 285 - if (ret > 0) 286 - handled = 1; 287 - 288 - ret = mc13xxx_irq_handle(mc13xxx, MC13XXX_IRQSTAT1, 289 - MC13XXX_IRQMASK1, 24); 290 - if (ret > 0) 291 - handled = 1; 292 - 293 - mc13xxx_unlock(mc13xxx); 294 - 295 - return IRQ_RETVAL(handled); 296 - } 297 288 298 289 #define maskval(reg, mask) (((reg) & (mask)) >> __ffs(mask)) 299 290 static void mc13xxx_print_revision(struct mc13xxx *mc13xxx, u32 revision) ··· 242 475 { 243 476 struct mc13xxx_adcdone_data *adcdone_data = data; 244 477 245 - mc13xxx_irq_ack(adcdone_data->mc13xxx, irq); 246 - 247 478 complete_all(&adcdone_data->done); 248 479 249 480 return IRQ_HANDLED; ··· 309 544 dev_dbg(mc13xxx->dev, "%s: request irq\n", __func__); 310 545 mc13xxx_irq_request(mc13xxx, MC13XXX_IRQ_ADCDONE, 311 546 mc13xxx_handler_adcdone, __func__, &adcdone_data); 312 - mc13xxx_irq_ack(mc13xxx, MC13XXX_IRQ_ADCDONE); 313 547 314 548 mc13xxx_reg_write(mc13xxx, MC13XXX_ADC0, adc0); 315 549 mc13xxx_reg_write(mc13xxx, MC13XXX_ADC1, adc1); ··· 363 599 if (!cell.name) 364 600 return -ENOMEM; 365 601 366 - return mfd_add_devices(mc13xxx->dev, -1, &cell, 1, NULL, 0, NULL); 602 + return mfd_add_devices(mc13xxx->dev, -1, &cell, 1, NULL, 0, 603 + regmap_irq_get_domain(mc13xxx->irq_data)); 367 604 } 368 605 369 606 static int mc13xxx_add_subdevice(struct mc13xxx *mc13xxx, const char *format) ··· 405 640 { 406 641 struct mc13xxx_platform_data *pdata = dev_get_platdata(dev); 407 642 struct mc13xxx *mc13xxx = dev_get_drvdata(dev); 408 - int ret; 409 643 u32 revision; 644 + int i, ret; 410 645 411 646 mc13xxx->dev = dev; 412 647 ··· 416 651 417 652 mc13xxx->variant->print_revision(mc13xxx, revision); 418 653 419 - /* mask all irqs */ 420 - ret = mc13xxx_reg_write(mc13xxx, MC13XXX_IRQMASK0, 0x00ffffff); 421 - if (ret) 422 - return ret; 654 + for (i = 0; i < ARRAY_SIZE(mc13xxx->irqs); i++) { 655 + mc13xxx->irqs[i].reg_offset = i / MC13XXX_IRQ_PER_REG; 656 + mc13xxx->irqs[i].mask = BIT(i % MC13XXX_IRQ_PER_REG); 657 + } 423 658 424 - ret = mc13xxx_reg_write(mc13xxx, MC13XXX_IRQMASK1, 0x00ffffff); 659 + mc13xxx->irq_chip.name = dev_name(dev); 660 + mc13xxx->irq_chip.status_base = MC13XXX_IRQSTAT0; 661 + mc13xxx->irq_chip.mask_base = MC13XXX_IRQMASK0; 662 + mc13xxx->irq_chip.ack_base = MC13XXX_IRQSTAT0; 663 + mc13xxx->irq_chip.irq_reg_stride = MC13XXX_IRQSTAT1 - MC13XXX_IRQSTAT0; 664 + mc13xxx->irq_chip.init_ack_masked = true; 665 + mc13xxx->irq_chip.use_ack = true; 666 + mc13xxx->irq_chip.num_regs = MC13XXX_IRQ_REG_CNT; 667 + mc13xxx->irq_chip.irqs = mc13xxx->irqs; 668 + mc13xxx->irq_chip.num_irqs = ARRAY_SIZE(mc13xxx->irqs); 669 + 670 + ret = regmap_add_irq_chip(mc13xxx->regmap, mc13xxx->irq, IRQF_ONESHOT, 671 + 0, &mc13xxx->irq_chip, &mc13xxx->irq_data); 425 672 if (ret) 426 673 return ret; 427 674 428 675 mutex_init(&mc13xxx->lock); 429 676 430 - ret = request_threaded_irq(mc13xxx->irq, NULL, mc13xxx_irq_thread, 431 - IRQF_ONESHOT | IRQF_TRIGGER_HIGH, "mc13xxx", mc13xxx); 432 - if (ret) 433 - return ret; 434 - 435 677 if (mc13xxx_probe_flags_dt(mc13xxx) < 0 && pdata) 436 678 mc13xxx->flags = pdata->flags; 437 - 438 - if (mc13xxx->flags & MC13XXX_USE_ADC) 439 - mc13xxx_add_subdevice(mc13xxx, "%s-adc"); 440 - 441 - if (mc13xxx->flags & MC13XXX_USE_RTC) 442 - mc13xxx_add_subdevice(mc13xxx, "%s-rtc"); 443 679 444 680 if (pdata) { 445 681 mc13xxx_add_subdevice_pdata(mc13xxx, "%s-regulator", ··· 465 699 mc13xxx_add_subdevice(mc13xxx, "%s-ts"); 466 700 } 467 701 702 + if (mc13xxx->flags & MC13XXX_USE_ADC) 703 + mc13xxx_add_subdevice(mc13xxx, "%s-adc"); 704 + 705 + if (mc13xxx->flags & MC13XXX_USE_RTC) 706 + mc13xxx_add_subdevice(mc13xxx, "%s-rtc"); 707 + 468 708 return 0; 469 709 } 470 710 EXPORT_SYMBOL_GPL(mc13xxx_common_init); ··· 479 707 { 480 708 struct mc13xxx *mc13xxx = dev_get_drvdata(dev); 481 709 482 - free_irq(mc13xxx->irq, mc13xxx); 483 710 mfd_remove_devices(dev); 711 + regmap_del_irq_chip(mc13xxx->irq, mc13xxx->irq_data); 484 712 mutex_destroy(&mc13xxx->lock); 485 713 486 714 return 0;
+7 -4
drivers/mfd/mc13xxx.h
··· 13 13 #include <linux/regmap.h> 14 14 #include <linux/mfd/mc13xxx.h> 15 15 16 - #define MC13XXX_NUMREGS 0x3f 16 + #define MC13XXX_NUMREGS 0x3f 17 + #define MC13XXX_IRQ_REG_CNT 2 18 + #define MC13XXX_IRQ_PER_REG 24 17 19 18 20 struct mc13xxx; 19 21 ··· 35 33 struct device *dev; 36 34 const struct mc13xxx_variant *variant; 37 35 36 + struct regmap_irq irqs[MC13XXX_IRQ_PER_REG * MC13XXX_IRQ_REG_CNT]; 37 + struct regmap_irq_chip irq_chip; 38 + struct regmap_irq_chip_data *irq_data; 39 + 38 40 struct mutex lock; 39 41 int irq; 40 42 int flags; 41 - 42 - irq_handler_t irqhandler[MC13XXX_NUM_IRQ]; 43 - void *irqdata[MC13XXX_NUM_IRQ]; 44 43 45 44 int adcflags; 46 45 };
-1
include/linux/mfd/mc13783.h
··· 86 86 #define MC13783_IRQ_HSL 43 87 87 #define MC13783_IRQ_ALSPTH 44 88 88 #define MC13783_IRQ_AHSSHORT 45 89 - #define MC13783_NUM_IRQ MC13XXX_NUM_IRQ 90 89 91 90 #endif /* ifndef __LINUX_MFD_MC13783_H */
+16 -7
include/linux/mfd/mc13xxx.h
··· 23 23 24 24 int mc13xxx_irq_request(struct mc13xxx *mc13xxx, int irq, 25 25 irq_handler_t handler, const char *name, void *dev); 26 - int mc13xxx_irq_request_nounmask(struct mc13xxx *mc13xxx, int irq, 27 - irq_handler_t handler, const char *name, void *dev); 28 26 int mc13xxx_irq_free(struct mc13xxx *mc13xxx, int irq, void *dev); 29 27 30 - int mc13xxx_irq_mask(struct mc13xxx *mc13xxx, int irq); 31 - int mc13xxx_irq_unmask(struct mc13xxx *mc13xxx, int irq); 32 28 int mc13xxx_irq_status(struct mc13xxx *mc13xxx, int irq, 33 29 int *enabled, int *pending); 34 - int mc13xxx_irq_ack(struct mc13xxx *mc13xxx, int irq); 35 30 36 31 int mc13xxx_get_flags(struct mc13xxx *mc13xxx); 37 32 38 33 int mc13xxx_adc_do_conversion(struct mc13xxx *mc13xxx, 39 34 unsigned int mode, unsigned int channel, 40 35 u8 ato, bool atox, unsigned int *sample); 36 + 37 + /* Deprecated calls */ 38 + static inline int mc13xxx_irq_ack(struct mc13xxx *mc13xxx, int irq) 39 + { 40 + return 0; 41 + } 42 + 43 + static inline int mc13xxx_irq_request_nounmask(struct mc13xxx *mc13xxx, int irq, 44 + irq_handler_t handler, 45 + const char *name, void *dev) 46 + { 47 + return mc13xxx_irq_request(mc13xxx, irq, handler, name, dev); 48 + } 49 + 50 + int mc13xxx_irq_mask(struct mc13xxx *mc13xxx, int irq); 51 + int mc13xxx_irq_unmask(struct mc13xxx *mc13xxx, int irq); 41 52 42 53 #define MC13783_AUDIO_RX0 36 43 54 #define MC13783_AUDIO_RX1 37 ··· 78 67 #define MC13XXX_IRQ_THWARNL 36 79 68 #define MC13XXX_IRQ_THWARNH 37 80 69 #define MC13XXX_IRQ_CLK 38 81 - 82 - #define MC13XXX_NUM_IRQ 46 83 70 84 71 struct regulator_init_data; 85 72