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kernel os linux

mfd: rz-mtu3: Link time dependencies

The new set of drivers for RZ/G2L MTU3a tries to enable compile-testing the
individual client drivers even when the MFD portion is disabled but gets it
wrong, causing a link failure when the core is in a loadable module but the
other drivers are built-in:

x86_64-linux-ld: drivers/pwm/pwm-rz-mtu3.o: in function `rz_mtu3_pwm_apply':
pwm-rz-mtu3.c:(.text+0x4bf): undefined reference to `rz_mtu3_8bit_ch_write'
x86_64-linux-ld: pwm-rz-mtu3.c:(.text+0x509): undefined reference to `rz_mtu3_disable'

arm-linux-gnueabi-ld: drivers/counter/rz-mtu3-cnt.o: in function `rz_mtu3_cascade_counts_enable_get':
rz-mtu3-cnt.c:(.text+0xbec): undefined reference to `rz_mtu3_shared_reg_read'

It seems better not to add the extra complexity here but instead just use
a normal hard dependency, so remove the #else portion in the header along
with the "|| COMPILE_TEST". This could also be fixed by having slightly more
elaborate Kconfig dependencies or using the cursed 'IS_REACHABLE()' helper,
but in practice it's already possible to compile-test all these drivers
by enabling the mtd portion.

Fixes: 254d3a727421c ("pwm: Add Renesas RZ/G2L MTU3a PWM driver")
Fixes: 0be8907359df4 ("counter: Add Renesas RZ/G2L MTU3a counter driver")
Fixes: 654c293e1687b ("mfd: Add Renesas RZ/G2L MTU3a core driver")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20230719090430.1925182-1-arnd@kernel.org
Signed-off-by: Lee Jones <lee@kernel.org>

authored by

Arnd Bergmann and committed by
Lee Jones
10d33404 f1a63db6

+2 -68
+1 -1
drivers/counter/Kconfig
··· 92 92 93 93 config RZ_MTU3_CNT 94 94 tristate "Renesas RZ/G2L MTU3a counter driver" 95 - depends on RZ_MTU3 || COMPILE_TEST 95 + depends on RZ_MTU3 96 96 help 97 97 Enable support for MTU3a counter driver found on Renesas RZ/G2L alike 98 98 SoCs. This IP supports both 16-bit and 32-bit phase counting mode
+1 -1
drivers/pwm/Kconfig
··· 505 505 506 506 config PWM_RZ_MTU3 507 507 tristate "Renesas RZ/G2L MTU3a PWM Timer support" 508 - depends on RZ_MTU3 || COMPILE_TEST 508 + depends on RZ_MTU3 509 509 depends on HAS_IOMEM 510 510 help 511 511 This driver exposes the MTU3a PWM Timer controller found in Renesas
-66
include/linux/mfd/rz-mtu3.h
··· 151 151 void *priv_data; 152 152 }; 153 153 154 - #if IS_ENABLED(CONFIG_RZ_MTU3) 155 154 static inline bool rz_mtu3_request_channel(struct rz_mtu3_channel *ch) 156 155 { 157 156 mutex_lock(&ch->lock); ··· 187 188 void rz_mtu3_shared_reg_write(struct rz_mtu3_channel *ch, u16 off, u16 val); 188 189 void rz_mtu3_shared_reg_update_bit(struct rz_mtu3_channel *ch, u16 off, 189 190 u16 pos, u8 val); 190 - #else 191 - static inline bool rz_mtu3_request_channel(struct rz_mtu3_channel *ch) 192 - { 193 - return false; 194 - } 195 - 196 - static inline void rz_mtu3_release_channel(struct rz_mtu3_channel *ch) 197 - { 198 - } 199 - 200 - static inline bool rz_mtu3_is_enabled(struct rz_mtu3_channel *ch) 201 - { 202 - return false; 203 - } 204 - 205 - static inline void rz_mtu3_disable(struct rz_mtu3_channel *ch) 206 - { 207 - } 208 - 209 - static inline int rz_mtu3_enable(struct rz_mtu3_channel *ch) 210 - { 211 - return 0; 212 - } 213 - 214 - static inline u8 rz_mtu3_8bit_ch_read(struct rz_mtu3_channel *ch, u16 off) 215 - { 216 - return 0; 217 - } 218 - 219 - static inline u16 rz_mtu3_16bit_ch_read(struct rz_mtu3_channel *ch, u16 off) 220 - { 221 - return 0; 222 - } 223 - 224 - static inline u32 rz_mtu3_32bit_ch_read(struct rz_mtu3_channel *ch, u16 off) 225 - { 226 - return 0; 227 - } 228 - 229 - static inline u16 rz_mtu3_shared_reg_read(struct rz_mtu3_channel *ch, u16 off) 230 - { 231 - return 0; 232 - } 233 - 234 - static inline void rz_mtu3_8bit_ch_write(struct rz_mtu3_channel *ch, u16 off, u8 val) 235 - { 236 - } 237 - 238 - static inline void rz_mtu3_16bit_ch_write(struct rz_mtu3_channel *ch, u16 off, u16 val) 239 - { 240 - } 241 - 242 - static inline void rz_mtu3_32bit_ch_write(struct rz_mtu3_channel *ch, u16 off, u32 val) 243 - { 244 - } 245 - 246 - static inline void rz_mtu3_shared_reg_write(struct rz_mtu3_channel *ch, u16 off, u16 val) 247 - { 248 - } 249 - 250 - static inline void rz_mtu3_shared_reg_update_bit(struct rz_mtu3_channel *ch, 251 - u16 off, u16 pos, u8 val) 252 - { 253 - } 254 - #endif 255 191 256 192 #endif /* __MFD_RZ_MTU3_H__ */