tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
arm64: Miscellaneous header files
This patch introduces a few AArch64-specific header files together with
Kbuild entries for generic headers.
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
+479
+51
arch/arm64/include/asm/Kbuild
+51
arch/arm64/include/asm/Kbuild
···
1
+
include include/asm-generic/Kbuild.asm
2
+
3
+
header-y += hwcap.h
4
+
5
+
generic-y += bug.h
6
+
generic-y += bugs.h
7
+
generic-y += checksum.h
8
+
generic-y += cputime.h
9
+
generic-y += current.h
10
+
generic-y += delay.h
11
+
generic-y += div64.h
12
+
generic-y += dma.h
13
+
generic-y += emergency-restart.h
14
+
generic-y += errno.h
15
+
generic-y += ftrace.h
16
+
generic-y += hw_irq.h
17
+
generic-y += ioctl.h
18
+
generic-y += ioctls.h
19
+
generic-y += ipcbuf.h
20
+
generic-y += irq_regs.h
21
+
generic-y += kdebug.h
22
+
generic-y += kmap_types.h
23
+
generic-y += linkage.h
24
+
generic-y += local.h
25
+
generic-y += local64.h
26
+
generic-y += mman.h
27
+
generic-y += msgbuf.h
28
+
generic-y += mutex.h
29
+
generic-y += pci.h
30
+
generic-y += percpu.h
31
+
generic-y += poll.h
32
+
generic-y += posix_types.h
33
+
generic-y += resource.h
34
+
generic-y += scatterlist.h
35
+
generic-y += sections.h
36
+
generic-y += segment.h
37
+
generic-y += sembuf.h
38
+
generic-y += serial.h
39
+
generic-y += shmbuf.h
40
+
generic-y += sizes.h
41
+
generic-y += socket.h
42
+
generic-y += sockios.h
43
+
generic-y += string.h
44
+
generic-y += switch_to.h
45
+
generic-y += swab.h
46
+
generic-y += termbits.h
47
+
generic-y += termios.h
48
+
generic-y += topology.h
49
+
generic-y += types.h
50
+
generic-y += unaligned.h
51
+
generic-y += user.h
+52
arch/arm64/include/asm/barrier.h
+52
arch/arm64/include/asm/barrier.h
···
1
+
/*
2
+
* Based on arch/arm/include/asm/barrier.h
3
+
*
4
+
* Copyright (C) 2012 ARM Ltd.
5
+
*
6
+
* This program is free software; you can redistribute it and/or modify
7
+
* it under the terms of the GNU General Public License version 2 as
8
+
* published by the Free Software Foundation.
9
+
*
10
+
* This program is distributed in the hope that it will be useful,
11
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
12
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13
+
* GNU General Public License for more details.
14
+
*
15
+
* You should have received a copy of the GNU General Public License
16
+
* along with this program. If not, see <http://www.gnu.org/licenses/>.
17
+
*/
18
+
#ifndef __ASM_BARRIER_H
19
+
#define __ASM_BARRIER_H
20
+
21
+
#ifndef __ASSEMBLY__
22
+
23
+
#define sev() asm volatile("sev" : : : "memory")
24
+
#define wfe() asm volatile("wfe" : : : "memory")
25
+
#define wfi() asm volatile("wfi" : : : "memory")
26
+
27
+
#define isb() asm volatile("isb" : : : "memory")
28
+
#define dsb() asm volatile("dsb sy" : : : "memory")
29
+
30
+
#define mb() dsb()
31
+
#define rmb() asm volatile("dsb ld" : : : "memory")
32
+
#define wmb() asm volatile("dsb st" : : : "memory")
33
+
34
+
#ifndef CONFIG_SMP
35
+
#define smp_mb() barrier()
36
+
#define smp_rmb() barrier()
37
+
#define smp_wmb() barrier()
38
+
#else
39
+
#define smp_mb() asm volatile("dmb ish" : : : "memory")
40
+
#define smp_rmb() asm volatile("dmb ishld" : : : "memory")
41
+
#define smp_wmb() asm volatile("dmb ishst" : : : "memory")
42
+
#endif
43
+
44
+
#define read_barrier_depends() do { } while(0)
45
+
#define smp_read_barrier_depends() do { } while(0)
46
+
47
+
#define set_mb(var, value) do { var = value; smp_mb(); } while (0)
48
+
#define nop() asm volatile("nop");
49
+
50
+
#endif /* __ASSEMBLY__ */
51
+
52
+
#endif /* __ASM_BARRIER_H */
+23
arch/arm64/include/asm/bitsperlong.h
+23
arch/arm64/include/asm/bitsperlong.h
···
1
+
/*
2
+
* Copyright (C) 2012 ARM Ltd.
3
+
*
4
+
* This program is free software; you can redistribute it and/or modify
5
+
* it under the terms of the GNU General Public License version 2 as
6
+
* published by the Free Software Foundation.
7
+
*
8
+
* This program is distributed in the hope that it will be useful,
9
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
10
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11
+
* GNU General Public License for more details.
12
+
*
13
+
* You should have received a copy of the GNU General Public License
14
+
* along with this program. If not, see <http://www.gnu.org/licenses/>.
15
+
*/
16
+
#ifndef __ASM_BITSPERLONG_H
17
+
#define __ASM_BITSPERLONG_H
18
+
19
+
#define __BITS_PER_LONG 64
20
+
21
+
#include <asm-generic/bitsperlong.h>
22
+
23
+
#endif /* __ASM_BITSPERLONG_H */
+21
arch/arm64/include/asm/byteorder.h
+21
arch/arm64/include/asm/byteorder.h
···
1
+
/*
2
+
* Copyright (C) 2012 ARM Ltd.
3
+
*
4
+
* This program is free software; you can redistribute it and/or modify
5
+
* it under the terms of the GNU General Public License version 2 as
6
+
* published by the Free Software Foundation.
7
+
*
8
+
* This program is distributed in the hope that it will be useful,
9
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
10
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11
+
* GNU General Public License for more details.
12
+
*
13
+
* You should have received a copy of the GNU General Public License
14
+
* along with this program. If not, see <http://www.gnu.org/licenses/>.
15
+
*/
16
+
#ifndef __ASM_BYTEORDER_H
17
+
#define __ASM_BYTEORDER_H
18
+
19
+
#include <linux/byteorder/little_endian.h>
20
+
21
+
#endif /* __ASM_BYTEORDER_H */
+173
arch/arm64/include/asm/cmpxchg.h
+173
arch/arm64/include/asm/cmpxchg.h
···
1
+
/*
2
+
* Based on arch/arm/include/asm/cmpxchg.h
3
+
*
4
+
* Copyright (C) 2012 ARM Ltd.
5
+
*
6
+
* This program is free software; you can redistribute it and/or modify
7
+
* it under the terms of the GNU General Public License version 2 as
8
+
* published by the Free Software Foundation.
9
+
*
10
+
* This program is distributed in the hope that it will be useful,
11
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
12
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13
+
* GNU General Public License for more details.
14
+
*
15
+
* You should have received a copy of the GNU General Public License
16
+
* along with this program. If not, see <http://www.gnu.org/licenses/>.
17
+
*/
18
+
#ifndef __ASM_CMPXCHG_H
19
+
#define __ASM_CMPXCHG_H
20
+
21
+
#include <linux/bug.h>
22
+
23
+
#include <asm/barrier.h>
24
+
25
+
static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size)
26
+
{
27
+
unsigned long ret, tmp;
28
+
29
+
switch (size) {
30
+
case 1:
31
+
asm volatile("// __xchg1\n"
32
+
"1: ldaxrb %w0, [%3]\n"
33
+
" stlxrb %w1, %w2, [%3]\n"
34
+
" cbnz %w1, 1b\n"
35
+
: "=&r" (ret), "=&r" (tmp)
36
+
: "r" (x), "r" (ptr)
37
+
: "memory", "cc");
38
+
break;
39
+
case 2:
40
+
asm volatile("// __xchg2\n"
41
+
"1: ldaxrh %w0, [%3]\n"
42
+
" stlxrh %w1, %w2, [%3]\n"
43
+
" cbnz %w1, 1b\n"
44
+
: "=&r" (ret), "=&r" (tmp)
45
+
: "r" (x), "r" (ptr)
46
+
: "memory", "cc");
47
+
break;
48
+
case 4:
49
+
asm volatile("// __xchg4\n"
50
+
"1: ldaxr %w0, [%3]\n"
51
+
" stlxr %w1, %w2, [%3]\n"
52
+
" cbnz %w1, 1b\n"
53
+
: "=&r" (ret), "=&r" (tmp)
54
+
: "r" (x), "r" (ptr)
55
+
: "memory", "cc");
56
+
break;
57
+
case 8:
58
+
asm volatile("// __xchg8\n"
59
+
"1: ldaxr %0, [%3]\n"
60
+
" stlxr %w1, %2, [%3]\n"
61
+
" cbnz %w1, 1b\n"
62
+
: "=&r" (ret), "=&r" (tmp)
63
+
: "r" (x), "r" (ptr)
64
+
: "memory", "cc");
65
+
break;
66
+
default:
67
+
BUILD_BUG();
68
+
}
69
+
70
+
return ret;
71
+
}
72
+
73
+
#define xchg(ptr,x) \
74
+
((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
75
+
76
+
static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old,
77
+
unsigned long new, int size)
78
+
{
79
+
unsigned long oldval = 0, res;
80
+
81
+
switch (size) {
82
+
case 1:
83
+
do {
84
+
asm volatile("// __cmpxchg1\n"
85
+
" ldxrb %w1, [%2]\n"
86
+
" mov %w0, #0\n"
87
+
" cmp %w1, %w3\n"
88
+
" b.ne 1f\n"
89
+
" stxrb %w0, %w4, [%2]\n"
90
+
"1:\n"
91
+
: "=&r" (res), "=&r" (oldval)
92
+
: "r" (ptr), "Ir" (old), "r" (new)
93
+
: "cc");
94
+
} while (res);
95
+
break;
96
+
97
+
case 2:
98
+
do {
99
+
asm volatile("// __cmpxchg2\n"
100
+
" ldxrh %w1, [%2]\n"
101
+
" mov %w0, #0\n"
102
+
" cmp %w1, %w3\n"
103
+
" b.ne 1f\n"
104
+
" stxrh %w0, %w4, [%2]\n"
105
+
"1:\n"
106
+
: "=&r" (res), "=&r" (oldval)
107
+
: "r" (ptr), "Ir" (old), "r" (new)
108
+
: "memory", "cc");
109
+
} while (res);
110
+
break;
111
+
112
+
case 4:
113
+
do {
114
+
asm volatile("// __cmpxchg4\n"
115
+
" ldxr %w1, [%2]\n"
116
+
" mov %w0, #0\n"
117
+
" cmp %w1, %w3\n"
118
+
" b.ne 1f\n"
119
+
" stxr %w0, %w4, [%2]\n"
120
+
"1:\n"
121
+
: "=&r" (res), "=&r" (oldval)
122
+
: "r" (ptr), "Ir" (old), "r" (new)
123
+
: "cc");
124
+
} while (res);
125
+
break;
126
+
127
+
case 8:
128
+
do {
129
+
asm volatile("// __cmpxchg8\n"
130
+
" ldxr %1, [%2]\n"
131
+
" mov %w0, #0\n"
132
+
" cmp %1, %3\n"
133
+
" b.ne 1f\n"
134
+
" stxr %w0, %4, [%2]\n"
135
+
"1:\n"
136
+
: "=&r" (res), "=&r" (oldval)
137
+
: "r" (ptr), "Ir" (old), "r" (new)
138
+
: "cc");
139
+
} while (res);
140
+
break;
141
+
142
+
default:
143
+
BUILD_BUG();
144
+
}
145
+
146
+
return oldval;
147
+
}
148
+
149
+
static inline unsigned long __cmpxchg_mb(volatile void *ptr, unsigned long old,
150
+
unsigned long new, int size)
151
+
{
152
+
unsigned long ret;
153
+
154
+
smp_mb();
155
+
ret = __cmpxchg(ptr, old, new, size);
156
+
smp_mb();
157
+
158
+
return ret;
159
+
}
160
+
161
+
#define cmpxchg(ptr,o,n) \
162
+
((__typeof__(*(ptr)))__cmpxchg_mb((ptr), \
163
+
(unsigned long)(o), \
164
+
(unsigned long)(n), \
165
+
sizeof(*(ptr))))
166
+
167
+
#define cmpxchg_local(ptr,o,n) \
168
+
((__typeof__(*(ptr)))__cmpxchg((ptr), \
169
+
(unsigned long)(o), \
170
+
(unsigned long)(n), \
171
+
sizeof(*(ptr))))
172
+
173
+
#endif /* __ASM_CMPXCHG_H */
+30
arch/arm64/include/asm/compiler.h
+30
arch/arm64/include/asm/compiler.h
···
1
+
/*
2
+
* Based on arch/arm/include/asm/compiler.h
3
+
*
4
+
* Copyright (C) 2012 ARM Ltd.
5
+
*
6
+
* This program is free software; you can redistribute it and/or modify
7
+
* it under the terms of the GNU General Public License version 2 as
8
+
* published by the Free Software Foundation.
9
+
*
10
+
* This program is distributed in the hope that it will be useful,
11
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
12
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13
+
* GNU General Public License for more details.
14
+
*
15
+
* You should have received a copy of the GNU General Public License
16
+
* along with this program. If not, see <http://www.gnu.org/licenses/>.
17
+
*/
18
+
#ifndef __ASM_COMPILER_H
19
+
#define __ASM_COMPILER_H
20
+
21
+
/*
22
+
* This is used to ensure the compiler did actually allocate the register we
23
+
* asked it for some inline assembly sequences. Apparently we can't trust the
24
+
* compiler from one version to another so a bit of paranoia won't hurt. This
25
+
* string is meant to be concatenated with the inline asm string and will
26
+
* cause compilation to stop on mismatch. (for details, see gcc PR 15089)
27
+
*/
28
+
#define __asmeq(x, y) ".ifnc " x "," y " ; .err ; .endif\n\t"
29
+
30
+
#endif /* __ASM_COMPILER_H */
+23
arch/arm64/include/asm/exception.h
+23
arch/arm64/include/asm/exception.h
···
1
+
/*
2
+
* Based on arch/arm/include/asm/exception.h
3
+
*
4
+
* Copyright (C) 2012 ARM Ltd.
5
+
*
6
+
* This program is free software; you can redistribute it and/or modify
7
+
* it under the terms of the GNU General Public License version 2 as
8
+
* published by the Free Software Foundation.
9
+
*
10
+
* This program is distributed in the hope that it will be useful,
11
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
12
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13
+
* GNU General Public License for more details.
14
+
*
15
+
* You should have received a copy of the GNU General Public License
16
+
* along with this program. If not, see <http://www.gnu.org/licenses/>.
17
+
*/
18
+
#ifndef __ASM_EXCEPTION_H
19
+
#define __ASM_EXCEPTION_H
20
+
21
+
#define __exception __attribute__((section(".exception.text")))
22
+
23
+
#endif /* __ASM_EXCEPTION_H */
+23
arch/arm64/include/asm/exec.h
+23
arch/arm64/include/asm/exec.h
···
1
+
/*
2
+
* Based on arch/arm/include/asm/exec.h
3
+
*
4
+
* Copyright (C) 2012 ARM Ltd.
5
+
*
6
+
* This program is free software; you can redistribute it and/or modify
7
+
* it under the terms of the GNU General Public License version 2 as
8
+
* published by the Free Software Foundation.
9
+
*
10
+
* This program is distributed in the hope that it will be useful,
11
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
12
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13
+
* GNU General Public License for more details.
14
+
*
15
+
* You should have received a copy of the GNU General Public License
16
+
* along with this program. If not, see <http://www.gnu.org/licenses/>.
17
+
*/
18
+
#ifndef __ASM_EXEC_H
19
+
#define __ASM_EXEC_H
20
+
21
+
extern unsigned long arch_align_stack(unsigned long sp);
22
+
23
+
#endif /* __ASM_EXEC_H */
+29
arch/arm64/include/asm/fcntl.h
+29
arch/arm64/include/asm/fcntl.h
···
1
+
/*
2
+
* Copyright (C) 2012 ARM Ltd.
3
+
*
4
+
* This program is free software; you can redistribute it and/or modify
5
+
* it under the terms of the GNU General Public License version 2 as
6
+
* published by the Free Software Foundation.
7
+
*
8
+
* This program is distributed in the hope that it will be useful,
9
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
10
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11
+
* GNU General Public License for more details.
12
+
*
13
+
* You should have received a copy of the GNU General Public License
14
+
* along with this program. If not, see <http://www.gnu.org/licenses/>.
15
+
*/
16
+
#ifndef __ASM_FCNTL_H
17
+
#define __ASM_FCNTL_H
18
+
19
+
/*
20
+
* Using our own definitions for AArch32 (compat) support.
21
+
*/
22
+
#define O_DIRECTORY 040000 /* must be a directory */
23
+
#define O_NOFOLLOW 0100000 /* don't follow links */
24
+
#define O_DIRECT 0200000 /* direct disk access hint - currently ignored */
25
+
#define O_LARGEFILE 0400000
26
+
27
+
#include <asm-generic/fcntl.h>
28
+
29
+
#endif
+54
arch/arm64/include/asm/system_misc.h
+54
arch/arm64/include/asm/system_misc.h
···
1
+
/*
2
+
* Based on arch/arm/include/asm/system_misc.h
3
+
*
4
+
* Copyright (C) 2012 ARM Ltd.
5
+
*
6
+
* This program is free software; you can redistribute it and/or modify
7
+
* it under the terms of the GNU General Public License version 2 as
8
+
* published by the Free Software Foundation.
9
+
*
10
+
* This program is distributed in the hope that it will be useful,
11
+
* but WITHOUT ANY WARRANTY; without even the implied warranty of
12
+
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13
+
* GNU General Public License for more details.
14
+
*
15
+
* You should have received a copy of the GNU General Public License
16
+
* along with this program. If not, see <http://www.gnu.org/licenses/>.
17
+
*/
18
+
#ifndef __ASM_SYSTEM_MISC_H
19
+
#define __ASM_SYSTEM_MISC_H
20
+
21
+
#ifndef __ASSEMBLY__
22
+
23
+
#include <linux/compiler.h>
24
+
#include <linux/linkage.h>
25
+
#include <linux/irqflags.h>
26
+
27
+
struct pt_regs;
28
+
29
+
void die(const char *msg, struct pt_regs *regs, int err);
30
+
31
+
struct siginfo;
32
+
void arm64_notify_die(const char *str, struct pt_regs *regs,
33
+
struct siginfo *info, int err);
34
+
35
+
void hook_debug_fault_code(int nr, int (*fn)(unsigned long, unsigned int,
36
+
struct pt_regs *),
37
+
int sig, int code, const char *name);
38
+
39
+
struct mm_struct;
40
+
extern void show_pte(struct mm_struct *mm, unsigned long addr);
41
+
extern void __show_regs(struct pt_regs *);
42
+
43
+
void soft_restart(unsigned long);
44
+
extern void (*pm_restart)(const char *cmd);
45
+
46
+
#define UDBG_UNDEFINED (1 << 0)
47
+
#define UDBG_SYSCALL (1 << 1)
48
+
#define UDBG_BADABORT (1 << 2)
49
+
#define UDBG_SEGV (1 << 3)
50
+
#define UDBG_BUS (1 << 4)
51
+
52
+
#endif /* __ASSEMBLY__ */
53
+
54
+
#endif /* __ASM_SYSTEM_MISC_H */