tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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x86/msr: Lift AMD family 0x15 power-specific MSRs

... into the global msr-index.h header because they're used in multiple
compilation units. Sort the MSR list a bit. Update the msr-index.h copy
in tools.

No functional changes.

Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lkml.kernel.org/r/20200608164847.14232-1-bp@alien8.de

Borislav Petkov 1068ed45 b3a9e3b9

+8 -10
-4
arch/x86/events/amd/power.c
··· 13 13 #include <asm/cpu_device_id.h> 14 14 #include "../perf_event.h" 15 15 16 - #define MSR_F15H_CU_PWR_ACCUMULATOR 0xc001007a 17 - #define MSR_F15H_CU_MAX_PWR_ACCUMULATOR 0xc001007b 18 - #define MSR_F15H_PTSC 0xc0010280 19 - 20 16 /* Event code: LSB 8 bits, passed in attr->config any other bit is reserved. */ 21 17 #define AMD_POWER_EVENT_MASK 0xFFULL 22 18
+4 -1
arch/x86/include/asm/msr-index.h
··· 418 418 #define MSR_AMD64_PATCH_LEVEL 0x0000008b 419 419 #define MSR_AMD64_TSC_RATIO 0xc0000104 420 420 #define MSR_AMD64_NB_CFG 0xc001001f 421 - #define MSR_AMD64_CPUID_FN_1 0xc0011004 422 421 #define MSR_AMD64_PATCH_LOADER 0xc0010020 423 422 #define MSR_AMD_PERF_CTL 0xc0010062 424 423 #define MSR_AMD_PERF_STATUS 0xc0010063 425 424 #define MSR_AMD_PSTATE_DEF_BASE 0xc0010064 425 + #define MSR_F15H_CU_PWR_ACCUMULATOR 0xc001007a 426 + #define MSR_F15H_CU_MAX_PWR_ACCUMULATOR 0xc001007b 426 427 #define MSR_AMD64_OSVW_ID_LENGTH 0xc0010140 427 428 #define MSR_AMD64_OSVW_STATUS 0xc0010141 429 + #define MSR_F15H_PTSC 0xc0010280 428 430 #define MSR_AMD_PPIN_CTL 0xc00102f0 429 431 #define MSR_AMD_PPIN 0xc00102f1 432 + #define MSR_AMD64_CPUID_FN_1 0xc0011004 430 433 #define MSR_AMD64_LS_CFG 0xc0011020 431 434 #define MSR_AMD64_DC_CFG 0xc0011022 432 435 #define MSR_AMD64_BU_CFG2 0xc001102a
-4
drivers/hwmon/fam15h_power.c
··· 41 41 /* set maximum interval as 1 second */ 42 42 #define MAX_INTERVAL 1000 43 43 44 - #define MSR_F15H_CU_PWR_ACCUMULATOR 0xc001007a 45 - #define MSR_F15H_CU_MAX_PWR_ACCUMULATOR 0xc001007b 46 - #define MSR_F15H_PTSC 0xc0010280 47 - 48 44 #define PCI_DEVICE_ID_AMD_15H_M70H_NB_F4 0x15b4 49 45 50 46 struct fam15h_power_data {
+4 -1
tools/arch/x86/include/asm/msr-index.h
··· 414 414 #define MSR_AMD64_PATCH_LEVEL 0x0000008b 415 415 #define MSR_AMD64_TSC_RATIO 0xc0000104 416 416 #define MSR_AMD64_NB_CFG 0xc001001f 417 - #define MSR_AMD64_CPUID_FN_1 0xc0011004 418 417 #define MSR_AMD64_PATCH_LOADER 0xc0010020 419 418 #define MSR_AMD_PERF_CTL 0xc0010062 420 419 #define MSR_AMD_PERF_STATUS 0xc0010063 421 420 #define MSR_AMD_PSTATE_DEF_BASE 0xc0010064 421 + #define MSR_F15H_CU_PWR_ACCUMULATOR 0xc001007a 422 + #define MSR_F15H_CU_MAX_PWR_ACCUMULATOR 0xc001007b 422 423 #define MSR_AMD64_OSVW_ID_LENGTH 0xc0010140 423 424 #define MSR_AMD64_OSVW_STATUS 0xc0010141 425 + #define MSR_F15H_PTSC 0xc0010280 424 426 #define MSR_AMD_PPIN_CTL 0xc00102f0 425 427 #define MSR_AMD_PPIN 0xc00102f1 428 + #define MSR_AMD64_CPUID_FN_1 0xc0011004 426 429 #define MSR_AMD64_LS_CFG 0xc0011020 427 430 #define MSR_AMD64_DC_CFG 0xc0011022 428 431 #define MSR_AMD64_BU_CFG2 0xc001102a