Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

spi: sun6i: Support Allwinner H3 SPI controller

H3 has two SPI controllers. The size of the buffer is 64 * 8.
(8 bit transfer by 64 entry FIFO)
A31 has four controllers. The size of the buffer is 128 * 8.
(8 bit transfer by 128 entry FIFO)

Register maps are sharable, so sun6i SPI driver is reusable with
device configuration.

Use the variable, 'fifo_depth' instead of fixed value to support both SPI
controllers.

Signed-off-by: Milo Kim <woogyom.kim@gmail.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Mark Brown <broonie@kernel.org>

authored by

Milo Kim and committed by
Mark Brown
10565dfd 8ea7ce9c

+13 -5
+13 -5
drivers/spi/spi-sun6i.c
··· 17 17 #include <linux/interrupt.h> 18 18 #include <linux/io.h> 19 19 #include <linux/module.h> 20 + #include <linux/of_device.h> 20 21 #include <linux/platform_device.h> 21 22 #include <linux/pm_runtime.h> 22 23 #include <linux/reset.h> ··· 25 24 #include <linux/spi/spi.h> 26 25 27 26 #define SUN6I_FIFO_DEPTH 128 27 + #define SUN8I_FIFO_DEPTH 64 28 28 29 29 #define SUN6I_GBL_CTL_REG 0x04 30 30 #define SUN6I_GBL_CTL_BUS_ENABLE BIT(0) ··· 92 90 const u8 *tx_buf; 93 91 u8 *rx_buf; 94 92 int len; 93 + unsigned long fifo_depth; 95 94 }; 96 95 97 96 static inline u32 sun6i_spi_read(struct sun6i_spi *sspi, u32 reg) ··· 158 155 159 156 static size_t sun6i_spi_max_transfer_size(struct spi_device *spi) 160 157 { 161 - return SUN6I_FIFO_DEPTH - 1; 158 + struct sun6i_spi *sspi = spi_master_get_devdata(spi->master); 159 + 160 + return sspi->fifo_depth - 1; 162 161 } 163 162 164 163 static int sun6i_spi_transfer_one(struct spi_master *master, ··· 175 170 u32 reg; 176 171 177 172 /* We don't support transfer larger than the FIFO */ 178 - if (tfr->len > SUN6I_FIFO_DEPTH) 173 + if (tfr->len > sspi->fifo_depth) 179 174 return -EINVAL; 180 175 181 176 reinit_completion(&sspi->done); ··· 270 265 SUN6I_BURST_CTL_CNT_STC(tx_len)); 271 266 272 267 /* Fill the TX FIFO */ 273 - sun6i_spi_fill_fifo(sspi, SUN6I_FIFO_DEPTH); 268 + sun6i_spi_fill_fifo(sspi, sspi->fifo_depth); 274 269 275 270 /* Enable the interrupts */ 276 271 sun6i_spi_write(sspi, SUN6I_INT_CTL_REG, SUN6I_INT_CTL_TC); ··· 293 288 goto out; 294 289 } 295 290 296 - sun6i_spi_drain_fifo(sspi, SUN6I_FIFO_DEPTH); 291 + sun6i_spi_drain_fifo(sspi, sspi->fifo_depth); 297 292 298 293 out: 299 294 sun6i_spi_write(sspi, SUN6I_INT_CTL_REG, 0); ··· 403 398 } 404 399 405 400 sspi->master = master; 401 + sspi->fifo_depth = (unsigned long)of_device_get_match_data(&pdev->dev); 402 + 406 403 master->max_speed_hz = 100 * 1000 * 1000; 407 404 master->min_speed_hz = 3 * 1000; 408 405 master->set_cs = sun6i_spi_set_cs; ··· 477 470 } 478 471 479 472 static const struct of_device_id sun6i_spi_match[] = { 480 - { .compatible = "allwinner,sun6i-a31-spi", }, 473 + { .compatible = "allwinner,sun6i-a31-spi", .data = (void *)SUN6I_FIFO_DEPTH }, 474 + { .compatible = "allwinner,sun8i-h3-spi", .data = (void *)SUN8I_FIFO_DEPTH }, 481 475 {} 482 476 }; 483 477 MODULE_DEVICE_TABLE(of, sun6i_spi_match);