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x86/cpufeatures: Rename X86_FEATURE_FAST_CPPC to have AMD prefix

This feature is an AMD unique feature of some processors, so put
AMD into the name.

Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20241025171459.1093-2-mario.limonciello@amd.com

authored by

Mario Limonciello and committed by
Borislav Petkov (AMD) 104edc6e f24f669d

+4 -4
+1 -1
arch/x86/include/asm/cpufeatures.h
··· 472 472 #define X86_FEATURE_BHI_CTRL (21*32+ 2) /* BHI_DIS_S HW control available */ 473 473 #define X86_FEATURE_CLEAR_BHB_HW (21*32+ 3) /* BHI_DIS_S HW control enabled */ 474 474 #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* Clear branch history at vmexit using SW loop */ 475 - #define X86_FEATURE_FAST_CPPC (21*32 + 5) /* AMD Fast CPPC */ 475 + #define X86_FEATURE_AMD_FAST_CPPC (21*32 + 5) /* Fast CPPC */ 476 476 477 477 /* 478 478 * BUG word(s)
+1 -1
arch/x86/kernel/cpu/scattered.c
··· 45 45 { X86_FEATURE_HW_PSTATE, CPUID_EDX, 7, 0x80000007, 0 }, 46 46 { X86_FEATURE_CPB, CPUID_EDX, 9, 0x80000007, 0 }, 47 47 { X86_FEATURE_PROC_FEEDBACK, CPUID_EDX, 11, 0x80000007, 0 }, 48 - { X86_FEATURE_FAST_CPPC, CPUID_EDX, 15, 0x80000007, 0 }, 48 + { X86_FEATURE_AMD_FAST_CPPC, CPUID_EDX, 15, 0x80000007, 0 }, 49 49 { X86_FEATURE_MBA, CPUID_EBX, 6, 0x80000008, 0 }, 50 50 { X86_FEATURE_SMBA, CPUID_EBX, 2, 0x80000020, 0 }, 51 51 { X86_FEATURE_BMEC, CPUID_EBX, 3, 0x80000020, 0 },
+1 -1
drivers/cpufreq/amd-pstate.c
··· 842 842 843 843 transition_delay_ns = cppc_get_transition_latency(cpu); 844 844 if (transition_delay_ns == CPUFREQ_ETERNAL) { 845 - if (cpu_feature_enabled(X86_FEATURE_FAST_CPPC)) 845 + if (cpu_feature_enabled(X86_FEATURE_AMD_FAST_CPPC)) 846 846 return AMD_PSTATE_FAST_CPPC_TRANSITION_DELAY; 847 847 else 848 848 return AMD_PSTATE_TRANSITION_DELAY;
+1 -1
tools/arch/x86/include/asm/cpufeatures.h
··· 472 472 #define X86_FEATURE_BHI_CTRL (21*32+ 2) /* BHI_DIS_S HW control available */ 473 473 #define X86_FEATURE_CLEAR_BHB_HW (21*32+ 3) /* BHI_DIS_S HW control enabled */ 474 474 #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* Clear branch history at vmexit using SW loop */ 475 - #define X86_FEATURE_FAST_CPPC (21*32 + 5) /* AMD Fast CPPC */ 475 + #define X86_FEATURE_AMD_FAST_CPPC (21*32 + 5) /* AMD Fast CPPC */ 476 476 477 477 /* 478 478 * BUG word(s)