tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
fork atom

Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux

Pull drm fixes from Dave Airlie:
"One intel fix, one rockchip fix, and a bunch of radeon fixes for some
regressions from audio rework and vm stability"

* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
drm/i915/chv: Implement WaDisableShadowRegForCpd
drm/radeon: fix userptr return value checking (v2)
drm/radeon: check new address before removing old one
drm/radeon: reset BOs address after clearing it.
drm/radeon: fix lockup when BOs aren't part of the VM on release
drm/radeon: add SI DPM quirk for Sapphire R9 270 Dual-X 2G GDDR5
drm/radeon: adjust pll when audio is not enabled
drm/radeon: only enable audio streams if the monitor supports it
drm/radeon: only mark audio as connected if the monitor supports it (v3)
drm/radeon/audio: don't enable packets until the end
drm/radeon: drop dce6_dp_enable
drm/radeon: fix ordering of AVI packet setup
drm/radeon: Use drm_calloc_ab for CS relocs
drm/rockchip: fix error check when getting irq
MAINTAINERS: add entry for Rockchip drm drivers

Linus Torvalds 101a6fd3 61f06db0

options
unified split
Changed files
+118 -95
MAINTAINERS
drivers
gpu
drm
i915
i915_reg.h
intel_uncore.c
radeon
atombios_crtc.c
atombios_encoders.c
dce6_afmt.c
evergreen_hdmi.c
r600_hdmi.c
radeon_audio.c
radeon_connectors.c
radeon_cs.c
radeon_mn.c
radeon_vm.c
si_dpm.c
rockchip
rockchip_drm_vop.c
+7
MAINTAINERS
··· 3413 3413 F: drivers/gpu/drm/shmobile/ 3414 3414 F: include/linux/platform_data/shmob_drm.h 3415 3415 3416 + DRM DRIVERS FOR ROCKCHIP 3417 + M: Mark Yao <mark.yao@rock-chips.com> 3418 + L: dri-devel@lists.freedesktop.org 3419 + S: Maintained 3420 + F: drivers/gpu/drm/rockchip/ 3421 + F: Documentation/devicetree/bindings/video/rockchip* 3422 + 3416 3423 DSBR100 USB FM RADIO DRIVER 3417 3424 M: Alexey Klimov <klimov.linux@gmail.com> 3418 3425 L: linux-media@vger.kernel.org
+2
drivers/gpu/drm/i915/i915_reg.h
··· 6074 6074 #define GTFIFOCTL 0x120008 6075 6075 #define GT_FIFO_FREE_ENTRIES_MASK 0x7f 6076 6076 #define GT_FIFO_NUM_RESERVED_ENTRIES 20 6077 + #define GT_FIFO_CTL_BLOCK_ALL_POLICY_STALL (1 << 12) 6078 + #define GT_FIFO_CTL_RC6_POLICY_STALL (1 << 11) 6077 6079 6078 6080 #define HSW_IDICR 0x9008 6079 6081 #define IDIHASHMSK(x) (((x) & 0x3f) << 16)
+8
drivers/gpu/drm/i915/intel_uncore.c
··· 360 360 __raw_i915_write32(dev_priv, GTFIFODBG, 361 361 __raw_i915_read32(dev_priv, GTFIFODBG)); 362 362 363 + /* WaDisableShadowRegForCpd:chv */ 364 + if (IS_CHERRYVIEW(dev)) { 365 + __raw_i915_write32(dev_priv, GTFIFOCTL, 366 + __raw_i915_read32(dev_priv, GTFIFOCTL) | 367 + GT_FIFO_CTL_BLOCK_ALL_POLICY_STALL | 368 + GT_FIFO_CTL_RC6_POLICY_STALL); 369 + } 370 + 363 371 intel_uncore_forcewake_reset(dev, restore_forcewake); 364 372 } 365 373
+3
drivers/gpu/drm/radeon/atombios_crtc.c
··· 580 580 else 581 581 radeon_crtc->pll_flags |= RADEON_PLL_PREFER_LOW_REF_DIV; 582 582 583 + /* if there is no audio, set MINM_OVER_MAXP */ 584 + if (!drm_detect_monitor_audio(radeon_connector_edid(connector))) 585 + radeon_crtc->pll_flags |= RADEON_PLL_PREFER_MINM_OVER_MAXP; 583 586 if (rdev->family < CHIP_RV770) 584 587 radeon_crtc->pll_flags |= RADEON_PLL_PREFER_MINM_OVER_MAXP; 585 588 /* use frac fb div on APUs */
+2 -4
drivers/gpu/drm/radeon/atombios_encoders.c
··· 1761 1761 struct drm_device *dev = encoder->dev; 1762 1762 struct radeon_device *rdev = dev->dev_private; 1763 1763 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 1764 - struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 1765 1764 int encoder_mode = atombios_get_encoder_mode(encoder); 1766 1765 1767 1766 DRM_DEBUG_KMS("encoder dpms %d to mode %d, devices %08x, active_devices %08x\n", 1768 1767 radeon_encoder->encoder_id, mode, radeon_encoder->devices, 1769 1768 radeon_encoder->active_device); 1770 1769 1771 - if (connector && (radeon_audio != 0) && 1770 + if ((radeon_audio != 0) && 1772 1771 ((encoder_mode == ATOM_ENCODER_MODE_HDMI) || 1773 - (ENCODER_MODE_IS_DP(encoder_mode) && 1774 - drm_detect_monitor_audio(radeon_connector_edid(connector))))) 1772 + ENCODER_MODE_IS_DP(encoder_mode))) 1775 1773 radeon_audio_dpms(encoder, mode); 1776 1774 1777 1775 switch (radeon_encoder->encoder_id) {
-25
drivers/gpu/drm/radeon/dce6_afmt.c
··· 295 295 WREG32(DCCG_AUDIO_DTO1_MODULE, clock); 296 296 } 297 297 } 298 - 299 - void dce6_dp_enable(struct drm_encoder *encoder, bool enable) 300 - { 301 - struct drm_device *dev = encoder->dev; 302 - struct radeon_device *rdev = dev->dev_private; 303 - struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 304 - struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 305 - 306 - if (!dig || !dig->afmt) 307 - return; 308 - 309 - if (enable) { 310 - WREG32(EVERGREEN_DP_SEC_TIMESTAMP + dig->afmt->offset, 311 - EVERGREEN_DP_SEC_TIMESTAMP_MODE(1)); 312 - WREG32(EVERGREEN_DP_SEC_CNTL + dig->afmt->offset, 313 - EVERGREEN_DP_SEC_ASP_ENABLE | /* Audio packet transmission */ 314 - EVERGREEN_DP_SEC_ATP_ENABLE | /* Audio timestamp packet transmission */ 315 - EVERGREEN_DP_SEC_AIP_ENABLE | /* Audio infoframe packet transmission */ 316 - EVERGREEN_DP_SEC_STREAM_ENABLE); /* Master enable for secondary stream engine */ 317 - } else { 318 - WREG32(EVERGREEN_DP_SEC_CNTL + dig->afmt->offset, 0); 319 - } 320 - 321 - dig->afmt->enabled = enable; 322 - }
+34 -19
drivers/gpu/drm/radeon/evergreen_hdmi.c
··· 219 219 WREG32(AFMT_AVI_INFO3 + offset, 220 220 frame[0xC] | (frame[0xD] << 8) | (buffer[1] << 24)); 221 221 222 - WREG32_OR(HDMI_INFOFRAME_CONTROL0 + offset, 223 - HDMI_AVI_INFO_SEND | /* enable AVI info frames */ 224 - HDMI_AVI_INFO_CONT); /* required for audio info values to be updated */ 225 - 226 222 WREG32_P(HDMI_INFOFRAME_CONTROL1 + offset, 227 - HDMI_AVI_INFO_LINE(2), /* anything other than 0 */ 228 - ~HDMI_AVI_INFO_LINE_MASK); 223 + HDMI_AVI_INFO_LINE(2), /* anything other than 0 */ 224 + ~HDMI_AVI_INFO_LINE_MASK); 229 225 } 230 226 231 227 void dce4_hdmi_audio_set_dto(struct radeon_device *rdev, ··· 366 370 WREG32(AFMT_AUDIO_PACKET_CONTROL2 + offset, 367 371 AFMT_AUDIO_CHANNEL_ENABLE(0xff)); 368 372 373 + WREG32(HDMI_AUDIO_PACKET_CONTROL + offset, 374 + HDMI_AUDIO_DELAY_EN(1) | /* set the default audio delay */ 375 + HDMI_AUDIO_PACKETS_PER_LINE(3)); /* should be suffient for all audio modes and small enough for all hblanks */ 376 + 369 377 /* allow 60958 channel status and send audio packets fields to be updated */ 370 - WREG32(AFMT_AUDIO_PACKET_CONTROL + offset, 371 - AFMT_AUDIO_SAMPLE_SEND | AFMT_RESET_FIFO_WHEN_AUDIO_DIS | AFMT_60958_CS_UPDATE); 378 + WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + offset, 379 + AFMT_RESET_FIFO_WHEN_AUDIO_DIS | AFMT_60958_CS_UPDATE); 372 380 } 373 381 374 382 ··· 398 398 return; 399 399 400 400 if (enable) { 401 - WREG32(HDMI_INFOFRAME_CONTROL1 + dig->afmt->offset, 402 - HDMI_AUDIO_INFO_LINE(2)); /* anything other than 0 */ 401 + struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 403 402 404 - WREG32(HDMI_AUDIO_PACKET_CONTROL + dig->afmt->offset, 405 - HDMI_AUDIO_DELAY_EN(1) | /* set the default audio delay */ 406 - HDMI_AUDIO_PACKETS_PER_LINE(3)); /* should be suffient for all audio modes and small enough for all hblanks */ 407 - 408 - WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, 409 - HDMI_AUDIO_INFO_SEND | /* enable audio info frames (frames won't be set until audio is enabled) */ 410 - HDMI_AUDIO_INFO_CONT); /* required for audio info values to be updated */ 403 + if (drm_detect_monitor_audio(radeon_connector_edid(connector))) { 404 + WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, 405 + HDMI_AVI_INFO_SEND | /* enable AVI info frames */ 406 + HDMI_AVI_INFO_CONT | /* required for audio info values to be updated */ 407 + HDMI_AUDIO_INFO_SEND | /* enable audio info frames (frames won't be set until audio is enabled) */ 408 + HDMI_AUDIO_INFO_CONT); /* required for audio info values to be updated */ 409 + WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, 410 + AFMT_AUDIO_SAMPLE_SEND); 411 + } else { 412 + WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, 413 + HDMI_AVI_INFO_SEND | /* enable AVI info frames */ 414 + HDMI_AVI_INFO_CONT); /* required for audio info values to be updated */ 415 + WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, 416 + ~AFMT_AUDIO_SAMPLE_SEND); 417 + } 411 418 } else { 419 + WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, 420 + ~AFMT_AUDIO_SAMPLE_SEND); 412 421 WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, 0); 413 422 } 414 423 ··· 433 424 struct radeon_device *rdev = dev->dev_private; 434 425 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 435 426 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 427 + struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 436 428 437 429 if (!dig || !dig->afmt) 438 430 return; 439 431 440 - if (enable) { 432 + if (enable && drm_detect_monitor_audio(radeon_connector_edid(connector))) { 441 433 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 442 434 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 443 435 struct radeon_connector_atom_dig *dig_connector; 444 436 uint32_t val; 445 437 438 + WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, 439 + AFMT_AUDIO_SAMPLE_SEND); 440 + 446 441 WREG32(EVERGREEN_DP_SEC_TIMESTAMP + dig->afmt->offset, 447 442 EVERGREEN_DP_SEC_TIMESTAMP_MODE(1)); 448 443 449 - if (radeon_connector->con_priv) { 444 + if (!ASIC_IS_DCE6(rdev) && radeon_connector->con_priv) { 450 445 dig_connector = radeon_connector->con_priv; 451 446 val = RREG32(EVERGREEN_DP_SEC_AUD_N + dig->afmt->offset); 452 447 val &= ~EVERGREEN_DP_SEC_N_BASE_MULTIPLE(0xf); ··· 470 457 EVERGREEN_DP_SEC_STREAM_ENABLE); /* Master enable for secondary stream engine */ 471 458 } else { 472 459 WREG32(EVERGREEN_DP_SEC_CNTL + dig->afmt->offset, 0); 460 + WREG32_AND(AFMT_AUDIO_PACKET_CONTROL + dig->afmt->offset, 461 + ~AFMT_AUDIO_SAMPLE_SEND); 473 462 } 474 463 475 464 dig->afmt->enabled = enable;
+6 -5
drivers/gpu/drm/radeon/r600_hdmi.c
··· 228 228 WREG32(HDMI0_AVI_INFO3 + offset, 229 229 frame[0xC] | (frame[0xD] << 8) | (buffer[1] << 24)); 230 230 231 - WREG32_OR(HDMI0_INFOFRAME_CONTROL0 + offset, 232 - HDMI0_AVI_INFO_SEND | /* enable AVI info frames */ 233 - HDMI0_AVI_INFO_CONT); /* send AVI info frames every frame/field */ 234 - 235 231 WREG32_OR(HDMI0_INFOFRAME_CONTROL1 + offset, 236 - HDMI0_AVI_INFO_LINE(2)); /* anything other than 0 */ 232 + HDMI0_AVI_INFO_LINE(2)); /* anything other than 0 */ 233 + 234 + WREG32_OR(HDMI0_INFOFRAME_CONTROL0 + offset, 235 + HDMI0_AVI_INFO_SEND | /* enable AVI info frames */ 236 + HDMI0_AVI_INFO_CONT); /* send AVI info frames every frame/field */ 237 + 237 238 } 238 239 239 240 /*
+16 -14
drivers/gpu/drm/radeon/radeon_audio.c
··· 102 102 void r600_hdmi_enable(struct drm_encoder *encoder, bool enable); 103 103 void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable); 104 104 void evergreen_dp_enable(struct drm_encoder *encoder, bool enable); 105 - void dce6_dp_enable(struct drm_encoder *encoder, bool enable); 106 105 107 106 static const u32 pin_offsets[7] = 108 107 { ··· 239 240 .set_avi_packet = evergreen_set_avi_packet, 240 241 .set_audio_packet = dce4_set_audio_packet, 241 242 .mode_set = radeon_audio_dp_mode_set, 242 - .dpms = dce6_dp_enable, 243 + .dpms = evergreen_dp_enable, 243 244 }; 244 245 245 246 static void radeon_audio_interface_init(struct radeon_device *rdev) ··· 460 461 if (!connector || !connector->encoder) 461 462 return; 462 463 464 + if (!radeon_encoder_is_digital(connector->encoder)) 465 + return; 466 + 463 467 rdev = connector->encoder->dev->dev_private; 464 468 radeon_encoder = to_radeon_encoder(connector->encoder); 465 469 dig = radeon_encoder->enc_priv; 466 470 471 + if (!dig->afmt) 472 + return; 473 + 467 474 if (status == connector_status_connected) { 468 - struct radeon_connector *radeon_connector; 469 - int sink_type; 470 - 471 - if (!drm_detect_monitor_audio(radeon_connector_edid(connector))) { 472 - radeon_encoder->audio = NULL; 473 - return; 474 - } 475 - 476 - radeon_connector = to_radeon_connector(connector); 477 - sink_type = radeon_dp_getsinktype(radeon_connector); 475 + struct radeon_connector *radeon_connector = to_radeon_connector(connector); 478 476 479 477 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort && 480 - sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) 478 + radeon_dp_getsinktype(radeon_connector) == 479 + CONNECTOR_OBJECT_ID_DISPLAYPORT) 481 480 radeon_encoder->audio = rdev->audio.dp_funcs; 482 481 else 483 482 radeon_encoder->audio = rdev->audio.hdmi_funcs; 484 483 485 484 dig->afmt->pin = radeon_audio_get_pin(connector->encoder); 486 - radeon_audio_enable(rdev, dig->afmt->pin, 0xf); 485 + if (drm_detect_monitor_audio(radeon_connector_edid(connector))) { 486 + radeon_audio_enable(rdev, dig->afmt->pin, 0xf); 487 + } else { 488 + radeon_audio_enable(rdev, dig->afmt->pin, 0); 489 + dig->afmt->pin = NULL; 490 + } 487 491 } else { 488 492 radeon_audio_enable(rdev, dig->afmt->pin, 0); 489 493 dig->afmt->pin = NULL;
+6 -2
drivers/gpu/drm/radeon/radeon_connectors.c
··· 1379 1379 /* updated in get modes as well since we need to know if it's analog or digital */ 1380 1380 radeon_connector_update_scratch_regs(connector, ret); 1381 1381 1382 - if (radeon_audio != 0) 1382 + if (radeon_audio != 0) { 1383 + radeon_connector_get_edid(connector); 1383 1384 radeon_audio_detect(connector, ret); 1385 + } 1384 1386 1385 1387 exit: 1386 1388 pm_runtime_mark_last_busy(connector->dev->dev); ··· 1719 1717 1720 1718 radeon_connector_update_scratch_regs(connector, ret); 1721 1719 1722 - if (radeon_audio != 0) 1720 + if (radeon_audio != 0) { 1721 + radeon_connector_get_edid(connector); 1723 1722 radeon_audio_detect(connector, ret); 1723 + } 1724 1724 1725 1725 out: 1726 1726 pm_runtime_mark_last_busy(connector->dev->dev);
+2 -2
drivers/gpu/drm/radeon/radeon_cs.c
··· 88 88 p->dma_reloc_idx = 0; 89 89 /* FIXME: we assume that each relocs use 4 dwords */ 90 90 p->nrelocs = chunk->length_dw / 4; 91 - p->relocs = kcalloc(p->nrelocs, sizeof(struct radeon_bo_list), GFP_KERNEL); 91 + p->relocs = drm_calloc_large(p->nrelocs, sizeof(struct radeon_bo_list)); 92 92 if (p->relocs == NULL) { 93 93 return -ENOMEM; 94 94 } ··· 428 428 } 429 429 } 430 430 kfree(parser->track); 431 - kfree(parser->relocs); 431 + drm_free_large(parser->relocs); 432 432 drm_free_large(parser->vm_bos); 433 433 for (i = 0; i < parser->nchunks; i++) 434 434 drm_free_large(parser->chunks[i].kdata);
+5 -5
drivers/gpu/drm/radeon/radeon_mn.c
··· 135 135 while (it) { 136 136 struct radeon_mn_node *node; 137 137 struct radeon_bo *bo; 138 - int r; 138 + long r; 139 139 140 140 node = container_of(it, struct radeon_mn_node, it); 141 141 it = interval_tree_iter_next(it, start, end); ··· 144 144 145 145 r = radeon_bo_reserve(bo, true); 146 146 if (r) { 147 - DRM_ERROR("(%d) failed to reserve user bo\n", r); 147 + DRM_ERROR("(%ld) failed to reserve user bo\n", r); 148 148 continue; 149 149 } 150 150 151 151 r = reservation_object_wait_timeout_rcu(bo->tbo.resv, 152 152 true, false, MAX_SCHEDULE_TIMEOUT); 153 - if (r) 154 - DRM_ERROR("(%d) failed to wait for user bo\n", r); 153 + if (r <= 0) 154 + DRM_ERROR("(%ld) failed to wait for user bo\n", r); 155 155 156 156 radeon_ttm_placement_from_domain(bo, RADEON_GEM_DOMAIN_CPU); 157 157 r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false); 158 158 if (r) 159 - DRM_ERROR("(%d) failed to validate user bo\n", r); 159 + DRM_ERROR("(%ld) failed to validate user bo\n", r); 160 160 161 161 radeon_bo_unreserve(bo); 162 162 }
+21 -15
drivers/gpu/drm/radeon/radeon_vm.c
··· 473 473 } 474 474 475 475 mutex_lock(&vm->mutex); 476 + soffset /= RADEON_GPU_PAGE_SIZE; 477 + eoffset /= RADEON_GPU_PAGE_SIZE; 478 + if (soffset || eoffset) { 479 + struct interval_tree_node *it; 480 + it = interval_tree_iter_first(&vm->va, soffset, eoffset - 1); 481 + if (it && it != &bo_va->it) { 482 + struct radeon_bo_va *tmp; 483 + tmp = container_of(it, struct radeon_bo_va, it); 484 + /* bo and tmp overlap, invalid offset */ 485 + dev_err(rdev->dev, "bo %p va 0x%010Lx conflict with " 486 + "(bo %p 0x%010lx 0x%010lx)\n", bo_va->bo, 487 + soffset, tmp->bo, tmp->it.start, tmp->it.last); 488 + mutex_unlock(&vm->mutex); 489 + return -EINVAL; 490 + } 491 + } 492 + 476 493 if (bo_va->it.start || bo_va->it.last) { 477 494 if (bo_va->addr) { 478 495 /* add a clone of the bo_va to clear the old address */ ··· 507 490 spin_lock(&vm->status_lock); 508 491 list_add(&tmp->vm_status, &vm->freed); 509 492 spin_unlock(&vm->status_lock); 493 + 494 + bo_va->addr = 0; 510 495 } 511 496 512 497 interval_tree_remove(&bo_va->it, &vm->va); ··· 516 497 bo_va->it.last = 0; 517 498 } 518 499 519 - soffset /= RADEON_GPU_PAGE_SIZE; 520 - eoffset /= RADEON_GPU_PAGE_SIZE; 521 500 if (soffset || eoffset) { 522 - struct interval_tree_node *it; 523 - it = interval_tree_iter_first(&vm->va, soffset, eoffset - 1); 524 - if (it) { 525 - struct radeon_bo_va *tmp; 526 - tmp = container_of(it, struct radeon_bo_va, it); 527 - /* bo and tmp overlap, invalid offset */ 528 - dev_err(rdev->dev, "bo %p va 0x%010Lx conflict with " 529 - "(bo %p 0x%010lx 0x%010lx)\n", bo_va->bo, 530 - soffset, tmp->bo, tmp->it.start, tmp->it.last); 531 - mutex_unlock(&vm->mutex); 532 - return -EINVAL; 533 - } 534 501 bo_va->it.start = soffset; 535 502 bo_va->it.last = eoffset - 1; 536 503 interval_tree_insert(&bo_va->it, &vm->va); ··· 1112 1107 list_del(&bo_va->bo_list); 1113 1108 1114 1109 mutex_lock(&vm->mutex); 1115 - interval_tree_remove(&bo_va->it, &vm->va); 1110 + if (bo_va->it.start || bo_va->it.last) 1111 + interval_tree_remove(&bo_va->it, &vm->va); 1116 1112 spin_lock(&vm->status_lock); 1117 1113 list_del(&bo_va->vm_status); 1118 1114
+1
drivers/gpu/drm/radeon/si_dpm.c
··· 2924 2924 static struct si_dpm_quirk si_dpm_quirk_list[] = { 2925 2925 /* PITCAIRN - https://bugs.freedesktop.org/show_bug.cgi?id=76490 */ 2926 2926 { PCI_VENDOR_ID_ATI, 0x6810, 0x1462, 0x3036, 0, 120000 }, 2927 + { PCI_VENDOR_ID_ATI, 0x6811, 0x174b, 0xe271, 0, 120000 }, 2927 2928 { 0, 0, 0, 0 }, 2928 2929 }; 2929 2930
+5 -4
drivers/gpu/drm/rockchip/rockchip_drm_vop.c
··· 1409 1409 struct vop *vop; 1410 1410 struct resource *res; 1411 1411 size_t alloc_size; 1412 - int ret; 1412 + int ret, irq; 1413 1413 1414 1414 of_id = of_match_device(vop_driver_dt_match, dev); 1415 1415 vop_data = of_id->data; ··· 1445 1445 return ret; 1446 1446 } 1447 1447 1448 - vop->irq = platform_get_irq(pdev, 0); 1449 - if (vop->irq < 0) { 1448 + irq = platform_get_irq(pdev, 0); 1449 + if (irq < 0) { 1450 1450 dev_err(dev, "cannot find irq for vop\n"); 1451 - return vop->irq; 1451 + return irq; 1452 1452 } 1453 + vop->irq = (unsigned int)irq; 1453 1454 1454 1455 spin_lock_init(&vop->reg_lock); 1455 1456 spin_lock_init(&vop->irq_lock);