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ASoC: amd: acp: replace desc->rev check with acp pci revision id

Replace acp descriptor structure member 'rev' check with acp pci revision
id.

Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
Link: https://patch.msgid.link/20240819061329.1025189-1-Vijendar.Mukunda@amd.com
Signed-off-by: Mark Brown <broonie@kernel.org>

authored by

Vijendar Mukunda and committed by
Mark Brown 1004f34d 2c9abde4

+12 -10
+12 -10
sound/soc/sof/amd/acp.c
··· 236 236 unsigned int image_length) 237 237 { 238 238 struct snd_sof_dev *sdev = adata->dev; 239 - const struct sof_amd_acp_desc *desc = get_chip_info(sdev->pdata); 240 239 unsigned int tx_count, fw_qualifier, val; 241 240 int ret; 242 241 ··· 264 265 snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SHA_DMA_DESTINATION_ADDR, dest_addr); 265 266 snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SHA_MSG_LENGTH, image_length); 266 267 267 - /* psp_send_cmd only required for vangogh platform (rev - 5) */ 268 - if (desc->rev == 5 && !(adata->quirks && adata->quirks->skip_iram_dram_size_mod)) { 268 + /* psp_send_cmd only required for vangogh platform */ 269 + if (adata->pci_rev == ACP_VANGOGH_PCI_ID && 270 + !(adata->quirks && adata->quirks->skip_iram_dram_size_mod)) { 269 271 /* Modify IRAM and DRAM size */ 270 272 ret = psp_send_cmd(adata, MBOX_ACP_IRAM_DRAM_FENCE_COMMAND | IRAM_DRAM_FENCE_2); 271 273 if (ret) ··· 285 285 return ret; 286 286 } 287 287 288 - /* psp_send_cmd only required for renoir platform (rev - 3) */ 289 - if (desc->rev == 3) { 288 + /* psp_send_cmd only required for renoir platform*/ 289 + if (adata->pci_rev == ACP_RN_PCI_ID) { 290 290 ret = psp_send_cmd(adata, MBOX_ACP_SHA_DMA_COMMAND); 291 291 if (ret) 292 292 return ret; ··· 405 405 snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->ext_intr_stat, ACP_ERROR_IRQ_MASK); 406 406 snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->acp_sw0_i2s_err_reason, 0); 407 407 /* ACP_SW1_I2S_ERROR_REASON is newly added register from rmb platform onwards */ 408 - if (desc->rev >= 6) 408 + if (adata->pci_rev >= ACP_RMB_PCI_ID) 409 409 snd_sof_dsp_write(sdev, ACP_DSP_BAR, ACP_SW1_I2S_ERROR_REASON, 0); 410 410 snd_sof_dsp_write(sdev, ACP_DSP_BAR, desc->acp_error_stat, 0); 411 411 irq_flag = 1; ··· 431 431 static int acp_power_on(struct snd_sof_dev *sdev) 432 432 { 433 433 const struct sof_amd_acp_desc *desc = get_chip_info(sdev->pdata); 434 + struct acp_dev_data *adata = sdev->pdata->hw_pdata; 434 435 unsigned int base = desc->pgfsm_base; 435 436 unsigned int val; 436 437 unsigned int acp_pgfsm_status_mask, acp_pgfsm_cntl_mask; ··· 442 441 if (val == ACP_POWERED_ON) 443 442 return 0; 444 443 445 - switch (desc->rev) { 446 - case 3: 447 - case 5: 444 + switch (adata->pci_rev) { 445 + case ACP_RN_PCI_ID: 446 + case ACP_VANGOGH_PCI_ID: 448 447 acp_pgfsm_status_mask = ACP3X_PGFSM_STATUS_MASK; 449 448 acp_pgfsm_cntl_mask = ACP3X_PGFSM_CNTL_POWER_ON_MASK; 450 449 break; 451 - case 6: 450 + case ACP_RMB_PCI_ID: 451 + case ACP63_PCI_ID: 452 452 acp_pgfsm_status_mask = ACP6X_PGFSM_STATUS_MASK; 453 453 acp_pgfsm_cntl_mask = ACP6X_PGFSM_CNTL_POWER_ON_MASK; 454 454 break;