tjh.dev / kernel
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[media] tda18271c2dd: Lots of coding-style fixes

Signed-off-by: Oliver Endriss <o.endriss@gmx.de>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>

authored by

Oliver Endriss and committed by
Mauro Carvalho Chehab 0fe44629 e8783950

+1107 -1132
+338 -367
drivers/media/dvb/frontends/tda18271c2dd.c
··· 64 64 u32 m_RF3_Default; 65 65 }; 66 66 67 - enum ERegister 68 - { 67 + enum ERegister { 69 68 ID = 0, 70 69 TM, 71 70 PL, ··· 114 115 }; 115 116 116 117 static int PowerScan(struct tda_state *state, 117 - u8 RFBand,u32 RF_in, 118 - u32 * pRF_Out, bool *pbcal); 118 + u8 RFBand, u32 RF_in, 119 + u32 *pRF_Out, bool *pbcal); 119 120 120 121 static int i2c_readn(struct i2c_adapter *adapter, u8 adr, u8 *data, int len) 121 122 { 122 123 struct i2c_msg msgs[1] = {{.addr = adr, .flags = I2C_M_RD, 123 - .buf = data, .len = len}}; 124 + .buf = data, .len = len} }; 124 125 return (i2c_transfer(adapter, msgs, 1) == 1) ? 0 : -1; 125 126 } 126 127 ··· 130 131 .buf = data, .len = len}; 131 132 132 133 if (i2c_transfer(adap, &msg, 1) != 1) { 133 - printk("i2c_write error\n"); 134 + printk(KERN_ERR "i2c_write error\n"); 134 135 return -1; 135 136 } 136 137 return 0; ··· 146 147 return i2c_write(state->i2c, state->adr, data, nRegs+1); 147 148 } 148 149 149 - static int WriteReg(struct tda_state *state, u8 SubAddr,u8 Reg) 150 + static int WriteReg(struct tda_state *state, u8 SubAddr, u8 Reg) 150 151 { 151 152 u8 msg[2] = {SubAddr, Reg}; 152 153 ··· 163 164 return i2c_readn(state->i2c, state->adr, Regs, NUM_REGS); 164 165 } 165 166 166 - static int UpdateRegs(struct tda_state *state, u8 RegFrom,u8 RegTo) 167 + static int UpdateRegs(struct tda_state *state, u8 RegFrom, u8 RegTo) 167 168 { 168 169 return WriteRegs(state, RegFrom, 169 170 &state->m_Regs[RegFrom], RegTo-RegFrom+1); 170 171 } 171 172 static int UpdateReg(struct tda_state *state, u8 Reg) 172 173 { 173 - return WriteReg(state, Reg,state->m_Regs[Reg]); 174 + return WriteReg(state, Reg, state->m_Regs[Reg]); 174 175 } 175 176 176 177 #include "tda18271c2dd_maps.h" ··· 185 186 u32 ulIFLevelDVBC = 7; 186 187 u32 ulIFLevelDVBT = 6; 187 188 u32 ulXTOut = 0; 188 - u32 ulStandbyMode = 0x06; // Send in stdb, but leave osc on 189 + u32 ulStandbyMode = 0x06; /* Send in stdb, but leave osc on */ 189 190 u32 ulSlave = 0; 190 191 u32 ulFMInput = 0; 191 192 u32 ulSettlingTime = 100; ··· 198 199 state->m_IFLevelDVBT = (ulIFLevelDVBT & 0x07) << 2; 199 200 200 201 state->m_EP4 = 0x20; 201 - if( ulXTOut != 0 ) state->m_EP4 |= 0x40; 202 + if (ulXTOut != 0) 203 + state->m_EP4 |= 0x40; 202 204 203 205 state->m_EP3_Standby = ((ulStandbyMode & 0x07) << 5) | 0x0F; 204 206 state->m_bMaster = (ulSlave == 0); ··· 214 214 { 215 215 int i = 0; 216 216 217 - while ((Map[i].m_Frequency != 0) && (Frequency > Map[i].m_Frequency) ) 217 + while ((Map[i].m_Frequency != 0) && (Frequency > Map[i].m_Frequency)) 218 218 i += 1; 219 219 if (Map[i].m_Frequency == 0) 220 220 return false; ··· 228 228 int i = 0; 229 229 230 230 while ((Map[i].m_Frequency != 0) && 231 - (Frequency > Map[i].m_Frequency) ) 231 + (Frequency > Map[i].m_Frequency)) 232 232 i += 1; 233 233 if (Map[i].m_Frequency == 0) 234 234 return false; ··· 236 236 return true; 237 237 } 238 238 239 - static bool SearchMap3(struct SMap2 Map[],u32 Frequency, 239 + static bool SearchMap3(struct SMap2 Map[], u32 Frequency, 240 240 u8 *pParam1, u8 *pParam2) 241 241 { 242 242 int i = 0; 243 243 244 244 while ((Map[i].m_Frequency != 0) && 245 - (Frequency > Map[i].m_Frequency) ) 245 + (Frequency > Map[i].m_Frequency)) 246 246 i += 1; 247 247 if (Map[i].m_Frequency == 0) 248 248 return false; ··· 271 271 do { 272 272 u8 Regs[16]; 273 273 state->m_Regs[TM] |= 0x10; 274 - CHK_ERROR(UpdateReg(state,TM)); 275 - CHK_ERROR(Read(state,Regs)); 276 - if( ( (Regs[TM] & 0x0F) == 0 && (Regs[TM] & 0x20) == 0x20 ) || 277 - ( (Regs[TM] & 0x0F) == 8 && (Regs[TM] & 0x20) == 0x00 ) ) { 274 + CHK_ERROR(UpdateReg(state, TM)); 275 + CHK_ERROR(Read(state, Regs)); 276 + if (((Regs[TM] & 0x0F) == 0 && (Regs[TM] & 0x20) == 0x20) || 277 + ((Regs[TM] & 0x0F) == 8 && (Regs[TM] & 0x20) == 0x00)) { 278 278 state->m_Regs[TM] ^= 0x20; 279 - CHK_ERROR(UpdateReg(state,TM)); 279 + CHK_ERROR(UpdateReg(state, TM)); 280 280 msleep(10); 281 - CHK_ERROR(Read(state,Regs)); 281 + CHK_ERROR(Read(state, Regs)); 282 282 } 283 - *pTM_Value = (Regs[TM] & 0x20 ) ? m_Thermometer_Map_2[Regs[TM] & 0x0F] : 284 - m_Thermometer_Map_1[Regs[TM] & 0x0F] ; 285 - state->m_Regs[TM] &= ~0x10; // Thermometer off 286 - CHK_ERROR(UpdateReg(state,TM)); 287 - state->m_Regs[EP4] &= ~0x03; // CAL_mode = 0 ????????? 288 - CHK_ERROR(UpdateReg(state,EP4)); 289 - } while(0); 283 + *pTM_Value = (Regs[TM] & 0x20) 284 + ? m_Thermometer_Map_2[Regs[TM] & 0x0F] 285 + : m_Thermometer_Map_1[Regs[TM] & 0x0F] ; 286 + state->m_Regs[TM] &= ~0x10; /* Thermometer off */ 287 + CHK_ERROR(UpdateReg(state, TM)); 288 + state->m_Regs[EP4] &= ~0x03; /* CAL_mode = 0 ????????? */ 289 + CHK_ERROR(UpdateReg(state, EP4)); 290 + } while (0); 290 291 291 292 return status; 292 293 } ··· 296 295 { 297 296 int status = 0; 298 297 do { 299 - state->m_Regs[EB12] &= ~0x20; // PD_AGC1_Det = 0 300 - CHK_ERROR(UpdateReg(state,EB12)); 301 - state->m_Regs[EB18] &= ~0x83; // AGC1_loop_off = 0, AGC1_Gain = 6 dB 302 - CHK_ERROR(UpdateReg(state,EB18)); 303 - state->m_Regs[EB21] |= 0x03; // AGC2_Gain = -6 dB 298 + state->m_Regs[EB12] &= ~0x20; /* PD_AGC1_Det = 0 */ 299 + CHK_ERROR(UpdateReg(state, EB12)); 300 + state->m_Regs[EB18] &= ~0x83; /* AGC1_loop_off = 0, AGC1_Gain = 6 dB */ 301 + CHK_ERROR(UpdateReg(state, EB18)); 302 + state->m_Regs[EB21] |= 0x03; /* AGC2_Gain = -6 dB */ 304 303 state->m_Regs[EP3] = state->m_EP3_Standby; 305 - CHK_ERROR(UpdateReg(state,EP3)); 306 - state->m_Regs[EB23] &= ~0x06; // ForceLP_Fc2_En = 0, LP_Fc[2] = 0 307 - CHK_ERROR(UpdateRegs(state,EB21,EB23)); 308 - } while(0); 304 + CHK_ERROR(UpdateReg(state, EP3)); 305 + state->m_Regs[EB23] &= ~0x06; /* ForceLP_Fc2_En = 0, LP_Fc[2] = 0 */ 306 + CHK_ERROR(UpdateRegs(state, EB21, EB23)); 307 + } while (0); 309 308 return status; 310 309 } 311 310 ··· 317 316 u64 OscFreq; 318 317 u32 MainDiv; 319 318 320 - if (!SearchMap3(m_Main_PLL_Map, freq, &PostDiv, &Div)) { 319 + if (!SearchMap3(m_Main_PLL_Map, freq, &PostDiv, &Div)) 321 320 return -EINVAL; 322 - } 323 321 324 322 OscFreq = (u64) freq * (u64) Div; 325 323 OscFreq *= (u64) 16384; ··· 328 328 state->m_Regs[MPD] = PostDiv & 0x77; 329 329 state->m_Regs[MD1] = ((MainDiv >> 16) & 0x7F); 330 330 state->m_Regs[MD2] = ((MainDiv >> 8) & 0xFF); 331 - state->m_Regs[MD3] = ((MainDiv ) & 0xFF); 331 + state->m_Regs[MD3] = (MainDiv & 0xFF); 332 332 333 333 return UpdateRegs(state, MPD, MD3); 334 334 } 335 335 336 336 static int CalcCalPLL(struct tda_state *state, u32 freq) 337 337 { 338 - //KdPrintEx((MSG_TRACE " - " __FUNCTION__ "(%d)\n",freq)); 339 - 340 338 u8 PostDiv; 341 339 u8 Div; 342 340 u64 OscFreq; 343 341 u32 CalDiv; 344 342 345 - if( !SearchMap3(m_Cal_PLL_Map,freq,&PostDiv,&Div) ) 346 - { 343 + if (!SearchMap3(m_Cal_PLL_Map, freq, &PostDiv, &Div)) 347 344 return -EINVAL; 348 - } 349 345 350 346 OscFreq = (u64)freq * (u64)Div; 351 - //CalDiv = u32( OscFreq * 16384 / 16000000 ); 352 - OscFreq*=(u64)16384; 347 + /* CalDiv = u32( OscFreq * 16384 / 16000000 ); */ 348 + OscFreq *= (u64)16384; 353 349 do_div(OscFreq, (u64)16000000); 354 - CalDiv=OscFreq; 350 + CalDiv = OscFreq; 355 351 356 352 state->m_Regs[CPD] = PostDiv; 357 353 state->m_Regs[CD1] = ((CalDiv >> 16) & 0xFF); 358 354 state->m_Regs[CD2] = ((CalDiv >> 8) & 0xFF); 359 - state->m_Regs[CD3] = ((CalDiv ) & 0xFF); 355 + state->m_Regs[CD3] = (CalDiv & 0xFF); 360 356 361 - return UpdateRegs(state,CPD,CD3); 357 + return UpdateRegs(state, CPD, CD3); 362 358 } 363 359 364 360 static int CalibrateRF(struct tda_state *state, 365 - u8 RFBand,u32 freq, s32 * pCprog) 361 + u8 RFBand, u32 freq, s32 *pCprog) 366 362 { 367 - //KdPrintEx((MSG_TRACE " - " __FUNCTION__ " ID = %02x\n",state->m_Regs[ID])); 368 363 int status = 0; 369 364 u8 Regs[NUM_REGS]; 370 365 do { 371 - u8 BP_Filter=0; 372 - u8 GainTaper=0; 373 - u8 RFC_K=0; 374 - u8 RFC_M=0; 366 + u8 BP_Filter = 0; 367 + u8 GainTaper = 0; 368 + u8 RFC_K = 0; 369 + u8 RFC_M = 0; 375 370 376 - state->m_Regs[EP4] &= ~0x03; // CAL_mode = 0 377 - CHK_ERROR(UpdateReg(state,EP4)); 378 - state->m_Regs[EB18] |= 0x03; // AGC1_Gain = 3 379 - CHK_ERROR(UpdateReg(state,EB18)); 371 + state->m_Regs[EP4] &= ~0x03; /* CAL_mode = 0 */ 372 + CHK_ERROR(UpdateReg(state, EP4)); 373 + state->m_Regs[EB18] |= 0x03; /* AGC1_Gain = 3 */ 374 + CHK_ERROR(UpdateReg(state, EB18)); 380 375 381 - // Switching off LT (as datasheet says) causes calibration on C1 to fail 382 - // (Readout of Cprog is allways 255) 383 - if( state->m_Regs[ID] != 0x83 ) // C1: ID == 83, C2: ID == 84 384 - { 385 - state->m_Regs[EP3] |= 0x40; // SM_LT = 1 386 - } 376 + /* Switching off LT (as datasheet says) causes calibration on C1 to fail */ 377 + /* (Readout of Cprog is allways 255) */ 378 + if (state->m_Regs[ID] != 0x83) /* C1: ID == 83, C2: ID == 84 */ 379 + state->m_Regs[EP3] |= 0x40; /* SM_LT = 1 */ 387 380 388 - if( ! ( SearchMap1(m_BP_Filter_Map,freq,&BP_Filter) && 389 - SearchMap1(m_GainTaper_Map,freq,&GainTaper) && 390 - SearchMap3(m_KM_Map,freq,&RFC_K,&RFC_M)) ) 391 - { 381 + if (!(SearchMap1(m_BP_Filter_Map, freq, &BP_Filter) && 382 + SearchMap1(m_GainTaper_Map, freq, &GainTaper) && 383 + SearchMap3(m_KM_Map, freq, &RFC_K, &RFC_M))) 392 384 return -EINVAL; 393 - } 394 385 395 386 state->m_Regs[EP1] = (state->m_Regs[EP1] & ~0x07) | BP_Filter; 396 387 state->m_Regs[EP2] = (RFBand << 5) | GainTaper; 397 388 398 389 state->m_Regs[EB13] = (state->m_Regs[EB13] & ~0x7C) | (RFC_K << 4) | (RFC_M << 2); 399 390 400 - CHK_ERROR(UpdateRegs(state,EP1,EP3)); 401 - CHK_ERROR(UpdateReg(state,EB13)); 391 + CHK_ERROR(UpdateRegs(state, EP1, EP3)); 392 + CHK_ERROR(UpdateReg(state, EB13)); 402 393 403 - state->m_Regs[EB4] |= 0x20; // LO_ForceSrce = 1 404 - CHK_ERROR(UpdateReg(state,EB4)); 394 + state->m_Regs[EB4] |= 0x20; /* LO_ForceSrce = 1 */ 395 + CHK_ERROR(UpdateReg(state, EB4)); 405 396 406 - state->m_Regs[EB7] |= 0x20; // CAL_ForceSrce = 1 407 - CHK_ERROR(UpdateReg(state,EB7)); 397 + state->m_Regs[EB7] |= 0x20; /* CAL_ForceSrce = 1 */ 398 + CHK_ERROR(UpdateReg(state, EB7)); 408 399 409 - state->m_Regs[EB14] = 0; // RFC_Cprog = 0 410 - CHK_ERROR(UpdateReg(state,EB14)); 400 + state->m_Regs[EB14] = 0; /* RFC_Cprog = 0 */ 401 + CHK_ERROR(UpdateReg(state, EB14)); 411 402 412 - state->m_Regs[EB20] &= ~0x20; // ForceLock = 0; 413 - CHK_ERROR(UpdateReg(state,EB20)); 403 + state->m_Regs[EB20] &= ~0x20; /* ForceLock = 0; */ 404 + CHK_ERROR(UpdateReg(state, EB20)); 414 405 415 - state->m_Regs[EP4] |= 0x03; // CAL_Mode = 3 416 - CHK_ERROR(UpdateRegs(state,EP4,EP5)); 406 + state->m_Regs[EP4] |= 0x03; /* CAL_Mode = 3 */ 407 + CHK_ERROR(UpdateRegs(state, EP4, EP5)); 417 408 418 - CHK_ERROR(CalcCalPLL(state,freq)); 419 - CHK_ERROR(CalcMainPLL(state,freq + 1000000)); 409 + CHK_ERROR(CalcCalPLL(state, freq)); 410 + CHK_ERROR(CalcMainPLL(state, freq + 1000000)); 420 411 421 412 msleep(5); 422 - CHK_ERROR(UpdateReg(state,EP2)); 423 - CHK_ERROR(UpdateReg(state,EP1)); 424 - CHK_ERROR(UpdateReg(state,EP2)); 425 - CHK_ERROR(UpdateReg(state,EP1)); 413 + CHK_ERROR(UpdateReg(state, EP2)); 414 + CHK_ERROR(UpdateReg(state, EP1)); 415 + CHK_ERROR(UpdateReg(state, EP2)); 416 + CHK_ERROR(UpdateReg(state, EP1)); 426 417 427 - state->m_Regs[EB4] &= ~0x20; // LO_ForceSrce = 0 428 - CHK_ERROR(UpdateReg(state,EB4)); 418 + state->m_Regs[EB4] &= ~0x20; /* LO_ForceSrce = 0 */ 419 + CHK_ERROR(UpdateReg(state, EB4)); 429 420 430 - state->m_Regs[EB7] &= ~0x20; // CAL_ForceSrce = 0 431 - CHK_ERROR(UpdateReg(state,EB7)); 421 + state->m_Regs[EB7] &= ~0x20; /* CAL_ForceSrce = 0 */ 422 + CHK_ERROR(UpdateReg(state, EB7)); 432 423 msleep(10); 433 424 434 - state->m_Regs[EB20] |= 0x20; // ForceLock = 1; 435 - CHK_ERROR(UpdateReg(state,EB20)); 425 + state->m_Regs[EB20] |= 0x20; /* ForceLock = 1; */ 426 + CHK_ERROR(UpdateReg(state, EB20)); 436 427 msleep(60); 437 428 438 - state->m_Regs[EP4] &= ~0x03; // CAL_Mode = 0 439 - state->m_Regs[EP3] &= ~0x40; // SM_LT = 0 440 - state->m_Regs[EB18] &= ~0x03; // AGC1_Gain = 0 441 - CHK_ERROR(UpdateReg(state,EB18)); 442 - CHK_ERROR(UpdateRegs(state,EP3,EP4)); 443 - CHK_ERROR(UpdateReg(state,EP1)); 429 + state->m_Regs[EP4] &= ~0x03; /* CAL_Mode = 0 */ 430 + state->m_Regs[EP3] &= ~0x40; /* SM_LT = 0 */ 431 + state->m_Regs[EB18] &= ~0x03; /* AGC1_Gain = 0 */ 432 + CHK_ERROR(UpdateReg(state, EB18)); 433 + CHK_ERROR(UpdateRegs(state, EP3, EP4)); 434 + CHK_ERROR(UpdateReg(state, EP1)); 444 435 445 - CHK_ERROR(ReadExtented(state,Regs)); 436 + CHK_ERROR(ReadExtented(state, Regs)); 446 437 447 438 *pCprog = Regs[EB14]; 448 - //KdPrintEx((MSG_TRACE " - " __FUNCTION__ " Cprog = %d\n",Regs[EB14])); 449 439 450 - } while(0); 440 + } while (0); 451 441 return status; 452 442 } 453 443 454 444 static int RFTrackingFiltersInit(struct tda_state *state, 455 445 u8 RFBand) 456 446 { 457 - //KdPrintEx((MSG_TRACE " - " __FUNCTION__ "\n")); 458 447 int status = 0; 459 448 460 449 u32 RF1 = m_RF_Band_Map[RFBand].m_RF1_Default; ··· 464 475 state->m_RF_B2[RFBand] = 0; 465 476 466 477 do { 467 - CHK_ERROR(PowerScan(state,RFBand,RF1,&RF1,&bcal)); 468 - if( bcal ) { 469 - CHK_ERROR(CalibrateRF(state,RFBand,RF1,&Cprog_cal1)); 478 + CHK_ERROR(PowerScan(state, RFBand, RF1, &RF1, &bcal)); 479 + if (bcal) { 480 + CHK_ERROR(CalibrateRF(state, RFBand, RF1, &Cprog_cal1)); 470 481 } 471 - SearchMap2(m_RF_Cal_Map,RF1,&Cprog_table1); 472 - if( !bcal ) { 482 + SearchMap2(m_RF_Cal_Map, RF1, &Cprog_table1); 483 + if (!bcal) 473 484 Cprog_cal1 = Cprog_table1; 474 - } 475 485 state->m_RF_B1[RFBand] = Cprog_cal1 - Cprog_table1; 476 - //state->m_RF_A1[RF_Band] = ???? 486 + /* state->m_RF_A1[RF_Band] = ???? */ 477 487 478 - if( RF2 == 0 ) break; 488 + if (RF2 == 0) 489 + break; 479 490 480 - CHK_ERROR(PowerScan(state,RFBand,RF2,&RF2,&bcal)); 481 - if( bcal ) { 482 - CHK_ERROR(CalibrateRF(state,RFBand,RF2,&Cprog_cal2)); 491 + CHK_ERROR(PowerScan(state, RFBand, RF2, &RF2, &bcal)); 492 + if (bcal) { 493 + CHK_ERROR(CalibrateRF(state, RFBand, RF2, &Cprog_cal2)); 483 494 } 484 - SearchMap2(m_RF_Cal_Map,RF2,&Cprog_table2); 485 - if( !bcal ) 486 - { 495 + SearchMap2(m_RF_Cal_Map, RF2, &Cprog_table2); 496 + if (!bcal) 487 497 Cprog_cal2 = Cprog_table2; 488 - } 489 498 490 499 state->m_RF_A1[RFBand] = 491 500 (Cprog_cal2 - Cprog_table2 - Cprog_cal1 + Cprog_table1) / 492 - ((s32)(RF2)-(s32)(RF1)); 501 + ((s32)(RF2) - (s32)(RF1)); 493 502 494 - if( RF3 == 0 ) break; 503 + if (RF3 == 0) 504 + break; 495 505 496 - CHK_ERROR(PowerScan(state,RFBand,RF3,&RF3,&bcal)); 497 - if( bcal ) 498 - { 499 - CHK_ERROR(CalibrateRF(state,RFBand,RF3,&Cprog_cal3)); 506 + CHK_ERROR(PowerScan(state, RFBand, RF3, &RF3, &bcal)); 507 + if (bcal) { 508 + CHK_ERROR(CalibrateRF(state, RFBand, RF3, &Cprog_cal3)); 500 509 } 501 - SearchMap2(m_RF_Cal_Map,RF3,&Cprog_table3); 502 - if( !bcal ) 503 - { 510 + SearchMap2(m_RF_Cal_Map, RF3, &Cprog_table3); 511 + if (!bcal) 504 512 Cprog_cal3 = Cprog_table3; 505 - } 506 - state->m_RF_A2[RFBand] = (Cprog_cal3 - Cprog_table3 - Cprog_cal2 + Cprog_table2) / ((s32)(RF3)-(s32)(RF2)); 513 + state->m_RF_A2[RFBand] = (Cprog_cal3 - Cprog_table3 - Cprog_cal2 + Cprog_table2) / ((s32)(RF3) - (s32)(RF2)); 507 514 state->m_RF_B2[RFBand] = Cprog_cal2 - Cprog_table2; 508 515 509 - } while(0); 516 + } while (0); 510 517 511 518 state->m_RF1[RFBand] = RF1; 512 519 state->m_RF2[RFBand] = RF2; 513 520 state->m_RF3[RFBand] = RF3; 514 521 515 522 #if 0 516 - printk("%s %d RF1 = %d A1 = %d B1 = %d RF2 = %d A2 = %d B2 = %d RF3 = %d\n", __FUNCTION__, 517 - RFBand,RF1,state->m_RF_A1[RFBand],state->m_RF_B1[RFBand],RF2, 518 - state->m_RF_A2[RFBand],state->m_RF_B2[RFBand],RF3); 523 + printk(KERN_ERR "%s %d RF1 = %d A1 = %d B1 = %d RF2 = %d A2 = %d B2 = %d RF3 = %d\n", __func__, 524 + RFBand, RF1, state->m_RF_A1[RFBand], state->m_RF_B1[RFBand], RF2, 525 + state->m_RF_A2[RFBand], state->m_RF_B2[RFBand], RF3); 519 526 #endif 520 527 521 528 return status; 522 529 } 523 530 524 531 static int PowerScan(struct tda_state *state, 525 - u8 RFBand,u32 RF_in, u32 * pRF_Out, bool *pbcal) 532 + u8 RFBand, u32 RF_in, u32 *pRF_Out, bool *pbcal) 526 533 { 527 - //KdPrintEx((MSG_TRACE " - " __FUNCTION__ "(%d,%d)\n",RFBand,RF_in)); 528 - int status = 0; 529 - do { 530 - u8 Gain_Taper=0; 531 - s32 RFC_Cprog=0; 532 - u8 CID_Target=0; 533 - u8 CountLimit=0; 534 - u32 freq_MainPLL; 535 - u8 Regs[NUM_REGS]; 536 - u8 CID_Gain; 537 - s32 Count = 0; 538 - int sign = 1; 539 - bool wait = false; 534 + int status = 0; 535 + do { 536 + u8 Gain_Taper = 0; 537 + s32 RFC_Cprog = 0; 538 + u8 CID_Target = 0; 539 + u8 CountLimit = 0; 540 + u32 freq_MainPLL; 541 + u8 Regs[NUM_REGS]; 542 + u8 CID_Gain; 543 + s32 Count = 0; 544 + int sign = 1; 545 + bool wait = false; 540 546 541 - if( ! (SearchMap2(m_RF_Cal_Map,RF_in,&RFC_Cprog) && 542 - SearchMap1(m_GainTaper_Map,RF_in,&Gain_Taper) && 543 - SearchMap3(m_CID_Target_Map,RF_in,&CID_Target,&CountLimit) )) { 544 - printk("%s Search map failed\n", __FUNCTION__); 545 - return -EINVAL; 546 - } 547 + if (!(SearchMap2(m_RF_Cal_Map, RF_in, &RFC_Cprog) && 548 + SearchMap1(m_GainTaper_Map, RF_in, &Gain_Taper) && 549 + SearchMap3(m_CID_Target_Map, RF_in, &CID_Target, &CountLimit))) { 547 550 548 - state->m_Regs[EP2] = (RFBand << 5) | Gain_Taper; 549 - state->m_Regs[EB14] = (RFC_Cprog); 550 - CHK_ERROR(UpdateReg(state,EP2)); 551 - CHK_ERROR(UpdateReg(state,EB14)); 551 + printk(KERN_ERR "%s Search map failed\n", __func__); 552 + return -EINVAL; 553 + } 552 554 553 - freq_MainPLL = RF_in + 1000000; 554 - CHK_ERROR(CalcMainPLL(state,freq_MainPLL)); 555 - msleep(5); 556 - state->m_Regs[EP4] = (state->m_Regs[EP4] & ~0x03) | 1; // CAL_mode = 1 557 - CHK_ERROR(UpdateReg(state,EP4)); 558 - CHK_ERROR(UpdateReg(state,EP2)); // Launch power measurement 559 - CHK_ERROR(ReadExtented(state,Regs)); 560 - CID_Gain = Regs[EB10] & 0x3F; 561 - state->m_Regs[ID] = Regs[ID]; // Chip version, (needed for C1 workarround in CalibrateRF ) 555 + state->m_Regs[EP2] = (RFBand << 5) | Gain_Taper; 556 + state->m_Regs[EB14] = (RFC_Cprog); 557 + CHK_ERROR(UpdateReg(state, EP2)); 558 + CHK_ERROR(UpdateReg(state, EB14)); 562 559 563 - *pRF_Out = RF_in; 560 + freq_MainPLL = RF_in + 1000000; 561 + CHK_ERROR(CalcMainPLL(state, freq_MainPLL)); 562 + msleep(5); 563 + state->m_Regs[EP4] = (state->m_Regs[EP4] & ~0x03) | 1; /* CAL_mode = 1 */ 564 + CHK_ERROR(UpdateReg(state, EP4)); 565 + CHK_ERROR(UpdateReg(state, EP2)); /* Launch power measurement */ 566 + CHK_ERROR(ReadExtented(state, Regs)); 567 + CID_Gain = Regs[EB10] & 0x3F; 568 + state->m_Regs[ID] = Regs[ID]; /* Chip version, (needed for C1 workarround in CalibrateRF) */ 564 569 565 - while( CID_Gain < CID_Target ) { 566 - freq_MainPLL = RF_in + sign * Count + 1000000; 567 - CHK_ERROR(CalcMainPLL(state,freq_MainPLL)); 568 - msleep( wait ? 5 : 1 ); 569 - wait = false; 570 - CHK_ERROR(UpdateReg(state,EP2)); // Launch power measurement 571 - CHK_ERROR(ReadExtented(state,Regs)); 572 - CID_Gain = Regs[EB10] & 0x3F; 573 - Count += 200000; 570 + *pRF_Out = RF_in; 574 571 575 - if( Count < CountLimit * 100000 ) continue; 576 - if( sign < 0 ) break; 572 + while (CID_Gain < CID_Target) { 573 + freq_MainPLL = RF_in + sign * Count + 1000000; 574 + CHK_ERROR(CalcMainPLL(state, freq_MainPLL)); 575 + msleep(wait ? 5 : 1); 576 + wait = false; 577 + CHK_ERROR(UpdateReg(state, EP2)); /* Launch power measurement */ 578 + CHK_ERROR(ReadExtented(state, Regs)); 579 + CID_Gain = Regs[EB10] & 0x3F; 580 + Count += 200000; 577 581 578 - sign = -sign; 579 - Count = 200000; 580 - wait = true; 581 - } 582 - CHK_ERROR(status); 583 - if( CID_Gain >= CID_Target ) 584 - { 585 - *pbcal = true; 586 - *pRF_Out = freq_MainPLL - 1000000; 587 - } 588 - else 589 - { 590 - *pbcal = false; 591 - } 592 - } while(0); 593 - //KdPrintEx((MSG_TRACE " - " __FUNCTION__ " Found = %d RF = %d\n",*pbcal,*pRF_Out)); 594 - return status; 582 + if (Count < CountLimit * 100000) 583 + continue; 584 + if (sign < 0) 585 + break; 586 + 587 + sign = -sign; 588 + Count = 200000; 589 + wait = true; 590 + } 591 + CHK_ERROR(status); 592 + if (CID_Gain >= CID_Target) { 593 + *pbcal = true; 594 + *pRF_Out = freq_MainPLL - 1000000; 595 + } else 596 + *pbcal = false; 597 + } while (0); 598 + 599 + return status; 595 600 } 596 601 597 602 static int PowerScanInit(struct tda_state *state) 598 603 { 599 - //KdPrintEx((MSG_TRACE " - " __FUNCTION__ "\n")); 600 604 int status = 0; 601 - do 602 - { 605 + do { 603 606 state->m_Regs[EP3] = (state->m_Regs[EP3] & ~0x1F) | 0x12; 604 - state->m_Regs[EP4] = (state->m_Regs[EP4] & ~0x1F); // If level = 0, Cal mode = 0 605 - CHK_ERROR(UpdateRegs(state,EP3,EP4)); 606 - state->m_Regs[EB18] = (state->m_Regs[EB18] & ~0x03 ); // AGC 1 Gain = 0 607 - CHK_ERROR(UpdateReg(state,EB18)); 608 - state->m_Regs[EB21] = (state->m_Regs[EB21] & ~0x03 ); // AGC 2 Gain = 0 (Datasheet = 3) 609 - state->m_Regs[EB23] = (state->m_Regs[EB23] | 0x06 ); // ForceLP_Fc2_En = 1, LPFc[2] = 1 610 - CHK_ERROR(UpdateRegs(state,EB21,EB23)); 611 - } while(0); 607 + state->m_Regs[EP4] = (state->m_Regs[EP4] & ~0x1F); /* If level = 0, Cal mode = 0 */ 608 + CHK_ERROR(UpdateRegs(state, EP3, EP4)); 609 + state->m_Regs[EB18] = (state->m_Regs[EB18] & ~0x03); /* AGC 1 Gain = 0 */ 610 + CHK_ERROR(UpdateReg(state, EB18)); 611 + state->m_Regs[EB21] = (state->m_Regs[EB21] & ~0x03); /* AGC 2 Gain = 0 (Datasheet = 3) */ 612 + state->m_Regs[EB23] = (state->m_Regs[EB23] | 0x06); /* ForceLP_Fc2_En = 1, LPFc[2] = 1 */ 613 + CHK_ERROR(UpdateRegs(state, EB21, EB23)); 614 + } while (0); 612 615 return status; 613 616 } 614 617 615 618 static int CalcRFFilterCurve(struct tda_state *state) 616 619 { 617 - //KdPrintEx((MSG_TRACE " - " __FUNCTION__ "\n")); 618 620 int status = 0; 619 - do 620 - { 621 - msleep(200); // Temperature stabilisation 621 + do { 622 + msleep(200); /* Temperature stabilisation */ 622 623 CHK_ERROR(PowerScanInit(state)); 623 - CHK_ERROR(RFTrackingFiltersInit(state,0)); 624 - CHK_ERROR(RFTrackingFiltersInit(state,1)); 625 - CHK_ERROR(RFTrackingFiltersInit(state,2)); 626 - CHK_ERROR(RFTrackingFiltersInit(state,3)); 627 - CHK_ERROR(RFTrackingFiltersInit(state,4)); 628 - CHK_ERROR(RFTrackingFiltersInit(state,5)); 629 - CHK_ERROR(RFTrackingFiltersInit(state,6)); 630 - CHK_ERROR(ThermometerRead(state,&state->m_TMValue_RFCal)); // also switches off Cal mode !!! 631 - } while(0); 624 + CHK_ERROR(RFTrackingFiltersInit(state, 0)); 625 + CHK_ERROR(RFTrackingFiltersInit(state, 1)); 626 + CHK_ERROR(RFTrackingFiltersInit(state, 2)); 627 + CHK_ERROR(RFTrackingFiltersInit(state, 3)); 628 + CHK_ERROR(RFTrackingFiltersInit(state, 4)); 629 + CHK_ERROR(RFTrackingFiltersInit(state, 5)); 630 + CHK_ERROR(RFTrackingFiltersInit(state, 6)); 631 + CHK_ERROR(ThermometerRead(state, &state->m_TMValue_RFCal)); /* also switches off Cal mode !!! */ 632 + } while (0); 632 633 633 634 return status; 634 635 } ··· 626 647 static int FixedContentsI2CUpdate(struct tda_state *state) 627 648 { 628 649 static u8 InitRegs[] = { 629 - 0x08,0x80,0xC6, 630 - 0xDF,0x16,0x60,0x80, 631 - 0x80,0x00,0x00,0x00, 632 - 0x00,0x00,0x00,0x00, 633 - 0xFC,0x01,0x84,0x41, 634 - 0x01,0x84,0x40,0x07, 635 - 0x00,0x00,0x96,0x3F, 636 - 0xC1,0x00,0x8F,0x00, 637 - 0x00,0x8C,0x00,0x20, 638 - 0xB3,0x48,0xB0, 650 + 0x08, 0x80, 0xC6, 651 + 0xDF, 0x16, 0x60, 0x80, 652 + 0x80, 0x00, 0x00, 0x00, 653 + 0x00, 0x00, 0x00, 0x00, 654 + 0xFC, 0x01, 0x84, 0x41, 655 + 0x01, 0x84, 0x40, 0x07, 656 + 0x00, 0x00, 0x96, 0x3F, 657 + 0xC1, 0x00, 0x8F, 0x00, 658 + 0x00, 0x8C, 0x00, 0x20, 659 + 0xB3, 0x48, 0xB0, 639 660 }; 640 661 int status = 0; 641 - memcpy(&state->m_Regs[TM],InitRegs,EB23-TM+1); 662 + memcpy(&state->m_Regs[TM], InitRegs, EB23 - TM + 1); 642 663 do { 643 - CHK_ERROR(UpdateRegs(state,TM,EB23)); 664 + CHK_ERROR(UpdateRegs(state, TM, EB23)); 644 665 645 - // AGC1 gain setup 666 + /* AGC1 gain setup */ 646 667 state->m_Regs[EB17] = 0x00; 647 - CHK_ERROR(UpdateReg(state,EB17)); 668 + CHK_ERROR(UpdateReg(state, EB17)); 648 669 state->m_Regs[EB17] = 0x03; 649 - CHK_ERROR(UpdateReg(state,EB17)); 670 + CHK_ERROR(UpdateReg(state, EB17)); 650 671 state->m_Regs[EB17] = 0x43; 651 - CHK_ERROR(UpdateReg(state,EB17)); 672 + CHK_ERROR(UpdateReg(state, EB17)); 652 673 state->m_Regs[EB17] = 0x4C; 653 - CHK_ERROR(UpdateReg(state,EB17)); 674 + CHK_ERROR(UpdateReg(state, EB17)); 654 675 655 - // IRC Cal Low band 676 + /* IRC Cal Low band */ 656 677 state->m_Regs[EP3] = 0x1F; 657 678 state->m_Regs[EP4] = 0x66; 658 679 state->m_Regs[EP5] = 0x81; ··· 664 685 state->m_Regs[MD1] = 0x77; 665 686 state->m_Regs[MD2] = 0x08; 666 687 state->m_Regs[MD3] = 0x00; 667 - CHK_ERROR(UpdateRegs(state,EP2,MD3)); // diff between sw and datasheet (ep3-md3) 688 + CHK_ERROR(UpdateRegs(state, EP2, MD3)); /* diff between sw and datasheet (ep3-md3) */ 668 689 669 - //state->m_Regs[EB4] = 0x61; // missing in sw 670 - //CHK_ERROR(UpdateReg(state,EB4)); 671 - //msleep(1); 672 - //state->m_Regs[EB4] = 0x41; 673 - //CHK_ERROR(UpdateReg(state,EB4)); 690 + #if 0 691 + state->m_Regs[EB4] = 0x61; /* missing in sw */ 692 + CHK_ERROR(UpdateReg(state, EB4)); 693 + msleep(1); 694 + state->m_Regs[EB4] = 0x41; 695 + CHK_ERROR(UpdateReg(state, EB4)); 696 + #endif 674 697 675 698 msleep(5); 676 - CHK_ERROR(UpdateReg(state,EP1)); 699 + CHK_ERROR(UpdateReg(state, EP1)); 677 700 msleep(5); 678 701 679 702 state->m_Regs[EP5] = 0x85; 680 703 state->m_Regs[CPD] = 0xCB; 681 704 state->m_Regs[CD1] = 0x66; 682 705 state->m_Regs[CD2] = 0x70; 683 - CHK_ERROR(UpdateRegs(state,EP3,CD3)); 706 + CHK_ERROR(UpdateRegs(state, EP3, CD3)); 684 707 msleep(5); 685 - CHK_ERROR(UpdateReg(state,EP2)); 708 + CHK_ERROR(UpdateReg(state, EP2)); 686 709 msleep(30); 687 710 688 - // IRC Cal mid band 711 + /* IRC Cal mid band */ 689 712 state->m_Regs[EP5] = 0x82; 690 713 state->m_Regs[CPD] = 0xA8; 691 714 state->m_Regs[CD2] = 0x00; 692 - state->m_Regs[MPD] = 0xA1; // Datasheet = 0xA9 715 + state->m_Regs[MPD] = 0xA1; /* Datasheet = 0xA9 */ 693 716 state->m_Regs[MD1] = 0x73; 694 717 state->m_Regs[MD2] = 0x1A; 695 - CHK_ERROR(UpdateRegs(state,EP3,MD3)); 718 + CHK_ERROR(UpdateRegs(state, EP3, MD3)); 696 719 697 720 msleep(5); 698 - CHK_ERROR(UpdateReg(state,EP1)); 721 + CHK_ERROR(UpdateReg(state, EP1)); 699 722 msleep(5); 700 723 701 724 state->m_Regs[EP5] = 0x86; 702 725 state->m_Regs[CPD] = 0xA8; 703 726 state->m_Regs[CD1] = 0x66; 704 727 state->m_Regs[CD2] = 0xA0; 705 - CHK_ERROR(UpdateRegs(state,EP3,CD3)); 728 + CHK_ERROR(UpdateRegs(state, EP3, CD3)); 706 729 msleep(5); 707 - CHK_ERROR(UpdateReg(state,EP2)); 730 + CHK_ERROR(UpdateReg(state, EP2)); 708 731 msleep(30); 709 732 710 - // IRC Cal high band 733 + /* IRC Cal high band */ 711 734 state->m_Regs[EP5] = 0x83; 712 735 state->m_Regs[CPD] = 0x98; 713 736 state->m_Regs[CD1] = 0x65; 714 737 state->m_Regs[CD2] = 0x00; 715 - state->m_Regs[MPD] = 0x91; // Datasheet = 0x91 738 + state->m_Regs[MPD] = 0x91; /* Datasheet = 0x91 */ 716 739 state->m_Regs[MD1] = 0x71; 717 740 state->m_Regs[MD2] = 0xCD; 718 - CHK_ERROR(UpdateRegs(state,EP3,MD3)); 741 + CHK_ERROR(UpdateRegs(state, EP3, MD3)); 719 742 msleep(5); 720 - CHK_ERROR(UpdateReg(state,EP1)); 743 + CHK_ERROR(UpdateReg(state, EP1)); 721 744 msleep(5); 722 745 state->m_Regs[EP5] = 0x87; 723 746 state->m_Regs[CD1] = 0x65; 724 747 state->m_Regs[CD2] = 0x50; 725 - CHK_ERROR(UpdateRegs(state,EP3,CD3)); 748 + CHK_ERROR(UpdateRegs(state, EP3, CD3)); 726 749 msleep(5); 727 - CHK_ERROR(UpdateReg(state,EP2)); 750 + CHK_ERROR(UpdateReg(state, EP2)); 728 751 msleep(30); 729 752 730 - // Back to normal 753 + /* Back to normal */ 731 754 state->m_Regs[EP4] = 0x64; 732 - CHK_ERROR(UpdateReg(state,EP4)); 733 - CHK_ERROR(UpdateReg(state,EP1)); 755 + CHK_ERROR(UpdateReg(state, EP4)); 756 + CHK_ERROR(UpdateReg(state, EP1)); 734 757 735 - } while(0); 758 + } while (0); 736 759 return status; 737 760 } 738 761 ··· 742 761 { 743 762 int status = 0; 744 763 745 - do 746 - { 764 + do { 747 765 CHK_ERROR(FixedContentsI2CUpdate(state)); 748 766 CHK_ERROR(CalcRFFilterCurve(state)); 749 767 CHK_ERROR(StandBy(state)); 750 - //m_bInitDone = true; 751 - } while(0); 768 + /* m_bInitDone = true; */ 769 + } while (0); 752 770 return status; 753 771 }; 754 772 ··· 759 779 u8 RFBand; 760 780 u8 dCoverdT; 761 781 762 - if( !SearchMap2(m_RF_Cal_Map,Frequency,&Cprog_table) || 763 - !SearchMap4(m_RF_Band_Map,Frequency,&RFBand) || 764 - !SearchMap1(m_RF_Cal_DC_Over_DT_Map,Frequency,&dCoverdT) ) 765 - { 766 - return -EINVAL; 767 - } 782 + if (!SearchMap2(m_RF_Cal_Map, Frequency, &Cprog_table) || 783 + !SearchMap4(m_RF_Band_Map, Frequency, &RFBand) || 784 + !SearchMap1(m_RF_Cal_DC_Over_DT_Map, Frequency, &dCoverdT)) 768 785 769 - do 770 - { 786 + return -EINVAL; 787 + 788 + do { 771 789 u8 TMValue_Current; 772 790 u32 RF1 = state->m_RF1[RFBand]; 773 791 u32 RF2 = state->m_RF1[RFBand]; ··· 777 799 s32 Capprox = 0; 778 800 int TComp; 779 801 780 - state->m_Regs[EP3] &= ~0xE0; // Power up 781 - CHK_ERROR(UpdateReg(state,EP3)); 802 + state->m_Regs[EP3] &= ~0xE0; /* Power up */ 803 + CHK_ERROR(UpdateReg(state, EP3)); 782 804 783 - CHK_ERROR(ThermometerRead(state,&TMValue_Current)); 805 + CHK_ERROR(ThermometerRead(state, &TMValue_Current)); 784 806 785 - if( RF3 == 0 || Frequency < RF2 ) 786 - { 807 + if (RF3 == 0 || Frequency < RF2) 787 808 Capprox = RF_A1 * ((s32)(Frequency) - (s32)(RF1)) + RF_B1 + Cprog_table; 788 - } 789 809 else 790 - { 791 810 Capprox = RF_A2 * ((s32)(Frequency) - (s32)(RF2)) + RF_B2 + Cprog_table; 792 - } 793 811 794 812 TComp = (int)(dCoverdT) * ((int)(TMValue_Current) - (int)(state->m_TMValue_RFCal))/1000; 795 813 796 814 Capprox += TComp; 797 815 798 - if( Capprox < 0 ) Capprox = 0; 799 - else if( Capprox > 255 ) Capprox = 255; 816 + if (Capprox < 0) 817 + Capprox = 0; 818 + else if (Capprox > 255) 819 + Capprox = 255; 800 820 801 821 802 - // TODO Temperature compensation. There is defenitely a scale factor 803 - // missing in the datasheet, so leave it out for now. 804 - state->m_Regs[EB14] = (Capprox ); 822 + /* TODO Temperature compensation. There is defenitely a scale factor */ 823 + /* missing in the datasheet, so leave it out for now. */ 824 + state->m_Regs[EB14] = Capprox; 805 825 806 - CHK_ERROR(UpdateReg(state,EB14)); 826 + CHK_ERROR(UpdateReg(state, EB14)); 807 827 808 - } while(0); 828 + } while (0); 809 829 return status; 810 830 } 811 831 ··· 819 843 u8 GainTaper = 0; 820 844 u8 IR_Meas; 821 845 822 - state->IF=IntermediateFrequency; 823 - //printk("%s Freq = %d Standard = %d IF = %d\n",__FUNCTION__,Frequency,Standard,IntermediateFrequency); 824 - // get values from tables 846 + state->IF = IntermediateFrequency; 847 + /* printk("%s Freq = %d Standard = %d IF = %d\n", __func__, Frequency, Standard, IntermediateFrequency); */ 848 + /* get values from tables */ 825 849 826 - if(! ( SearchMap1(m_BP_Filter_Map,Frequency,&BP_Filter) && 827 - SearchMap1(m_GainTaper_Map,Frequency,&GainTaper) && 828 - SearchMap1(m_IR_Meas_Map,Frequency,&IR_Meas) && 829 - SearchMap4(m_RF_Band_Map,Frequency,&RF_Band) ) ) 830 - { 831 - printk("%s SearchMap failed\n", __FUNCTION__); 850 + if (!(SearchMap1(m_BP_Filter_Map, Frequency, &BP_Filter) && 851 + SearchMap1(m_GainTaper_Map, Frequency, &GainTaper) && 852 + SearchMap1(m_IR_Meas_Map, Frequency, &IR_Meas) && 853 + SearchMap4(m_RF_Band_Map, Frequency, &RF_Band))) { 854 + 855 + printk(KERN_ERR "%s SearchMap failed\n", __func__); 832 856 return -EINVAL; 833 857 } 834 858 835 - do 836 - { 859 + do { 837 860 state->m_Regs[EP3] = (state->m_Regs[EP3] & ~0x1F) | m_StandardTable[Standard].m_EP3_4_0; 838 - state->m_Regs[EP3] &= ~0x04; // switch RFAGC to high speed mode 861 + state->m_Regs[EP3] &= ~0x04; /* switch RFAGC to high speed mode */ 839 862 840 - // m_EP4 default for XToutOn, CAL_Mode (0) 841 - state->m_Regs[EP4] = state->m_EP4 | ((Standard > HF_AnalogMax )? state->m_IFLevelDigital : state->m_IFLevelAnalog ); 842 - //state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDigital; 843 - if( Standard <= HF_AnalogMax ) state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelAnalog; 844 - else if( Standard <= HF_ATSC ) state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDVBT; 845 - else if( Standard <= HF_DVBC ) state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDVBC; 846 - else state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDigital; 863 + /* m_EP4 default for XToutOn, CAL_Mode (0) */ 864 + state->m_Regs[EP4] = state->m_EP4 | ((Standard > HF_AnalogMax) ? state->m_IFLevelDigital : state->m_IFLevelAnalog); 865 + /* state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDigital; */ 866 + if (Standard <= HF_AnalogMax) 867 + state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelAnalog; 868 + else if (Standard <= HF_ATSC) 869 + state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDVBT; 870 + else if (Standard <= HF_DVBC) 871 + state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDVBC; 872 + else 873 + state->m_Regs[EP4] = state->m_EP4 | state->m_IFLevelDigital; 847 874 848 - if( (Standard == HF_FM_Radio) && state->m_bFMInput ) state->m_Regs[EP4] |= 80; 875 + if ((Standard == HF_FM_Radio) && state->m_bFMInput) 876 + state->m_Regs[EP4] |= 80; 849 877 850 878 state->m_Regs[MPD] &= ~0x80; 851 - if( Standard > HF_AnalogMax ) state->m_Regs[MPD] |= 0x80; // Add IF_notch for digital 879 + if (Standard > HF_AnalogMax) 880 + state->m_Regs[MPD] |= 0x80; /* Add IF_notch for digital */ 852 881 853 882 state->m_Regs[EB22] = m_StandardTable[Standard].m_EB22; 854 883 855 - // Note: This is missing from flowchart in TDA18271 specification ( 1.5 MHz cutoff for FM ) 856 - if( Standard == HF_FM_Radio ) state->m_Regs[EB23] |= 0x06; // ForceLP_Fc2_En = 1, LPFc[2] = 1 857 - else state->m_Regs[EB23] &= ~0x06; // ForceLP_Fc2_En = 0, LPFc[2] = 0 884 + /* Note: This is missing from flowchart in TDA18271 specification ( 1.5 MHz cutoff for FM ) */ 885 + if (Standard == HF_FM_Radio) 886 + state->m_Regs[EB23] |= 0x06; /* ForceLP_Fc2_En = 1, LPFc[2] = 1 */ 887 + else 888 + state->m_Regs[EB23] &= ~0x06; /* ForceLP_Fc2_En = 0, LPFc[2] = 0 */ 858 889 859 - CHK_ERROR(UpdateRegs(state,EB22,EB23)); 890 + CHK_ERROR(UpdateRegs(state, EB22, EB23)); 860 891 861 - state->m_Regs[EP1] = (state->m_Regs[EP1] & ~0x07) | 0x40 | BP_Filter; // Dis_Power_level = 1, Filter 892 + state->m_Regs[EP1] = (state->m_Regs[EP1] & ~0x07) | 0x40 | BP_Filter; /* Dis_Power_level = 1, Filter */ 862 893 state->m_Regs[EP5] = (state->m_Regs[EP5] & ~0x07) | IR_Meas; 863 894 state->m_Regs[EP2] = (RF_Band << 5) | GainTaper; 864 895 865 896 state->m_Regs[EB1] = (state->m_Regs[EB1] & ~0x07) | 866 - (state->m_bMaster ? 0x04 : 0x00); // CALVCO_FortLOn = MS 867 - // AGC1_always_master = 0 868 - // AGC_firstn = 0 869 - CHK_ERROR(UpdateReg(state,EB1)); 897 + (state->m_bMaster ? 0x04 : 0x00); /* CALVCO_FortLOn = MS */ 898 + /* AGC1_always_master = 0 */ 899 + /* AGC_firstn = 0 */ 900 + CHK_ERROR(UpdateReg(state, EB1)); 870 901 871 - if( state->m_bMaster ) 872 - { 873 - CHK_ERROR(CalcMainPLL(state,Frequency + IntermediateFrequency)); 874 - CHK_ERROR(UpdateRegs(state,TM,EP5)); 875 - state->m_Regs[EB4] |= 0x20; // LO_forceSrce = 1 876 - CHK_ERROR(UpdateReg(state,EB4)); 902 + if (state->m_bMaster) { 903 + CHK_ERROR(CalcMainPLL(state, Frequency + IntermediateFrequency)); 904 + CHK_ERROR(UpdateRegs(state, TM, EP5)); 905 + state->m_Regs[EB4] |= 0x20; /* LO_forceSrce = 1 */ 906 + CHK_ERROR(UpdateReg(state, EB4)); 877 907 msleep(1); 878 - state->m_Regs[EB4] &= ~0x20; // LO_forceSrce = 0 879 - CHK_ERROR(UpdateReg(state,EB4)); 880 - } 881 - else 882 - { 908 + state->m_Regs[EB4] &= ~0x20; /* LO_forceSrce = 0 */ 909 + CHK_ERROR(UpdateReg(state, EB4)); 910 + } else { 883 911 u8 PostDiv; 884 912 u8 Div; 885 - CHK_ERROR(CalcCalPLL(state,Frequency + IntermediateFrequency)); 913 + CHK_ERROR(CalcCalPLL(state, Frequency + IntermediateFrequency)); 886 914 887 - SearchMap3(m_Cal_PLL_Map,Frequency + IntermediateFrequency,&PostDiv,&Div); 915 + SearchMap3(m_Cal_PLL_Map, Frequency + IntermediateFrequency, &PostDiv, &Div); 888 916 state->m_Regs[MPD] = (state->m_Regs[MPD] & ~0x7F) | (PostDiv & 0x77); 889 - CHK_ERROR(UpdateReg(state,MPD)); 890 - CHK_ERROR(UpdateRegs(state,TM,EP5)); 917 + CHK_ERROR(UpdateReg(state, MPD)); 918 + CHK_ERROR(UpdateRegs(state, TM, EP5)); 891 919 892 - state->m_Regs[EB7] |= 0x20; // CAL_forceSrce = 1 893 - CHK_ERROR(UpdateReg(state,EB7)); 920 + state->m_Regs[EB7] |= 0x20; /* CAL_forceSrce = 1 */ 921 + CHK_ERROR(UpdateReg(state, EB7)); 894 922 msleep(1); 895 - state->m_Regs[EB7] &= ~0x20; // CAL_forceSrce = 0 896 - CHK_ERROR(UpdateReg(state,EB7)); 923 + state->m_Regs[EB7] &= ~0x20; /* CAL_forceSrce = 0 */ 924 + CHK_ERROR(UpdateReg(state, EB7)); 897 925 } 898 926 msleep(20); 899 - if( Standard != HF_FM_Radio ) 900 - { 901 - state->m_Regs[EP3] |= 0x04; // RFAGC to normal mode 902 - } 903 - CHK_ERROR(UpdateReg(state,EP3)); 927 + if (Standard != HF_FM_Radio) 928 + state->m_Regs[EP3] |= 0x04; /* RFAGC to normal mode */ 929 + CHK_ERROR(UpdateReg(state, EP3)); 904 930 905 - } while(0); 931 + } while (0); 906 932 return status; 907 933 } 908 934 909 - static int sleep(struct dvb_frontend* fe) 935 + static int sleep(struct dvb_frontend *fe) 910 936 { 911 937 struct tda_state *state = fe->tuner_priv; 912 938 ··· 916 938 return 0; 917 939 } 918 940 919 - static int init(struct dvb_frontend* fe) 941 + static int init(struct dvb_frontend *fe) 920 942 { 921 - //struct tda_state *state = fe->tuner_priv; 922 943 return 0; 923 944 } 924 945 925 - static int release(struct dvb_frontend* fe) 946 + static int release(struct dvb_frontend *fe) 926 947 { 927 948 kfree(fe->tuner_priv); 928 949 fe->tuner_priv = NULL; ··· 955 978 } else 956 979 return -EINVAL; 957 980 do { 958 - CHK_ERROR(RFTrackingFiltersCorrection(state,params->frequency)); 959 - CHK_ERROR(ChannelConfiguration(state,params->frequency,Standard)); 981 + CHK_ERROR(RFTrackingFiltersCorrection(state, params->frequency)); 982 + CHK_ERROR(ChannelConfiguration(state, params->frequency, Standard)); 960 983 961 - msleep(state->m_SettlingTime); // Allow AGC's to settle down 962 - } while(0); 984 + msleep(state->m_SettlingTime); /* Allow AGC's to settle down */ 985 + } while (0); 963 986 return status; 964 987 } 965 988 966 989 #if 0 967 - static int GetSignalStrength(s32 * pSignalStrength,u32 RFAgc,u32 IFAgc) 990 + static int GetSignalStrength(s32 *pSignalStrength, u32 RFAgc, u32 IFAgc) 968 991 { 969 - if( IFAgc < 500 ) { 970 - // Scale this from 0 to 50000 992 + if (IFAgc < 500) { 993 + /* Scale this from 0 to 50000 */ 971 994 *pSignalStrength = IFAgc * 100; 972 995 } else { 973 - // Scale range 500-1500 to 50000-80000 996 + /* Scale range 500-1500 to 50000-80000 */ 974 997 *pSignalStrength = 50000 + (IFAgc - 500) * 30; 975 998 } 976 999 ··· 988 1011 989 1012 static int get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth) 990 1013 { 991 - //struct tda_state *state = fe->tuner_priv; 992 - //*bandwidth = priv->bandwidth; 1014 + /* struct tda_state *state = fe->tuner_priv; */ 1015 + /* *bandwidth = priv->bandwidth; */ 993 1016 return 0; 994 1017 } 995 1018 ··· 1027 1050 1028 1051 return fe; 1029 1052 } 1030 - 1031 1053 EXPORT_SYMBOL_GPL(tda18271c2dd_attach); 1054 + 1032 1055 MODULE_DESCRIPTION("TDA18271C2 driver"); 1033 1056 MODULE_AUTHOR("DD"); 1034 1057 MODULE_LICENSE("GPL"); 1035 - 1036 - /* 1037 - * Local variables: 1038 - * c-basic-offset: 8 1039 - * End: 1040 - */
+769 -765
drivers/media/dvb/frontends/tda18271c2dd_maps.h
··· 1 1 enum HF_S { 2 - HF_None=0, HF_B, HF_DK, HF_G, HF_I, HF_L, HF_L1, HF_MN, HF_FM_Radio, 2 + HF_None = 0, HF_B, HF_DK, HF_G, HF_I, HF_L, HF_L1, HF_MN, HF_FM_Radio, 3 3 HF_AnalogMax, HF_DVBT_6MHZ, HF_DVBT_7MHZ, HF_DVBT_8MHZ, 4 4 HF_DVBT, HF_ATSC, HF_DVBC_6MHZ, HF_DVBC_7MHZ, 5 5 HF_DVBC_8MHZ, HF_DVBC 6 6 }; 7 7 8 - struct SStandardParam m_StandardTable[] = 9 - { 10 - { 0, 0, 0x00, 0x00 }, // HF_None 11 - { 6000000, 7000000, 0x1D, 0x2C }, // HF_B, 12 - { 6900000, 8000000, 0x1E, 0x2C }, // HF_DK, 13 - { 7100000, 8000000, 0x1E, 0x2C }, // HF_G, 14 - { 7250000, 8000000, 0x1E, 0x2C }, // HF_I, 15 - { 6900000, 8000000, 0x1E, 0x2C }, // HF_L, 16 - { 1250000, 8000000, 0x1E, 0x2C }, // HF_L1, 17 - { 5400000, 6000000, 0x1C, 0x2C }, // HF_MN, 18 - { 1250000, 500000, 0x18, 0x2C }, // HF_FM_Radio, 19 - { 0, 0, 0x00, 0x00 }, // HF_AnalogMax (Unused) 20 - { 3300000, 6000000, 0x1C, 0x58 }, // HF_DVBT_6MHZ 21 - { 3500000, 7000000, 0x1C, 0x37 }, // HF_DVBT_7MHZ 22 - { 4000000, 8000000, 0x1D, 0x37 }, // HF_DVBT_8MHZ 23 - { 0, 0, 0x00, 0x00 }, // HF_DVBT (Unused) 24 - { 5000000, 6000000, 0x1C, 0x37 }, // HF_ATSC (center = 3.25 MHz) 25 - { 4000000, 6000000, 0x1D, 0x58 }, // HF_DVBC_6MHZ (Chicago) 26 - { 4500000, 7000000, 0x1E, 0x37 }, // HF_DVBC_7MHZ (not documented by NXP) 27 - { 5000000, 8000000, 0x1F, 0x37 }, // HF_DVBC_8MHZ 28 - { 0, 0, 0x00, 0x00 }, // HF_DVBC (Unused) 8 + struct SStandardParam m_StandardTable[] = { 9 + { 0, 0, 0x00, 0x00 }, /* HF_None */ 10 + { 6000000, 7000000, 0x1D, 0x2C }, /* HF_B, */ 11 + { 6900000, 8000000, 0x1E, 0x2C }, /* HF_DK, */ 12 + { 7100000, 8000000, 0x1E, 0x2C }, /* HF_G, */ 13 + { 7250000, 8000000, 0x1E, 0x2C }, /* HF_I, */ 14 + { 6900000, 8000000, 0x1E, 0x2C }, /* HF_L, */ 15 + { 1250000, 8000000, 0x1E, 0x2C }, /* HF_L1, */ 16 + { 5400000, 6000000, 0x1C, 0x2C }, /* HF_MN, */ 17 + { 1250000, 500000, 0x18, 0x2C }, /* HF_FM_Radio, */ 18 + { 0, 0, 0x00, 0x00 }, /* HF_AnalogMax (Unused) */ 19 + { 3300000, 6000000, 0x1C, 0x58 }, /* HF_DVBT_6MHZ */ 20 + { 3500000, 7000000, 0x1C, 0x37 }, /* HF_DVBT_7MHZ */ 21 + { 4000000, 8000000, 0x1D, 0x37 }, /* HF_DVBT_8MHZ */ 22 + { 0, 0, 0x00, 0x00 }, /* HF_DVBT (Unused) */ 23 + { 5000000, 6000000, 0x1C, 0x37 }, /* HF_ATSC (center = 3.25 MHz) */ 24 + { 4000000, 6000000, 0x1D, 0x58 }, /* HF_DVBC_6MHZ (Chicago) */ 25 + { 4500000, 7000000, 0x1E, 0x37 }, /* HF_DVBC_7MHZ (not documented by NXP) */ 26 + { 5000000, 8000000, 0x1F, 0x37 }, /* HF_DVBC_8MHZ */ 27 + { 0, 0, 0x00, 0x00 }, /* HF_DVBC (Unused) */ 29 28 }; 30 29 31 30 struct SMap m_BP_Filter_Map[] = { 32 - { 62000000, 0x00 }, 33 - { 84000000, 0x01 }, 34 - { 100000000, 0x02 }, 35 - { 140000000, 0x03 }, 36 - { 170000000, 0x04 }, 37 - { 180000000, 0x05 }, 38 - { 865000000, 0x06 }, 39 - { 0, 0x00 }, // Table End 31 + { 62000000, 0x00 }, 32 + { 84000000, 0x01 }, 33 + { 100000000, 0x02 }, 34 + { 140000000, 0x03 }, 35 + { 170000000, 0x04 }, 36 + { 180000000, 0x05 }, 37 + { 865000000, 0x06 }, 38 + { 0, 0x00 }, /* Table End */ 40 39 }; 41 40 42 41 static struct SMapI m_RF_Cal_Map[] = { 43 - { 41000000, 0x0F }, 44 - { 43000000, 0x1C }, 45 - { 45000000, 0x2F }, 46 - { 46000000, 0x39 }, 47 - { 47000000, 0x40 }, 48 - { 47900000, 0x50 }, 49 - { 49100000, 0x16 }, 50 - { 50000000, 0x18 }, 51 - { 51000000, 0x20 }, 52 - { 53000000, 0x28 }, 53 - { 55000000, 0x2B }, 54 - { 56000000, 0x32 }, 55 - { 57000000, 0x35 }, 56 - { 58000000, 0x3E }, 57 - { 59000000, 0x43 }, 58 - { 60000000, 0x4E }, 59 - { 61100000, 0x55 }, 60 - { 63000000, 0x0F }, 61 - { 64000000, 0x11 }, 62 - { 65000000, 0x12 }, 63 - { 66000000, 0x15 }, 64 - { 67000000, 0x16 }, 65 - { 68000000, 0x17 }, 66 - { 70000000, 0x19 }, 67 - { 71000000, 0x1C }, 68 - { 72000000, 0x1D }, 69 - { 73000000, 0x1F }, 70 - { 74000000, 0x20 }, 71 - { 75000000, 0x21 }, 72 - { 76000000, 0x24 }, 73 - { 77000000, 0x25 }, 74 - { 78000000, 0x27 }, 75 - { 80000000, 0x28 }, 76 - { 81000000, 0x29 }, 77 - { 82000000, 0x2D }, 78 - { 83000000, 0x2E }, 79 - { 84000000, 0x2F }, 80 - { 85000000, 0x31 }, 81 - { 86000000, 0x33 }, 82 - { 87000000, 0x34 }, 83 - { 88000000, 0x35 }, 84 - { 89000000, 0x37 }, 85 - { 90000000, 0x38 }, 86 - { 91000000, 0x39 }, 87 - { 93000000, 0x3C }, 88 - { 94000000, 0x3E }, 89 - { 95000000, 0x3F }, 90 - { 96000000, 0x40 }, 91 - { 97000000, 0x42 }, 92 - { 99000000, 0x45 }, 93 - { 100000000, 0x46 }, 94 - { 102000000, 0x48 }, 95 - { 103000000, 0x4A }, 96 - { 105000000, 0x4D }, 97 - { 106000000, 0x4E }, 98 - { 107000000, 0x50 }, 99 - { 108000000, 0x51 }, 100 - { 110000000, 0x54 }, 101 - { 111000000, 0x56 }, 102 - { 112000000, 0x57 }, 103 - { 113000000, 0x58 }, 104 - { 114000000, 0x59 }, 105 - { 115000000, 0x5C }, 106 - { 116000000, 0x5D }, 107 - { 117000000, 0x5F }, 108 - { 119000000, 0x60 }, 109 - { 120000000, 0x64 }, 110 - { 121000000, 0x65 }, 111 - { 122000000, 0x66 }, 112 - { 123000000, 0x68 }, 113 - { 124000000, 0x69 }, 114 - { 125000000, 0x6C }, 115 - { 126000000, 0x6D }, 116 - { 127000000, 0x6E }, 117 - { 128000000, 0x70 }, 118 - { 129000000, 0x71 }, 119 - { 130000000, 0x75 }, 120 - { 131000000, 0x77 }, 121 - { 132000000, 0x78 }, 122 - { 133000000, 0x7B }, 123 - { 134000000, 0x7E }, 124 - { 135000000, 0x81 }, 125 - { 136000000, 0x82 }, 126 - { 137000000, 0x87 }, 127 - { 138000000, 0x88 }, 128 - { 139000000, 0x8D }, 129 - { 140000000, 0x8E }, 130 - { 141000000, 0x91 }, 131 - { 142000000, 0x95 }, 132 - { 143000000, 0x9A }, 133 - { 144000000, 0x9D }, 134 - { 145000000, 0xA1 }, 135 - { 146000000, 0xA2 }, 136 - { 147000000, 0xA4 }, 137 - { 148000000, 0xA9 }, 138 - { 149000000, 0xAE }, 139 - { 150000000, 0xB0 }, 140 - { 151000000, 0xB1 }, 141 - { 152000000, 0xB7 }, 142 - { 152600000, 0xBD }, 143 - { 154000000, 0x20 }, 144 - { 155000000, 0x22 }, 145 - { 156000000, 0x24 }, 146 - { 157000000, 0x25 }, 147 - { 158000000, 0x27 }, 148 - { 159000000, 0x29 }, 149 - { 160000000, 0x2C }, 150 - { 161000000, 0x2D }, 151 - { 163000000, 0x2E }, 152 - { 164000000, 0x2F }, 153 - { 164700000, 0x30 }, 154 - { 166000000, 0x11 }, 155 - { 167000000, 0x12 }, 156 - { 168000000, 0x13 }, 157 - { 169000000, 0x14 }, 158 - { 170000000, 0x15 }, 159 - { 172000000, 0x16 }, 160 - { 173000000, 0x17 }, 161 - { 174000000, 0x18 }, 162 - { 175000000, 0x1A }, 163 - { 176000000, 0x1B }, 164 - { 178000000, 0x1D }, 165 - { 179000000, 0x1E }, 166 - { 180000000, 0x1F }, 167 - { 181000000, 0x20 }, 168 - { 182000000, 0x21 }, 169 - { 183000000, 0x22 }, 170 - { 184000000, 0x24 }, 171 - { 185000000, 0x25 }, 172 - { 186000000, 0x26 }, 173 - { 187000000, 0x27 }, 174 - { 188000000, 0x29 }, 175 - { 189000000, 0x2A }, 176 - { 190000000, 0x2C }, 177 - { 191000000, 0x2D }, 178 - { 192000000, 0x2E }, 179 - { 193000000, 0x2F }, 180 - { 194000000, 0x30 }, 181 - { 195000000, 0x33 }, 182 - { 196000000, 0x35 }, 183 - { 198000000, 0x36 }, 184 - { 200000000, 0x38 }, 185 - { 201000000, 0x3C }, 186 - { 202000000, 0x3D }, 187 - { 203500000, 0x3E }, 188 - { 206000000, 0x0E }, 189 - { 208000000, 0x0F }, 190 - { 212000000, 0x10 }, 191 - { 216000000, 0x11 }, 192 - { 217000000, 0x12 }, 193 - { 218000000, 0x13 }, 194 - { 220000000, 0x14 }, 195 - { 222000000, 0x15 }, 196 - { 225000000, 0x16 }, 197 - { 228000000, 0x17 }, 198 - { 231000000, 0x18 }, 199 - { 234000000, 0x19 }, 200 - { 235000000, 0x1A }, 201 - { 236000000, 0x1B }, 202 - { 237000000, 0x1C }, 203 - { 240000000, 0x1D }, 204 - { 242000000, 0x1E }, 205 - { 244000000, 0x1F }, 206 - { 247000000, 0x20 }, 207 - { 249000000, 0x21 }, 208 - { 252000000, 0x22 }, 209 - { 253000000, 0x23 }, 210 - { 254000000, 0x24 }, 211 - { 256000000, 0x25 }, 212 - { 259000000, 0x26 }, 213 - { 262000000, 0x27 }, 214 - { 264000000, 0x28 }, 215 - { 267000000, 0x29 }, 216 - { 269000000, 0x2A }, 217 - { 271000000, 0x2B }, 218 - { 273000000, 0x2C }, 219 - { 275000000, 0x2D }, 220 - { 277000000, 0x2E }, 221 - { 279000000, 0x2F }, 222 - { 282000000, 0x30 }, 223 - { 284000000, 0x31 }, 224 - { 286000000, 0x32 }, 225 - { 287000000, 0x33 }, 226 - { 290000000, 0x34 }, 227 - { 293000000, 0x35 }, 228 - { 295000000, 0x36 }, 229 - { 297000000, 0x37 }, 230 - { 300000000, 0x38 }, 231 - { 303000000, 0x39 }, 232 - { 305000000, 0x3A }, 233 - { 306000000, 0x3B }, 234 - { 307000000, 0x3C }, 235 - { 310000000, 0x3D }, 236 - { 312000000, 0x3E }, 237 - { 315000000, 0x3F }, 238 - { 318000000, 0x40 }, 239 - { 320000000, 0x41 }, 240 - { 323000000, 0x42 }, 241 - { 324000000, 0x43 }, 242 - { 325000000, 0x44 }, 243 - { 327000000, 0x45 }, 244 - { 331000000, 0x46 }, 245 - { 334000000, 0x47 }, 246 - { 337000000, 0x48 }, 247 - { 339000000, 0x49 }, 248 - { 340000000, 0x4A }, 249 - { 341000000, 0x4B }, 250 - { 343000000, 0x4C }, 251 - { 345000000, 0x4D }, 252 - { 349000000, 0x4E }, 253 - { 352000000, 0x4F }, 254 - { 353000000, 0x50 }, 255 - { 355000000, 0x51 }, 256 - { 357000000, 0x52 }, 257 - { 359000000, 0x53 }, 258 - { 361000000, 0x54 }, 259 - { 362000000, 0x55 }, 260 - { 364000000, 0x56 }, 261 - { 368000000, 0x57 }, 262 - { 370000000, 0x58 }, 263 - { 372000000, 0x59 }, 264 - { 375000000, 0x5A }, 265 - { 376000000, 0x5B }, 266 - { 377000000, 0x5C }, 267 - { 379000000, 0x5D }, 268 - { 382000000, 0x5E }, 269 - { 384000000, 0x5F }, 270 - { 385000000, 0x60 }, 271 - { 386000000, 0x61 }, 272 - { 388000000, 0x62 }, 273 - { 390000000, 0x63 }, 274 - { 393000000, 0x64 }, 275 - { 394000000, 0x65 }, 276 - { 396000000, 0x66 }, 277 - { 397000000, 0x67 }, 278 - { 398000000, 0x68 }, 279 - { 400000000, 0x69 }, 280 - { 402000000, 0x6A }, 281 - { 403000000, 0x6B }, 282 - { 407000000, 0x6C }, 283 - { 408000000, 0x6D }, 284 - { 409000000, 0x6E }, 285 - { 410000000, 0x6F }, 286 - { 411000000, 0x70 }, 287 - { 412000000, 0x71 }, 288 - { 413000000, 0x72 }, 289 - { 414000000, 0x73 }, 290 - { 417000000, 0x74 }, 291 - { 418000000, 0x75 }, 292 - { 420000000, 0x76 }, 293 - { 422000000, 0x77 }, 294 - { 423000000, 0x78 }, 295 - { 424000000, 0x79 }, 296 - { 427000000, 0x7A }, 297 - { 428000000, 0x7B }, 298 - { 429000000, 0x7D }, 299 - { 432000000, 0x7F }, 300 - { 434000000, 0x80 }, 301 - { 435000000, 0x81 }, 302 - { 436000000, 0x83 }, 303 - { 437000000, 0x84 }, 304 - { 438000000, 0x85 }, 305 - { 439000000, 0x86 }, 306 - { 440000000, 0x87 }, 307 - { 441000000, 0x88 }, 308 - { 442000000, 0x89 }, 309 - { 445000000, 0x8A }, 310 - { 446000000, 0x8B }, 311 - { 447000000, 0x8C }, 312 - { 448000000, 0x8E }, 313 - { 449000000, 0x8F }, 314 - { 450000000, 0x90 }, 315 - { 452000000, 0x91 }, 316 - { 453000000, 0x93 }, 317 - { 454000000, 0x94 }, 318 - { 456000000, 0x96 }, 319 - { 457800000, 0x98 }, 320 - { 461000000, 0x11 }, 321 - { 468000000, 0x12 }, 322 - { 472000000, 0x13 }, 323 - { 473000000, 0x14 }, 324 - { 474000000, 0x15 }, 325 - { 481000000, 0x16 }, 326 - { 486000000, 0x17 }, 327 - { 491000000, 0x18 }, 328 - { 498000000, 0x19 }, 329 - { 499000000, 0x1A }, 330 - { 501000000, 0x1B }, 331 - { 506000000, 0x1C }, 332 - { 511000000, 0x1D }, 333 - { 516000000, 0x1E }, 334 - { 520000000, 0x1F }, 335 - { 521000000, 0x20 }, 336 - { 525000000, 0x21 }, 337 - { 529000000, 0x22 }, 338 - { 533000000, 0x23 }, 339 - { 539000000, 0x24 }, 340 - { 541000000, 0x25 }, 341 - { 547000000, 0x26 }, 342 - { 549000000, 0x27 }, 343 - { 551000000, 0x28 }, 344 - { 556000000, 0x29 }, 345 - { 561000000, 0x2A }, 346 - { 563000000, 0x2B }, 347 - { 565000000, 0x2C }, 348 - { 569000000, 0x2D }, 349 - { 571000000, 0x2E }, 350 - { 577000000, 0x2F }, 351 - { 580000000, 0x30 }, 352 - { 582000000, 0x31 }, 353 - { 584000000, 0x32 }, 354 - { 588000000, 0x33 }, 355 - { 591000000, 0x34 }, 356 - { 596000000, 0x35 }, 357 - { 598000000, 0x36 }, 358 - { 603000000, 0x37 }, 359 - { 604000000, 0x38 }, 360 - { 606000000, 0x39 }, 361 - { 612000000, 0x3A }, 362 - { 615000000, 0x3B }, 363 - { 617000000, 0x3C }, 364 - { 621000000, 0x3D }, 365 - { 622000000, 0x3E }, 366 - { 625000000, 0x3F }, 367 - { 632000000, 0x40 }, 368 - { 633000000, 0x41 }, 369 - { 634000000, 0x42 }, 370 - { 642000000, 0x43 }, 371 - { 643000000, 0x44 }, 372 - { 647000000, 0x45 }, 373 - { 650000000, 0x46 }, 374 - { 652000000, 0x47 }, 375 - { 657000000, 0x48 }, 376 - { 661000000, 0x49 }, 377 - { 662000000, 0x4A }, 378 - { 665000000, 0x4B }, 379 - { 667000000, 0x4C }, 380 - { 670000000, 0x4D }, 381 - { 673000000, 0x4E }, 382 - { 676000000, 0x4F }, 383 - { 677000000, 0x50 }, 384 - { 681000000, 0x51 }, 385 - { 683000000, 0x52 }, 386 - { 686000000, 0x53 }, 387 - { 688000000, 0x54 }, 388 - { 689000000, 0x55 }, 389 - { 691000000, 0x56 }, 390 - { 695000000, 0x57 }, 391 - { 698000000, 0x58 }, 392 - { 703000000, 0x59 }, 393 - { 704000000, 0x5A }, 394 - { 705000000, 0x5B }, 395 - { 707000000, 0x5C }, 396 - { 710000000, 0x5D }, 397 - { 712000000, 0x5E }, 398 - { 717000000, 0x5F }, 399 - { 718000000, 0x60 }, 400 - { 721000000, 0x61 }, 401 - { 722000000, 0x62 }, 402 - { 723000000, 0x63 }, 403 - { 725000000, 0x64 }, 404 - { 727000000, 0x65 }, 405 - { 730000000, 0x66 }, 406 - { 732000000, 0x67 }, 407 - { 735000000, 0x68 }, 408 - { 740000000, 0x69 }, 409 - { 741000000, 0x6A }, 410 - { 742000000, 0x6B }, 411 - { 743000000, 0x6C }, 412 - { 745000000, 0x6D }, 413 - { 747000000, 0x6E }, 414 - { 748000000, 0x6F }, 415 - { 750000000, 0x70 }, 416 - { 752000000, 0x71 }, 417 - { 754000000, 0x72 }, 418 - { 757000000, 0x73 }, 419 - { 758000000, 0x74 }, 420 - { 760000000, 0x75 }, 421 - { 763000000, 0x76 }, 422 - { 764000000, 0x77 }, 423 - { 766000000, 0x78 }, 424 - { 767000000, 0x79 }, 425 - { 768000000, 0x7A }, 426 - { 773000000, 0x7B }, 427 - { 774000000, 0x7C }, 428 - { 776000000, 0x7D }, 429 - { 777000000, 0x7E }, 430 - { 778000000, 0x7F }, 431 - { 779000000, 0x80 }, 432 - { 781000000, 0x81 }, 433 - { 783000000, 0x82 }, 434 - { 784000000, 0x83 }, 435 - { 785000000, 0x84 }, 436 - { 786000000, 0x85 }, 437 - { 793000000, 0x86 }, 438 - { 794000000, 0x87 }, 439 - { 795000000, 0x88 }, 440 - { 797000000, 0x89 }, 441 - { 799000000, 0x8A }, 442 - { 801000000, 0x8B }, 443 - { 802000000, 0x8C }, 444 - { 803000000, 0x8D }, 445 - { 804000000, 0x8E }, 446 - { 810000000, 0x90 }, 447 - { 811000000, 0x91 }, 448 - { 812000000, 0x92 }, 449 - { 814000000, 0x93 }, 450 - { 816000000, 0x94 }, 451 - { 817000000, 0x96 }, 452 - { 818000000, 0x97 }, 453 - { 820000000, 0x98 }, 454 - { 821000000, 0x99 }, 455 - { 822000000, 0x9A }, 456 - { 828000000, 0x9B }, 457 - { 829000000, 0x9D }, 458 - { 830000000, 0x9F }, 459 - { 831000000, 0xA0 }, 460 - { 833000000, 0xA1 }, 461 - { 835000000, 0xA2 }, 462 - { 836000000, 0xA3 }, 463 - { 837000000, 0xA4 }, 464 - { 838000000, 0xA6 }, 465 - { 840000000, 0xA8 }, 466 - { 842000000, 0xA9 }, 467 - { 845000000, 0xAA }, 468 - { 846000000, 0xAB }, 469 - { 847000000, 0xAD }, 470 - { 848000000, 0xAE }, 471 - { 852000000, 0xAF }, 472 - { 853000000, 0xB0 }, 473 - { 858000000, 0xB1 }, 474 - { 860000000, 0xB2 }, 475 - { 861000000, 0xB3 }, 476 - { 862000000, 0xB4 }, 477 - { 863000000, 0xB6 }, 478 - { 864000000, 0xB8 }, 479 - { 865000000, 0xB9 }, 480 - { 0, 0x00 }, // Table End 42 + { 41000000, 0x0F }, 43 + { 43000000, 0x1C }, 44 + { 45000000, 0x2F }, 45 + { 46000000, 0x39 }, 46 + { 47000000, 0x40 }, 47 + { 47900000, 0x50 }, 48 + { 49100000, 0x16 }, 49 + { 50000000, 0x18 }, 50 + { 51000000, 0x20 }, 51 + { 53000000, 0x28 }, 52 + { 55000000, 0x2B }, 53 + { 56000000, 0x32 }, 54 + { 57000000, 0x35 }, 55 + { 58000000, 0x3E }, 56 + { 59000000, 0x43 }, 57 + { 60000000, 0x4E }, 58 + { 61100000, 0x55 }, 59 + { 63000000, 0x0F }, 60 + { 64000000, 0x11 }, 61 + { 65000000, 0x12 }, 62 + { 66000000, 0x15 }, 63 + { 67000000, 0x16 }, 64 + { 68000000, 0x17 }, 65 + { 70000000, 0x19 }, 66 + { 71000000, 0x1C }, 67 + { 72000000, 0x1D }, 68 + { 73000000, 0x1F }, 69 + { 74000000, 0x20 }, 70 + { 75000000, 0x21 }, 71 + { 76000000, 0x24 }, 72 + { 77000000, 0x25 }, 73 + { 78000000, 0x27 }, 74 + { 80000000, 0x28 }, 75 + { 81000000, 0x29 }, 76 + { 82000000, 0x2D }, 77 + { 83000000, 0x2E }, 78 + { 84000000, 0x2F }, 79 + { 85000000, 0x31 }, 80 + { 86000000, 0x33 }, 81 + { 87000000, 0x34 }, 82 + { 88000000, 0x35 }, 83 + { 89000000, 0x37 }, 84 + { 90000000, 0x38 }, 85 + { 91000000, 0x39 }, 86 + { 93000000, 0x3C }, 87 + { 94000000, 0x3E }, 88 + { 95000000, 0x3F }, 89 + { 96000000, 0x40 }, 90 + { 97000000, 0x42 }, 91 + { 99000000, 0x45 }, 92 + { 100000000, 0x46 }, 93 + { 102000000, 0x48 }, 94 + { 103000000, 0x4A }, 95 + { 105000000, 0x4D }, 96 + { 106000000, 0x4E }, 97 + { 107000000, 0x50 }, 98 + { 108000000, 0x51 }, 99 + { 110000000, 0x54 }, 100 + { 111000000, 0x56 }, 101 + { 112000000, 0x57 }, 102 + { 113000000, 0x58 }, 103 + { 114000000, 0x59 }, 104 + { 115000000, 0x5C }, 105 + { 116000000, 0x5D }, 106 + { 117000000, 0x5F }, 107 + { 119000000, 0x60 }, 108 + { 120000000, 0x64 }, 109 + { 121000000, 0x65 }, 110 + { 122000000, 0x66 }, 111 + { 123000000, 0x68 }, 112 + { 124000000, 0x69 }, 113 + { 125000000, 0x6C }, 114 + { 126000000, 0x6D }, 115 + { 127000000, 0x6E }, 116 + { 128000000, 0x70 }, 117 + { 129000000, 0x71 }, 118 + { 130000000, 0x75 }, 119 + { 131000000, 0x77 }, 120 + { 132000000, 0x78 }, 121 + { 133000000, 0x7B }, 122 + { 134000000, 0x7E }, 123 + { 135000000, 0x81 }, 124 + { 136000000, 0x82 }, 125 + { 137000000, 0x87 }, 126 + { 138000000, 0x88 }, 127 + { 139000000, 0x8D }, 128 + { 140000000, 0x8E }, 129 + { 141000000, 0x91 }, 130 + { 142000000, 0x95 }, 131 + { 143000000, 0x9A }, 132 + { 144000000, 0x9D }, 133 + { 145000000, 0xA1 }, 134 + { 146000000, 0xA2 }, 135 + { 147000000, 0xA4 }, 136 + { 148000000, 0xA9 }, 137 + { 149000000, 0xAE }, 138 + { 150000000, 0xB0 }, 139 + { 151000000, 0xB1 }, 140 + { 152000000, 0xB7 }, 141 + { 152600000, 0xBD }, 142 + { 154000000, 0x20 }, 143 + { 155000000, 0x22 }, 144 + { 156000000, 0x24 }, 145 + { 157000000, 0x25 }, 146 + { 158000000, 0x27 }, 147 + { 159000000, 0x29 }, 148 + { 160000000, 0x2C }, 149 + { 161000000, 0x2D }, 150 + { 163000000, 0x2E }, 151 + { 164000000, 0x2F }, 152 + { 164700000, 0x30 }, 153 + { 166000000, 0x11 }, 154 + { 167000000, 0x12 }, 155 + { 168000000, 0x13 }, 156 + { 169000000, 0x14 }, 157 + { 170000000, 0x15 }, 158 + { 172000000, 0x16 }, 159 + { 173000000, 0x17 }, 160 + { 174000000, 0x18 }, 161 + { 175000000, 0x1A }, 162 + { 176000000, 0x1B }, 163 + { 178000000, 0x1D }, 164 + { 179000000, 0x1E }, 165 + { 180000000, 0x1F }, 166 + { 181000000, 0x20 }, 167 + { 182000000, 0x21 }, 168 + { 183000000, 0x22 }, 169 + { 184000000, 0x24 }, 170 + { 185000000, 0x25 }, 171 + { 186000000, 0x26 }, 172 + { 187000000, 0x27 }, 173 + { 188000000, 0x29 }, 174 + { 189000000, 0x2A }, 175 + { 190000000, 0x2C }, 176 + { 191000000, 0x2D }, 177 + { 192000000, 0x2E }, 178 + { 193000000, 0x2F }, 179 + { 194000000, 0x30 }, 180 + { 195000000, 0x33 }, 181 + { 196000000, 0x35 }, 182 + { 198000000, 0x36 }, 183 + { 200000000, 0x38 }, 184 + { 201000000, 0x3C }, 185 + { 202000000, 0x3D }, 186 + { 203500000, 0x3E }, 187 + { 206000000, 0x0E }, 188 + { 208000000, 0x0F }, 189 + { 212000000, 0x10 }, 190 + { 216000000, 0x11 }, 191 + { 217000000, 0x12 }, 192 + { 218000000, 0x13 }, 193 + { 220000000, 0x14 }, 194 + { 222000000, 0x15 }, 195 + { 225000000, 0x16 }, 196 + { 228000000, 0x17 }, 197 + { 231000000, 0x18 }, 198 + { 234000000, 0x19 }, 199 + { 235000000, 0x1A }, 200 + { 236000000, 0x1B }, 201 + { 237000000, 0x1C }, 202 + { 240000000, 0x1D }, 203 + { 242000000, 0x1E }, 204 + { 244000000, 0x1F }, 205 + { 247000000, 0x20 }, 206 + { 249000000, 0x21 }, 207 + { 252000000, 0x22 }, 208 + { 253000000, 0x23 }, 209 + { 254000000, 0x24 }, 210 + { 256000000, 0x25 }, 211 + { 259000000, 0x26 }, 212 + { 262000000, 0x27 }, 213 + { 264000000, 0x28 }, 214 + { 267000000, 0x29 }, 215 + { 269000000, 0x2A }, 216 + { 271000000, 0x2B }, 217 + { 273000000, 0x2C }, 218 + { 275000000, 0x2D }, 219 + { 277000000, 0x2E }, 220 + { 279000000, 0x2F }, 221 + { 282000000, 0x30 }, 222 + { 284000000, 0x31 }, 223 + { 286000000, 0x32 }, 224 + { 287000000, 0x33 }, 225 + { 290000000, 0x34 }, 226 + { 293000000, 0x35 }, 227 + { 295000000, 0x36 }, 228 + { 297000000, 0x37 }, 229 + { 300000000, 0x38 }, 230 + { 303000000, 0x39 }, 231 + { 305000000, 0x3A }, 232 + { 306000000, 0x3B }, 233 + { 307000000, 0x3C }, 234 + { 310000000, 0x3D }, 235 + { 312000000, 0x3E }, 236 + { 315000000, 0x3F }, 237 + { 318000000, 0x40 }, 238 + { 320000000, 0x41 }, 239 + { 323000000, 0x42 }, 240 + { 324000000, 0x43 }, 241 + { 325000000, 0x44 }, 242 + { 327000000, 0x45 }, 243 + { 331000000, 0x46 }, 244 + { 334000000, 0x47 }, 245 + { 337000000, 0x48 }, 246 + { 339000000, 0x49 }, 247 + { 340000000, 0x4A }, 248 + { 341000000, 0x4B }, 249 + { 343000000, 0x4C }, 250 + { 345000000, 0x4D }, 251 + { 349000000, 0x4E }, 252 + { 352000000, 0x4F }, 253 + { 353000000, 0x50 }, 254 + { 355000000, 0x51 }, 255 + { 357000000, 0x52 }, 256 + { 359000000, 0x53 }, 257 + { 361000000, 0x54 }, 258 + { 362000000, 0x55 }, 259 + { 364000000, 0x56 }, 260 + { 368000000, 0x57 }, 261 + { 370000000, 0x58 }, 262 + { 372000000, 0x59 }, 263 + { 375000000, 0x5A }, 264 + { 376000000, 0x5B }, 265 + { 377000000, 0x5C }, 266 + { 379000000, 0x5D }, 267 + { 382000000, 0x5E }, 268 + { 384000000, 0x5F }, 269 + { 385000000, 0x60 }, 270 + { 386000000, 0x61 }, 271 + { 388000000, 0x62 }, 272 + { 390000000, 0x63 }, 273 + { 393000000, 0x64 }, 274 + { 394000000, 0x65 }, 275 + { 396000000, 0x66 }, 276 + { 397000000, 0x67 }, 277 + { 398000000, 0x68 }, 278 + { 400000000, 0x69 }, 279 + { 402000000, 0x6A }, 280 + { 403000000, 0x6B }, 281 + { 407000000, 0x6C }, 282 + { 408000000, 0x6D }, 283 + { 409000000, 0x6E }, 284 + { 410000000, 0x6F }, 285 + { 411000000, 0x70 }, 286 + { 412000000, 0x71 }, 287 + { 413000000, 0x72 }, 288 + { 414000000, 0x73 }, 289 + { 417000000, 0x74 }, 290 + { 418000000, 0x75 }, 291 + { 420000000, 0x76 }, 292 + { 422000000, 0x77 }, 293 + { 423000000, 0x78 }, 294 + { 424000000, 0x79 }, 295 + { 427000000, 0x7A }, 296 + { 428000000, 0x7B }, 297 + { 429000000, 0x7D }, 298 + { 432000000, 0x7F }, 299 + { 434000000, 0x80 }, 300 + { 435000000, 0x81 }, 301 + { 436000000, 0x83 }, 302 + { 437000000, 0x84 }, 303 + { 438000000, 0x85 }, 304 + { 439000000, 0x86 }, 305 + { 440000000, 0x87 }, 306 + { 441000000, 0x88 }, 307 + { 442000000, 0x89 }, 308 + { 445000000, 0x8A }, 309 + { 446000000, 0x8B }, 310 + { 447000000, 0x8C }, 311 + { 448000000, 0x8E }, 312 + { 449000000, 0x8F }, 313 + { 450000000, 0x90 }, 314 + { 452000000, 0x91 }, 315 + { 453000000, 0x93 }, 316 + { 454000000, 0x94 }, 317 + { 456000000, 0x96 }, 318 + { 457800000, 0x98 }, 319 + { 461000000, 0x11 }, 320 + { 468000000, 0x12 }, 321 + { 472000000, 0x13 }, 322 + { 473000000, 0x14 }, 323 + { 474000000, 0x15 }, 324 + { 481000000, 0x16 }, 325 + { 486000000, 0x17 }, 326 + { 491000000, 0x18 }, 327 + { 498000000, 0x19 }, 328 + { 499000000, 0x1A }, 329 + { 501000000, 0x1B }, 330 + { 506000000, 0x1C }, 331 + { 511000000, 0x1D }, 332 + { 516000000, 0x1E }, 333 + { 520000000, 0x1F }, 334 + { 521000000, 0x20 }, 335 + { 525000000, 0x21 }, 336 + { 529000000, 0x22 }, 337 + { 533000000, 0x23 }, 338 + { 539000000, 0x24 }, 339 + { 541000000, 0x25 }, 340 + { 547000000, 0x26 }, 341 + { 549000000, 0x27 }, 342 + { 551000000, 0x28 }, 343 + { 556000000, 0x29 }, 344 + { 561000000, 0x2A }, 345 + { 563000000, 0x2B }, 346 + { 565000000, 0x2C }, 347 + { 569000000, 0x2D }, 348 + { 571000000, 0x2E }, 349 + { 577000000, 0x2F }, 350 + { 580000000, 0x30 }, 351 + { 582000000, 0x31 }, 352 + { 584000000, 0x32 }, 353 + { 588000000, 0x33 }, 354 + { 591000000, 0x34 }, 355 + { 596000000, 0x35 }, 356 + { 598000000, 0x36 }, 357 + { 603000000, 0x37 }, 358 + { 604000000, 0x38 }, 359 + { 606000000, 0x39 }, 360 + { 612000000, 0x3A }, 361 + { 615000000, 0x3B }, 362 + { 617000000, 0x3C }, 363 + { 621000000, 0x3D }, 364 + { 622000000, 0x3E }, 365 + { 625000000, 0x3F }, 366 + { 632000000, 0x40 }, 367 + { 633000000, 0x41 }, 368 + { 634000000, 0x42 }, 369 + { 642000000, 0x43 }, 370 + { 643000000, 0x44 }, 371 + { 647000000, 0x45 }, 372 + { 650000000, 0x46 }, 373 + { 652000000, 0x47 }, 374 + { 657000000, 0x48 }, 375 + { 661000000, 0x49 }, 376 + { 662000000, 0x4A }, 377 + { 665000000, 0x4B }, 378 + { 667000000, 0x4C }, 379 + { 670000000, 0x4D }, 380 + { 673000000, 0x4E }, 381 + { 676000000, 0x4F }, 382 + { 677000000, 0x50 }, 383 + { 681000000, 0x51 }, 384 + { 683000000, 0x52 }, 385 + { 686000000, 0x53 }, 386 + { 688000000, 0x54 }, 387 + { 689000000, 0x55 }, 388 + { 691000000, 0x56 }, 389 + { 695000000, 0x57 }, 390 + { 698000000, 0x58 }, 391 + { 703000000, 0x59 }, 392 + { 704000000, 0x5A }, 393 + { 705000000, 0x5B }, 394 + { 707000000, 0x5C }, 395 + { 710000000, 0x5D }, 396 + { 712000000, 0x5E }, 397 + { 717000000, 0x5F }, 398 + { 718000000, 0x60 }, 399 + { 721000000, 0x61 }, 400 + { 722000000, 0x62 }, 401 + { 723000000, 0x63 }, 402 + { 725000000, 0x64 }, 403 + { 727000000, 0x65 }, 404 + { 730000000, 0x66 }, 405 + { 732000000, 0x67 }, 406 + { 735000000, 0x68 }, 407 + { 740000000, 0x69 }, 408 + { 741000000, 0x6A }, 409 + { 742000000, 0x6B }, 410 + { 743000000, 0x6C }, 411 + { 745000000, 0x6D }, 412 + { 747000000, 0x6E }, 413 + { 748000000, 0x6F }, 414 + { 750000000, 0x70 }, 415 + { 752000000, 0x71 }, 416 + { 754000000, 0x72 }, 417 + { 757000000, 0x73 }, 418 + { 758000000, 0x74 }, 419 + { 760000000, 0x75 }, 420 + { 763000000, 0x76 }, 421 + { 764000000, 0x77 }, 422 + { 766000000, 0x78 }, 423 + { 767000000, 0x79 }, 424 + { 768000000, 0x7A }, 425 + { 773000000, 0x7B }, 426 + { 774000000, 0x7C }, 427 + { 776000000, 0x7D }, 428 + { 777000000, 0x7E }, 429 + { 778000000, 0x7F }, 430 + { 779000000, 0x80 }, 431 + { 781000000, 0x81 }, 432 + { 783000000, 0x82 }, 433 + { 784000000, 0x83 }, 434 + { 785000000, 0x84 }, 435 + { 786000000, 0x85 }, 436 + { 793000000, 0x86 }, 437 + { 794000000, 0x87 }, 438 + { 795000000, 0x88 }, 439 + { 797000000, 0x89 }, 440 + { 799000000, 0x8A }, 441 + { 801000000, 0x8B }, 442 + { 802000000, 0x8C }, 443 + { 803000000, 0x8D }, 444 + { 804000000, 0x8E }, 445 + { 810000000, 0x90 }, 446 + { 811000000, 0x91 }, 447 + { 812000000, 0x92 }, 448 + { 814000000, 0x93 }, 449 + { 816000000, 0x94 }, 450 + { 817000000, 0x96 }, 451 + { 818000000, 0x97 }, 452 + { 820000000, 0x98 }, 453 + { 821000000, 0x99 }, 454 + { 822000000, 0x9A }, 455 + { 828000000, 0x9B }, 456 + { 829000000, 0x9D }, 457 + { 830000000, 0x9F }, 458 + { 831000000, 0xA0 }, 459 + { 833000000, 0xA1 }, 460 + { 835000000, 0xA2 }, 461 + { 836000000, 0xA3 }, 462 + { 837000000, 0xA4 }, 463 + { 838000000, 0xA6 }, 464 + { 840000000, 0xA8 }, 465 + { 842000000, 0xA9 }, 466 + { 845000000, 0xAA }, 467 + { 846000000, 0xAB }, 468 + { 847000000, 0xAD }, 469 + { 848000000, 0xAE }, 470 + { 852000000, 0xAF }, 471 + { 853000000, 0xB0 }, 472 + { 858000000, 0xB1 }, 473 + { 860000000, 0xB2 }, 474 + { 861000000, 0xB3 }, 475 + { 862000000, 0xB4 }, 476 + { 863000000, 0xB6 }, 477 + { 864000000, 0xB8 }, 478 + { 865000000, 0xB9 }, 479 + { 0, 0x00 }, /* Table End */ 481 480 }; 482 481 483 482 484 483 static struct SMap2 m_KM_Map[] = { 485 - { 47900000, 3, 2 }, 486 - { 61100000, 3, 1 }, 487 - { 350000000, 3, 0 }, 488 - { 720000000, 2, 1 }, 489 - { 865000000, 3, 3 }, 490 - { 0, 0x00 }, // Table End 484 + { 47900000, 3, 2 }, 485 + { 61100000, 3, 1 }, 486 + { 350000000, 3, 0 }, 487 + { 720000000, 2, 1 }, 488 + { 865000000, 3, 3 }, 489 + { 0, 0x00 }, /* Table End */ 491 490 }; 492 491 493 492 static struct SMap2 m_Main_PLL_Map[] = { 494 - { 33125000, 0x57, 0xF0 }, 495 - { 35500000, 0x56, 0xE0 }, 496 - { 38188000, 0x55, 0xD0 }, 497 - { 41375000, 0x54, 0xC0 }, 498 - { 45125000, 0x53, 0xB0 }, 499 - { 49688000, 0x52, 0xA0 }, 500 - { 55188000, 0x51, 0x90 }, 501 - { 62125000, 0x50, 0x80 }, 502 - { 66250000, 0x47, 0x78 }, 503 - { 71000000, 0x46, 0x70 }, 504 - { 76375000, 0x45, 0x68 }, 505 - { 82750000, 0x44, 0x60 }, 506 - { 90250000, 0x43, 0x58 }, 507 - { 99375000, 0x42, 0x50 }, 508 - { 110375000, 0x41, 0x48 }, 509 - { 124250000, 0x40, 0x40 }, 510 - { 132500000, 0x37, 0x3C }, 511 - { 142000000, 0x36, 0x38 }, 512 - { 152750000, 0x35, 0x34 }, 513 - { 165500000, 0x34, 0x30 }, 514 - { 180500000, 0x33, 0x2C }, 515 - { 198750000, 0x32, 0x28 }, 516 - { 220750000, 0x31, 0x24 }, 517 - { 248500000, 0x30, 0x20 }, 518 - { 265000000, 0x27, 0x1E }, 519 - { 284000000, 0x26, 0x1C }, 520 - { 305500000, 0x25, 0x1A }, 521 - { 331000000, 0x24, 0x18 }, 522 - { 361000000, 0x23, 0x16 }, 523 - { 397500000, 0x22, 0x14 }, 524 - { 441500000, 0x21, 0x12 }, 525 - { 497000000, 0x20, 0x10 }, 526 - { 530000000, 0x17, 0x0F }, 527 - { 568000000, 0x16, 0x0E }, 528 - { 611000000, 0x15, 0x0D }, 529 - { 662000000, 0x14, 0x0C }, 530 - { 722000000, 0x13, 0x0B }, 531 - { 795000000, 0x12, 0x0A }, 532 - { 883000000, 0x11, 0x09 }, 533 - { 994000000, 0x10, 0x08 }, 534 - { 0, 0x00, 0x00 }, // Table End 493 + { 33125000, 0x57, 0xF0 }, 494 + { 35500000, 0x56, 0xE0 }, 495 + { 38188000, 0x55, 0xD0 }, 496 + { 41375000, 0x54, 0xC0 }, 497 + { 45125000, 0x53, 0xB0 }, 498 + { 49688000, 0x52, 0xA0 }, 499 + { 55188000, 0x51, 0x90 }, 500 + { 62125000, 0x50, 0x80 }, 501 + { 66250000, 0x47, 0x78 }, 502 + { 71000000, 0x46, 0x70 }, 503 + { 76375000, 0x45, 0x68 }, 504 + { 82750000, 0x44, 0x60 }, 505 + { 90250000, 0x43, 0x58 }, 506 + { 99375000, 0x42, 0x50 }, 507 + { 110375000, 0x41, 0x48 }, 508 + { 124250000, 0x40, 0x40 }, 509 + { 132500000, 0x37, 0x3C }, 510 + { 142000000, 0x36, 0x38 }, 511 + { 152750000, 0x35, 0x34 }, 512 + { 165500000, 0x34, 0x30 }, 513 + { 180500000, 0x33, 0x2C }, 514 + { 198750000, 0x32, 0x28 }, 515 + { 220750000, 0x31, 0x24 }, 516 + { 248500000, 0x30, 0x20 }, 517 + { 265000000, 0x27, 0x1E }, 518 + { 284000000, 0x26, 0x1C }, 519 + { 305500000, 0x25, 0x1A }, 520 + { 331000000, 0x24, 0x18 }, 521 + { 361000000, 0x23, 0x16 }, 522 + { 397500000, 0x22, 0x14 }, 523 + { 441500000, 0x21, 0x12 }, 524 + { 497000000, 0x20, 0x10 }, 525 + { 530000000, 0x17, 0x0F }, 526 + { 568000000, 0x16, 0x0E }, 527 + { 611000000, 0x15, 0x0D }, 528 + { 662000000, 0x14, 0x0C }, 529 + { 722000000, 0x13, 0x0B }, 530 + { 795000000, 0x12, 0x0A }, 531 + { 883000000, 0x11, 0x09 }, 532 + { 994000000, 0x10, 0x08 }, 533 + { 0, 0x00, 0x00 }, /* Table End */ 535 534 }; 536 535 537 536 static struct SMap2 m_Cal_PLL_Map[] = { 538 - { 33813000, 0xDD, 0xD0 }, 539 - { 36625000, 0xDC, 0xC0 }, 540 - { 39938000, 0xDB, 0xB0 }, 541 - { 43938000, 0xDA, 0xA0 }, 542 - { 48813000, 0xD9, 0x90 }, 543 - { 54938000, 0xD8, 0x80 }, 544 - { 62813000, 0xD3, 0x70 }, 545 - { 67625000, 0xCD, 0x68 }, 546 - { 73250000, 0xCC, 0x60 }, 547 - { 79875000, 0xCB, 0x58 }, 548 - { 87875000, 0xCA, 0x50 }, 549 - { 97625000, 0xC9, 0x48 }, 550 - { 109875000, 0xC8, 0x40 }, 551 - { 125625000, 0xC3, 0x38 }, 552 - { 135250000, 0xBD, 0x34 }, 553 - { 146500000, 0xBC, 0x30 }, 554 - { 159750000, 0xBB, 0x2C }, 555 - { 175750000, 0xBA, 0x28 }, 556 - { 195250000, 0xB9, 0x24 }, 557 - { 219750000, 0xB8, 0x20 }, 558 - { 251250000, 0xB3, 0x1C }, 559 - { 270500000, 0xAD, 0x1A }, 560 - { 293000000, 0xAC, 0x18 }, 561 - { 319500000, 0xAB, 0x16 }, 562 - { 351500000, 0xAA, 0x14 }, 563 - { 390500000, 0xA9, 0x12 }, 564 - { 439500000, 0xA8, 0x10 }, 565 - { 502500000, 0xA3, 0x0E }, 566 - { 541000000, 0x9D, 0x0D }, 567 - { 586000000, 0x9C, 0x0C }, 568 - { 639000000, 0x9B, 0x0B }, 569 - { 703000000, 0x9A, 0x0A }, 570 - { 781000000, 0x99, 0x09 }, 571 - { 879000000, 0x98, 0x08 }, 572 - { 0, 0x00, 0x00 }, // Table End 537 + { 33813000, 0xDD, 0xD0 }, 538 + { 36625000, 0xDC, 0xC0 }, 539 + { 39938000, 0xDB, 0xB0 }, 540 + { 43938000, 0xDA, 0xA0 }, 541 + { 48813000, 0xD9, 0x90 }, 542 + { 54938000, 0xD8, 0x80 }, 543 + { 62813000, 0xD3, 0x70 }, 544 + { 67625000, 0xCD, 0x68 }, 545 + { 73250000, 0xCC, 0x60 }, 546 + { 79875000, 0xCB, 0x58 }, 547 + { 87875000, 0xCA, 0x50 }, 548 + { 97625000, 0xC9, 0x48 }, 549 + { 109875000, 0xC8, 0x40 }, 550 + { 125625000, 0xC3, 0x38 }, 551 + { 135250000, 0xBD, 0x34 }, 552 + { 146500000, 0xBC, 0x30 }, 553 + { 159750000, 0xBB, 0x2C }, 554 + { 175750000, 0xBA, 0x28 }, 555 + { 195250000, 0xB9, 0x24 }, 556 + { 219750000, 0xB8, 0x20 }, 557 + { 251250000, 0xB3, 0x1C }, 558 + { 270500000, 0xAD, 0x1A }, 559 + { 293000000, 0xAC, 0x18 }, 560 + { 319500000, 0xAB, 0x16 }, 561 + { 351500000, 0xAA, 0x14 }, 562 + { 390500000, 0xA9, 0x12 }, 563 + { 439500000, 0xA8, 0x10 }, 564 + { 502500000, 0xA3, 0x0E }, 565 + { 541000000, 0x9D, 0x0D }, 566 + { 586000000, 0x9C, 0x0C }, 567 + { 639000000, 0x9B, 0x0B }, 568 + { 703000000, 0x9A, 0x0A }, 569 + { 781000000, 0x99, 0x09 }, 570 + { 879000000, 0x98, 0x08 }, 571 + { 0, 0x00, 0x00 }, /* Table End */ 573 572 }; 574 573 575 574 static struct SMap m_GainTaper_Map[] = { 576 - { 45400000, 0x1F }, 577 - { 45800000, 0x1E }, 578 - { 46200000, 0x1D }, 579 - { 46700000, 0x1C }, 580 - { 47100000, 0x1B }, 581 - { 47500000, 0x1A }, 582 - { 47900000, 0x19 }, 583 - { 49600000, 0x17 }, 584 - { 51200000, 0x16 }, 585 - { 52900000, 0x15 }, 586 - { 54500000, 0x14 }, 587 - { 56200000, 0x13 }, 588 - { 57800000, 0x12 }, 589 - { 59500000, 0x11 }, 590 - { 61100000, 0x10 }, 591 - { 67600000, 0x0D }, 592 - { 74200000, 0x0C }, 593 - { 80700000, 0x0B }, 594 - { 87200000, 0x0A }, 595 - { 93800000, 0x09 }, 596 - { 100300000, 0x08 }, 597 - { 106900000, 0x07 }, 598 - { 113400000, 0x06 }, 599 - { 119900000, 0x05 }, 600 - { 126500000, 0x04 }, 601 - { 133000000, 0x03 }, 602 - { 139500000, 0x02 }, 603 - { 146100000, 0x01 }, 604 - { 152600000, 0x00 }, 605 - { 154300000, 0x1F }, 606 - { 156100000, 0x1E }, 607 - { 157800000, 0x1D }, 608 - { 159500000, 0x1C }, 609 - { 161200000, 0x1B }, 610 - { 163000000, 0x1A }, 611 - { 164700000, 0x19 }, 612 - { 170200000, 0x17 }, 613 - { 175800000, 0x16 }, 614 - { 181300000, 0x15 }, 615 - { 186900000, 0x14 }, 616 - { 192400000, 0x13 }, 617 - { 198000000, 0x12 }, 618 - { 203500000, 0x11 }, 619 - { 216200000, 0x14 }, 620 - { 228900000, 0x13 }, 621 - { 241600000, 0x12 }, 622 - { 254400000, 0x11 }, 623 - { 267100000, 0x10 }, 624 - { 279800000, 0x0F }, 625 - { 292500000, 0x0E }, 626 - { 305200000, 0x0D }, 627 - { 317900000, 0x0C }, 628 - { 330700000, 0x0B }, 629 - { 343400000, 0x0A }, 630 - { 356100000, 0x09 }, 631 - { 368800000, 0x08 }, 632 - { 381500000, 0x07 }, 633 - { 394200000, 0x06 }, 634 - { 406900000, 0x05 }, 635 - { 419700000, 0x04 }, 636 - { 432400000, 0x03 }, 637 - { 445100000, 0x02 }, 638 - { 457800000, 0x01 }, 639 - { 476300000, 0x19 }, 640 - { 494800000, 0x18 }, 641 - { 513300000, 0x17 }, 642 - { 531800000, 0x16 }, 643 - { 550300000, 0x15 }, 644 - { 568900000, 0x14 }, 645 - { 587400000, 0x13 }, 646 - { 605900000, 0x12 }, 647 - { 624400000, 0x11 }, 648 - { 642900000, 0x10 }, 649 - { 661400000, 0x0F }, 650 - { 679900000, 0x0E }, 651 - { 698400000, 0x0D }, 652 - { 716900000, 0x0C }, 653 - { 735400000, 0x0B }, 654 - { 753900000, 0x0A }, 655 - { 772500000, 0x09 }, 656 - { 791000000, 0x08 }, 657 - { 809500000, 0x07 }, 658 - { 828000000, 0x06 }, 659 - { 846500000, 0x05 }, 660 - { 865000000, 0x04 }, 661 - { 0, 0x00 }, // Table End 575 + { 45400000, 0x1F }, 576 + { 45800000, 0x1E }, 577 + { 46200000, 0x1D }, 578 + { 46700000, 0x1C }, 579 + { 47100000, 0x1B }, 580 + { 47500000, 0x1A }, 581 + { 47900000, 0x19 }, 582 + { 49600000, 0x17 }, 583 + { 51200000, 0x16 }, 584 + { 52900000, 0x15 }, 585 + { 54500000, 0x14 }, 586 + { 56200000, 0x13 }, 587 + { 57800000, 0x12 }, 588 + { 59500000, 0x11 }, 589 + { 61100000, 0x10 }, 590 + { 67600000, 0x0D }, 591 + { 74200000, 0x0C }, 592 + { 80700000, 0x0B }, 593 + { 87200000, 0x0A }, 594 + { 93800000, 0x09 }, 595 + { 100300000, 0x08 }, 596 + { 106900000, 0x07 }, 597 + { 113400000, 0x06 }, 598 + { 119900000, 0x05 }, 599 + { 126500000, 0x04 }, 600 + { 133000000, 0x03 }, 601 + { 139500000, 0x02 }, 602 + { 146100000, 0x01 }, 603 + { 152600000, 0x00 }, 604 + { 154300000, 0x1F }, 605 + { 156100000, 0x1E }, 606 + { 157800000, 0x1D }, 607 + { 159500000, 0x1C }, 608 + { 161200000, 0x1B }, 609 + { 163000000, 0x1A }, 610 + { 164700000, 0x19 }, 611 + { 170200000, 0x17 }, 612 + { 175800000, 0x16 }, 613 + { 181300000, 0x15 }, 614 + { 186900000, 0x14 }, 615 + { 192400000, 0x13 }, 616 + { 198000000, 0x12 }, 617 + { 203500000, 0x11 }, 618 + { 216200000, 0x14 }, 619 + { 228900000, 0x13 }, 620 + { 241600000, 0x12 }, 621 + { 254400000, 0x11 }, 622 + { 267100000, 0x10 }, 623 + { 279800000, 0x0F }, 624 + { 292500000, 0x0E }, 625 + { 305200000, 0x0D }, 626 + { 317900000, 0x0C }, 627 + { 330700000, 0x0B }, 628 + { 343400000, 0x0A }, 629 + { 356100000, 0x09 }, 630 + { 368800000, 0x08 }, 631 + { 381500000, 0x07 }, 632 + { 394200000, 0x06 }, 633 + { 406900000, 0x05 }, 634 + { 419700000, 0x04 }, 635 + { 432400000, 0x03 }, 636 + { 445100000, 0x02 }, 637 + { 457800000, 0x01 }, 638 + { 476300000, 0x19 }, 639 + { 494800000, 0x18 }, 640 + { 513300000, 0x17 }, 641 + { 531800000, 0x16 }, 642 + { 550300000, 0x15 }, 643 + { 568900000, 0x14 }, 644 + { 587400000, 0x13 }, 645 + { 605900000, 0x12 }, 646 + { 624400000, 0x11 }, 647 + { 642900000, 0x10 }, 648 + { 661400000, 0x0F }, 649 + { 679900000, 0x0E }, 650 + { 698400000, 0x0D }, 651 + { 716900000, 0x0C }, 652 + { 735400000, 0x0B }, 653 + { 753900000, 0x0A }, 654 + { 772500000, 0x09 }, 655 + { 791000000, 0x08 }, 656 + { 809500000, 0x07 }, 657 + { 828000000, 0x06 }, 658 + { 846500000, 0x05 }, 659 + { 865000000, 0x04 }, 660 + { 0, 0x00 }, /* Table End */ 662 661 }; 663 662 664 663 static struct SMap m_RF_Cal_DC_Over_DT_Map[] = { 665 - { 47900000, 0x00 }, 666 - { 55000000, 0x00 }, 667 - { 61100000, 0x0A }, 668 - { 64000000, 0x0A }, 669 - { 82000000, 0x14 }, 670 - { 84000000, 0x19 }, 671 - { 119000000, 0x1C }, 672 - { 124000000, 0x20 }, 673 - { 129000000, 0x2A }, 674 - { 134000000, 0x32 }, 675 - { 139000000, 0x39 }, 676 - { 144000000, 0x3E }, 677 - { 149000000, 0x3F }, 678 - { 152600000, 0x40 }, 679 - { 154000000, 0x40 }, 680 - { 164700000, 0x41 }, 681 - { 203500000, 0x32 }, 682 - { 353000000, 0x19 }, 683 - { 356000000, 0x1A }, 684 - { 359000000, 0x1B }, 685 - { 363000000, 0x1C }, 686 - { 366000000, 0x1D }, 687 - { 369000000, 0x1E }, 688 - { 373000000, 0x1F }, 689 - { 376000000, 0x20 }, 690 - { 379000000, 0x21 }, 691 - { 383000000, 0x22 }, 692 - { 386000000, 0x23 }, 693 - { 389000000, 0x24 }, 694 - { 393000000, 0x25 }, 695 - { 396000000, 0x26 }, 696 - { 399000000, 0x27 }, 697 - { 402000000, 0x28 }, 698 - { 404000000, 0x29 }, 699 - { 407000000, 0x2A }, 700 - { 409000000, 0x2B }, 701 - { 412000000, 0x2C }, 702 - { 414000000, 0x2D }, 703 - { 417000000, 0x2E }, 704 - { 419000000, 0x2F }, 705 - { 422000000, 0x30 }, 706 - { 424000000, 0x31 }, 707 - { 427000000, 0x32 }, 708 - { 429000000, 0x33 }, 709 - { 432000000, 0x34 }, 710 - { 434000000, 0x35 }, 711 - { 437000000, 0x36 }, 712 - { 439000000, 0x37 }, 713 - { 442000000, 0x38 }, 714 - { 444000000, 0x39 }, 715 - { 447000000, 0x3A }, 716 - { 449000000, 0x3B }, 717 - { 457800000, 0x3C }, 718 - { 465000000, 0x0F }, 719 - { 477000000, 0x12 }, 720 - { 483000000, 0x14 }, 721 - { 502000000, 0x19 }, 722 - { 508000000, 0x1B }, 723 - { 519000000, 0x1C }, 724 - { 522000000, 0x1D }, 725 - { 524000000, 0x1E }, 726 - { 534000000, 0x1F }, 727 - { 549000000, 0x20 }, 728 - { 554000000, 0x22 }, 729 - { 584000000, 0x24 }, 730 - { 589000000, 0x26 }, 731 - { 658000000, 0x27 }, 732 - { 664000000, 0x2C }, 733 - { 669000000, 0x2D }, 734 - { 699000000, 0x2E }, 735 - { 704000000, 0x30 }, 736 - { 709000000, 0x31 }, 737 - { 714000000, 0x32 }, 738 - { 724000000, 0x33 }, 739 - { 729000000, 0x36 }, 740 - { 739000000, 0x38 }, 741 - { 744000000, 0x39 }, 742 - { 749000000, 0x3B }, 743 - { 754000000, 0x3C }, 744 - { 759000000, 0x3D }, 745 - { 764000000, 0x3E }, 746 - { 769000000, 0x3F }, 747 - { 774000000, 0x40 }, 748 - { 779000000, 0x41 }, 749 - { 784000000, 0x43 }, 750 - { 789000000, 0x46 }, 751 - { 794000000, 0x48 }, 752 - { 799000000, 0x4B }, 753 - { 804000000, 0x4F }, 754 - { 809000000, 0x54 }, 755 - { 814000000, 0x59 }, 756 - { 819000000, 0x5D }, 757 - { 824000000, 0x61 }, 758 - { 829000000, 0x68 }, 759 - { 834000000, 0x6E }, 760 - { 839000000, 0x75 }, 761 - { 844000000, 0x7E }, 762 - { 849000000, 0x82 }, 763 - { 854000000, 0x84 }, 764 - { 859000000, 0x8F }, 765 - { 865000000, 0x9A }, 766 - { 0, 0x00 }, // Table End 664 + { 47900000, 0x00 }, 665 + { 55000000, 0x00 }, 666 + { 61100000, 0x0A }, 667 + { 64000000, 0x0A }, 668 + { 82000000, 0x14 }, 669 + { 84000000, 0x19 }, 670 + { 119000000, 0x1C }, 671 + { 124000000, 0x20 }, 672 + { 129000000, 0x2A }, 673 + { 134000000, 0x32 }, 674 + { 139000000, 0x39 }, 675 + { 144000000, 0x3E }, 676 + { 149000000, 0x3F }, 677 + { 152600000, 0x40 }, 678 + { 154000000, 0x40 }, 679 + { 164700000, 0x41 }, 680 + { 203500000, 0x32 }, 681 + { 353000000, 0x19 }, 682 + { 356000000, 0x1A }, 683 + { 359000000, 0x1B }, 684 + { 363000000, 0x1C }, 685 + { 366000000, 0x1D }, 686 + { 369000000, 0x1E }, 687 + { 373000000, 0x1F }, 688 + { 376000000, 0x20 }, 689 + { 379000000, 0x21 }, 690 + { 383000000, 0x22 }, 691 + { 386000000, 0x23 }, 692 + { 389000000, 0x24 }, 693 + { 393000000, 0x25 }, 694 + { 396000000, 0x26 }, 695 + { 399000000, 0x27 }, 696 + { 402000000, 0x28 }, 697 + { 404000000, 0x29 }, 698 + { 407000000, 0x2A }, 699 + { 409000000, 0x2B }, 700 + { 412000000, 0x2C }, 701 + { 414000000, 0x2D }, 702 + { 417000000, 0x2E }, 703 + { 419000000, 0x2F }, 704 + { 422000000, 0x30 }, 705 + { 424000000, 0x31 }, 706 + { 427000000, 0x32 }, 707 + { 429000000, 0x33 }, 708 + { 432000000, 0x34 }, 709 + { 434000000, 0x35 }, 710 + { 437000000, 0x36 }, 711 + { 439000000, 0x37 }, 712 + { 442000000, 0x38 }, 713 + { 444000000, 0x39 }, 714 + { 447000000, 0x3A }, 715 + { 449000000, 0x3B }, 716 + { 457800000, 0x3C }, 717 + { 465000000, 0x0F }, 718 + { 477000000, 0x12 }, 719 + { 483000000, 0x14 }, 720 + { 502000000, 0x19 }, 721 + { 508000000, 0x1B }, 722 + { 519000000, 0x1C }, 723 + { 522000000, 0x1D }, 724 + { 524000000, 0x1E }, 725 + { 534000000, 0x1F }, 726 + { 549000000, 0x20 }, 727 + { 554000000, 0x22 }, 728 + { 584000000, 0x24 }, 729 + { 589000000, 0x26 }, 730 + { 658000000, 0x27 }, 731 + { 664000000, 0x2C }, 732 + { 669000000, 0x2D }, 733 + { 699000000, 0x2E }, 734 + { 704000000, 0x30 }, 735 + { 709000000, 0x31 }, 736 + { 714000000, 0x32 }, 737 + { 724000000, 0x33 }, 738 + { 729000000, 0x36 }, 739 + { 739000000, 0x38 }, 740 + { 744000000, 0x39 }, 741 + { 749000000, 0x3B }, 742 + { 754000000, 0x3C }, 743 + { 759000000, 0x3D }, 744 + { 764000000, 0x3E }, 745 + { 769000000, 0x3F }, 746 + { 774000000, 0x40 }, 747 + { 779000000, 0x41 }, 748 + { 784000000, 0x43 }, 749 + { 789000000, 0x46 }, 750 + { 794000000, 0x48 }, 751 + { 799000000, 0x4B }, 752 + { 804000000, 0x4F }, 753 + { 809000000, 0x54 }, 754 + { 814000000, 0x59 }, 755 + { 819000000, 0x5D }, 756 + { 824000000, 0x61 }, 757 + { 829000000, 0x68 }, 758 + { 834000000, 0x6E }, 759 + { 839000000, 0x75 }, 760 + { 844000000, 0x7E }, 761 + { 849000000, 0x82 }, 762 + { 854000000, 0x84 }, 763 + { 859000000, 0x8F }, 764 + { 865000000, 0x9A }, 765 + { 0, 0x00 }, /* Table End */ 767 766 }; 768 767 769 768 770 769 static struct SMap m_IR_Meas_Map[] = { 771 - { 200000000, 0x05 }, 772 - { 400000000, 0x06 }, 773 - { 865000000, 0x07 }, 774 - { 0, 0x00 }, // Table End 770 + { 200000000, 0x05 }, 771 + { 400000000, 0x06 }, 772 + { 865000000, 0x07 }, 773 + { 0, 0x00 }, /* Table End */ 775 774 }; 776 775 777 776 static struct SMap2 m_CID_Target_Map[] = { 778 - { 46000000, 0x04, 18 }, 779 - { 52200000, 0x0A, 15 }, 780 - { 70100000, 0x01, 40 }, 781 - { 136800000, 0x18, 40 }, 782 - { 156700000, 0x18, 40 }, 783 - { 186250000, 0x0A, 40 }, 784 - { 230000000, 0x0A, 40 }, 785 - { 345000000, 0x18, 40 }, 786 - { 426000000, 0x0E, 40 }, 787 - { 489500000, 0x1E, 40 }, 788 - { 697500000, 0x32, 40 }, 789 - { 842000000, 0x3A, 40 }, 790 - { 0, 0x00, 0 }, // Table End 777 + { 46000000, 0x04, 18 }, 778 + { 52200000, 0x0A, 15 }, 779 + { 70100000, 0x01, 40 }, 780 + { 136800000, 0x18, 40 }, 781 + { 156700000, 0x18, 40 }, 782 + { 186250000, 0x0A, 40 }, 783 + { 230000000, 0x0A, 40 }, 784 + { 345000000, 0x18, 40 }, 785 + { 426000000, 0x0E, 40 }, 786 + { 489500000, 0x1E, 40 }, 787 + { 697500000, 0x32, 40 }, 788 + { 842000000, 0x3A, 40 }, 789 + { 0, 0x00, 0 }, /* Table End */ 791 790 }; 792 791 793 792 static struct SRFBandMap m_RF_Band_Map[7] = { 794 - { 47900000, 46000000, 0, 0}, 795 - { 61100000, 52200000, 0, 0}, 796 - { 152600000, 70100000, 136800000, 0}, 797 - { 164700000, 156700000, 0, 0}, 798 - { 203500000, 186250000, 0, 0}, 799 - { 457800000, 230000000, 345000000, 426000000}, 800 - { 865000000, 489500000, 697500000, 842000000}, 793 + { 47900000, 46000000, 0, 0}, 794 + { 61100000, 52200000, 0, 0}, 795 + { 152600000, 70100000, 136800000, 0}, 796 + { 164700000, 156700000, 0, 0}, 797 + { 203500000, 186250000, 0, 0}, 798 + { 457800000, 230000000, 345000000, 426000000}, 799 + { 865000000, 489500000, 697500000, 842000000}, 801 800 }; 802 801 803 802 u8 m_Thermometer_Map_1[16] = { 804 - 60,62,66,64, 74,72,68,70, 90,88,84,86, 76,78,82,80, 803 + 60, 62, 66, 64, 804 + 74, 72, 68, 70, 805 + 90, 88, 84, 86, 806 + 76, 78, 82, 80, 805 807 }; 806 808 807 809 u8 m_Thermometer_Map_2[16] = { 808 - 92,94,98,96, 106,104,100,102, 122,120,116,118, 108,110,114,112, 810 + 92, 94, 98, 96, 811 + 106, 104, 100, 102, 812 + 122, 120, 116, 118, 813 + 108, 110, 114, 112, 809 814 }; 810 -