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[MIPS] Alchemy: Fix Au1x SD controller IRQ
With the introduction of MIPS_CPU_IRQ_BASE, the hardcoded IRQ number of
the au1100/au1200 SD controller(s) is no longer valid.
Signed-off-by: Manuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
authored by Manuel Lauss and committed by Ralf Baechle 0f5e49a2 6d2d419f
+5
-2
include/asm-mips/mach-au1x00/au1100_mmc.h
+5
-2
include/asm-mips/mach-au1x00/au1100_mmc.h
···
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#define NUM_AU1100_MMC_CONTROLLERS 2
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#define AU1100_SD_IRQ 2
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#if defined(CONFIG_SOC_AU1100)
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#define AU1100_SD_IRQ AU1100_SD_INT
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#elif defined(CONFIG_SOC_AU1200)
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#define AU1100_SD_IRQ AU1200_SD_INT
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#endif
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#define SD0_BASE 0xB0600000