tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
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[ARM] nommu: abort handler fixup for !CPU_CP15_MMU cores.

There is no FSR/FAR register on no-CP15 or MPU cores. This patch adds a
dummy abort handler which returns zero for the base restored Data Abort
model !CPU_CP15_MMU cores. The abort-lv4t.S is still used with the fix-up
for the base updated Data Abort model cores.

Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

authored by

Hyok S. Choi and committed by
Russell King 0f45d7f3 6cc7cbef

+35 -7
+6 -3
arch/arm/mm/Kconfig
··· 97 97 bool "Support ARM9TDMI processor" 98 98 depends on !MMU 99 99 select CPU_32v4T 100 - select CPU_ABRT_EV4T 100 + select CPU_ABRT_NOMMU 101 101 select CPU_CACHE_V4 102 102 help 103 103 A 32-bit RISC microprocessor based on the ARM9 processor core ··· 192 192 bool "Support ARM940T processor" if ARCH_INTEGRATOR 193 193 depends on !MMU 194 194 select CPU_32v4T 195 - select CPU_ABRT_EV4T 195 + select CPU_ABRT_NOMMU 196 196 select CPU_CACHE_VIVT 197 197 select CPU_CP15_MPU 198 198 help ··· 209 209 bool "Support ARM946E-S processor" if ARCH_INTEGRATOR 210 210 depends on !MMU 211 211 select CPU_32v5 212 - select CPU_ABRT_EV5T 212 + select CPU_ABRT_NOMMU 213 213 select CPU_CACHE_VIVT 214 214 select CPU_CP15_MPU 215 215 help ··· 392 392 bool 393 393 394 394 # The abort model 395 + config CPU_ABRT_NOMMU 396 + bool 397 + 395 398 config CPU_ABRT_EV4 396 399 bool 397 400
+1
arch/arm/mm/Makefile
··· 17 17 obj-$(CONFIG_ALIGNMENT_TRAP) += alignment.o 18 18 obj-$(CONFIG_DISCONTIGMEM) += discontig.o 19 19 20 + obj-$(CONFIG_CPU_ABRT_NOMMU) += abort-nommu.o 20 21 obj-$(CONFIG_CPU_ABRT_EV4) += abort-ev4.o 21 22 obj-$(CONFIG_CPU_ABRT_EV4T) += abort-ev4t.o 22 23 obj-$(CONFIG_CPU_ABRT_LV4T) += abort-lv4t.o
+6 -1
arch/arm/mm/abort-lv4t.S
··· 19 19 */ 20 20 ENTRY(v4t_late_abort) 21 21 tst r3, #PSR_T_BIT @ check for thumb mode 22 + #ifdef CONFIG_CPU_CP15_MMU 22 23 mrc p15, 0, r1, c5, c0, 0 @ get FSR 23 24 mrc p15, 0, r0, c6, c0, 0 @ get FAR 25 + bic r1, r1, #1 << 11 | 1 << 10 @ clear bits 11 and 10 of FSR 26 + #else 27 + mov r0, #0 @ clear r0, r1 (no FSR/FAR) 28 + mov r1, #0 29 + #endif 24 30 bne .data_thumb_abort 25 31 ldr r8, [r2] @ read arm instruction 26 - bic r1, r1, #1 << 11 | 1 << 10 @ clear bits 11 and 10 of FSR 27 32 tst r8, #1 << 20 @ L = 1 -> write? 28 33 orreq r1, r1, #1 << 11 @ yes. 29 34 and r7, r8, #15 << 24
+19
arch/arm/mm/abort-nommu.S
··· 1 + #include <linux/linkage.h> 2 + #include <asm/assembler.h> 3 + /* 4 + * Function: nommu_early_abort 5 + * 6 + * Params : r2 = address of aborted instruction 7 + * : r3 = saved SPSR 8 + * 9 + * Returns : r0 = 0 (abort address) 10 + * : r1 = 0 (FSR) 11 + * 12 + * Note: There is no FSR/FAR on !CPU_CP15_MMU cores. 13 + * Just fill zero into the registers. 14 + */ 15 + .align 5 16 + ENTRY(nommu_early_abort) 17 + mov r0, #0 @ clear r0, r1 (no FSR/FAR) 18 + mov r1, #0 19 + mov pc, lr
+1 -1
arch/arm/mm/proc-arm940.S
··· 320 320 */ 321 321 .type arm940_processor_functions, #object 322 322 ENTRY(arm940_processor_functions) 323 - .word v4t_early_abort 323 + .word nommu_early_abort 324 324 .word cpu_arm940_proc_init 325 325 .word cpu_arm940_proc_fin 326 326 .word cpu_arm940_reset
+1 -1
arch/arm/mm/proc-arm946.S
··· 375 375 */ 376 376 .type arm946_processor_functions, #object 377 377 ENTRY(arm946_processor_functions) 378 - .word v5t_early_abort 378 + .word nommu_early_abort 379 379 .word cpu_arm946_proc_init 380 380 .word cpu_arm946_proc_fin 381 381 .word cpu_arm946_reset
+1 -1
arch/arm/mm/proc-arm9tdmi.S
··· 63 63 */ 64 64 .type arm9tdmi_processor_functions, #object 65 65 ENTRY(arm9tdmi_processor_functions) 66 - .word v4t_early_abort 66 + .word nommu_early_abort 67 67 .word cpu_arm9tdmi_proc_init 68 68 .word cpu_arm9tdmi_proc_fin 69 69 .word cpu_arm9tdmi_reset