tjh.dev / kernel
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drm/dsi: Add _NO_ to MIPI_DSI_* flags disabling features

Many of the DSI flags have names opposite to their actual effects,
e.g. MIPI_DSI_MODE_EOT_PACKET means that EoT packets will actually
be disabled. Fix this by including _NO_ in the flag names, e.g.
MIPI_DSI_MODE_NO_EOT_PACKET.

Signed-off-by: Nicolas Boichat <drinkcat@chromium.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Reviewed-by: Andrzej Hajda <andrzej.hajda@samsung.com>
Reviewed-by: Xin Ji <xji@analogixsemi.com> # anx7625.c
Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> # msm/dsi
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20210727094435.v3.1.I629b2366a6591410359c7fcf6d385b474b705ca2@changeid

authored by

Nicolas Boichat and committed by
Sam Ravnborg 0f3b68b6 0937a7b3

+34 -34
+1 -1
drivers/gpu/drm/bridge/adv7511/adv7533.c
··· 165 165 dsi->lanes = adv->num_dsi_lanes; 166 166 dsi->format = MIPI_DSI_FMT_RGB888; 167 167 dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_SYNC_PULSE | 168 - MIPI_DSI_MODE_EOT_PACKET | MIPI_DSI_MODE_VIDEO_HSE; 168 + MIPI_DSI_MODE_NO_EOT_PACKET | MIPI_DSI_MODE_VIDEO_HSE; 169 169 170 170 ret = mipi_dsi_attach(dsi); 171 171 if (ret < 0) {
+1 -1
drivers/gpu/drm/bridge/analogix/anx7625.c
··· 1307 1307 dsi->format = MIPI_DSI_FMT_RGB888; 1308 1308 dsi->mode_flags = MIPI_DSI_MODE_VIDEO | 1309 1309 MIPI_DSI_MODE_VIDEO_SYNC_PULSE | 1310 - MIPI_DSI_MODE_EOT_PACKET | 1310 + MIPI_DSI_MODE_NO_EOT_PACKET | 1311 1311 MIPI_DSI_MODE_VIDEO_HSE; 1312 1312 1313 1313 if (mipi_dsi_attach(dsi) < 0) {
+2 -2
drivers/gpu/drm/bridge/cdns-dsi.c
··· 829 829 tmp = DIV_ROUND_UP(dsi_cfg.htotal, nlanes) - 830 830 DIV_ROUND_UP(dsi_cfg.hsa, nlanes); 831 831 832 - if (!(output->dev->mode_flags & MIPI_DSI_MODE_EOT_PACKET)) 832 + if (!(output->dev->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET)) 833 833 tmp -= DIV_ROUND_UP(DSI_EOT_PKT_SIZE, nlanes); 834 834 835 835 tx_byte_period = DIV_ROUND_DOWN_ULL((u64)NSEC_PER_SEC * 8, ··· 902 902 tmp = readl(dsi->regs + MCTL_MAIN_DATA_CTL); 903 903 tmp &= ~(IF_VID_SELECT_MASK | HOST_EOT_GEN | IF_VID_MODE); 904 904 905 - if (!(output->dev->mode_flags & MIPI_DSI_MODE_EOT_PACKET)) 905 + if (!(output->dev->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET)) 906 906 tmp |= HOST_EOT_GEN; 907 907 908 908 if (output->dev->mode_flags & MIPI_DSI_MODE_VIDEO)
+1 -1
drivers/gpu/drm/bridge/lontium-lt8912b.c
··· 487 487 dsi->mode_flags = MIPI_DSI_MODE_VIDEO | 488 488 MIPI_DSI_MODE_VIDEO_BURST | 489 489 MIPI_DSI_MODE_LPM | 490 - MIPI_DSI_MODE_EOT_PACKET; 490 + MIPI_DSI_MODE_NO_EOT_PACKET; 491 491 492 492 ret = mipi_dsi_attach(dsi); 493 493 if (ret < 0) {
+1 -1
drivers/gpu/drm/bridge/tc358768.c
··· 825 825 if (!(dsi_dev->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS)) 826 826 val |= TC358768_DSI_CONTROL_HSCKMD; 827 827 828 - if (dsi_dev->mode_flags & MIPI_DSI_MODE_EOT_PACKET) 828 + if (dsi_dev->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET) 829 829 val |= TC358768_DSI_CONTROL_EOTDIS; 830 830 831 831 tc358768_write(priv, TC358768_DSI_CONFW, val);
+4 -4
drivers/gpu/drm/exynos/exynos_drm_dsi.c
··· 809 809 reg |= DSIM_AUTO_MODE; 810 810 if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HSE) 811 811 reg |= DSIM_HSE_MODE; 812 - if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HFP)) 812 + if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_NO_HFP)) 813 813 reg |= DSIM_HFP_MODE; 814 - if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HBP)) 814 + if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_NO_HBP)) 815 815 reg |= DSIM_HBP_MODE; 816 - if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_HSA)) 816 + if (!(dsi->mode_flags & MIPI_DSI_MODE_VIDEO_NO_HSA)) 817 817 reg |= DSIM_HSA_MODE; 818 818 } 819 819 820 - if (!(dsi->mode_flags & MIPI_DSI_MODE_EOT_PACKET)) 820 + if (!(dsi->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET)) 821 821 reg |= DSIM_EOT_DISABLE; 822 822 823 823 switch (dsi->format) {
+1 -1
drivers/gpu/drm/mcde/mcde_dsi.c
··· 760 760 DSI_MCTL_MAIN_DATA_CTL_BTA_EN | 761 761 DSI_MCTL_MAIN_DATA_CTL_READ_EN | 762 762 DSI_MCTL_MAIN_DATA_CTL_REG_TE_EN; 763 - if (!(d->mdsi->mode_flags & MIPI_DSI_MODE_EOT_PACKET)) 763 + if (!(d->mdsi->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET)) 764 764 val |= DSI_MCTL_MAIN_DATA_CTL_HOST_EOT_GEN; 765 765 writel(val, d->regs + DSI_MCTL_MAIN_DATA_CTL); 766 766
+2 -2
drivers/gpu/drm/mediatek/mtk_dsi.c
··· 404 404 if (dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) 405 405 tmp_reg |= HSTX_CKLP_EN; 406 406 407 - if (!(dsi->mode_flags & MIPI_DSI_MODE_EOT_PACKET)) 407 + if (!(dsi->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET)) 408 408 tmp_reg |= DIS_EOT; 409 409 410 410 writel(tmp_reg, dsi->regs + DSI_TXRX_CTRL); ··· 481 481 timing->da_hs_zero + timing->da_hs_exit + 3; 482 482 483 483 delta = dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST ? 18 : 12; 484 - delta += dsi->mode_flags & MIPI_DSI_MODE_EOT_PACKET ? 2 : 0; 484 + delta += dsi->mode_flags & MIPI_DSI_MODE_NO_EOT_PACKET ? 2 : 0; 485 485 486 486 horizontal_frontporch_byte = vm->hfront_porch * dsi_tmp_buf_bpp; 487 487 horizontal_front_back_byte = horizontal_frontporch_byte + horizontal_backporch_byte;
+4 -4
drivers/gpu/drm/msm/dsi/dsi_host.c
··· 850 850 if (flags & MIPI_DSI_MODE_VIDEO) { 851 851 if (flags & MIPI_DSI_MODE_VIDEO_HSE) 852 852 data |= DSI_VID_CFG0_PULSE_MODE_HSA_HE; 853 - if (flags & MIPI_DSI_MODE_VIDEO_HFP) 853 + if (flags & MIPI_DSI_MODE_VIDEO_NO_HFP) 854 854 data |= DSI_VID_CFG0_HFP_POWER_STOP; 855 - if (flags & MIPI_DSI_MODE_VIDEO_HBP) 855 + if (flags & MIPI_DSI_MODE_VIDEO_NO_HBP) 856 856 data |= DSI_VID_CFG0_HBP_POWER_STOP; 857 - if (flags & MIPI_DSI_MODE_VIDEO_HSA) 857 + if (flags & MIPI_DSI_MODE_VIDEO_NO_HSA) 858 858 data |= DSI_VID_CFG0_HSA_POWER_STOP; 859 859 /* Always set low power stop mode for BLLP 860 860 * to let command engine send packets ··· 909 909 DSI_T_CLK_PRE_EXTEND_INC_BY_2_BYTECLK); 910 910 911 911 data = 0; 912 - if (!(flags & MIPI_DSI_MODE_EOT_PACKET)) 912 + if (!(flags & MIPI_DSI_MODE_NO_EOT_PACKET)) 913 913 data |= DSI_EOT_PACKET_CTRL_TX_EOT_APPEND; 914 914 dsi_write(msm_host, REG_DSI_EOT_PACKET_CTRL, data); 915 915
+1 -1
drivers/gpu/drm/panel/panel-asus-z00t-tm5p5-n35596.c
··· 302 302 dsi->lanes = 4; 303 303 dsi->format = MIPI_DSI_FMT_RGB888; 304 304 dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 305 - MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_EOT_PACKET | 305 + MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_NO_EOT_PACKET | 306 306 MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM; 307 307 308 308 drm_panel_init(&ctx->panel, dev, &tm5p5_nt35596_panel_funcs,
+1 -1
drivers/gpu/drm/panel/panel-dsi-cm.c
··· 574 574 dsi->lanes = 2; 575 575 dsi->format = MIPI_DSI_FMT_RGB888; 576 576 dsi->mode_flags = MIPI_DSI_CLOCK_NON_CONTINUOUS | 577 - MIPI_DSI_MODE_EOT_PACKET; 577 + MIPI_DSI_MODE_NO_EOT_PACKET; 578 578 dsi->hs_rate = ddata->panel_data->max_hs_rate; 579 579 dsi->lp_rate = ddata->panel_data->max_lp_rate; 580 580
+1 -1
drivers/gpu/drm/panel/panel-elida-kd35t133.c
··· 273 273 dsi->lanes = 1; 274 274 dsi->format = MIPI_DSI_FMT_RGB888; 275 275 dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 276 - MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET | 276 + MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_NO_EOT_PACKET | 277 277 MIPI_DSI_CLOCK_NON_CONTINUOUS; 278 278 279 279 drm_panel_init(&ctx->panel, &dsi->dev, &kd35t133_funcs,
+1 -1
drivers/gpu/drm/panel/panel-khadas-ts050.c
··· 809 809 dsi->lanes = 4; 810 810 dsi->format = MIPI_DSI_FMT_RGB888; 811 811 dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 812 - MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET; 812 + MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_NO_EOT_PACKET; 813 813 814 814 khadas_ts050 = devm_kzalloc(&dsi->dev, sizeof(*khadas_ts050), 815 815 GFP_KERNEL);
+1 -1
drivers/gpu/drm/panel/panel-leadtek-ltk050h3146w.c
··· 593 593 dsi->lanes = 4; 594 594 dsi->format = MIPI_DSI_FMT_RGB888; 595 595 dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 596 - MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET; 596 + MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_NO_EOT_PACKET; 597 597 598 598 drm_panel_init(&ctx->panel, &dsi->dev, &ltk050h3146w_funcs, 599 599 DRM_MODE_CONNECTOR_DSI);
+1 -1
drivers/gpu/drm/panel/panel-leadtek-ltk500hd1829.c
··· 442 442 dsi->lanes = 4; 443 443 dsi->format = MIPI_DSI_FMT_RGB888; 444 444 dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 445 - MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET; 445 + MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_NO_EOT_PACKET; 446 446 447 447 drm_panel_init(&ctx->panel, &dsi->dev, &ltk500hd1829_funcs, 448 448 DRM_MODE_CONNECTOR_DSI);
+1 -1
drivers/gpu/drm/panel/panel-osd-osd101t2587-53ts.c
··· 184 184 dsi->mode_flags = MIPI_DSI_MODE_VIDEO | 185 185 MIPI_DSI_MODE_VIDEO_BURST | 186 186 MIPI_DSI_MODE_VIDEO_SYNC_PULSE | 187 - MIPI_DSI_MODE_EOT_PACKET; 187 + MIPI_DSI_MODE_NO_EOT_PACKET; 188 188 189 189 osd101t2587 = devm_kzalloc(&dsi->dev, sizeof(*osd101t2587), GFP_KERNEL); 190 190 if (!osd101t2587)
+1 -1
drivers/gpu/drm/panel/panel-samsung-s6e63j0x03.c
··· 446 446 447 447 dsi->lanes = 1; 448 448 dsi->format = MIPI_DSI_FMT_RGB888; 449 - dsi->mode_flags = MIPI_DSI_MODE_EOT_PACKET; 449 + dsi->mode_flags = MIPI_DSI_MODE_NO_EOT_PACKET; 450 450 451 451 ctx->supplies[0].supply = "vdd3"; 452 452 ctx->supplies[1].supply = "vci";
+2 -2
drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c
··· 990 990 dsi->lanes = 4; 991 991 dsi->format = MIPI_DSI_FMT_RGB888; 992 992 dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST 993 - | MIPI_DSI_MODE_VIDEO_HFP | MIPI_DSI_MODE_VIDEO_HBP 994 - | MIPI_DSI_MODE_VIDEO_HSA | MIPI_DSI_MODE_EOT_PACKET 993 + | MIPI_DSI_MODE_VIDEO_NO_HFP | MIPI_DSI_MODE_VIDEO_NO_HBP 994 + | MIPI_DSI_MODE_VIDEO_NO_HSA | MIPI_DSI_MODE_NO_EOT_PACKET 995 995 | MIPI_DSI_MODE_VSYNC_FLUSH | MIPI_DSI_MODE_VIDEO_AUTO_VERT; 996 996 997 997 ret = s6e8aa0_parse_dt(ctx);
+1 -1
drivers/gpu/drm/panel/panel-sharp-ls043t1le01.c
··· 282 282 dsi->mode_flags = MIPI_DSI_MODE_VIDEO | 283 283 MIPI_DSI_MODE_VIDEO_HSE | 284 284 MIPI_DSI_CLOCK_NON_CONTINUOUS | 285 - MIPI_DSI_MODE_EOT_PACKET; 285 + MIPI_DSI_MODE_NO_EOT_PACKET; 286 286 287 287 sharp_nt = devm_kzalloc(&dsi->dev, sizeof(*sharp_nt), GFP_KERNEL); 288 288 if (!sharp_nt)
+1 -1
drivers/gpu/drm/panel/panel-simple.c
··· 5072 5072 }, 5073 5073 .flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 5074 5074 MIPI_DSI_MODE_VIDEO_SYNC_PULSE | 5075 - MIPI_DSI_MODE_EOT_PACKET, 5075 + MIPI_DSI_MODE_NO_EOT_PACKET, 5076 5076 .format = MIPI_DSI_FMT_RGB888, 5077 5077 .lanes = 4, 5078 5078 };
+1 -1
drivers/gpu/drm/panel/panel-xinpeng-xpp055c272.c
··· 311 311 dsi->lanes = 4; 312 312 dsi->format = MIPI_DSI_FMT_RGB888; 313 313 dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 314 - MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET; 314 + MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_NO_EOT_PACKET; 315 315 316 316 drm_panel_init(&ctx->panel, &dsi->dev, &xpp055c272_funcs, 317 317 DRM_MODE_CONNECTOR_DSI);
+4 -4
include/drm/drm_mipi_dsi.h
··· 124 124 /* enable hsync-end packets in vsync-pulse and v-porch area */ 125 125 #define MIPI_DSI_MODE_VIDEO_HSE BIT(4) 126 126 /* disable hfront-porch area */ 127 - #define MIPI_DSI_MODE_VIDEO_HFP BIT(5) 127 + #define MIPI_DSI_MODE_VIDEO_NO_HFP BIT(5) 128 128 /* disable hback-porch area */ 129 - #define MIPI_DSI_MODE_VIDEO_HBP BIT(6) 129 + #define MIPI_DSI_MODE_VIDEO_NO_HBP BIT(6) 130 130 /* disable hsync-active area */ 131 - #define MIPI_DSI_MODE_VIDEO_HSA BIT(7) 131 + #define MIPI_DSI_MODE_VIDEO_NO_HSA BIT(7) 132 132 /* flush display FIFO on vsync pulse */ 133 133 #define MIPI_DSI_MODE_VSYNC_FLUSH BIT(8) 134 134 /* disable EoT packets in HS mode */ 135 - #define MIPI_DSI_MODE_EOT_PACKET BIT(9) 135 + #define MIPI_DSI_MODE_NO_EOT_PACKET BIT(9) 136 136 /* device supports non-continuous clock behavior (DSI spec 5.6.1) */ 137 137 #define MIPI_DSI_CLOCK_NON_CONTINUOUS BIT(10) 138 138 /* transmit data in low power */