tjh.dev / kernel
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ARM: spear: move spear.h and misc_regs.h into plat-spear

The spear13xx version of spear.h is completely different from
the newly combined spear3xx/spear6xx version, but we can never
build ARMv5 and ARMv7 platforms together, so there is no
harm in putting all the contents into a single file and adding
appropriate ifdefs.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>

Arnd Bergmann 0ec05c3e 4b6effb6

+42 -135
-54
arch/arm/mach-spear13xx/include/mach/spear.h
··· 1 - /* 2 - * arch/arm/mach-spear13xx/include/mach/spear.h 3 - * 4 - * spear13xx Machine family specific definition 5 - * 6 - * Copyright (C) 2012 ST Microelectronics 7 - * Viresh Kumar <viresh.linux@gmail.com> 8 - * 9 - * This file is licensed under the terms of the GNU General Public 10 - * License version 2. This program is licensed "as is" without any 11 - * warranty of any kind, whether express or implied. 12 - */ 13 - 14 - #ifndef __MACH_SPEAR13XX_H 15 - #define __MACH_SPEAR13XX_H 16 - 17 - #include <asm/memory.h> 18 - 19 - #define PERIP_GRP2_BASE UL(0xB3000000) 20 - #define VA_PERIP_GRP2_BASE IOMEM(0xFE000000) 21 - #define MCIF_SDHCI_BASE UL(0xB3000000) 22 - #define SYSRAM0_BASE UL(0xB3800000) 23 - #define VA_SYSRAM0_BASE IOMEM(0xFE800000) 24 - #define SYS_LOCATION (VA_SYSRAM0_BASE + 0x600) 25 - 26 - #define PERIP_GRP1_BASE UL(0xE0000000) 27 - #define VA_PERIP_GRP1_BASE IOMEM(0xFD000000) 28 - #define UART_BASE UL(0xE0000000) 29 - #define VA_UART_BASE IOMEM(0xFD000000) 30 - #define SSP_BASE UL(0xE0100000) 31 - #define MISC_BASE UL(0xE0700000) 32 - #define VA_MISC_BASE IOMEM(0xFD700000) 33 - 34 - #define A9SM_AND_MPMC_BASE UL(0xEC000000) 35 - #define VA_A9SM_AND_MPMC_BASE IOMEM(0xFC000000) 36 - 37 - /* A9SM peripheral offsets */ 38 - #define A9SM_PERIP_BASE UL(0xEC800000) 39 - #define VA_A9SM_PERIP_BASE IOMEM(0xFC800000) 40 - #define VA_SCU_BASE (VA_A9SM_PERIP_BASE + 0x00) 41 - 42 - #define L2CC_BASE UL(0xED000000) 43 - #define VA_L2CC_BASE IOMEM(UL(0xFB000000)) 44 - 45 - /* others */ 46 - #define DMAC0_BASE UL(0xEA800000) 47 - #define DMAC1_BASE UL(0xEB000000) 48 - #define MCIF_CF_BASE UL(0xB2800000) 49 - 50 - /* Debug uart for linux, will be used for debug and uncompress messages */ 51 - #define SPEAR_DBG_UART_BASE UART_BASE 52 - #define VA_SPEAR_DBG_UART_BASE VA_UART_BASE 53 - 54 - #endif /* __MACH_SPEAR13XX_H */
arch/arm/mach-spear3xx/include/mach/misc_regs.h arch/arm/plat-spear/include/mach/misc_regs.h
+42
arch/arm/mach-spear3xx/include/mach/spear.h arch/arm/plat-spear/include/mach/spear.h
··· 15 15 16 16 #include <asm/memory.h> 17 17 18 + #if defined(CONFIG_ARCH_SPEAR3XX) || defined (CONFIG_ARCH_SPEAR6XX) 19 + 18 20 /* ICM1 - Low speed connection */ 19 21 #define SPEAR_ICM1_2_BASE UL(0xD0000000) 20 22 #define VA_SPEAR_ICM1_2_BASE UL(0xFD000000) ··· 57 55 #define SPEAR320_UART5_PCLK_SHIFT 11 58 56 #define SPEAR320_UART6_PCLK_SHIFT 12 59 57 #define SPEAR320_RS485_PCLK_SHIFT 13 58 + #endif /* SPEAR3xx || SPEAR6XX */ 59 + 60 + #ifdef CONFIG_ARCH_SPEAR13XX 61 + 62 + #define PERIP_GRP2_BASE UL(0xB3000000) 63 + #define VA_PERIP_GRP2_BASE IOMEM(0xFE000000) 64 + #define MCIF_SDHCI_BASE UL(0xB3000000) 65 + #define SYSRAM0_BASE UL(0xB3800000) 66 + #define VA_SYSRAM0_BASE IOMEM(0xFE800000) 67 + #define SYS_LOCATION (VA_SYSRAM0_BASE + 0x600) 68 + 69 + #define PERIP_GRP1_BASE UL(0xE0000000) 70 + #define VA_PERIP_GRP1_BASE IOMEM(0xFD000000) 71 + #define UART_BASE UL(0xE0000000) 72 + #define VA_UART_BASE IOMEM(0xFD000000) 73 + #define SSP_BASE UL(0xE0100000) 74 + #define MISC_BASE UL(0xE0700000) 75 + #define VA_MISC_BASE IOMEM(0xFD700000) 76 + 77 + #define A9SM_AND_MPMC_BASE UL(0xEC000000) 78 + #define VA_A9SM_AND_MPMC_BASE IOMEM(0xFC000000) 79 + 80 + /* A9SM peripheral offsets */ 81 + #define A9SM_PERIP_BASE UL(0xEC800000) 82 + #define VA_A9SM_PERIP_BASE IOMEM(0xFC800000) 83 + #define VA_SCU_BASE (VA_A9SM_PERIP_BASE + 0x00) 84 + 85 + #define L2CC_BASE UL(0xED000000) 86 + #define VA_L2CC_BASE IOMEM(UL(0xFB000000)) 87 + 88 + /* others */ 89 + #define DMAC0_BASE UL(0xEA800000) 90 + #define DMAC1_BASE UL(0xEB000000) 91 + #define MCIF_CF_BASE UL(0xB2800000) 92 + 93 + /* Debug uart for linux, will be used for debug and uncompress messages */ 94 + #define SPEAR_DBG_UART_BASE UART_BASE 95 + #define VA_SPEAR_DBG_UART_BASE VA_UART_BASE 96 + 97 + #endif /* SPEAR13XX */ 60 98 61 99 #endif /* __MACH_SPEAR_H */
-22
arch/arm/mach-spear6xx/include/mach/misc_regs.h
··· 1 - /* 2 - * arch/arm/mach-spear6xx/include/mach/misc_regs.h 3 - * 4 - * Miscellaneous registers definitions for SPEAr6xx machine family 5 - * 6 - * Copyright (C) 2009 ST Microelectronics 7 - * Viresh Kumar <viresh.linux@gmail.com> 8 - * 9 - * This file is licensed under the terms of the GNU General Public 10 - * License version 2. This program is licensed "as is" without any 11 - * warranty of any kind, whether express or implied. 12 - */ 13 - 14 - #ifndef __MACH_MISC_REGS_H 15 - #define __MACH_MISC_REGS_H 16 - 17 - #include <mach/spear.h> 18 - 19 - #define MISC_BASE IOMEM(VA_SPEAR_ICM3_MISC_REG_BASE) 20 - #define DMA_CHN_CFG (MISC_BASE + 0x0A0) 21 - 22 - #endif /* __MACH_MISC_REGS_H */
-59
arch/arm/mach-spear6xx/include/mach/spear.h
··· 1 - /* 2 - * SPEAr3xx/6xx Machine family specific definition 3 - * 4 - * Copyright (C) 2009,2012 ST Microelectronics 5 - * Rajeev Kumar<rajeev-dlh.kumar@st.com> 6 - * Viresh Kumar <viresh.linux@gmail.com> 7 - * 8 - * This file is licensed under the terms of the GNU General Public 9 - * License version 2. This program is licensed "as is" without any 10 - * warranty of any kind, whether express or implied. 11 - */ 12 - 13 - #ifndef __MACH_SPEAR_H 14 - #define __MACH_SPEAR_H 15 - 16 - #include <asm/memory.h> 17 - 18 - /* ICM1 - Low speed connection */ 19 - #define SPEAR_ICM1_2_BASE UL(0xD0000000) 20 - #define VA_SPEAR_ICM1_2_BASE UL(0xFD000000) 21 - #define SPEAR_ICM1_UART_BASE UL(0xD0000000) 22 - #define VA_SPEAR_ICM1_UART_BASE (VA_SPEAR_ICM1_2_BASE | SPEAR_ICM1_UART_BASE) 23 - #define SPEAR3XX_ICM1_SSP_BASE UL(0xD0100000) 24 - 25 - /* ML-1, 2 - Multi Layer CPU Subsystem */ 26 - #define SPEAR_ICM3_ML1_2_BASE UL(0xF0000000) 27 - #define VA_SPEAR6XX_ML_CPU_BASE UL(0xF0000000) 28 - 29 - /* ICM3 - Basic Subsystem */ 30 - #define SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000) 31 - #define VA_SPEAR_ICM3_SMI_CTRL_BASE UL(0xFC000000) 32 - #define SPEAR_ICM3_DMA_BASE UL(0xFC400000) 33 - #define SPEAR_ICM3_SYS_CTRL_BASE UL(0xFCA00000) 34 - #define VA_SPEAR_ICM3_SYS_CTRL_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE | SPEAR_ICM3_SYS_CTRL_BASE) 35 - #define SPEAR_ICM3_MISC_REG_BASE UL(0xFCA80000) 36 - #define VA_SPEAR_ICM3_MISC_REG_BASE (VA_SPEAR_ICM3_SMI_CTRL_BASE | SPEAR_ICM3_MISC_REG_BASE) 37 - 38 - /* Debug uart for linux, will be used for debug and uncompress messages */ 39 - #define SPEAR_DBG_UART_BASE SPEAR_ICM1_UART_BASE 40 - #define VA_SPEAR_DBG_UART_BASE VA_SPEAR_ICM1_UART_BASE 41 - 42 - /* Sysctl base for spear platform */ 43 - #define SPEAR_SYS_CTRL_BASE SPEAR_ICM3_SYS_CTRL_BASE 44 - #define VA_SPEAR_SYS_CTRL_BASE VA_SPEAR_ICM3_SYS_CTRL_BASE 45 - 46 - /* SPEAr320 Macros */ 47 - #define SPEAR320_SOC_CONFIG_BASE UL(0xB3000000) 48 - #define VA_SPEAR320_SOC_CONFIG_BASE UL(0xFE000000) 49 - #define SPEAR320_CONTROL_REG IOMEM(VA_SPEAR320_SOC_CONFIG_BASE) 50 - #define SPEAR320_EXT_CTRL_REG IOMEM(VA_SPEAR320_SOC_CONFIG_BASE + 0x0018) 51 - #define SPEAR320_UARTX_PCLK_MASK 0x1 52 - #define SPEAR320_UART2_PCLK_SHIFT 8 53 - #define SPEAR320_UART3_PCLK_SHIFT 9 54 - #define SPEAR320_UART4_PCLK_SHIFT 10 55 - #define SPEAR320_UART5_PCLK_SHIFT 11 56 - #define SPEAR320_UART6_PCLK_SHIFT 12 57 - #define SPEAR320_RS485_PCLK_SHIFT 13 58 - 59 - #endif /* __MACH_SPEAR_H */