tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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arm: return both physical and virtual addresses from addruart

Rather than checking the MMU status in every instance of addruart, do it
once in kernel/debug.S, and change the existing addruart macros to
return both physical and virtual addresses. The main debug code can then
select the appropriate address to use.

This will also allow us to retreive the address of a uart for the MMU
state that we're not current in.

Updated with fixes for OMAP from Jason Wang <jason77.wang@gmail.com>
and Tony Lindgren <tony@atomide.com>, and fix for versatile express from
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>.

Signed-off-by: Jeremy Kerr <jeremy.kerr@canonical.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Jason Wang <jason77.wang@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Tested-by: Kevin Hilman <khilman@deeprootsystems.com>

authored by

Jeremy Kerr and committed by
Nicolas Pitre 0ea12930 1ea64615

+440 -454
+19 -3
arch/arm/kernel/debug.S
··· 22 22 #if defined(CONFIG_DEBUG_ICEDCC) 23 23 @@ debug using ARM EmbeddedICE DCC channel 24 24 25 - .macro addruart, rx, tmp 25 + .macro addruart, rp, rv 26 26 .endm 27 27 28 28 #if defined(CONFIG_CPU_V6) ··· 121 121 #include <mach/debug-macro.S> 122 122 #endif /* CONFIG_DEBUG_ICEDCC */ 123 123 124 + #ifdef CONFIG_MMU 125 + .macro addruart_current, rx, tmp1, tmp2 126 + addruart \tmp1, \tmp2 127 + mrc p15, 0, \rx, c1, c0 128 + tst \rx, #1 129 + moveq \rx, \tmp1 130 + movne \rx, \tmp2 131 + .endm 132 + 133 + #else /* !CONFIG_MMU */ 134 + .macro addruart_current, rx, tmp1, tmp2 135 + addruart \rx, \tmp1 136 + .endm 137 + 138 + #endif /* CONFIG_MMU */ 139 + 124 140 /* 125 141 * Useful debugging routines 126 142 */ ··· 171 155 .ltorg 172 156 173 157 ENTRY(printascii) 174 - addruart r3, r1 158 + addruart_current r3, r1, r2 175 159 b 2f 176 160 1: waituart r2, r3 177 161 senduart r1, r3 ··· 187 171 ENDPROC(printascii) 188 172 189 173 ENTRY(printch) 190 - addruart r3, r1 174 + addruart_current r3, r1, r2 191 175 mov r1, r0 192 176 mov r0, #0 193 177 b 1b
+4 -6
arch/arm/mach-aaec2000/include/mach/debug-macro.S
··· 10 10 */ 11 11 12 12 #include "hardware.h" 13 - .macro addruart, rx, tmp 14 - mrc p15, 0, \rx, c1, c0 15 - tst \rx, #1 @ MMU enabled? 16 - moveq \rx, #0x80000000 @ physical 17 - movne \rx, #io_p2v(0x80000000) @ virtual 18 - orr \rx, \rx, #0x00000800 13 + .macro addruart, rp, rv 14 + mov \rp, 0x00000800 15 + orr \rv, \rp, #io_p2v(0x80000000) @ virtual 16 + orr \rp, \rp, #0x80000000 @ physical 19 17 .endm 20 18 21 19 .macro senduart,rd,rx
+3 -5
arch/arm/mach-at91/include/mach/debug-macro.S
··· 14 14 #include <mach/hardware.h> 15 15 #include <mach/at91_dbgu.h> 16 16 17 - .macro addruart, rx, tmp 18 - mrc p15, 0, \rx, c1, c0 19 - tst \rx, #1 @ MMU enabled? 20 - ldreq \rx, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address) 21 - ldrne \rx, =(AT91_VA_BASE_SYS + AT91_DBGU) @ System peripherals (virt address) 17 + .macro addruart, rp, rv 18 + ldr \rp, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address) 19 + ldr \rv, =(AT91_VA_BASE_SYS + AT91_DBGU) @ System peripherals (virt address) 22 20 .endm 23 21 24 22 .macro senduart,rd,rx
+5 -7
arch/arm/mach-clps711x/include/mach/debug-macro.S
··· 14 14 #include <mach/hardware.h> 15 15 #include <asm/hardware/clps7111.h> 16 16 17 - .macro addruart, rx, tmp 18 - mrc p15, 0, \rx, c1, c0 19 - tst \rx, #1 @ MMU enabled? 20 - moveq \rx, #CLPS7111_PHYS_BASE 21 - movne \rx, #CLPS7111_VIRT_BASE 17 + .macro addruart, rp, rv 22 18 #ifndef CONFIG_DEBUG_CLPS711X_UART2 23 - add \rx, \rx, #0x0000 @ UART1 19 + mov \rp, #0x0000 @ UART1 24 20 #else 25 - add \rx, \rx, #0x1000 @ UART2 21 + mov \rp, #0x1000 @ UART2 26 22 #endif 23 + orr \rv, \rp, #CLPS7111_VIRT_BASE 24 + orr \rp, \rp, #CLPS7111_PHYS_BASE 27 25 .endm 28 26 29 27 .macro senduart,rd,rx
+4 -6
arch/arm/mach-cns3xxx/include/mach/debug-macro.S
··· 10 10 * published by the Free Software Foundation. 11 11 */ 12 12 13 - .macro addruart,rx 14 - mrc p15, 0, \rx, c1, c0 15 - tst \rx, #1 @ MMU enabled? 16 - moveq \rx, #0x10000000 17 - movne \rx, #0xf0000000 @ virtual base 18 - orr \rx, \rx, #0x00009000 13 + .macro addruart,rp,rv 14 + mov \rp, #0x00009000 15 + orr \rv, \rp, #0xf0000000 @ virtual base 16 + orr \rp, \rp, #0x10000000 19 17 .endm 20 18 21 19 #include <asm/hardware/debug-pl01x.S>
+25 -21
arch/arm/mach-davinci/include/mach/debug-macro.S
··· 29 29 davinci_uart_virt: .word 0 30 30 .popsection 31 31 32 - .macro addruart, rx, tmp 32 + .macro addruart, rp, rv 33 33 34 34 /* Use davinci_uart_phys/virt if already configured */ 35 - 10: mrc p15, 0, \rx, c1, c0 36 - tst \rx, #1 @ MMU enabled? 37 - ldreq \rx, =__virt_to_phys(davinci_uart_phys) 38 - ldrne \rx, =davinci_uart_virt 39 - ldr \rx, [\rx] 40 - cmp \rx, #0 @ is port configured? 35 + 10: mrc p15, 0, \rp, c1, c0 36 + tst \rp, #1 @ MMU enabled? 37 + ldreq \rp, =__virt_to_phys(davinci_uart_phys) 38 + ldrne \rp, =davinci_uart_phys 39 + add \rv, \rp, #4 @ davinci_uart_virt 40 + ldr \rp, [\rp, #0] 41 + ldr \rv, [\rv, #0] 42 + cmp \rp, #0 @ is port configured? 43 + cmpne \rv, #0 41 44 bne 99f @ already configured 42 45 43 - mrc p15, 0, \rx, c1, c0 44 - tst \rx, #1 @ MMU enabled? 46 + /* Check the debug UART address set in uncompress.h */ 47 + mrc p15, 0, \rp, c1, c0 48 + tst \rp, #1 @ MMU enabled? 45 49 46 50 /* Copy uart phys address from decompressor uart info */ 47 - ldreq \tmp, =__virt_to_phys(davinci_uart_phys) 48 - ldrne \tmp, =davinci_uart_phys 49 - ldreq \rx, =DAVINCI_UART_INFO 50 - ldrne \rx, =__phys_to_virt(DAVINCI_UART_INFO) 51 - ldr \rx, [\rx, #0] 52 - str \rx, [\tmp] 51 + ldreq \rv, =__virt_to_phys(davinci_uart_phys) 52 + ldrne \rv, =davinci_uart_phys 53 + ldreq \rp, =DAVINCI_UART_INFO 54 + ldrne \rp, =__phys_to_virt(DAVINCI_UART_INFO) 55 + ldr \rp, [\rp, #0] 56 + str \rp, [\rv] 53 57 54 58 /* Copy uart virt address from decompressor uart info */ 55 - ldreq \tmp, =__virt_to_phys(davinci_uart_virt) 56 - ldrne \tmp, =davinci_uart_virt 57 - ldreq \rx, =DAVINCI_UART_INFO 58 - ldrne \rx, =__phys_to_virt(DAVINCI_UART_INFO) 59 - ldr \rx, [\rx, #4] 60 - str \rx, [\tmp] 59 + ldreq \rv, =__virt_to_phys(davinci_uart_virt) 60 + ldrne \rv, =davinci_uart_virt 61 + ldreq \rp, =DAVINCI_UART_INFO 62 + ldrne \rp, =__phys_to_virt(DAVINCI_UART_INFO) 63 + ldr \rp, [\rp, #4] 64 + str \rp, [\rv] 61 65 62 66 b 10b 63 67 99:
+5 -6
arch/arm/mach-dove/include/mach/debug-macro.S
··· 8 8 9 9 #include <mach/bridge-regs.h> 10 10 11 - .macro addruart, rx, tmp 12 - mrc p15, 0, \rx, c1, c0 13 - tst \rx, #1 @ MMU enabled? 14 - ldreq \rx, =DOVE_SB_REGS_PHYS_BASE 15 - ldrne \rx, =DOVE_SB_REGS_VIRT_BASE 16 - orr \rx, \rx, #0x00012000 11 + .macro addruart, rp, rv 12 + ldr \rp, =DOVE_SB_REGS_PHYS_BASE 13 + ldr \rv, =DOVE_SB_REGS_VIRT_BASE 14 + orr \rp, \rp, #0x00012000 15 + orr \rv, \rv, #0x00012000 17 16 .endm 18 17 19 18 #define UART_SHIFT 2
+4 -3
arch/arm/mach-ebsa110/include/mach/debug-macro.S
··· 11 11 * 12 12 **/ 13 13 14 - .macro addruart, rx, tmp 15 - mov \rx, #0xf0000000 16 - orr \rx, \rx, #0x00000be0 14 + .macro addruart, rp, rv 15 + mov \rp, #0xf0000000 16 + orr \rp, \rp, #0x00000be0 17 + mov \rp, \rv 17 18 .endm 18 19 19 20 #define UART_SHIFT 2
+5 -6
arch/arm/mach-ep93xx/include/mach/debug-macro.S
··· 11 11 */ 12 12 #include <mach/ep93xx-regs.h> 13 13 14 - .macro addruart, rx, tmp 15 - mrc p15, 0, \rx, c1, c0 16 - tst \rx, #1 @ MMU enabled? 17 - ldreq \rx, =EP93XX_APB_PHYS_BASE @ Physical base 18 - ldrne \rx, =EP93XX_APB_VIRT_BASE @ virtual base 19 - orr \rx, \rx, #0x000c0000 14 + .macro addruart, rp, rv 15 + ldr \rp, =EP93XX_APB_PHYS_BASE @ Physical base 16 + ldr \rv, =EP93XX_APB_VIRT_BASE @ virtual base 17 + orr \rp, \rp, #0x000c0000 18 + orr \rv, \rv, #0x000c0000 20 19 .endm 21 20 22 21 #include <asm/hardware/debug-pl01x.S>
+10 -12
arch/arm/mach-footbridge/include/mach/debug-macro.S
··· 15 15 16 16 #ifndef CONFIG_DEBUG_DC21285_PORT 17 17 /* For NetWinder debugging */ 18 - .macro addruart, rx, tmp 19 - mrc p15, 0, \rx, c1, c0 20 - tst \rx, #1 @ MMU enabled? 21 - moveq \rx, #0x7c000000 @ physical 22 - movne \rx, #0xff000000 @ virtual 23 - orr \rx, \rx, #0x000003f8 18 + .macro addruart, rp, rv 19 + mov \rp, #0x000003f8 20 + orr \rv, \rp, #0x7c000000 @ physical 21 + orr \rp, \rp, #0xff000000 @ virtual 24 22 .endm 25 23 26 24 #define UART_SHIFT 0 ··· 30 32 .equ dc21285_high, ARMCSR_BASE & 0xff000000 31 33 .equ dc21285_low, ARMCSR_BASE & 0x00ffffff 32 34 33 - .macro addruart, rx, tmp 34 - mrc p15, 0, \rx, c1, c0 35 - tst \rx, #1 @ MMU enabled? 36 - moveq \rx, #0x42000000 37 - movne \rx, #dc21285_high 35 + .macro addruart, rp, rv 38 36 .if dc21285_low 39 - orrne \rx, \rx, #dc21285_low 37 + mov \rp, #dc21285_low 38 + .else 39 + mov \rp, #0 40 40 .endif 41 + orr \rv, \rp, #0x42000000 42 + orr \rp, \rp, #dc21285_high 41 43 .endm 42 44 43 45 .macro senduart,rd,rx
+3 -5
arch/arm/mach-gemini/include/mach/debug-macro.S
··· 11 11 */ 12 12 #include <mach/hardware.h> 13 13 14 - .macro addruart, rx, tmp 15 - mrc p15, 0, \rx, c1, c0 16 - tst \rx, #1 @ MMU enabled? 17 - ldreq \rx, =GEMINI_UART_BASE @ physical 18 - ldrne \rx, =IO_ADDRESS(GEMINI_UART_BASE) @ virtual 14 + .macro addruart, rp, rv 15 + ldr \rp, =GEMINI_UART_BASE @ physical 16 + ldr \rv, =IO_ADDRESS(GEMINI_UART_BASE) @ virtual 19 17 .endm 20 18 21 19 #define UART_SHIFT 2
+4 -6
arch/arm/mach-h720x/include/mach/debug-macro.S
··· 16 16 .equ io_virt, IO_VIRT 17 17 .equ io_phys, IO_PHYS 18 18 19 - .macro addruart, rx, tmp 20 - mrc p15, 0, \rx, c1, c0 21 - tst \rx, #1 @ MMU enabled? 22 - moveq \rx, #io_phys @ physical base address 23 - movne \rx, #io_virt @ virtual address 24 - add \rx, \rx, #0x00020000 @ UART1 19 + .macro addruart, rp, rv 20 + mov \rp, #0x00020000 @ UART1 21 + add \rv, \rp, #io_virt @ virtual address 22 + add \rp, \rp, #io_phys @ physical base address 25 23 .endm 26 24 27 25 .macro senduart,rd,rx
+4 -6
arch/arm/mach-integrator/include/mach/debug-macro.S
··· 11 11 * 12 12 */ 13 13 14 - .macro addruart, rx, tmp 15 - mrc p15, 0, \rx, c1, c0 16 - tst \rx, #1 @ MMU enabled? 17 - moveq \rx, #0x16000000 @ physical base address 18 - movne \rx, #0xf0000000 @ virtual base 19 - addne \rx, \rx, #0x16000000 >> 4 14 + .macro addruart, rp, rv 15 + mov \rp, #0x16000000 @ physical base address 16 + mov \rv, #0xf0000000 @ virtual base 17 + add \rv, \rv, #0x16000000 >> 4 20 18 .endm 21 19 22 20 #include <asm/hardware/debug-pl01x.S>
+7 -9
arch/arm/mach-iop13xx/include/mach/debug-macro.S
··· 11 11 * published by the Free Software Foundation. 12 12 */ 13 13 14 - .macro addruart, rx, tmp 15 - mrc p15, 0, \rx, c1, c0 16 - tst \rx, #1 @ mmu enabled? 17 - moveq \rx, #0xff000000 @ physical 18 - orreq \rx, \rx, #0x00d80000 19 - movne \rx, #0xfe000000 @ virtual 20 - orrne \rx, \rx, #0x00e80000 21 - orr \rx, \rx, #0x00002300 22 - orr \rx, \rx, #0x00000040 14 + .macro addruart, rp, rv 15 + mov \rp, #0x00002300 16 + orr \rp, \rp, #0x00000040 17 + orr \rv, \rp, #0xfe000000 @ virtual 18 + orr \rv, \rv, #0x00e80000 19 + orr \rp, \rp, #0xff000000 @ physical 20 + orr \rp, \rp, #0x00d80000 23 21 .endm 24 22 25 23 #define UART_SHIFT 2
+4 -3
arch/arm/mach-iop32x/include/mach/debug-macro.S
··· 11 11 * published by the Free Software Foundation. 12 12 */ 13 13 14 - .macro addruart, rx, tmp 15 - mov \rx, #0xfe000000 @ physical as well as virtual 16 - orr \rx, \rx, #0x00800000 @ location of the UART 14 + .macro addruart, rp, rv 15 + mov \rp, #0xfe000000 @ physical as well as virtual 16 + orr \rp, \rp, #0x00800000 @ location of the UART 17 + mov \rv, \rp 17 18 .endm 18 19 19 20 #define UART_SHIFT 0
+5 -7
arch/arm/mach-iop33x/include/mach/debug-macro.S
··· 11 11 * published by the Free Software Foundation. 12 12 */ 13 13 14 - .macro addruart, rx, tmp 15 - mrc p15, 0, \rx, c1, c0 16 - tst \rx, #1 @ mmu enabled? 17 - moveq \rx, #0xff000000 @ physical 18 - movne \rx, #0xfe000000 @ virtual 19 - orr \rx, \rx, #0x00ff0000 20 - orr \rx, \rx, #0x0000f700 14 + .macro addruart, rp, rv 15 + mov \rp, #0x00ff0000 16 + orr \rp, \rp, #0x0000f700 17 + orr \rv, #0xfe000000 @ virtual 18 + orr \rp, #0xff000000 @ physical 21 19 .endm 22 20 23 21 #define UART_SHIFT 2
+6 -8
arch/arm/mach-ixp2000/include/mach/debug-macro.S
··· 11 11 * 12 12 */ 13 13 14 - .macro addruart, rx, tmp 15 - mrc p15, 0, \rx, c1, c0 16 - tst \rx, #1 @ MMU enabled? 17 - moveq \rx, #0xc0000000 @ Physical base 18 - movne \rx, #0xfe000000 @ virtual base 19 - orrne \rx, \rx, #0x00f00000 20 - orr \rx, \rx, #0x00030000 14 + .macro addruart, rp, rv 15 + mov \rp, #0x00030000 21 16 #ifdef __ARMEB__ 22 - orr \rx, \rx, #0x00000003 17 + orr \rp, \rp, #0x00000003 23 18 #endif 19 + orr \rv, \rp, #0xfe000000 @ virtual base 20 + orr \rv, \rv, #0x00f00000 21 + orr \rp, \rp, #0xc0000000 @ Physical base 24 22 .endm 25 23 26 24 #define UART_SHIFT 2
+5 -6
arch/arm/mach-ixp23xx/include/mach/debug-macro.S
··· 12 12 */ 13 13 #include <mach/ixp23xx.h> 14 14 15 - .macro addruart, rx, tmp 16 - mrc p15, 0, \rx, c1, c0 17 - tst \rx, #1 @ mmu enabled? 18 - ldreq \rx, =IXP23XX_PERIPHERAL_PHYS @ physical 19 - ldrne \rx, =IXP23XX_PERIPHERAL_VIRT @ virtual 15 + .macro addruart, rp, rv 16 + ldr \rp, =IXP23XX_PERIPHERAL_PHYS @ physical 17 + ldr \rv, =IXP23XX_PERIPHERAL_VIRT @ virtual 20 18 #ifdef __ARMEB__ 21 - orr \rx, \rx, #0x00000003 19 + orr \rp, \rp, #0x00000003 20 + orr \rv, \rv, #0x00000003 22 21 #endif 23 22 .endm 24 23
+8 -8
arch/arm/mach-ixp4xx/include/mach/debug-macro.S
··· 10 10 * published by the Free Software Foundation. 11 11 */ 12 12 13 - .macro addruart, rx, tmp 14 - mrc p15, 0, \rx, c1, c0 15 - tst \rx, #1 @ MMU enabled? 16 - moveq \rx, #0xc8000000 17 - movne \rx, #0xff000000 18 - orrne \rx, \rx, #0x00b00000 13 + .macro addruart, rp, rv 19 14 #ifdef __ARMEB__ 20 - add \rx,\rx,#3 @ Uart regs are at off set of 3 if 21 - @ byte writes used - Big Endian. 15 + mov \rp, #3 @ Uart regs are at off set of 3 if 16 + @ byte writes used - Big Endian. 17 + #else 18 + mov \rp, #0 22 19 #endif 20 + orr \rv, \rp, #0xff000000 @ virtual 21 + orr \rv, \rv, #0x00b00000 22 + orr \rp, \rp, #0xc8000000 @ physical 23 23 .endm 24 24 25 25 #define UART_SHIFT 2
+5 -6
arch/arm/mach-kirkwood/include/mach/debug-macro.S
··· 8 8 9 9 #include <mach/bridge-regs.h> 10 10 11 - .macro addruart, rx, tmp 12 - mrc p15, 0, \rx, c1, c0 13 - tst \rx, #1 @ MMU enabled? 14 - ldreq \rx, =KIRKWOOD_REGS_PHYS_BASE 15 - ldrne \rx, =KIRKWOOD_REGS_VIRT_BASE 16 - orr \rx, \rx, #0x00012000 11 + .macro addruart, rp, rv 12 + ldr \rp, =KIRKWOOD_REGS_PHYS_BASE 13 + ldr \rv, =KIRKWOOD_REGS_VIRT_BASE 14 + orr \rp, \rp, #0x00012000 15 + orr \rv, \rv, #0x00012000 17 16 .endm 18 17 19 18 #define UART_SHIFT 2
+3 -5
arch/arm/mach-ks8695/include/mach/debug-macro.S
··· 14 14 #include <mach/hardware.h> 15 15 #include <mach/regs-uart.h> 16 16 17 - .macro addruart, rx, tmp 18 - mrc p15, 0, \rx, c1, c0 19 - tst \rx, #1 @ MMU enabled? 20 - ldreq \rx, =KS8695_UART_PA @ physical base address 21 - ldrne \rx, =KS8695_UART_VA @ virtual base address 17 + .macro addruart, rp, rv 18 + ldr \rp, =KS8695_UART_PA @ physical base address 19 + ldr \rv, =KS8695_UART_VA @ virtual base address 22 20 .endm 23 21 24 22 .macro senduart, rd, rx
+38
arch/arm/mach-l7200/include/mach/debug-macro.S
··· 1 + /* arch/arm/mach-l7200/include/mach/debug-macro.S 2 + * 3 + * Debugging macro include header 4 + * 5 + * Copyright (C) 1994-1999 Russell King 6 + * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks 7 + * 8 + * This program is free software; you can redistribute it and/or modify 9 + * it under the terms of the GNU General Public License version 2 as 10 + * published by the Free Software Foundation. 11 + * 12 + */ 13 + 14 + .equ io_virt, IO_BASE 15 + .equ io_phys, IO_START 16 + 17 + .macro addruart, rp, rv 18 + mov \rp, #0x00044000 @ UART1 19 + @ mov \rp, #0x00045000 @ UART2 20 + add \rv, \rp, #io_virt @ virtual address 21 + add \rp, \rp, #io_phys @ physical base address 22 + .endm 23 + 24 + .macro senduart,rd,rx 25 + str \rd, [\rx, #0x0] @ UARTDR 26 + .endm 27 + 28 + .macro waituart,rd,rx 29 + 1001: ldr \rd, [\rx, #0x18] @ UARTFLG 30 + tst \rd, #1 << 5 @ UARTFLGUTXFF - 1 when full 31 + bne 1001b 32 + .endm 33 + 34 + .macro busyuart,rd,rx 35 + 1001: ldr \rd, [\rx, #0x18] @ UARTFLG 36 + tst \rd, #1 << 3 @ UARTFLGUBUSY - 1 when busy 37 + bne 1001b 38 + .endm
+4 -6
arch/arm/mach-lh7a40x/include/mach/debug-macro.S
··· 14 14 @ It is not known if this will be appropriate for every 40x 15 15 @ board. 16 16 17 - .macro addruart, rx, tmp 18 - mrc p15, 0, \rx, c1, c0 19 - tst \rx, #1 @ MMU enabled? 20 - mov \rx, #0x00000700 @ offset from base 21 - orreq \rx, \rx, #0x80000000 @ physical base 22 - orrne \rx, \rx, #0xf8000000 @ virtual base 17 + .macro addruart, rp, rv 18 + mov \rp, #0x00000700 @ offset from base 19 + orr \rv, \rp, #0xf8000000 @ virtual base 20 + orr \rp, \rp, #0x80000000 @ physical base 23 21 .endm 24 22 25 23 .macro senduart,rd,rx
+5 -6
arch/arm/mach-loki/include/mach/debug-macro.S
··· 8 8 9 9 #include <mach/loki.h> 10 10 11 - .macro addruart, rx, tmp 12 - mrc p15, 0, \rx, c1, c0 13 - tst \rx, #1 @ MMU enabled? 14 - ldreq \rx, =LOKI_REGS_PHYS_BASE 15 - ldrne \rx, =LOKI_REGS_VIRT_BASE 16 - orr \rx, \rx, #0x00012000 11 + .macro addruart, rp, rv 12 + ldr \rp, =LOKI_REGS_PHYS_BASE 13 + ldr \rv, =LOKI_REGS_VIRT_BASE 14 + orr \rp, \rp, #0x00012000 15 + orr \rv, \rv, #0x00012000 17 16 .endm 18 17 19 18 #define UART_SHIFT 2
+3 -5
arch/arm/mach-lpc32xx/include/mach/debug-macro.S
··· 20 20 * Debug output is hardcoded to standard UART 5 21 21 */ 22 22 23 - .macro addruart,rx, tmp 24 - mrc p15, 0, \rx, c1, c0 25 - tst \rx, #1 @ MMU enabled? 26 - ldreq \rx, =0x40090000 27 - ldrne \rx, =0xF4090000 23 + .macro addruart, rp, rv 24 + ldreq \rp, =0x40090000 25 + ldrne \rv, =0xF4090000 28 26 .endm 29 27 30 28 #define UART_SHIFT 2
+5 -6
arch/arm/mach-mmp/include/mach/debug-macro.S
··· 11 11 12 12 #include <mach/addr-map.h> 13 13 14 - .macro addruart, rx, tmp 15 - mrc p15, 0, \rx, c1, c0 16 - tst \rx, #1 @ MMU enabled? 17 - ldreq \rx, =APB_PHYS_BASE @ physical 18 - ldrne \rx, =APB_VIRT_BASE @ virtual 19 - orr \rx, \rx, #0x00017000 14 + .macro addruart, rp, rv 15 + ldr \rp, =APB_PHYS_BASE @ physical 16 + ldr \rv, =APB_VIRT_BASE @ virtual 17 + orr \rp, \rp, #0x00017000 18 + orr \rv, \rv, #0x00017000 20 19 .endm 21 20 22 21 #define UART_SHIFT 2
+4 -16
arch/arm/mach-msm/include/mach/debug-macro.S
··· 20 20 #include <mach/msm_iomap.h> 21 21 22 22 #ifdef CONFIG_HAS_MSM_DEBUG_UART_PHYS 23 - .macro addruart, rx, tmp 24 - @ see if the MMU is enabled and select appropriate base address 25 - mrc p15, 0, \rx, c1, c0 26 - tst \rx, #1 27 - ldreq \rx, =MSM_DEBUG_UART_PHYS 28 - ldrne \rx, =MSM_DEBUG_UART_BASE 23 + .macro addruart, rp, rv 24 + ldr \rp, =MSM_DEBUG_UART_PHYS 25 + ldr \rv, =MSM_DEBUG_UART_BASE 29 26 .endm 30 27 31 28 .macro senduart,rd,rx ··· 36 39 tst \rd, #0x04 37 40 beq 1001b 38 41 .endm 39 - #else 40 - .macro addruart, rx, tmp 41 - .endm 42 - 43 - .macro senduart,rd,rx 44 - .endm 45 - 46 - .macro waituart,rd,rx 47 - .endm 48 - #endif 49 42 50 43 .macro busyuart,rd,rx 51 44 .endm 45 + #endif
+5 -6
arch/arm/mach-mv78xx0/include/mach/debug-macro.S
··· 8 8 9 9 #include <mach/mv78xx0.h> 10 10 11 - .macro addruart, rx, tmp 12 - mrc p15, 0, \rx, c1, c0 13 - tst \rx, #1 @ MMU enabled? 14 - ldreq \rx, =MV78XX0_REGS_PHYS_BASE 15 - ldrne \rx, =MV78XX0_REGS_VIRT_BASE 16 - orr \rx, \rx, #0x00012000 11 + .macro addruart, rp, rv 12 + ldr \rp, =MV78XX0_REGS_PHYS_BASE 13 + ldr \rv, =MV78XX0_REGS_VIRT_BASE 14 + orr \rp, \rp, #0x00012000 15 + orr \rv, \rv, #0x00012000 17 16 .endm 18 17 19 18 #define UART_SHIFT 2
+4 -6
arch/arm/mach-netx/include/mach/debug-macro.S
··· 13 13 14 14 #include "hardware.h" 15 15 16 - .macro addruart, rx, tmp 17 - mrc p15, 0, \rx, c1, c0 18 - tst \rx, #1 @ MMU enabled? 19 - moveq \rx, #0x00100000 @ physical 20 - movne \rx, #io_p2v(0x00100000) @ virtual 21 - orr \rx, \rx, #0x00000a00 16 + .macro addruart, rp, rv 17 + mov \rp, #0x00000a00 18 + orr \rv, \rp, #io_p2v(0x00100000) @ virtual 19 + orr \rp, \rp, #0x00100000 @ physical 22 20 .endm 23 21 24 22 .macro senduart,rd,rx
+5 -7
arch/arm/mach-nomadik/include/mach/debug-macro.S
··· 10 10 * 11 11 */ 12 12 13 - .macro addruart, rx, tmp 14 - mrc p15, 0, \rx, c1, c0 15 - tst \rx, #1 @ MMU enabled? 16 - moveq \rx, #0x10000000 @ physical base address 17 - movne \rx, #0xf0000000 @ virtual base 18 - add \rx, \rx, #0x00100000 19 - add \rx, \rx, #0x000fb000 13 + .macro addruart, rp, rv 14 + mov \rp, #0x00100000 15 + add \rp, \rp, #0x000fb000 16 + add \rv, \rp, #0xf0000000 @ virtual base 17 + add \rp, \rp, #0x10000000 @ physical base address 20 18 .endm 21 19 22 20 #include <asm/hardware/debug-pl01x.S>
+3 -5
arch/arm/mach-ns9xxx/include/mach/debug-macro.S
··· 12 12 13 13 #include <mach/regs-board-a9m9750dev.h> 14 14 15 - .macro addruart, rx, tmp 16 - mrc p15, 0, \rx, c1, c0 17 - tst \rx, #1 18 - ldreq \rx, =NS9XXX_CSxSTAT_PHYS(0) 19 - ldrne \rx, =io_p2v(NS9XXX_CSxSTAT_PHYS(0)) 15 + .macro addruart, rp, rv 16 + ldr \rp, =NS9XXX_CSxSTAT_PHYS(0) 17 + ldr \rv, =io_p2v(NS9XXX_CSxSTAT_PHYS(0)) 20 18 .endm 21 19 22 20 #define UART_SHIFT 2
+35 -33
arch/arm/mach-omap1/include/mach/debug-macro.S
··· 28 28 * the desired UART phys and virt addresses temporarily into 29 29 * the omap_uart_phys and omap_uart_virt above. 30 30 */ 31 - .macro addruart, rx, tmp 31 + .macro addruart, rp, rv 32 32 33 33 /* Use omap_uart_phys/virt if already configured */ 34 - 9: mrc p15, 0, \rx, c1, c0 35 - tst \rx, #1 @ MMU enabled? 36 - ldreq \rx, =__virt_to_phys(omap_uart_phys) @ physical base address 37 - ldrne \rx, =omap_uart_virt @ virtual base 38 - ldr \rx, [\rx, #0] 39 - cmp \rx, #0 @ is port configured? 34 + 9: mrc p15, 0, \rp, c1, c0 35 + tst \rp, #1 @ MMU enabled? 36 + ldreq \rp, =__virt_to_phys(omap_uart_phys) @ MMU not enabled 37 + ldrne \rp, =omap_uart_phys @ MMU enabled 38 + add \rv, \rp, #4 @ omap_uart_virt 39 + ldr \rp, [\rp, #0] 40 + ldr \rv, [\rv, #0] 41 + cmp \rp, #0 @ is port configured? 42 + cmpne \rv, #0 40 43 bne 99f @ already configured 41 44 42 45 /* Check the debug UART configuration set in uncompress.h */ 43 - mrc p15, 0, \rx, c1, c0 44 - tst \rx, #1 @ MMU enabled? 45 - ldreq \rx, =OMAP_UART_INFO 46 - ldrne \rx, =__phys_to_virt(OMAP_UART_INFO) 47 - ldr \rx, [\rx, #0] 46 + mrc p15, 0, \rp, c1, c0 47 + tst \rp, #1 @ MMU enabled? 48 + ldreq \rp, =OMAP_UART_INFO @ MMU not enabled 49 + ldrne \rp, =__phys_to_virt(OMAP_UART_INFO) @ MMU enabled 50 + ldr \rp, [\rp, #0] 48 51 49 52 /* Select the UART to use based on the UART1 scratchpad value */ 50 - 10: cmp \rx, #0 @ no port configured? 53 + 10: cmp \rp, #0 @ no port configured? 51 54 beq 11f @ if none, try to use UART1 52 - cmp \rx, #OMAP1UART1 55 + cmp \rp, #OMAP1UART1 53 56 beq 11f @ configure OMAP1UART1 54 - cmp \rx, #OMAP1UART2 57 + cmp \rp, #OMAP1UART2 55 58 beq 12f @ configure OMAP1UART2 56 - cmp \rx, #OMAP1UART3 59 + cmp \rp, #OMAP1UART3 57 60 beq 13f @ configure OMAP2UART3 58 61 59 62 /* Configure the UART offset from the phys/virt base */ 60 - 11: mov \rx, #0x00fb0000 @ OMAP1UART1 63 + 11: mov \rp, #0x00fb0000 @ OMAP1UART1 61 64 b 98f 62 - 12: mov \rx, #0x00fb0000 @ OMAP1UART1 63 - orr \rx, \rx, #0x00000800 @ OMAP1UART2 65 + 12: mov \rp, #0x00fb0000 @ OMAP1UART1 66 + orr \rp, \rp, #0x00000800 @ OMAP1UART2 64 67 b 98f 65 - 13: mov \rx, #0x00fb0000 @ OMAP1UART1 66 - orr \rx, \rx, #0x00000800 @ OMAP1UART2 67 - orr \rx, \rx, #0x00009000 @ OMAP1UART3 68 + 13: mov \rp, #0x00fb0000 @ OMAP1UART1 69 + orr \rp, \rp, #0x00000800 @ OMAP1UART2 70 + orr \rp, \rp, #0x00009000 @ OMAP1UART3 68 71 69 72 /* Store both phys and virt address for the uart */ 70 - 98: add \rx, \rx, #0xff000000 @ phys base 71 - mrc p15, 0, \tmp, c1, c0 72 - tst \tmp, #1 @ MMU enabled? 73 - ldreq \tmp, =__virt_to_phys(omap_uart_phys) 74 - ldrne \tmp, =omap_uart_phys 75 - str \rx, [\tmp, #0] 76 - sub \rx, \rx, #0xff000000 @ phys base 77 - add \rx, \rx, #0xfe000000 @ virt base 78 - ldreq \tmp, =__virt_to_phys(omap_uart_virt) 79 - ldrne \tmp, =omap_uart_virt 80 - str \rx, [\tmp, #0] 73 + 98: add \rp, \rp, #0xff000000 @ phys base 74 + mrc p15, 0, \rv, c1, c0 75 + tst \rv, #1 @ MMU enabled? 76 + ldreq \rv, =__virt_to_phys(omap_uart_phys) @ MMU not enabled 77 + ldrne \rv, =omap_uart_phys @ MMU enabled 78 + str \rp, [\rv, #0] 79 + sub \rp, \rp, #0xff000000 @ phys base 80 + add \rp, \rp, #0xfe000000 @ virt base 81 + add \rv, \rv, #4 @ omap_uart_lsr 82 + str \rp, [\rv, #0] 81 83 b 9b 82 84 99: 83 85 .endm
+63 -64
arch/arm/mach-omap2/include/mach/debug-macro.S
··· 31 31 * the desired UART phys and virt addresses temporarily into 32 32 * the omap_uart_phys and omap_uart_virt above. 33 33 */ 34 - .macro addruart, rx, tmp 34 + .macro addruart, rp, rv 35 35 36 36 /* Use omap_uart_phys/virt if already configured */ 37 - 10: mrc p15, 0, \rx, c1, c0 38 - tst \rx, #1 @ MMU enabled? 39 - ldreq \rx, =__virt_to_phys(omap_uart_phys) @ physical base address 40 - ldrne \rx, =omap_uart_virt @ virtual base address 41 - ldr \rx, [\rx, #0] 42 - cmp \rx, #0 @ is port configured? 37 + 10: mrc p15, 0, \rp, c1, c0 38 + tst \rp, #1 @ MMU enabled? 39 + ldreq \rp, =__virt_to_phys(omap_uart_phys) @ MMU not enabled 40 + ldrne \rp, =omap_uart_phys @ MMU enabled 41 + add \rv, \rp, #4 @ omap_uart_virt 42 + ldr \rp, [\rp, #0] 43 + ldr \rv, [\rv, #0] 44 + cmp \rp, #0 @ is port configured? 45 + cmpne \rv, #0 43 46 bne 99f @ already configured 44 47 45 48 /* Check the debug UART configuration set in uncompress.h */ 46 - mrc p15, 0, \rx, c1, c0 47 - tst \rx, #1 @ MMU enabled? 48 - ldreq \rx, =OMAP_UART_INFO 49 - ldrne \rx, =__phys_to_virt(OMAP_UART_INFO) 50 - ldr \rx, [\rx, #0] 49 + mrc p15, 0, \rp, c1, c0 50 + tst \rp, #1 @ MMU enabled? 51 + ldreq \rp, =OMAP_UART_INFO @ MMU not enabled 52 + ldrne \rp, =__phys_to_virt(OMAP_UART_INFO) @ MMU enabled 53 + ldr \rp, [\rp, #0] 51 54 52 55 /* Select the UART to use based on the UART1 scratchpad value */ 53 - cmp \rx, #0 @ no port configured? 56 + cmp \rp, #0 @ no port configured? 54 57 beq 21f @ if none, try to use UART1 55 - cmp \rx, #OMAP2UART1 @ OMAP2/3/4UART1 58 + cmp \rp, #OMAP2UART1 @ OMAP2/3/4UART1 56 59 beq 21f @ configure OMAP2/3/4UART1 57 - cmp \rx, #OMAP2UART2 @ OMAP2/3/4UART2 60 + cmp \rp, #OMAP2UART2 @ OMAP2/3/4UART2 58 61 beq 22f @ configure OMAP2/3/4UART2 59 - cmp \rx, #OMAP2UART3 @ only on 24xx 62 + cmp \rp, #OMAP2UART3 @ only on 24xx 60 63 beq 23f @ configure OMAP2UART3 61 - cmp \rx, #OMAP3UART3 @ only on 34xx 64 + cmp \rp, #OMAP3UART3 @ only on 34xx 62 65 beq 33f @ configure OMAP3UART3 63 - cmp \rx, #OMAP4UART3 @ only on 44xx 66 + cmp \rp, #OMAP4UART3 @ only on 44xx 64 67 beq 43f @ configure OMAP4UART3 65 - cmp \rx, #OMAP3UART4 @ only on 36xx 68 + cmp \rp, #OMAP3UART4 @ only on 36xx 66 69 beq 34f @ configure OMAP3UART4 67 - cmp \rx, #OMAP4UART4 @ only on 44xx 70 + cmp \rp, #OMAP4UART4 @ only on 44xx 68 71 beq 44f @ configure OMAP4UART4 69 - cmp \rx, #ZOOM_UART @ only on zoom2/3 72 + cmp \rp, #ZOOM_UART @ only on zoom2/3 70 73 beq 95f @ configure ZOOM_UART 71 74 72 75 /* Configure the UART offset from the phys/virt base */ 73 - 21: mov \rx, #UART_OFFSET(OMAP2_UART1_BASE) @ omap2/3/4 76 + 21: mov \rp, #UART_OFFSET(OMAP2_UART1_BASE) @ omap2/3/4 74 77 b 98f 75 - 22: mov \rx, #UART_OFFSET(OMAP2_UART2_BASE) @ omap2/3/4 78 + 22: mov \rp, #UART_OFFSET(OMAP2_UART2_BASE) @ omap2/3/4 76 79 b 98f 77 - 23: mov \rx, #UART_OFFSET(OMAP2_UART3_BASE) 80 + 23: mov \rp, #UART_OFFSET(OMAP2_UART3_BASE) 78 81 b 98f 79 - 33: mov \rx, #UART_OFFSET(OMAP3_UART1_BASE) 80 - add \rx, \rx, #0x00fb0000 81 - add \rx, \rx, #0x00006000 @ OMAP3_UART3_BASE 82 + 33: mov \rp, #UART_OFFSET(OMAP3_UART1_BASE) 83 + add \rp, \rp, #0x00fb0000 84 + add \rp, \rp, #0x00006000 @ OMAP3_UART3_BASE 82 85 b 98f 83 - 34: mov \rx, #UART_OFFSET(OMAP3_UART1_BASE) 84 - add \rx, \rx, #0x00fb0000 85 - add \rx, \rx, #0x00028000 @ OMAP3_UART4_BASE 86 + 34: mov \rp, #UART_OFFSET(OMAP3_UART1_BASE) 87 + add \rp, \rp, #0x00fb0000 88 + add \rp, \rp, #0x00028000 @ OMAP3_UART4_BASE 86 89 b 98f 87 - 43: mov \rx, #UART_OFFSET(OMAP4_UART3_BASE) 90 + 43: mov \rp, #UART_OFFSET(OMAP4_UART3_BASE) 88 91 b 98f 89 - 44: mov \rx, #UART_OFFSET(OMAP4_UART4_BASE) 92 + 44: mov \rp, #UART_OFFSET(OMAP4_UART4_BASE) 90 93 b 98f 91 - 95: ldr \rx, =ZOOM_UART_BASE 92 - mrc p15, 0, \tmp, c1, c0 93 - tst \tmp, #1 @ MMU enabled? 94 - ldreq \tmp, =__virt_to_phys(omap_uart_phys) 95 - ldrne \tmp, =omap_uart_phys 96 - str \rx, [\tmp, #0] 97 - ldr \rx, =ZOOM_UART_VIRT 98 - ldreq \tmp, =__virt_to_phys(omap_uart_virt) 99 - ldrne \tmp, =omap_uart_virt 100 - str \rx, [\tmp, #0] 101 - mov \rx, #(UART_LSR << ZOOM_PORT_SHIFT) 102 - ldreq \tmp, =__virt_to_phys(omap_uart_lsr) 103 - ldrne \tmp, =omap_uart_lsr 104 - str \rx, [\tmp, #0] 94 + 95: ldr \rp, =ZOOM_UART_BASE 95 + mrc p15, 0, \rv, c1, c0 96 + tst \rv, #1 @ MMU enabled? 97 + ldreq \rv, =__virt_to_phys(omap_uart_phys) @ MMU not enabled 98 + ldrne \rv, =omap_uart_phys @ MMU enabled 99 + str \rp, [\rv, #0] 100 + ldr \rp, =ZOOM_UART_VIRT 101 + add \rv, \rv, #4 @ omap_uart_virt 102 + str \rp, [\rv, #0] 103 + mov \rp, #(UART_LSR << ZOOM_PORT_SHIFT) 104 + add \rv, \rv, #4 @ omap_uart_lsr 105 + str \rp, [\rv, #0] 105 106 b 10b 106 107 107 108 /* Store both phys and virt address for the uart */ 108 - 98: add \rx, \rx, #0x48000000 @ phys base 109 - mrc p15, 0, \tmp, c1, c0 110 - tst \tmp, #1 @ MMU enabled? 111 - ldreq \tmp, =__virt_to_phys(omap_uart_phys) 112 - ldrne \tmp, =omap_uart_phys 113 - str \rx, [\tmp, #0] 114 - sub \rx, \rx, #0x48000000 @ phys base 115 - add \rx, \rx, #0xfa000000 @ virt base 116 - ldreq \tmp, =__virt_to_phys(omap_uart_virt) 117 - ldrne \tmp, =omap_uart_virt 118 - str \rx, [\tmp, #0] 119 - mov \rx, #(UART_LSR << OMAP_PORT_SHIFT) 120 - ldreq \tmp, =__virt_to_phys(omap_uart_lsr) 121 - ldrne \tmp, =omap_uart_lsr 122 - str \rx, [\tmp, #0] 109 + 98: add \rp, \rp, #0x48000000 @ phys base 110 + mrc p15, 0, \rv, c1, c0 111 + tst \rv, #1 @ MMU enabled? 112 + ldreq \rv, =__virt_to_phys(omap_uart_phys) @ MMU not enabled 113 + ldrne \rv, =omap_uart_phys @ MMU enabled 114 + str \rp, [\rv, #0] 115 + sub \rp, \rp, #0x48000000 @ phys base 116 + add \rp, \rp, #0xfa000000 @ virt base 117 + add \rv, \rv, #4 @ omap_uart_virt 118 + str \rp, [\rv, #0] 119 + mov \rp, #(UART_LSR << OMAP_PORT_SHIFT) 120 + add \rv, \rv, #4 @ omap_uart_lsr 121 + str \rp, [\rv, #0] 123 122 124 123 b 10b 125 124 99: ··· 130 131 131 132 .macro busyuart,rd,rx 132 133 1001: mrc p15, 0, \rd, c1, c0 133 - tst \rd, #1 @ MMU enabled? 134 - ldreq \rd, =__virt_to_phys(omap_uart_lsr) 135 - ldrne \rd, =omap_uart_lsr 134 + tst \rd, #1 @ MMU enabled? 135 + ldreq \rd, =__virt_to_phys(omap_uart_lsr) @ MMU not enabled 136 + ldrne \rd, =omap_uart_lsr @ MMU enabled 136 137 ldr \rd, [\rd, #0] 137 138 ldrb \rd, [\rx, \rd] 138 139 and \rd, \rd, #(UART_LSR_TEMT | UART_LSR_THRE)
+5 -6
arch/arm/mach-orion5x/include/mach/debug-macro.S
··· 10 10 11 11 #include <mach/orion5x.h> 12 12 13 - .macro addruart, rx, tmp 14 - mrc p15, 0, \rx, c1, c0 15 - tst \rx, #1 @ MMU enabled? 16 - ldreq \rx, =ORION5X_REGS_PHYS_BASE 17 - ldrne \rx, =ORION5X_REGS_VIRT_BASE 18 - orr \rx, \rx, #0x00012000 13 + .macro addruart, rp, rv 14 + ldr \rp, =ORION5X_REGS_PHYS_BASE 15 + ldr \rv, =ORION5X_REGS_VIRT_BASE 16 + orr \rp, \rp, #0x00012000 17 + orr \rv, \rv, #0x00012000 19 18 .endm 20 19 21 20 #define UART_SHIFT 2
+4 -6
arch/arm/mach-pnx4008/include/mach/debug-macro.S
··· 11 11 * 12 12 */ 13 13 14 - .macro addruart, rx, tmp 15 - mrc p15, 0, \rx, c1, c0 16 - tst \rx, #1 @ MMU enabled? 17 - mov \rx, #0x00090000 18 - addeq \rx, \rx, #0x40000000 19 - addne \rx, \rx, #0xf4000000 14 + .macro addruart, rp, rv 15 + mov \rp, #0x00090000 16 + add \rv, \rp, #0xf4000000 @ virtual 17 + add \rp, \rp, #0x40000000 @ physical 20 18 .endm 21 19 22 20 #define UART_SHIFT 2
+4 -6
arch/arm/mach-pxa/include/mach/debug-macro.S
··· 13 13 14 14 #include "hardware.h" 15 15 16 - .macro addruart, rx, tmp 17 - mrc p15, 0, \rx, c1, c0 18 - tst \rx, #1 @ MMU enabled? 19 - moveq \rx, #0x40000000 @ physical 20 - movne \rx, #io_p2v(0x40000000) @ virtual 21 - orr \rx, \rx, #0x00100000 16 + .macro addruart, rp, rv 17 + mov \rp, #0x00100000 18 + orr \rv, \rp, #io_p2v(0x40000000) @ virtual 19 + orr \rp, \rp, #0x40000000 @ physical 22 20 .endm 23 21 24 22 #define UART_SHIFT 2
+4 -6
arch/arm/mach-realview/include/mach/debug-macro.S
··· 33 33 #error "Unknown RealView platform" 34 34 #endif 35 35 36 - .macro addruart, rx, tmp 37 - mrc p15, 0, \rx, c1, c0 38 - tst \rx, #1 @ MMU enabled? 39 - moveq \rx, #0x10000000 40 - movne \rx, #0xfb000000 @ virtual base 41 - orr \rx, \rx, #DEBUG_LL_UART_OFFSET 36 + .macro addruart, rp, rv 37 + mov \rp, #DEBUG_LL_UART_OFFSET 38 + orr \rv, \rp, #0xfb000000 @ virtual base 39 + orr \rp, \rp, #0x10000000 @ physical base 42 40 .endm 43 41 44 42 #include <asm/hardware/debug-pl01x.S>
+5 -7
arch/arm/mach-rpc/include/mach/debug-macro.S
··· 11 11 * 12 12 */ 13 13 14 - .macro addruart, rx, tmp 15 - mrc p15, 0, \rx, c1, c0 16 - tst \rx, #1 @ MMU enabled? 17 - moveq \rx, #0x03000000 18 - movne \rx, #0xe0000000 19 - orr \rx, \rx, #0x00010000 20 - orr \rx, \rx, #0x00000fe0 14 + .macro addruart, rp, rv 15 + mov \rp, #0x00010000 16 + orr \rp, \rp, #0x00000fe0 17 + orr \rv, \rp, #0xe0000000 @ virtual 18 + orr \rp, \rp, #0x03000000 @ physical 21 19 .endm 22 20 23 21 #define UART_SHIFT 2
+5 -6
arch/arm/mach-s3c2410/include/mach/debug-macro.S
··· 19 19 #define S3C2410_UART1_OFF (0x4000) 20 20 #define SHIFT_2440TXF (14-9) 21 21 22 - .macro addruart, rx, tmp 23 - mrc p15, 0, \rx, c1, c0 24 - tst \rx, #1 25 - ldreq \rx, = S3C24XX_PA_UART 26 - ldrne \rx, = S3C24XX_VA_UART 22 + .macro addruart, rp, rv 23 + ldr \rp, = S3C24XX_PA_UART 24 + ldr \rv, = S3C24XX_VA_UART 27 25 #if CONFIG_DEBUG_S3C_UART != 0 28 - add \rx, \rx, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART) 26 + add \rp, \rp, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART) 27 + add \rv, \rv, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART) 29 28 #endif 30 29 .endm 31 30
+5 -6
arch/arm/mach-s3c24a0/include/mach/debug-macro.S
··· 10 10 #include <mach/map.h> 11 11 #include <plat/regs-serial.h> 12 12 13 - .macro addruart, rx, tmp 14 - mrc p15, 0, \rx, c1, c0 15 - tst \rx, #1 16 - ldreq \rx, = S3C24XX_PA_UART 17 - ldrne \rx, = S3C24XX_VA_UART 13 + .macro addruart, rp, rv 14 + ldr \rp, = S3C24XX_PA_UART 15 + ldr \rv, = S3C24XX_VA_UART 18 16 #if CONFIG_DEBUG_S3C_UART != 0 19 - add \rx, \rx, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART) 17 + add \rp, \rp, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART) 18 + add \rv, \rv, #(S3C2410_UART1_OFF * CONFIG_DEBUG_S3C_UART) 20 19 #endif 21 20 .endm 22 21
+5 -6
arch/arm/mach-s3c64xx/include/mach/debug-macro.S
··· 21 21 * aligned and add in the offset when we load the value here. 22 22 */ 23 23 24 - .macro addruart, rx, rtmp 25 - mrc p15, 0, \rx, c1, c0 26 - tst \rx, #1 27 - ldreq \rx, = S3C_PA_UART 28 - ldrne \rx, = (S3C_VA_UART + S3C_PA_UART & 0xfffff) 24 + .macro addruart, rp, rv 25 + ldr \rp, = S3C_PA_UART 26 + ldr \rv, = (S3C_VA_UART + S3C_PA_UART & 0xfffff) 29 27 #if CONFIG_DEBUG_S3C_UART != 0 30 - add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) 28 + add \rp, \rp, #(0x400 * CONFIG_DEBUG_S3C_UART) 29 + add \rv, \rv, #(0x400 * CONFIG_DEBUG_S3C_UART) 31 30 #endif 32 31 .endm 33 32
+5 -6
arch/arm/mach-s5p6442/include/mach/debug-macro.S
··· 15 15 #include <mach/map.h> 16 16 #include <plat/regs-serial.h> 17 17 18 - .macro addruart, rx, rtmp 19 - mrc p15, 0, \rx, c1, c0 20 - tst \rx, #1 21 - ldreq \rx, = S3C_PA_UART 22 - ldrne \rx, = S3C_VA_UART 18 + .macro addruart, rp, rv 19 + ldr \rp, = S3C_PA_UART 20 + ldr \rv, = S3C_VA_UART 23 21 #if CONFIG_DEBUG_S3C_UART != 0 24 - add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) 22 + add \rp, \rp, #(0x400 * CONFIG_DEBUG_S3C_UART) 23 + add \rv, \rv, #(0x400 * CONFIG_DEBUG_S3C_UART) 25 24 #endif 26 25 .endm 27 26
+5 -6
arch/arm/mach-s5pc100/include/mach/debug-macro.S
··· 22 22 * aligned and add in the offset when we load the value here. 23 23 */ 24 24 25 - .macro addruart, rx, rtmp 26 - mrc p15, 0, \rx, c1, c0 27 - tst \rx, #1 28 - ldreq \rx, = S3C_PA_UART 29 - ldrne \rx, = S3C_VA_UART 25 + .macro addruart, rp, rv 26 + ldr \rp, = S3C_PA_UART 27 + ldr \rv, = S3C_VA_UART 30 28 #if CONFIG_DEBUG_S3C_UART != 0 31 - add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) 29 + add \rp, \rp, #(0x400 * CONFIG_DEBUG_S3C_UART) 30 + add \rv, \rv, #(0x400 * CONFIG_DEBUG_S3C_UART) 32 31 #endif 33 32 .endm 34 33
+5 -6
arch/arm/mach-s5pv210/include/mach/debug-macro.S
··· 21 21 * aligned and add in the offset when we load the value here. 22 22 */ 23 23 24 - .macro addruart, rx, tmp 25 - mrc p15, 0, \rx, c1, c0 26 - tst \rx, #1 27 - ldreq \rx, = S3C_PA_UART 28 - ldrne \rx, = S3C_VA_UART 24 + .macro addruart, rp, rv 25 + ldr \rp, = S3C_PA_UART 26 + ldr \rv, = S3C_VA_UART 29 27 #if CONFIG_DEBUG_S3C_UART != 0 30 - add \rx, \rx, #(0x400 * CONFIG_DEBUG_S3C_UART) 28 + add \rp, \rp, #(0x400 * CONFIG_DEBUG_S3C_UART) 29 + add \rv, \rv, #(0x400 * CONFIG_DEBUG_S3C_UART) 31 30 #endif 32 31 .endm 33 32
+5 -6
arch/arm/mach-s5pv310/include/mach/debug-macro.S
··· 20 20 * aligned and add in the offset when we load the value here. 21 21 */ 22 22 23 - .macro addruart, rx, tmp 24 - mrc p15, 0, \rx, c1, c0 25 - tst \rx, #1 26 - ldreq \rx, = S3C_PA_UART 27 - ldrne \rx, = S3C_VA_UART 23 + .macro addruart, rp, rv 24 + ldreq \rp, = S3C_PA_UART 25 + ldrne \rv, = S3C_VA_UART 28 26 #if CONFIG_DEBUG_S3C_UART != 0 29 - add \rx, \rx, #(0x10000 * CONFIG_DEBUG_S3C_UART) 27 + add \rp, \rp, #(0x10000 * CONFIG_DEBUG_S3C_UART) 28 + add \rv, \rv, #(0x10000 * CONFIG_DEBUG_S3C_UART) 30 29 #endif 31 30 .endm 32 31
+20 -16
arch/arm/mach-sa1100/include/mach/debug-macro.S
··· 12 12 */ 13 13 #include <mach/hardware.h> 14 14 15 - .macro addruart, rx, tmp 16 - mrc p15, 0, \rx, c1, c0 17 - tst \rx, #1 @ MMU enabled? 18 - moveq \rx, #0x80000000 @ physical base address 19 - movne \rx, #0xf8000000 @ virtual address 15 + .macro addruart, rp, rv 16 + mrc p15, 0, \rp, c1, c0 17 + tst \rp, #1 @ MMU enabled? 18 + moveq \rp, #0x80000000 @ physical base address 19 + movne \rp, #0xf8000000 @ virtual address 20 20 21 21 @ We probe for the active serial port here, coherently with 22 22 @ the comment in arch/arm/mach-sa1100/include/mach/uncompress.h. 23 23 @ We assume r1 can be clobbered. 24 24 25 25 @ see if Ser3 is active 26 - add \rx, \rx, #0x00050000 27 - ldr r1, [\rx, #UTCR3] 28 - tst r1, #UTCR3_TXE 26 + add \rp, \rp, #0x00050000 27 + ldr \rv, [\rp, #UTCR3] 28 + tst \rv, #UTCR3_TXE 29 29 30 30 @ if Ser3 is inactive, then try Ser1 31 - addeq \rx, \rx, #(0x00010000 - 0x00050000) 32 - ldreq r1, [\rx, #UTCR3] 33 - tsteq r1, #UTCR3_TXE 31 + addeq \rp, \rp, #(0x00010000 - 0x00050000) 32 + ldreq \rv, [\rp, #UTCR3] 33 + tsteq \rv, #UTCR3_TXE 34 34 35 35 @ if Ser1 is inactive, then try Ser2 36 - addeq \rx, \rx, #(0x00030000 - 0x00010000) 37 - ldreq r1, [\rx, #UTCR3] 38 - tsteq r1, #UTCR3_TXE 36 + addeq \rp, \rp, #(0x00030000 - 0x00010000) 37 + ldreq \rv, [\rp, #UTCR3] 38 + tsteq \rv, #UTCR3_TXE 39 39 40 - @ if all ports are inactive, then there is nothing we can do 41 - moveq pc, lr 40 + @ clear top bits, and generate both phys and virt addresses 41 + lsl \rp, \rp, #8 42 + lsr \rp, \rp, #8 43 + orr \rv, \rp, #0xf8000000 @ virtual 44 + orr \rp, \rp, #0x80000000 @ physical 45 + 42 46 .endm 43 47 44 48 .macro senduart,rd,rx
+4 -3
arch/arm/mach-shark/include/mach/debug-macro.S
··· 11 11 * 12 12 */ 13 13 14 - .macro addruart, rx, tmp 15 - mov \rx, #0xe0000000 16 - orr \rx, \rx, #0x000003f8 14 + .macro addruart, rp, rv 15 + mov \rp, #0xe0000000 16 + orr \rp, \rp, #0x000003f8 17 + mov \rv, \rp 17 18 .endm 18 19 19 20 .macro senduart,rd,rx
+15 -11
arch/arm/mach-tegra/include/mach/debug-macro.S
··· 20 20 21 21 #include <mach/io.h> 22 22 23 - .macro addruart,rx, tmp 24 - mrc p15, 0, \rx, c1, c0 25 - tst \rx, #1 @ MMU enabled? 26 - ldreq \rx, =IO_APB_PHYS @ physical 27 - ldrne \rx, =IO_APB_VIRT @ virtual 23 + .macro addruart, rp, rv 24 + ldreq \rp, =IO_APB_PHYS @ physical 25 + ldrne \rv, =IO_APB_VIRT @ virtual 28 26 #if defined(CONFIG_TEGRA_DEBUG_UART_NONE) 29 27 #error "A debug UART must be selected in the kernel config to use DEBUG_LL" 30 28 #elif defined(CONFIG_TEGRA_DEBUG_UARTA) 31 - orr \rx, \rx, #0x6000 29 + orr \rp, \rp, #0x6000 30 + orr \rv, \rv, #0x6000 32 31 #elif defined(CONFIG_TEGRA_DEBUG_UARTB) 33 - ldr \tmp, =0x6040 34 - orr \rx, \rx, \tmp 32 + orr \rp, \rp, #0x6000 33 + orr \rp, \rp, #0x40 34 + orr \rv, \rv, #0x6000 35 + orr \rv, \rv, #0x40 35 36 #elif defined(CONFIG_TEGRA_DEBUG_UARTC) 36 - orr \rx, \rx, #0x6200 37 + orr \rp, \rp, #0x6200 38 + orr \rv, \rv, #0x6200 37 39 #elif defined(CONFIG_TEGRA_DEBUG_UARTD) 38 - orr \rx, \rx, #0x6300 40 + orr \rp, \rp, #0x6300 41 + orr \rv, \rv, #0x6300 39 42 #elif defined(CONFIG_TEGRA_DEBUG_UARTE) 40 - orr \rx, \rx, #0x6400 43 + orr \rp, \rp, #0x6400 44 + orr \rv, \rv, #0x6400 41 45 #endif 42 46 .endm 43 47
+5 -6
arch/arm/mach-u300/include/mach/debug-macro.S
··· 10 10 */ 11 11 #include <mach/hardware.h> 12 12 13 - .macro addruart, rx, tmp 13 + .macro addruart, rp, rv 14 14 /* If we move the address using MMU, use this. */ 15 - mrc p15, 0, \rx, c1, c0 16 - tst \rx, #1 @ MMU enabled? 17 - ldreq \rx, = U300_SLOW_PER_PHYS_BASE @ MMU off, physical address 18 - ldrne \rx, = U300_SLOW_PER_VIRT_BASE @ MMU on, virtual address 19 - orr \rx, \rx, #0x00003000 15 + ldr \rp, = U300_SLOW_PER_PHYS_BASE @ MMU off, physical address 16 + ldr \rv, = U300_SLOW_PER_VIRT_BASE @ MMU on, virtual address 17 + orr \rp, \rp, #0x00003000 18 + orr \rv, \rv, #0x00003000 20 19 .endm 21 20 22 21 #include <asm/hardware/debug-pl01x.S>
+3 -5
arch/arm/mach-ux500/include/mach/debug-macro.S
··· 18 18 #define UX500_UART(n) __UX500_UART(n) 19 19 #define UART_BASE UX500_UART(CONFIG_UX500_DEBUG_UART) 20 20 21 - .macro addruart, rx, tmp 22 - mrc p15, 0, \rx, c1, c0 23 - tst \rx, #1 @ MMU enabled? 24 - ldreq \rx, =UART_BASE @ no, physical address 25 - ldrne \rx, =IO_ADDRESS(UART_BASE) @ yes, virtual address 21 + .macro addruart, rp, rv 22 + ldr \rp, =UART_BASE @ no, physical address 23 + ldr \rv, =IO_ADDRESS(UART_BASE) @ yes, virtual address 26 24 .endm 27 25 28 26 #include <asm/hardware/debug-pl01x.S>
+5 -7
arch/arm/mach-versatile/include/mach/debug-macro.S
··· 11 11 * 12 12 */ 13 13 14 - .macro addruart, rx, tmp 15 - mrc p15, 0, \rx, c1, c0 16 - tst \rx, #1 @ MMU enabled? 17 - moveq \rx, #0x10000000 18 - movne \rx, #0xf1000000 @ virtual base 19 - orr \rx, \rx, #0x001F0000 20 - orr \rx, \rx, #0x00001000 14 + .macro addruart, rp, rv 15 + mov \rp, #0x001F0000 16 + orr \rp, \rp, #0x00001000 17 + orr \rv, \rp, #0xf1000000 @ virtual base 18 + orr \rp, \rp, #0x10000000 @ physical base 21 19 .endm 22 20 23 21 #include <asm/hardware/debug-pl01x.S>
+4 -6
arch/arm/mach-vexpress/include/mach/debug-macro.S
··· 12 12 13 13 #define DEBUG_LL_UART_OFFSET 0x00009000 14 14 15 - .macro addruart,rx,tmp 16 - mrc p15, 0, \rx, c1, c0 17 - tst \rx, #1 @ MMU enabled? 18 - moveq \rx, #0x10000000 19 - movne \rx, #0xf8000000 @ virtual base 20 - orr \rx, \rx, #DEBUG_LL_UART_OFFSET 15 + .macro addruart,rp,rv 16 + mov \rp, #DEBUG_LL_UART_OFFSET 17 + orr \rv, \rp, #0xf8000000 @ virtual base 18 + orr \rp, \rp, #0x10000000 @ physical base 21 19 .endm 22 20 23 21 #include <asm/hardware/debug-pl01x.S>
+3 -5
arch/arm/plat-mxc/include/mach/debug-macro.S
··· 62 62 #define UART_PADDR MXC91231_UART2_BASE_ADDR 63 63 #define UART_VADDR MXC91231_IO_ADDRESS(MXC91231_UART2_BASE_ADDR) 64 64 #endif 65 - .macro addruart, rx, tmp 66 - mrc p15, 0, \rx, c1, c0 67 - tst \rx, #1 @ MMU enabled? 68 - ldreq \rx, =UART_PADDR @ physical 69 - ldrne \rx, =UART_VADDR @ virtual 65 + .macro addruart, rp, rv 66 + ldr \rp, =UART_PADDR @ physical 67 + ldr \rv, =UART_VADDR @ virtual 70 68 .endm 71 69 72 70 .macro senduart,rd,rx
+3 -5
arch/arm/plat-spear/include/plat/debug-macro.S
··· 14 14 #include <linux/amba/serial.h> 15 15 #include <mach/spear.h> 16 16 17 - .macro addruart, rx 18 - mrc p15, 0, \rx, c1, c0 19 - tst \rx, #1 @ MMU enabled? 20 - moveq \rx, #SPEAR_DBG_UART_BASE @ Physical base 21 - movne \rx, #VA_SPEAR_DBG_UART_BASE @ Virtual base 17 + .macro addruart, rp, rv 18 + mov \rp, #SPEAR_DBG_UART_BASE @ Physical base 19 + mov \rv, #VA_SPEAR_DBG_UART_BASE @ Virtual base 22 20 .endm 23 21 24 22 .macro senduart, rd, rx
+4 -7
arch/arm/plat-stmp3xxx/include/mach/debug-macro.S
··· 16 16 * http://www.gnu.org/copyleft/gpl.html 17 17 */ 18 18 19 - .macro addruart, rx, tmp 20 - mrc p15, 0, \rx, c1, c0 21 - tst \rx, #1 @ MMU enabled? 22 - moveq \rx, #0x80000000 @ physical base address 23 - addeq \rx, \rx, #0x00070000 24 - movne \rx, #0xf0000000 @ virtual base 25 - addne \rx, \rx, #0x00070000 19 + .macro addruart, rp, rv 20 + mov \rp, #0x00070000 21 + add \rv, \rp, #0xf0000000 @ virtual base 22 + add \rp, \rp, #0x80000000 @ physical base 26 23 .endm 27 24 28 25 .macro senduart,rd,rx
+5 -6
arch/arm/plat-tcc/include/mach/debug-macro.S
··· 9 9 * 10 10 */ 11 11 12 - .macro addruart,rx,tmp 13 - mrc p15, 0, \rx, c1, c0 14 - tst \rx, #1 @ MMU enabled? 15 - moveq \rx, #0x90000000 @ physical base address 16 - movne \rx, #0xF1000000 @ virtual base 17 - orr \rx, \rx, #0x00007000 @ UART0 12 + .macro addruart, rp, rv 13 + moveq \rp, #0x90000000 @ physical base address 14 + movne \rv, #0xF1000000 @ virtual base 15 + orr \rp, \rp, #0x00007000 @ UART0 16 + orr \rv, \rv, #0x00007000 @ UART0 18 17 .endm 19 18 20 19 .macro senduart,rd,rx