Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: dts: rockchip: add veyron-mickey board

Also known as the Asus Chromebit.

Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Tested-by: Caesar Wang <wxt@rock-chips.com>
For the license change:
Acked-by: Brian Norris <briannorris@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

authored by

Chris Zhong and committed by
Heiko Stuebner
0e1410dd 6ea78309

+260
+9
Documentation/devicetree/bindings/arm/rockchip.txt
··· 54 54 "google,veyron-jerry-rev3", "google,veyron-jerry", 55 55 "google,veyron", "rockchip,rk3288"; 56 56 57 + - Google Mickey (Asus Chromebit CS10): 58 + Required root node properties: 59 + - compatible = "google,veyron-mickey-rev8", "google,veyron-mickey-rev7", 60 + "google,veyron-mickey-rev6", "google,veyron-mickey-rev5", 61 + "google,veyron-mickey-rev4", "google,veyron-mickey-rev3", 62 + "google,veyron-mickey-rev2", "google,veyron-mickey-rev1", 63 + "google,veyron-mickey-rev0", "google,veyron-mickey", 64 + "google,veyron", "rockchip,rk3288"; 65 + 57 66 - Google Minnie (Asus Chromebook Flip C100P): 58 67 Required root node properties: 59 68 - compatible = "google,veyron-minnie-rev4", "google,veyron-minnie-rev3",
+1
arch/arm/boot/dts/Makefile
··· 527 527 rk3288-veyron-brain.dtb \ 528 528 rk3288-veyron-jaq.dtb \ 529 529 rk3288-veyron-jerry.dtb \ 530 + rk3288-veyron-mickey.dtb \ 530 531 rk3288-veyron-minnie.dtb \ 531 532 rk3288-veyron-pinky.dtb \ 532 533 rk3288-veyron-speedy.dtb
+250
arch/arm/boot/dts/rk3288-veyron-mickey.dts
··· 1 + /* 2 + * Google Veyron Mickey Rev 0 board device tree source 3 + * 4 + * Copyright 2015 Google, Inc 5 + * 6 + * This file is dual-licensed: you can use it either under the terms 7 + * of the GPL or the X11 license, at your option. Note that this dual 8 + * licensing only applies to this file, and not this project as a 9 + * whole. 10 + * 11 + * a) This file is free software; you can redistribute it and/or 12 + * modify it under the terms of the GNU General Public License as 13 + * published by the Free Software Foundation; either version 2 of the 14 + * License, or (at your option) any later version. 15 + * 16 + * This file is distributed in the hope that it will be useful, 17 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 + * GNU General Public License for more details. 20 + * 21 + * Or, alternatively, 22 + * 23 + * b) Permission is hereby granted, free of charge, to any person 24 + * obtaining a copy of this software and associated documentation 25 + * files (the "Software"), to deal in the Software without 26 + * restriction, including without limitation the rights to use, 27 + * copy, modify, merge, publish, distribute, sublicense, and/or 28 + * sell copies of the Software, and to permit persons to whom the 29 + * Software is furnished to do so, subject to the following 30 + * conditions: 31 + * 32 + * The above copyright notice and this permission notice shall be 33 + * included in all copies or substantial portions of the Software. 34 + * 35 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 36 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 37 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 38 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 39 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 40 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 41 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 42 + * OTHER DEALINGS IN THE SOFTWARE. 43 + */ 44 + 45 + /dts-v1/; 46 + #include "rk3288-veyron.dtsi" 47 + 48 + / { 49 + model = "Google Mickey"; 50 + compatible = "google,veyron-mickey-rev8", "google,veyron-mickey-rev7", 51 + "google,veyron-mickey-rev6", "google,veyron-mickey-rev5", 52 + "google,veyron-mickey-rev4", "google,veyron-mickey-rev3", 53 + "google,veyron-mickey-rev2", "google,veyron-mickey-rev1", 54 + "google,veyron-mickey-rev0", "google,veyron-mickey", 55 + "google,veyron", "rockchip,rk3288"; 56 + 57 + vcc_5v: vcc-5v { 58 + vin-supply = <&vcc33_sys>; 59 + }; 60 + 61 + vcc33_io: vcc33_io { 62 + compatible = "regulator-fixed"; 63 + regulator-name = "vcc33_io"; 64 + regulator-always-on; 65 + regulator-boot-on; 66 + vin-supply = <&vcc33_sys>; 67 + }; 68 + }; 69 + 70 + &cpu_thermal { 71 + /delete-node/ trips; 72 + /delete-node/ cooling-maps; 73 + 74 + trips { 75 + cpu_alert_almost_warm: cpu_alert_almost_warm { 76 + temperature = <63000>; /* millicelsius */ 77 + hysteresis = <2000>; /* millicelsius */ 78 + type = "passive"; 79 + }; 80 + cpu_alert_warm: cpu_alert_warm { 81 + temperature = <65000>; /* millicelsius */ 82 + hysteresis = <2000>; /* millicelsius */ 83 + type = "passive"; 84 + }; 85 + cpu_alert_almost_hot: cpu_alert_almost_hot { 86 + temperature = <80000>; /* millicelsius */ 87 + hysteresis = <2000>; /* millicelsius */ 88 + type = "passive"; 89 + }; 90 + cpu_alert_hot: cpu_alert_hot { 91 + temperature = <82000>; /* millicelsius */ 92 + hysteresis = <2000>; /* millicelsius */ 93 + type = "passive"; 94 + }; 95 + cpu_alert_hotter: cpu_alert_hotter { 96 + temperature = <84000>; /* millicelsius */ 97 + hysteresis = <2000>; /* millicelsius */ 98 + type = "passive"; 99 + }; 100 + cpu_alert_very_hot: cpu_alert_very_hot { 101 + temperature = <85000>; /* millicelsius */ 102 + hysteresis = <2000>; /* millicelsius */ 103 + type = "passive"; 104 + }; 105 + cpu_crit: cpu_crit { 106 + temperature = <90000>; /* millicelsius */ 107 + hysteresis = <2000>; /* millicelsius */ 108 + type = "critical"; 109 + }; 110 + }; 111 + 112 + cooling-maps { 113 + /* 114 + * After 1st level, throttle the CPU down to as low as 1.4 GHz 115 + * and don't let the GPU go faster than 400 MHz. Note that we 116 + * won't throttle the GPU lower than 400 MHz due to CPU 117 + * heat--we'll let the GPU do the rest itself. 118 + */ 119 + cpu_warm_limit_cpu { 120 + trip = <&cpu_alert_warm>; 121 + cooling-device = 122 + <&cpu0 THERMAL_NO_LIMIT 4>; 123 + }; 124 + 125 + /* 126 + * Add some discrete steps to help throttling system deal 127 + * with the fact that there are two passive cooling devices: 128 + * the CPU and the GPU. 129 + * 130 + * - 1.2 GHz - 1.0 GHz (almost hot) 131 + * - 800 MHz (hot) 132 + * - 800 MHz - 696 MHz (hotter) 133 + * - 696 MHz - min (very hot) 134 + * 135 + * Note: 136 + * - 800 MHz appears to be a "sweet spot" for me. I can run 137 + * some pretty serious workload here and be happy. 138 + * - After 696 MHz we stop lowering voltage, so throttling 139 + * past there is less effective. 140 + */ 141 + cpu_almost_hot_limit_cpu { 142 + trip = <&cpu_alert_almost_hot>; 143 + cooling-device = 144 + <&cpu0 5 6>; 145 + }; 146 + cpu_hot_limit_cpu { 147 + trip = <&cpu_alert_hot>; 148 + cooling-device = 149 + <&cpu0 7 7>; 150 + }; 151 + cpu_hotter_limit_cpu { 152 + trip = <&cpu_alert_hotter>; 153 + cooling-device = 154 + <&cpu0 7 8>; 155 + }; 156 + cpu_very_hot_limit_cpu { 157 + trip = <&cpu_alert_very_hot>; 158 + cooling-device = 159 + <&cpu0 8 THERMAL_NO_LIMIT>; 160 + }; 161 + }; 162 + }; 163 + 164 + &emmc { 165 + /delete-property/mmc-hs200-1_8v; 166 + }; 167 + 168 + &i2c2 { 169 + status = "disabled"; 170 + }; 171 + 172 + &i2c4 { 173 + status = "disabled"; 174 + }; 175 + 176 + &i2s { 177 + status = "okay"; 178 + clock-names = "i2s_hclk", "i2s_clk", "i2s_clk_out"; 179 + clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>, <&cru SCLK_I2S0_OUT>; 180 + }; 181 + 182 + &rk808 { 183 + pinctrl-names = "default"; 184 + pinctrl-0 = <&pmic_int_l &dvs_1 &dvs_2>; 185 + dvs-gpios = <&gpio7 12 GPIO_ACTIVE_HIGH>, 186 + <&gpio7 15 GPIO_ACTIVE_HIGH>; 187 + 188 + /delete-property/ vcc6-supply; 189 + /delete-property/ vcc12-supply; 190 + 191 + vcc11-supply = <&vcc33_sys>; 192 + 193 + regulators { 194 + /* vcc33_io is sourced directly from vcc33_sys */ 195 + /delete-node/ LDO_REG1; 196 + /delete-node/ LDO_REG7; 197 + 198 + /* This is not a pwren anymore, but the real power supply */ 199 + vdd10_lcd: LDO_REG7 { 200 + regulator-always-on; 201 + regulator-boot-on; 202 + regulator-min-microvolt = <1000000>; 203 + regulator-max-microvolt = <1000000>; 204 + regulator-name = "vdd10_lcd"; 205 + regulator-suspend-mem-disabled; 206 + }; 207 + 208 + vcc18_lcd: LDO_REG8 { 209 + regulator-always-on; 210 + regulator-boot-on; 211 + regulator-min-microvolt = <1800000>; 212 + regulator-max-microvolt = <1800000>; 213 + regulator-name = "vcc18_lcd"; 214 + regulator-suspend-mem-disabled; 215 + }; 216 + }; 217 + }; 218 + 219 + &pinctrl { 220 + hdmi { 221 + power_hdmi_on: power-hdmi-on { 222 + rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>; 223 + }; 224 + }; 225 + 226 + pmic { 227 + dvs_1: dvs-1 { 228 + rockchip,pins = <7 12 RK_FUNC_GPIO &pcfg_pull_down>; 229 + }; 230 + 231 + dvs_2: dvs-2 { 232 + rockchip,pins = <7 15 RK_FUNC_GPIO &pcfg_pull_down>; 233 + }; 234 + }; 235 + }; 236 + 237 + &usb_host0_ehci { 238 + status = "disabled"; 239 + }; 240 + 241 + &usb_host1 { 242 + status = "disabled"; 243 + }; 244 + 245 + &vcc50_hdmi { 246 + enable-active-high; 247 + gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>; 248 + pinctrl-names = "default"; 249 + pinctrl-0 = <&power_hdmi_on>; 250 + };