Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: 8053/1: kernel: sleep: restore HYP mode configuration in cpu_resume

On CPUs with virtualization extensions the kernel installs HYP mode
configuration on both primary and secondary cpus upon cold boot.

On platforms where CPUs are shutdown in idle paths (ie CPU core gating),
when a CPU resumes from low-power states it currently does not execute
code that reinstalls the HYP configuration, which means that the kernel
cannot run eg KVM properly on such machines.

This patch, mirroring cold-boot behaviour, executes position independent
code that reinstalls HYP configuration and drops to SVC mode safely on
warmboot, so that deep idle states can be enabled in kernel running as
hosts on platforms with power management HW.

Cc: Christoffer Dall <christoffer.dall@linaro.org>
Cc: Dave Martin <dave.martin@arm.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Dave Martin <Dave.Martin@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

authored by

Lorenzo Pieralisi and committed by
Russell King
0e0779da 72e6ae28

+5 -2
+1 -1
arch/arm/include/asm/assembler.h
··· 312 312 * you cannot return to the original mode. 313 313 */ 314 314 .macro safe_svcmode_maskall reg:req 315 - #if __LINUX_ARM_ARCH__ >= 6 315 + #if __LINUX_ARM_ARCH__ >= 6 && !defined(CONFIG_CPU_V7M) 316 316 mrs \reg , cpsr 317 317 eor \reg, \reg, #HYP_MODE 318 318 tst \reg, #MODE_MASK
+4 -1
arch/arm/kernel/sleep.S
··· 127 127 .align 128 128 ENTRY(cpu_resume) 129 129 ARM_BE8(setend be) @ ensure we are in BE mode 130 + #ifdef CONFIG_ARM_VIRT_EXT 131 + bl __hyp_stub_install_secondary 132 + #endif 133 + safe_svcmode_maskall r1 130 134 mov r1, #0 131 135 ALT_SMP(mrc p15, 0, r0, c0, c0, 5) 132 136 ALT_UP_B(1f) ··· 148 144 ldr r0, [r0, #SLEEP_SAVE_SP_PHYS] 149 145 ldr r0, [r0, r1, lsl #2] 150 146 151 - setmode PSR_I_BIT | PSR_F_BIT | SVC_MODE, r1 @ set SVC, irqs off 152 147 @ load phys pgd, stack, resume fn 153 148 ARM( ldmia r0!, {r1, sp, pc} ) 154 149 THUMB( ldmia r0!, {r1, r2, r3} )