Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: dts: nuvoton: Add NPCM7xx RunBMC Olympus Quanta machine

Add Nuvoton NPCM7xx RunBMC Olympus Quanta board device tree.

Signed-off-by: Tomer Maimon <tmaimon77@gmail.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>

authored by

Tomer Maimon and committed by
Joel Stanley
0e0610d2 59f5abe0

+1571 -1
+2 -1
arch/arm/boot/dts/Makefile
··· 339 339 lpc3250-ea3250.dtb \ 340 340 lpc3250-phy3250.dtb 341 341 dtb-$(CONFIG_ARCH_NPCM7XX) += \ 342 + nuvoton-npcm730-gsj.dtb \ 342 343 nuvoton-npcm750-evb.dtb \ 343 - nuvoton-npcm730-gsj.dtb 344 + nuvoton-npcm750-runbmc-olympus.dtb 344 345 dtb-$(CONFIG_MACH_MESON6) += \ 345 346 meson6-atv1200.dtb 346 347 dtb-$(CONFIG_MACH_MESON8) += \
+517
arch/arm/boot/dts/nuvoton-npcm750-runbmc-olympus-pincfg.dtsi
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + // Copyright (c) 2019 Quanta Computer Inc. Samuel.Jiang@quantatw.com 3 + 4 + / { 5 + pinctrl: pinctrl@f0800000 { 6 + gpio0ol_pins: gpio0ol-pins { 7 + pins = "GPIO0/IOX1DI"; 8 + bias-disable; 9 + output-low; 10 + }; 11 + gpio1ol_pins: gpio1ol-pins { 12 + pins = "GPIO1/IOX1LD"; 13 + bias-disable; 14 + output-low; 15 + }; 16 + gpio2ol_pins: gpio2ol-pins { 17 + pins = "GPIO2/IOX1CK"; 18 + bias-disable; 19 + output-low; 20 + }; 21 + gpio3ol_pins: gpio3ol-pins { 22 + pins = "GPIO3/IOX1D0"; 23 + bias-disable; 24 + output-low; 25 + }; 26 + gpio5_pins: gpio5-pins { 27 + pins = "GPIO5/IOX2LD/SMB1DSCL"; 28 + bias-disable; 29 + input-enable; 30 + }; 31 + gpio6_pins: gpio6-pins { 32 + pins = "GPIO6/IOX2CK/SMB2DSDA"; 33 + bias-disable; 34 + input-enable; 35 + }; 36 + gpio7_pins: gpio7-pins { 37 + pins = "GPIO7/IOX2D0/SMB2DSCL"; 38 + bias-disable; 39 + input-enable; 40 + }; 41 + gpio8o_pins: gpio8o-pins { 42 + pins = "GPIO8/LKGPO1"; 43 + bias-disable; 44 + output-high; 45 + }; 46 + gpio9ol_pins: gpio9ol-pins { 47 + pins = "GPIO9/LKGPO2"; 48 + bias-disable; 49 + output-low; 50 + }; 51 + gpio10_pins: gpio10-pins { 52 + pins = "GPIO10/IOXHLD"; 53 + bias-disable; 54 + input-enable; 55 + }; 56 + gpio11_pins: gpio11-pins { 57 + pins = "GPIO11/IOXHCK"; 58 + bias-disable; 59 + input-enable; 60 + }; 61 + gpio12ol_pins: gpio12ol-pins { 62 + pins = "GPIO12/GSPICK/SMB5BSCL"; 63 + bias-disable; 64 + output-low; 65 + }; 66 + gpio13ol_pins: gpio13ol-pins { 67 + pins = "GPIO13/GSPIDO/SMB5BSDA"; 68 + bias-disable; 69 + output-low; 70 + }; 71 + gpio14ol_pins: gpio14ol-pins { 72 + pins = "GPIO14/GSPIDI/SMB5CSCL"; 73 + bias-disable; 74 + output-low; 75 + }; 76 + gpio15ol_pins: gpio15ol-pins { 77 + pins = "GPIO15/GSPICS/SMB5CSDA"; 78 + bias-disable; 79 + output-low; 80 + }; 81 + gpio20_pins: gpio20-pins { 82 + pins = "GPIO20/SMB4CSDA/SMB15SDA"; 83 + bias-disable; 84 + input-enable; 85 + }; 86 + gpio21_pins: gpio21-pins { 87 + pins = "GPIO21/SMB4CSCL/SMB15SCL"; 88 + bias-disable; 89 + input-enable; 90 + }; 91 + gpio22o_pins: gpio22o-pins { 92 + pins = "GPIO22/SMB4DSDA/SMB14SDA"; 93 + bias-disable; 94 + output-high; 95 + }; 96 + gpio23_pins: gpio23-pins { 97 + pins = "GPIO23/SMB4DSCL/SMB14SCL"; 98 + bias-disable; 99 + input-enable; 100 + }; 101 + gpio24_pins: gpio24-pins { 102 + pins = "GPIO24/IOXHDO"; 103 + bias-disable; 104 + input-enable; 105 + }; 106 + gpio25_pins: gpio25-pins { 107 + pins = "GPIO25/IOXHDI"; 108 + bias-disable; 109 + input-enable; 110 + }; 111 + gpio30_pins: gpio30-pins { 112 + pins = "GPIO30/SMB3SDA"; 113 + bias-disable; 114 + input-enable; 115 + }; 116 + gpio31_pins: gpio31-pins { 117 + pins = "GPIO31/SMB3SCL"; 118 + bias-disable; 119 + input-enable; 120 + }; 121 + gpio37o_pins: gpio37o-pins { 122 + pins = "GPIO37/SMB3CSDA"; 123 + bias-disable; 124 + output-high; 125 + }; 126 + gpio38_pins: gpio38-pins { 127 + pins = "GPIO38/SMB3CSCL"; 128 + bias-disable; 129 + input-enable; 130 + }; 131 + gpio39_pins: gpio39-pins { 132 + pins = "GPIO39/SMB3BSDA"; 133 + bias-disable; 134 + input-enable; 135 + }; 136 + gpio40o_pins: gpio40o-pins { 137 + pins = "GPIO40/SMB3BSCL"; 138 + bias-disable; 139 + output-high; 140 + }; 141 + gpio59_pins: gpio59-pins { 142 + pins = "GPIO59/SMB3DSDA"; 143 + bias-disable; 144 + input-enable; 145 + }; 146 + gpio76_pins: gpio76-pins { 147 + pins = "GPIO76/FANIN12"; 148 + bias-disable; 149 + input-enable; 150 + }; 151 + gpio77_pins: gpio77-pins { 152 + pins = "GPIO77/FANIN13"; 153 + bias-disable; 154 + input-enable; 155 + }; 156 + gpio78o_pins: gpio78o-pins { 157 + pins = "GPIO78/FANIN14"; 158 + bias-disable; 159 + output-high; 160 + }; 161 + gpio79_pins: gpio79-pins { 162 + pins = "GPIO79/FANIN15"; 163 + bias-disable; 164 + input-enable; 165 + }; 166 + gpio82_pins: gpio82-pins { 167 + pins = "GPIO82/PWM2"; 168 + bias-disable; 169 + input-enable; 170 + }; 171 + gpio83_pins: gpio83-pins { 172 + pins = "GPIO83/PWM3"; 173 + bias-disable; 174 + input-enable; 175 + }; 176 + gpio84_pins: gpio84-pins { 177 + pins = "GPIO84/R2TXD0"; 178 + bias-disable; 179 + input-enable; 180 + }; 181 + gpio85o_pins: gpio85o-pins { 182 + pins = "GPIO85/R2TXD1"; 183 + bias-disable; 184 + output-high; 185 + }; 186 + gpio86ol_pins: gpio86ol-pins { 187 + pins = "GPIO86/R2TXEN"; 188 + bias-disable; 189 + output-low; 190 + }; 191 + gpio87_pins: gpio87-pins { 192 + pins = "GPIO87/R2RXD0"; 193 + bias-disable; 194 + input-enable; 195 + }; 196 + gpio88_pins: gpio88-pins { 197 + pins = "GPIO88/R2RXD1"; 198 + bias-disable; 199 + input-enable; 200 + }; 201 + gpio89_pins: gpio89-pins { 202 + pins = "GPIO89/R2CRSDV"; 203 + bias-disable; 204 + input-enable; 205 + }; 206 + gpio90_pins: gpio90-pins { 207 + pins = "GPIO90/R2RXERR"; 208 + bias-disable; 209 + input-enable; 210 + }; 211 + gpio93_pins: gpio93-pins { 212 + pins = "GPIO93/GA20/SMB5DSCL"; 213 + bias-disable; 214 + input-enable; 215 + }; 216 + gpio94ol_pins: gpio94ol-pins { 217 + pins = "GPIO94/nKBRST/SMB5DSDA"; 218 + bias-disable; 219 + output-low; 220 + }; 221 + gpio108ol_pins: gpio108ol-pins { 222 + pins = "GPIO108/RG1MDC"; 223 + bias-disable; 224 + output-low; 225 + }; 226 + gpio109ol_pins: gpio109ol-pins { 227 + pins = "GPIO109/RG1MDIO"; 228 + bias-disable; 229 + output-low; 230 + }; 231 + gpio110ol_pins: gpio110ol-pins { 232 + pins = "GPIO110/RG2TXD0/DDRV0"; 233 + bias-disable; 234 + output-low; 235 + }; 236 + gpio111ol_pins: gpio111ol-pins { 237 + pins = "GPIO111/RG2TXD1/DDRV1"; 238 + bias-disable; 239 + output-low; 240 + }; 241 + gpio112ol_pins: gpio112ol-pins { 242 + pins = "GPIO112/RG2TXD2/DDRV2"; 243 + bias-disable; 244 + output-low; 245 + }; 246 + gpio113ol_pins: gpio113ol-pins { 247 + pins = "GPIO113/RG2TXD3/DDRV3"; 248 + bias-disable; 249 + output-low; 250 + }; 251 + gpio114o_pins: gpio114o-pins { 252 + pins = "GPIO114/SMB0SCL"; 253 + bias-disable; 254 + output-high; 255 + }; 256 + gpio115_pins: gpio115-pins { 257 + pins = "GPIO115/SMB0SDA"; 258 + bias-disable; 259 + input-enable; 260 + }; 261 + gpio120_pins: gpio120-pins { 262 + pins = "GPIO120/SMB2CSDA"; 263 + bias-disable; 264 + input-enable; 265 + }; 266 + gpio121_pins: gpio121-pins { 267 + pins = "GPIO121/SMB2CSCL"; 268 + bias-disable; 269 + input-enable; 270 + }; 271 + gpio122_pins: gpio122-pins { 272 + pins = "GPIO122/SMB2BSDA"; 273 + bias-disable; 274 + input-enable; 275 + }; 276 + gpio123_pins: gpio123-pins { 277 + pins = "GPIO123/SMB2BSCL"; 278 + bias-disable; 279 + input-enable; 280 + }; 281 + gpio124_pins: gpio124-pins { 282 + pins = "GPIO124/SMB1CSDA"; 283 + bias-disable; 284 + input-enable; 285 + }; 286 + gpio125_pins: gpio125-pins { 287 + pins = "GPIO125/SMB1CSCL"; 288 + bias-disable; 289 + input-enable; 290 + }; 291 + gpio126_pins: gpio126-pins { 292 + pins = "GPIO126/SMB1BSDA"; 293 + bias-disable; 294 + input-enable; 295 + }; 296 + gpio127o_pins: gpio127o-pins { 297 + pins = "GPIO127/SMB1BSCL"; 298 + bias-disable; 299 + output-high; 300 + }; 301 + gpio136_pins: gpio136-pins { 302 + pins = "GPIO136/SD1DT0"; 303 + bias-disable; 304 + input-enable; 305 + }; 306 + gpio137_pins: gpio137-pins { 307 + pins = "GPIO137/SD1DT1"; 308 + bias-disable; 309 + input-enable; 310 + }; 311 + gpio138_pins: gpio138-pins { 312 + pins = "GPIO138/SD1DT2"; 313 + bias-disable; 314 + input-enable; 315 + }; 316 + gpio139_pins: gpio139-pins { 317 + pins = "GPIO139/SD1DT3"; 318 + bias-disable; 319 + input-enable; 320 + }; 321 + gpio140_pins: gpio140-pins { 322 + pins = "GPIO140/SD1CLK"; 323 + bias-disable; 324 + input-enable; 325 + }; 326 + gpio141_pins: gpio141-pins { 327 + pins = "GPIO141/SD1WP"; 328 + bias-disable; 329 + input-enable; 330 + }; 331 + gpio142_pins: gpio142-pins { 332 + pins = "GPIO142/SD1CMD"; 333 + bias-disable; 334 + input-enable; 335 + }; 336 + gpio143_pins: gpio143-pins { 337 + pins = "GPIO143/SD1CD/SD1PWR"; 338 + bias-disable; 339 + input-enable; 340 + }; 341 + gpio144_pins: gpio144-pins { 342 + pins = "GPIO144/PWM4"; 343 + bias-disable; 344 + input-enable; 345 + }; 346 + gpio145_pins: gpio145-pins { 347 + pins = "GPIO145/PWM5"; 348 + bias-disable; 349 + input-enable; 350 + }; 351 + gpio146_pins: gpio146-pins { 352 + pins = "GPIO146/PWM6"; 353 + bias-disable; 354 + input-enable; 355 + }; 356 + gpio147_pins: gpio147-pins { 357 + pins = "GPIO147/PWM7"; 358 + bias-disable; 359 + input-enable; 360 + }; 361 + gpio153o_pins: gpio153o-pins { 362 + pins = "GPIO153/MMCWP"; 363 + bias-disable; 364 + output-high; 365 + }; 366 + gpio155_pins: gpio155-pins { 367 + pins = "GPIO155/nMMCCD/nMMCRST"; 368 + bias-disable; 369 + input-enable; 370 + }; 371 + gpio160o_pins: gpio160o-pins { 372 + pins = "GPIO160/CLKOUT/RNGOSCOUT"; 373 + bias-disable; 374 + output-high; 375 + }; 376 + gpio169o_pins: gpio169o-pins { 377 + pins = "GPIO169/nSCIPME"; 378 + bias-disable; 379 + output-high; 380 + }; 381 + gpio188o_pins: gpio188o-pins { 382 + pins = "GPIO188/SPI3D2/nSPI3CS2"; 383 + bias-disable; 384 + output-high; 385 + }; 386 + gpio189_pins: gpio189-pins { 387 + pins = "GPIO189/SPI3D3/nSPI3CS3"; 388 + bias-disable; 389 + input-enable; 390 + }; 391 + gpio196_pins: gpio196-pins { 392 + pins = "GPIO196/SMB0CSCL"; 393 + bias-disable; 394 + input-enable; 395 + }; 396 + gpio197_pins: gpio197-pins { 397 + pins = "GPIO197/SMB0DEN"; 398 + bias-disable; 399 + input-enable; 400 + }; 401 + gpio198o_pins: gpio198o-pins { 402 + pins = "GPIO198/SMB0DSDA"; 403 + bias-disable; 404 + output-high; 405 + }; 406 + gpio199o_pins: gpio199o-pins { 407 + pins = "GPIO199/SMB0DSCL"; 408 + bias-disable; 409 + output-high; 410 + }; 411 + gpio200_pins: gpio200-pins { 412 + pins = "GPIO200/R2CK"; 413 + input-enable; 414 + bias-disable; 415 + }; 416 + gpio202_pins: gpio202-pins { 417 + pins = "GPIO202/SMB0CSDA"; 418 + bias-disable; 419 + input-enable; 420 + }; 421 + gpio203o_pins: gpio203o-pins { 422 + pins = "GPIO203/FANIN16"; 423 + bias-disable; 424 + output-high; 425 + }; 426 + gpio208_pins: gpio208-pins { 427 + pins = "GPIO208/RG2TXC/DVCK"; 428 + bias-disable; 429 + input-enable; 430 + }; 431 + gpio209ol_pins: gpio209ol-pins { 432 + pins = "GPIO209/RG2TXCTL/DDRV4"; 433 + bias-disable; 434 + output-low; 435 + }; 436 + gpio210ol_pins: gpio210ol-pins { 437 + pins = "GPIO210/RG2RXD0/DDRV5"; 438 + bias-disable; 439 + output-low; 440 + }; 441 + gpio211ol_pins: gpio211ol-pins { 442 + pins = "GPIO211/RG2RXD1/DDRV6"; 443 + bias-disable; 444 + output-low; 445 + }; 446 + gpio212ol_pins: gpio212ol-pins { 447 + pins = "GPIO212/RG2RXD2/DDRV7"; 448 + bias-disable; 449 + output-low; 450 + }; 451 + gpio213ol_pins: gpio213ol-pins { 452 + pins = "GPIO213/RG2RXD3/DDRV8"; 453 + bias-disable; 454 + output-low; 455 + }; 456 + gpio214ol_pins: gpio214ol-pins { 457 + pins = "GPIO214/RG2RXC/DDRV9"; 458 + bias-disable; 459 + output-low; 460 + }; 461 + gpio215ol_pins: gpio215ol-pins { 462 + pins = "GPIO215/RG2RXCTL/DDRV10"; 463 + bias-disable; 464 + output-low; 465 + }; 466 + gpio216ol_pins: gpio216ol-pins { 467 + pins = "GPIO216/RG2MDC/DDRV11"; 468 + bias-disable; 469 + output-low; 470 + }; 471 + gpio217ol_pins: gpio217ol-pins { 472 + pins = "GPIO217/RG2MDIO/DVHSYNC"; 473 + bias-disable; 474 + output-low; 475 + }; 476 + gpio224_pins: gpio224-pins { 477 + pins = "GPIO224/SPIXCK"; 478 + bias-disable; 479 + input-enable; 480 + }; 481 + gpio225ol_pins: gpio225ol-pins { 482 + pins = "GPO225/SPIXD0/STRAP12"; 483 + bias-disable; 484 + output-low; 485 + }; 486 + gpio226ol_pins: gpio226ol-pins { 487 + pins = "GPO226/SPIXD1/STRAP13"; 488 + bias-disable; 489 + output-low; 490 + }; 491 + gpio227ol_pins: gpio227ol-pins { 492 + pins = "GPIO227/nSPIXCS0"; 493 + bias-disable; 494 + output-low; 495 + }; 496 + gpio228o_pins: gpio228ol-pins { 497 + pins = "GPIO228/nSPIXCS1"; 498 + bias-disable; 499 + output-high; 500 + }; 501 + gpio229o_pins: gpio229o-pins { 502 + pins = "GPO229/SPIXD2/STRAP3"; 503 + bias-disable; 504 + output-high; 505 + }; 506 + gpio230_pins: gpio230-pins { 507 + pins = "GPIO230/SPIXD3"; 508 + bias-disable; 509 + input-enable; 510 + }; 511 + gpio231o_pins: gpio231o-pins { 512 + pins = "GPIO231/nCLKREQ"; 513 + bias-disable; 514 + output-high; 515 + }; 516 + }; 517 + };
+1052
arch/arm/boot/dts/nuvoton-npcm750-runbmc-olympus.dts
··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + // Copyright (c) 2019 Nuvoton Technology <kwliu@nuvoton.com> 3 + // Copyright (c) 2019 Quanta Computer Inc. <Samuel.Jiang@quantatw.com> 4 + 5 + /dts-v1/; 6 + #include "nuvoton-npcm750.dtsi" 7 + #include "nuvoton-npcm750-runbmc-olympus-pincfg.dtsi" 8 + 9 + #include <dt-bindings/i2c/i2c.h> 10 + #include <dt-bindings/gpio/gpio.h> 11 + 12 + / { 13 + model = "Nuvoton npcm750 RunBMC Olympus"; 14 + compatible = "nuvoton,npcm750"; 15 + 16 + aliases { 17 + ethernet1 = &gmac0; 18 + serial0 = &serial0; 19 + serial1 = &serial1; 20 + serial2 = &serial2; 21 + serial3 = &serial3; 22 + i2c0 = &i2c0; 23 + i2c1 = &i2c1; 24 + i2c2 = &i2c2; 25 + i2c3 = &i2c3; 26 + i2c4 = &i2c4; 27 + i2c5 = &i2c5; 28 + i2c6 = &i2c6; 29 + i2c7 = &i2c7; 30 + i2c8 = &i2c8; 31 + i2c9 = &i2c9; 32 + i2c10 = &i2c10; 33 + i2c11 = &i2c11; 34 + i2c12 = &i2c12; 35 + i2c13 = &i2c13; 36 + spi0 = &spi0; 37 + spi1 = &spi1; 38 + fiu0 = &fiu0; 39 + fiu1 = &fiu3; 40 + }; 41 + 42 + chosen { 43 + stdout-path = &serial3; 44 + }; 45 + 46 + memory { 47 + reg = <0 0x40000000>; 48 + }; 49 + 50 + iio-hwmon { 51 + compatible = "iio-hwmon"; 52 + io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, 53 + <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>; 54 + }; 55 + 56 + leds { 57 + compatible = "gpio-leds"; 58 + heartbeat { 59 + label = "heartbeat"; 60 + gpios = <&gpio3 14 1>; 61 + }; 62 + 63 + identify { 64 + label = "identify"; 65 + gpios = <&gpio3 15 1>; 66 + }; 67 + }; 68 + 69 + jtag { 70 + compatible = "nuvoton,npcm750-jtag"; 71 + enable_pspi_jtag = <1>; 72 + pspi-index = <2>; 73 + tck { 74 + label = "tck"; 75 + gpios = <&gpio0 19 0>; /* gpio19 */ 76 + regbase = <0xf0010000 0x1000>; 77 + }; 78 + 79 + tdi { 80 + label = "tdi"; 81 + gpios = <&gpio0 18 0>; /* gpio18 */ 82 + regbase = <0xf0010000 0x1000>; 83 + }; 84 + 85 + tdo { 86 + label = "tdo"; 87 + gpios = <&gpio0 17 0>; /* gpio17 */ 88 + regbase = <0xf0010000 0x1000>; 89 + }; 90 + tms { 91 + label = "tms"; 92 + gpios = <&gpio0 16 0>; /* gpio16 */ 93 + regbase = <0xf0010000 0x1000>; 94 + }; 95 + }; 96 + }; 97 + 98 + &fiu0 { 99 + pinctrl-names = "default"; 100 + pinctrl-0 = <&spi0cs1_pins>; 101 + status = "okay"; 102 + 103 + spi-nor@0 { 104 + compatible = "jedec,spi-nor"; 105 + #address-cells = <1>; 106 + #size-cells = <1>; 107 + reg = <0>; 108 + spi-rx-bus-width = <2>; 109 + 110 + partitions@80000000 { 111 + compatible = "fixed-partitions"; 112 + #address-cells = <1>; 113 + #size-cells = <1>; 114 + bmc@0{ 115 + label = "bmc"; 116 + reg = <0x000000 0x2000000>; 117 + }; 118 + u-boot@0 { 119 + label = "u-boot"; 120 + reg = <0x0000000 0x80000>; 121 + read-only; 122 + }; 123 + u-boot-env@100000{ 124 + label = "u-boot-env"; 125 + reg = <0x00100000 0x40000>; 126 + }; 127 + kernel@200000 { 128 + label = "kernel"; 129 + reg = <0x0200000 0x600000>; 130 + }; 131 + rofs@800000 { 132 + label = "rofs"; 133 + reg = <0x800000 0x1500000>; 134 + }; 135 + rwfs@1d00000 { 136 + label = "rwfs"; 137 + reg = <0x1d00000 0x300000>; 138 + }; 139 + }; 140 + }; 141 + 142 + spi-nor@1 { 143 + compatible = "jedec,spi-nor"; 144 + #address-cells = <1>; 145 + #size-cells = <1>; 146 + reg = <1>; 147 + npcm,fiu-rx-bus-width = <2>; 148 + 149 + partitions@88000000 { 150 + compatible = "fixed-partitions"; 151 + #address-cells = <1>; 152 + #size-cells = <1>; 153 + spare1@0 { 154 + label = "spi0-cs1-spare1"; 155 + reg = <0x0 0x800000>; 156 + }; 157 + spare2@800000 { 158 + label = "spi0-cs1-spare2"; 159 + reg = <0x800000 0x0>; 160 + }; 161 + }; 162 + }; 163 + }; 164 + 165 + &fiu3 { 166 + pinctrl-0 = <&spi3_pins>; 167 + status = "okay"; 168 + 169 + spi-nor@0 { 170 + compatible = "jedec,spi-nor"; 171 + #address-cells = <1>; 172 + #size-cells = <1>; 173 + reg = <0>; 174 + spi-rx-bus-width = <2>; 175 + 176 + partitions@A0000000 { 177 + compatible = "fixed-partitions"; 178 + #address-cells = <1>; 179 + #size-cells = <1>; 180 + system1@0 { 181 + label = "spi3-system1"; 182 + reg = <0x0 0x800000>; 183 + }; 184 + system2@800000 { 185 + label = "spi3-system2"; 186 + reg = <0x800000 0x0>; 187 + }; 188 + }; 189 + }; 190 + }; 191 + 192 + &gcr { 193 + mux-controller { 194 + compatible = "mmio-mux"; 195 + #mux-control-cells = <1>; 196 + 197 + mux-reg-masks = <0x38 0x07>; 198 + idle-states = <6>; 199 + }; 200 + }; 201 + 202 + &gmac0 { 203 + phy-mode = "rgmii-id"; 204 + snps,eee-force-disable; 205 + status = "okay"; 206 + }; 207 + 208 + &i2c1 { 209 + status = "okay"; 210 + 211 + i2c-switch@70 { 212 + compatible = "nxp,pca9548"; 213 + #address-cells = <1>; 214 + #size-cells = <0>; 215 + reg = <0x70>; 216 + i2c-mux-idle-disconnect; 217 + 218 + i2c_slot1a: i2c-bus@0 { 219 + #address-cells = <1>; 220 + #size-cells = <0>; 221 + reg = <0>; 222 + }; 223 + 224 + i2c_slot1b: i2c-bus@1 { 225 + #address-cells = <1>; 226 + #size-cells = <0>; 227 + reg = <1>; 228 + }; 229 + 230 + i2c_slot2a: i2c-bus@2 { 231 + #address-cells = <1>; 232 + #size-cells = <0>; 233 + reg = <2>; 234 + }; 235 + 236 + i2c_slot2b: i2c-bus@3 { 237 + #address-cells = <1>; 238 + #size-cells = <0>; 239 + reg = <3>; 240 + }; 241 + 242 + i2c_slot3: i2c-bus@4 { 243 + #address-cells = <1>; 244 + #size-cells = <0>; 245 + reg = <4>; 246 + }; 247 + 248 + i2c_slot4: i2c-bus@5 { 249 + #address-cells = <1>; 250 + #size-cells = <0>; 251 + reg = <5>; 252 + }; 253 + 254 + i2c_slot5: i2c-bus@6 { 255 + #address-cells = <1>; 256 + #size-cells = <0>; 257 + reg = <6>; 258 + }; 259 + }; 260 + 261 + i2c-switch@71 { 262 + compatible = "nxp,pca9546"; 263 + reg = <0x71>; 264 + #address-cells = <1>; 265 + #size-cells = <0>; 266 + i2c-mux-idle-disconnect; 267 + 268 + i2c_m2_s1: i2c-bus@0 { 269 + #address-cells = <1>; 270 + #size-cells = <0>; 271 + reg = <0>; 272 + }; 273 + 274 + i2c_m2_s2: i2c-bus@1 { 275 + #address-cells = <1>; 276 + #size-cells = <0>; 277 + reg = <1>; 278 + }; 279 + i2c_m2_s3: i2c-bus@2 { 280 + #address-cells = <1>; 281 + #size-cells = <0>; 282 + reg = <2>; 283 + }; 284 + 285 + i2c_m2_s4: i2c-bus@3 { 286 + #address-cells = <1>; 287 + #size-cells = <0>; 288 + reg = <3>; 289 + }; 290 + }; 291 + }; 292 + 293 + &i2c2 { 294 + status = "okay"; 295 + 296 + tmp421@4c { 297 + compatible = "ti,tmp421"; 298 + reg = <0x4c>; 299 + }; 300 + 301 + power-supply@58 { 302 + compatible = "delta,dps800"; 303 + reg = <0x58>; 304 + }; 305 + }; 306 + 307 + &i2c3 { 308 + status = "okay"; 309 + }; 310 + 311 + &i2c4 { 312 + status = "okay"; 313 + 314 + eeprom@54 { 315 + compatible = "atmel,24c64"; 316 + reg = <0x54>; 317 + }; 318 + }; 319 + 320 + &i2c5 { 321 + status = "okay"; 322 + 323 + i2c-slave-mqueue@10 { 324 + compatible = "i2c-slave-mqueue"; 325 + reg = <(I2C_OWN_SLAVE_ADDRESS | 0x10)>; 326 + }; 327 + }; 328 + 329 + &i2c6 { 330 + status = "okay"; 331 + 332 + ina219@40 { 333 + compatible = "ti,ina219"; 334 + reg = <0x40>; 335 + }; 336 + ina219@41 { 337 + compatible = "ti,ina219"; 338 + reg = <0x41>; 339 + }; 340 + ina219@44 { 341 + compatible = "ti,ina219"; 342 + reg = <0x44>; 343 + }; 344 + ina219@45 { 345 + compatible = "ti,ina219"; 346 + reg = <0x45>; 347 + }; 348 + tps53679@60 { 349 + compatible = "ti,tps53679"; 350 + reg = <0x60>; 351 + }; 352 + tps53659@62 { 353 + compatible = "ti,tps53659"; 354 + reg = <0x62>; 355 + }; 356 + tps53659@64 { 357 + compatible = "ti,tps53659"; 358 + reg = <0x64>; 359 + }; 360 + tps53622@67 { 361 + compatible = "ti,tps53622"; 362 + reg = <0x67>; 363 + }; 364 + tps53622@69 { 365 + compatible = "ti,tps53622"; 366 + reg = <0x69>; 367 + }; 368 + tps53679@70 { 369 + compatible = "ti,tps53679"; 370 + reg = <0x70>; 371 + }; 372 + tps53659@72 { 373 + compatible = "ti,tps53659"; 374 + reg = <0x72>; 375 + }; 376 + tps53659@74 { 377 + compatible = "ti,tps53659"; 378 + reg = <0x74>; 379 + }; 380 + tps53622@77 { 381 + compatible = "ti,tps53622"; 382 + reg = <0x77>; 383 + }; 384 + }; 385 + 386 + &i2c7 { 387 + status = "okay"; 388 + 389 + tmp421@4c { 390 + compatible = "ti,tmp421"; 391 + reg = <0x4c>; 392 + }; 393 + }; 394 + 395 + &i2c8 { 396 + status = "okay"; 397 + 398 + adm1278@11 { 399 + compatible = "adm1278"; 400 + reg = <0x11>; 401 + Rsense = <500>; 402 + }; 403 + }; 404 + 405 + &i2c9 { 406 + status = "okay"; 407 + }; 408 + 409 + &i2c10 { 410 + status = "okay"; 411 + 412 + gpio: pca9555@27 { 413 + compatible = "nxp,pca9555"; 414 + reg = <0x27>; 415 + 416 + gpio-controller; 417 + #gpio-cells = <2>; 418 + }; 419 + }; 420 + 421 + &i2c11 { 422 + status = "okay"; 423 + 424 + pca9539_g1a: pca9539-g1a@74 { 425 + compatible = "nxp,pca9539"; 426 + reg = <0x74>; 427 + gpio-controller; 428 + #gpio-cells = <2>; 429 + reset-gpios = <&gpio7 4 GPIO_ACTIVE_LOW>; 430 + G1A_P0_0 { 431 + gpio-hog; 432 + gpios = <0 0>; 433 + output-high; 434 + line-name = "TPM_BMC_ALERT_N"; 435 + }; 436 + G1A_P0_1 { 437 + gpio-hog; 438 + gpios = <1 0>; 439 + input; 440 + line-name = "FM_BIOS_TOP_SWAP"; 441 + }; 442 + G1A_P0_2 { 443 + gpio-hog; 444 + gpios = <2 0>; 445 + input; 446 + line-name = "FM_BIOS_PREFRB2_GOOD"; 447 + }; 448 + G1A_P0_3 { 449 + gpio-hog; 450 + gpios = <3 0>; 451 + input; 452 + line-name = "BMC_SATAXPCIE_0TO3_SEL"; 453 + }; 454 + G1A_P0_4 { 455 + gpio-hog; 456 + gpios = <4 0>; 457 + input; 458 + line-name = "BMC_SATAXPCIE_4TO7_SEL"; 459 + }; 460 + G1A_P0_5 { 461 + gpio-hog; 462 + gpios = <5 0>; 463 + output-low; 464 + line-name = "FM_UV_ADR_TRIGGER_EN_N"; 465 + }; 466 + G1A_P0_6 { 467 + gpio-hog; 468 + gpios = <6 0>; 469 + input; 470 + line-name = "RM_THROTTLE_EN_N"; 471 + }; 472 + G1A_P1_0 { 473 + gpio-hog; 474 + gpios = <8 0>; 475 + input; 476 + line-name = "FM_BMC_TPM_PRES_N"; 477 + }; 478 + G1A_P1_1 { 479 + gpio-hog; 480 + gpios = <9 0>; 481 + input; 482 + line-name = "FM_CPU0_SKTOCC_LVT3_N"; 483 + }; 484 + G1A_P1_2 { 485 + gpio-hog; 486 + gpios = <10 0>; 487 + input; 488 + line-name = "FM_CPU1_SKTOCC_LVT3_N"; 489 + }; 490 + G1A_P1_3 { 491 + gpio-hog; 492 + gpios = <11 0>; 493 + input; 494 + line-name = "PSU1_ALERT_N"; 495 + }; 496 + G1A_P1_4 { 497 + gpio-hog; 498 + gpios = <12 0>; 499 + input; 500 + line-name = "PSU2_ALERT_N"; 501 + }; 502 + G1A_P1_5 { 503 + gpio-hog; 504 + gpios = <13 0>; 505 + input; 506 + line-name = "H_CPU0_FAST_WAKE_LVT3_N"; 507 + }; 508 + G1A_P1_6 { 509 + gpio-hog; 510 + gpios = <14 0>; 511 + output-high; 512 + line-name = "I2C_MUX1_RESET_N"; 513 + }; 514 + G1A_P1_7 { 515 + gpio-hog; 516 + gpios = <15 0>; 517 + input; 518 + line-name = "FM_CPU_CATERR_LVT3_N"; 519 + }; 520 + }; 521 + 522 + pca9539_g1b: pca9539-g1b@75 { 523 + compatible = "nxp,pca9539"; 524 + reg = <0x75>; 525 + gpio-controller; 526 + #gpio-cells = <2>; 527 + G1B_P0_0 { 528 + gpio-hog; 529 + gpios = <0 0>; 530 + input; 531 + line-name = "PVDDQ_ABC_PINALERT_N"; 532 + }; 533 + G1B_P0_1 { 534 + gpio-hog; 535 + gpios = <1 0>; 536 + input; 537 + line-name = "PVDDQ_DEF_PINALERT_N"; 538 + }; 539 + G1B_P0_2 { 540 + gpio-hog; 541 + gpios = <2 0>; 542 + input; 543 + line-name = "PVDDQ_GHJ_PINALERT_N"; 544 + }; 545 + G1B_P0_3 { 546 + gpio-hog; 547 + gpios = <3 0>; 548 + input; 549 + line-name = "PVDDQ_KLM_PINALERT_N"; 550 + }; 551 + G1B_P0_5 { 552 + gpio-hog; 553 + gpios = <5 0>; 554 + input; 555 + line-name = "FM_BOARD_REV_ID0"; 556 + }; 557 + G1B_P0_6 { 558 + gpio-hog; 559 + gpios = <6 0>; 560 + input; 561 + line-name = "FM_BOARD_REV_ID1"; 562 + }; 563 + G1B_P0_7 { 564 + gpio-hog; 565 + gpios = <7 0>; 566 + input; 567 + line-name = "FM_BOARD_REV_ID2"; 568 + }; 569 + G1B_P1_0 { 570 + gpio-hog; 571 + gpios = <8 0>; 572 + input; 573 + line-name = "FM_OC_DETECT_EN_N"; 574 + }; 575 + G1B_P1_1 { 576 + gpio-hog; 577 + gpios = <9 0>; 578 + input; 579 + line-name = "FM_FLASH_DESC_OVERRIDE"; 580 + }; 581 + G1B_P1_2 { 582 + gpio-hog; 583 + gpios = <10 0>; 584 + output-low; 585 + line-name = "FP_PWR_ID_LED_N"; 586 + }; 587 + G1B_P1_3 { 588 + gpio-hog; 589 + gpios = <11 0>; 590 + output-low; 591 + line-name = "BMC_LED_PWR_GRN"; 592 + }; 593 + G1B_P1_4 { 594 + gpio-hog; 595 + gpios = <12 0>; 596 + output-low; 597 + line-name = "BMC_LED_PWR_AMBER"; 598 + }; 599 + G1B_P1_5 { 600 + gpio-hog; 601 + gpios = <13 0>; 602 + output-high; 603 + line-name = "FM_BMC_FAULT_LED_N"; 604 + }; 605 + G1B_P1_6 { 606 + gpio-hog; 607 + gpios = <14 0>; 608 + output-high; 609 + line-name = "FM_CPLD_BMC_PWRDN_N"; 610 + }; 611 + G1B_P1_7 { 612 + gpio-hog; 613 + gpios = <15 0>; 614 + output-high; 615 + line-name = "BMC_LED_CATERR_N"; 616 + }; 617 + }; 618 + }; 619 + 620 + &i2c12 { 621 + status = "okay"; 622 + 623 + pca9539_g2a: pca9539-g2a@74 { 624 + compatible = "nxp,pca9539"; 625 + reg = <0x74>; 626 + gpio-controller; 627 + #gpio-cells = <2>; 628 + reset-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>; 629 + G2A_P0_0 { 630 + gpio-hog; 631 + gpios = <0 0>; 632 + output-high; 633 + line-name = "BMC_PON_RST_REQ_N"; 634 + }; 635 + G2A_P0_1 { 636 + gpio-hog; 637 + gpios = <1 0>; 638 + output-high; 639 + line-name = "BMC_RST_IND_REQ_N"; 640 + }; 641 + G2A_P0_2 { 642 + gpio-hog; 643 + gpios = <2 0>; 644 + input; 645 + line-name = "RST_BMC_RTCRST"; 646 + }; 647 + G2A_P0_3 { 648 + gpio-hog; 649 + gpios = <3 0>; 650 + output-high; 651 + line-name = "FM_BMC_PWRBTN_OUT_N"; 652 + }; 653 + G2A_P0_4 { 654 + gpio-hog; 655 + gpios = <4 0>; 656 + output-high; 657 + line-name = "RST_BMC_SYSRST_BTN_OUT_N"; 658 + }; 659 + G2A_P0_5 { 660 + gpio-hog; 661 + gpios = <5 0>; 662 + output-high; 663 + line-name = "FM_BATTERY_SENSE_EN_N"; 664 + }; 665 + G2A_P0_6 { 666 + gpio-hog; 667 + gpios = <6 0>; 668 + output-high; 669 + line-name = "FM_BMC_READY_N"; 670 + }; 671 + G2A_P0_7 { 672 + gpio-hog; 673 + gpios = <7 0>; 674 + input; 675 + line-name = "IRQ_BMC_PCH_SMI_LPC_N"; 676 + }; 677 + G2A_P1_0 { 678 + gpio-hog; 679 + gpios = <8 0>; 680 + input; 681 + line-name = "FM_SLOT4_CFG0"; 682 + }; 683 + G2A_P1_1 { 684 + gpio-hog; 685 + gpios = <9 0>; 686 + input; 687 + line-name = "FM_SLOT4_CFG1"; 688 + }; 689 + G2A_P1_2 { 690 + gpio-hog; 691 + gpios = <10 0>; 692 + input; 693 + line-name = "FM_NVDIMM_EVENT_N"; 694 + }; 695 + G2A_P1_3 { 696 + gpio-hog; 697 + gpios = <11 0>; 698 + input; 699 + line-name = "PSU1_BLADE_EN_N"; 700 + }; 701 + G2A_P1_4 { 702 + gpio-hog; 703 + gpios = <12 0>; 704 + input; 705 + line-name = "BMC_PCH_FNM"; 706 + }; 707 + G2A_P1_5 { 708 + gpio-hog; 709 + gpios = <13 0>; 710 + input; 711 + line-name = "FM_SOL_UART_CH_SEL"; 712 + }; 713 + G2A_P1_6 { 714 + gpio-hog; 715 + gpios = <14 0>; 716 + input; 717 + line-name = "FM_BIOS_POST_CMPLT_N"; 718 + }; 719 + }; 720 + 721 + pca9539_g2b: pca9539-g2b@75 { 722 + compatible = "nxp,pca9539"; 723 + reg = <0x75>; 724 + gpio-controller; 725 + #gpio-cells = <2>; 726 + G2B_P0_0 { 727 + gpio-hog; 728 + gpios = <0 0>; 729 + input; 730 + line-name = "FM_CPU_MSMI_LVT3_N"; 731 + }; 732 + G2B_P0_1 { 733 + gpio-hog; 734 + gpios = <1 0>; 735 + input; 736 + line-name = "FM_BIOS_MRC_DEBUG_MSG_DIS"; 737 + }; 738 + G2B_P0_2 { 739 + gpio-hog; 740 + gpios = <2 0>; 741 + input; 742 + line-name = "FM_CPU1_DISABLE_BMC_N"; 743 + }; 744 + G2B_P0_3 { 745 + gpio-hog; 746 + gpios = <3 0>; 747 + output-low; 748 + line-name = "BMC_JTAG_SELECT"; 749 + }; 750 + G2B_P0_4 { 751 + gpio-hog; 752 + gpios = <4 0>; 753 + output-high; 754 + line-name = "PECI_MUX_SELECT"; 755 + }; 756 + G2B_P0_5 { 757 + gpio-hog; 758 + gpios = <5 0>; 759 + output-high; 760 + line-name = "I2C_MUX2_RESET_N"; 761 + }; 762 + G2B_P0_6 { 763 + gpio-hog; 764 + gpios = <6 0>; 765 + input; 766 + line-name = "FM_BMC_CPLD_PSU2_ON"; 767 + }; 768 + G2B_P0_7 { 769 + gpio-hog; 770 + gpios = <7 0>; 771 + output-high; 772 + line-name = "PSU2_ALERT_EN_N"; 773 + }; 774 + G2B_P1_0 { 775 + gpio-hog; 776 + gpios = <8 0>; 777 + output-high; 778 + line-name = "FM_CPU_BMC_INIT"; 779 + }; 780 + G2B_P1_1 { 781 + gpio-hog; 782 + gpios = <9 0>; 783 + output-high; 784 + line-name = "IRQ_BMC_PCH_SCI_LPC_N"; 785 + }; 786 + G2B_P1_2 { 787 + gpio-hog; 788 + gpios = <10 0>; 789 + output-low; 790 + line-name = "PMB_ALERT_EN_N"; 791 + }; 792 + G2B_P1_3 { 793 + gpio-hog; 794 + gpios = <11 0>; 795 + output-high; 796 + line-name = "FM_FAST_PROCHOT_EN_N"; 797 + }; 798 + G2B_P1_4 { 799 + gpio-hog; 800 + gpios = <12 0>; 801 + output-high; 802 + line-name = "BMC_NVDIMM_PRSNT_N"; 803 + }; 804 + G2B_P1_5 { 805 + gpio-hog; 806 + gpios = <13 0>; 807 + output-low; 808 + line-name = "FM_BACKUP_BIOS_SEL_H_BMC"; 809 + }; 810 + G2B_P1_6 { 811 + gpio-hog; 812 + gpios = <14 0>; 813 + output-high; 814 + line-name = "FM_PWRBRK_N"; 815 + }; 816 + }; 817 + }; 818 + 819 + &i2c13 { 820 + status = "okay"; 821 + 822 + tmp75@4a { 823 + compatible = "ti,tmp75"; 824 + reg = <0x4a>; 825 + status = "okay"; 826 + }; 827 + m24128_fru@51 { 828 + compatible = "atmel,24c128"; 829 + reg = <0x51>; 830 + pagesize = <64>; 831 + status = "okay"; 832 + }; 833 + }; 834 + 835 + &pwm_fan { 836 + pinctrl-names = "default"; 837 + pinctrl-0 = < &pwm0_pins &pwm1_pins 838 + &fanin0_pins &fanin1_pins 839 + &fanin2_pins &fanin3_pins 840 + &fanin4_pins &fanin5_pins 841 + &fanin6_pins &fanin7_pins 842 + &fanin8_pins &fanin9_pins 843 + &fanin10_pins &fanin11_pins>; 844 + status = "okay"; 845 + 846 + fan@0 { 847 + reg = <0x00>; 848 + fan-tach-ch = /bits/ 8 <0x00 0x01>; 849 + cooling-levels = <127 255>; 850 + }; 851 + fan@1 { 852 + reg = <0x01>; 853 + fan-tach-ch = /bits/ 8 <0x02 0x03>; 854 + cooling-levels = /bits/ 8 <127 255>; 855 + }; 856 + fan@2 { 857 + reg = <0x02>; 858 + fan-tach-ch = /bits/ 8 <0x04 0x05>; 859 + cooling-levels = /bits/ 8 <127 255>; 860 + }; 861 + fan@3 { 862 + reg = <0x03>; 863 + fan-tach-ch = /bits/ 8 <0x06 0x07>; 864 + cooling-levels = /bits/ 8 <127 255>; 865 + }; 866 + fan@4 { 867 + reg = <0x04>; 868 + fan-tach-ch = /bits/ 8 <0x08 0x09>; 869 + cooling-levels = /bits/ 8 <127 255>; 870 + }; 871 + fan@5 { 872 + reg = <0x05>; 873 + fan-tach-ch = /bits/ 8 <0x0A 0x0B>; 874 + cooling-levels = /bits/ 8 <127 255>; 875 + }; 876 + fan@6 { 877 + reg = <0x06>; 878 + fan-tach-ch = /bits/ 8 <0x0C 0x0D>; 879 + cooling-levels = /bits/ 8 <127 255>; 880 + }; 881 + fan@7 { 882 + reg = <0x07>; 883 + fan-tach-ch = /bits/ 8 <0x0E 0x0F>; 884 + cooling-levels = /bits/ 8 <127 255>; 885 + }; 886 + }; 887 + 888 + &ehci1 { 889 + status = "okay"; 890 + }; 891 + 892 + &watchdog1 { 893 + status = "okay"; 894 + }; 895 + 896 + &rng { 897 + status = "okay"; 898 + }; 899 + 900 + &serial0 { 901 + status = "okay"; 902 + }; 903 + 904 + &serial1 { 905 + status = "okay"; 906 + }; 907 + 908 + &serial2 { 909 + status = "okay"; 910 + }; 911 + 912 + &serial3 { 913 + status = "okay"; 914 + }; 915 + 916 + &adc { 917 + #io-channel-cells = <1>; 918 + status = "okay"; 919 + }; 920 + 921 + &kcs1 { 922 + status = "okay"; 923 + }; 924 + 925 + &kcs2 { 926 + status = "okay"; 927 + }; 928 + 929 + &kcs3 { 930 + status = "okay"; 931 + }; 932 + 933 + &spi0 { 934 + cs-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; 935 + status = "okay"; 936 + }; 937 + 938 + &spi1 { 939 + status = "okay"; 940 + }; 941 + 942 + &pinctrl { 943 + pinctrl-names = "default"; 944 + pinctrl-0 = < 945 + /******* RunBMC inside Module pins *******/ 946 + &gpio0ol_pins 947 + &gpio1ol_pins 948 + &gpio2ol_pins 949 + &gpio3ol_pins 950 + &gpio8o_pins 951 + &gpio9ol_pins 952 + &gpio12ol_pins 953 + &gpio13ol_pins 954 + &gpio14ol_pins 955 + &gpio15ol_pins 956 + &gpio37o_pins 957 + &gpio38_pins 958 + &gpio39_pins 959 + &gpio94ol_pins 960 + &gpio108ol_pins 961 + &gpio109ol_pins 962 + &gpio111ol_pins 963 + &gpio112ol_pins 964 + &gpio113ol_pins 965 + &gpio208_pins 966 + &gpio209ol_pins 967 + &gpio210ol_pins 968 + &gpio211ol_pins 969 + &gpio212ol_pins 970 + &gpio213ol_pins 971 + &gpio214ol_pins 972 + &gpio215ol_pins 973 + &gpio216ol_pins 974 + &gpio217ol_pins 975 + /******* RunBMC outside Connector pins *******/ 976 + &gpio5_pins 977 + &gpio6_pins 978 + &gpio7_pins 979 + &gpio10_pins 980 + &gpio11_pins 981 + &gpio20_pins 982 + &gpio21_pins 983 + &gpio22o_pins 984 + &gpio23_pins 985 + &gpio24_pins 986 + &gpio25_pins 987 + &gpio30_pins 988 + &gpio31_pins 989 + &gpio40o_pins 990 + &gpio59_pins 991 + &gpio76_pins 992 + &gpio77_pins 993 + &gpio78o_pins 994 + &gpio79_pins 995 + &gpio82_pins 996 + &gpio83_pins 997 + &gpio84_pins 998 + &gpio85o_pins 999 + &gpio86ol_pins 1000 + &gpio87_pins 1001 + &gpio88_pins 1002 + &gpio89_pins 1003 + &gpio90_pins 1004 + &gpio93_pins 1005 + &gpio114o_pins 1006 + &gpio115_pins 1007 + &gpio120_pins 1008 + &gpio121_pins 1009 + &gpio122_pins 1010 + &gpio123_pins 1011 + &gpio124_pins 1012 + &gpio125_pins 1013 + &gpio126_pins 1014 + &gpio127o_pins 1015 + &gpio136_pins 1016 + &gpio137_pins 1017 + &gpio138_pins 1018 + &gpio139_pins 1019 + &gpio140_pins 1020 + &gpio141_pins 1021 + &gpio142_pins 1022 + &gpio143_pins 1023 + &gpio144_pins 1024 + &gpio146_pins 1025 + &gpio145_pins 1026 + &gpio147_pins 1027 + &gpio153o_pins 1028 + &gpio155_pins 1029 + &gpio160o_pins 1030 + &gpio169o_pins 1031 + &gpio188o_pins 1032 + &gpio189_pins 1033 + &gpio196_pins 1034 + &gpio197_pins 1035 + &gpio198o_pins 1036 + &gpio199o_pins 1037 + &gpio200_pins 1038 + &gpio202_pins 1039 + &gpio203o_pins 1040 + &gpio224_pins 1041 + &gpio225ol_pins 1042 + &gpio226ol_pins 1043 + &gpio227ol_pins 1044 + &gpio228o_pins 1045 + &gpio229o_pins 1046 + &gpio230_pins 1047 + &gpio231o_pins 1048 + &ddc_pins 1049 + &wdog1_pins 1050 + &wdog2_pins 1051 + >; 1052 + };