x86/intel_rdt: Show bitmask of shareable resource with other executing units

CPUID.(EAX=0x10, ECX=res#):EBX[31:0] reports a bit mask for a resource.
Each set bit within the length of the CBM indicates the corresponding
unit of the resource allocation may be used by other entities in the
platform (e.g. an integrated graphics engine or hardware units outside
the processor core and have direct access to the resource). Each
cleared bit within the length of the CBM indicates the corresponding
allocation unit can be configured to implement a priority-based
allocation scheme without interference with other hardware agents in
the system. Bits outside the length of the CBM are reserved.

More details on the bit mask are described in x86 Software Developer's
Manual.

The bitmask is shown in "info" directory for each resource. It's
up to user to decide how to use the bitmask within a CBM in a partition
to share or isolate a resource with other executing units.

Suggested-by: Reinette Chatre <reinette.chatre@intel.com>
Signed-off-by: Fenghua Yu <fenghua.yu@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: ravi.v.shankar@intel.com
Cc: peterz@infradead.org
Cc: eranian@google.com
Cc: ak@linux.intel.com
Cc: davidcc@google.com
Cc: vikas.shivappa@linux.intel.com
Link: http://lkml.kernel.org/r/20170725223904.12996-1-tony.luck@intel.com

authored by

Fenghua Yu and committed by
Thomas Gleixner
0dd2d749 e3302683

+28
+7
Documentation/x86/intel_rdt_ui.txt
··· 48 48 "min_cbm_bits": The minimum number of consecutive bits which 49 49 must be set when writing a mask. 50 50 51 + "shareable_bits": Bitmask of shareable resource with other executing 52 + entities (e.g. I/O). User can use this when 53 + setting up exclusive cache partitions. Note that 54 + some platforms support devices that have their 55 + own settings for cache use which can over-ride 56 + these bits. 57 + 51 58 Memory bandwitdh(MB) subdirectory contains the following files 52 59 with respect to allocation: 53 60
+2
arch/x86/kernel/cpu/intel_rdt.c
··· 193 193 r->num_closid = 4; 194 194 r->default_ctrl = max_cbm; 195 195 r->cache.cbm_len = 20; 196 + r->cache.shareable_bits = 0xc0000; 196 197 r->cache.min_cbm_bits = 2; 197 198 r->alloc_capable = true; 198 199 r->alloc_enabled = true; ··· 261 260 r->num_closid = edx.split.cos_max + 1; 262 261 r->cache.cbm_len = eax.split.cbm_len + 1; 263 262 r->default_ctrl = BIT_MASK(eax.split.cbm_len + 1) - 1; 263 + r->cache.shareable_bits = ebx & r->default_ctrl; 264 264 r->data_width = (r->cache.cbm_len + 3) / 4; 265 265 r->alloc_capable = true; 266 266 r->alloc_enabled = true;
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arch/x86/kernel/cpu/intel_rdt.h
··· 227 227 * @cbm_idx_offset: Offset of CBM index. CBM index is computed by: 228 228 * closid * cbm_idx_multi + cbm_idx_offset 229 229 * in a cache bit mask 230 + * @shareable_bits: Bitmask of shareable resource with other 231 + * executing entities 230 232 */ 231 233 struct rdt_cache { 232 234 unsigned int cbm_len; 233 235 unsigned int min_cbm_bits; 234 236 unsigned int cbm_idx_mult; 235 237 unsigned int cbm_idx_offset; 238 + unsigned int shareable_bits; 236 239 }; 237 240 238 241 /**
+16
arch/x86/kernel/cpu/intel_rdt_rdtgroup.c
··· 596 596 return 0; 597 597 } 598 598 599 + static int rdt_shareable_bits_show(struct kernfs_open_file *of, 600 + struct seq_file *seq, void *v) 601 + { 602 + struct rdt_resource *r = of->kn->parent->priv; 603 + 604 + seq_printf(seq, "%x\n", r->cache.shareable_bits); 605 + return 0; 606 + } 607 + 599 608 static int rdt_min_bw_show(struct kernfs_open_file *of, 600 609 struct seq_file *seq, void *v) 601 610 { ··· 718 709 .mode = 0444, 719 710 .kf_ops = &rdtgroup_kf_single_ops, 720 711 .seq_show = rdt_min_cbm_bits_show, 712 + .fflags = RF_CTRL_INFO | RFTYPE_RES_CACHE, 713 + }, 714 + { 715 + .name = "shareable_bits", 716 + .mode = 0444, 717 + .kf_ops = &rdtgroup_kf_single_ops, 718 + .seq_show = rdt_shareable_bits_show, 721 719 .fflags = RF_CTRL_INFO | RFTYPE_RES_CACHE, 722 720 }, 723 721 {