Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'asm-generic-fixes-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic

Pull asm-generic fixes from Arnd Bergmann:
"There is one build fix for Arm platforms that ended up impacting most
architectures because of the way the drivers/firmware Kconfig file is
wired up:

The CONFIG_QCOM_SCM dependency have caused a number of randconfig
regressions over time, and some still remain in v5.15-rc4. The fix we
agreed on in the end is to make this symbol selected by any driver
using it, and then building it even for non-Arm platforms with
CONFIG_COMPILE_TEST.

To make this work on all architectures, the drivers/firmware/Kconfig
file needs to be included for all architectures to make the symbol
itself visible.

In a separate discussion, we found that a sound driver patch that is
pending for v5.16 needs the same change to include this Kconfig file,
so the easiest solution seems to have my Kconfig rework included in
v5.15.

Finally, the branch also includes a small unrelated build fix for
NOMMU architectures"

Link: https://lore.kernel.org/all/20210928153508.101208f8@canb.auug.org.au/
Link: https://lore.kernel.org/all/20210928075216.4193128-1-arnd@kernel.org/
Link: https://lore.kernel.org/all/20211007151010.333516-1-arnd@kernel.org/

* tag 'asm-generic-fixes-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic:
asm-generic/io.h: give stub iounmap() on !MMU same prototype as elsewhere
qcom_scm: hide Kconfig symbol
firmware: include drivers/firmware/Kconfig unconditionally

+27 -100
-2
arch/arm/Kconfig
··· 1989 1989 1990 1990 endmenu 1991 1991 1992 - source "drivers/firmware/Kconfig" 1993 - 1994 1992 if CRYPTO 1995 1993 source "arch/arm/crypto/Kconfig" 1996 1994 endif
-2
arch/arm64/Kconfig
··· 1931 1931 1932 1932 endmenu 1933 1933 1934 - source "drivers/firmware/Kconfig" 1935 - 1936 1934 source "drivers/acpi/Kconfig" 1937 1935 1938 1936 source "arch/arm64/kvm/Kconfig"
-2
arch/ia64/Kconfig
··· 388 388 help 389 389 Generate crash dump after being started by kexec. 390 390 391 - source "drivers/firmware/Kconfig" 392 - 393 391 endmenu 394 392 395 393 menu "Power management and ACPI options"
-2
arch/mips/Kconfig
··· 3316 3316 3317 3317 endmenu 3318 3318 3319 - source "drivers/firmware/Kconfig" 3320 - 3321 3319 source "arch/mips/kvm/Kconfig" 3322 3320 3323 3321 source "arch/mips/vdso/Kconfig"
-2
arch/parisc/Kconfig
··· 384 384 385 385 endmenu 386 386 387 - source "drivers/firmware/Kconfig" 388 - 389 387 source "drivers/parisc/Kconfig"
-2
arch/riscv/Kconfig
··· 561 561 source "kernel/power/Kconfig" 562 562 563 563 endmenu 564 - 565 - source "drivers/firmware/Kconfig"
-2
arch/x86/Kconfig
··· 2832 2832 def_bool y 2833 2833 depends on X86_32 2834 2834 2835 - source "drivers/firmware/Kconfig" 2836 - 2837 2835 source "arch/x86/kvm/Kconfig" 2838 2836 2839 2837 source "arch/x86/Kconfig.assembler"
+2
drivers/Kconfig
··· 17 17 18 18 source "drivers/connector/Kconfig" 19 19 20 + source "drivers/firmware/Kconfig" 21 + 20 22 source "drivers/gnss/Kconfig" 21 23 22 24 source "drivers/mtd/Kconfig"
+1 -4
drivers/firmware/Kconfig
··· 203 203 Say Y here if you want Intel RSU support. 204 204 205 205 config QCOM_SCM 206 - tristate "Qcom SCM driver" 207 - depends on ARCH_QCOM || COMPILE_TEST 208 - depends on HAVE_ARM_SMCCC 209 - select RESET_CONTROLLER 206 + tristate 210 207 211 208 config QCOM_SCM_DOWNLOAD_MODE_DEFAULT 212 209 bool "Qualcomm download mode enabled by default"
+2 -2
drivers/gpu/drm/msm/Kconfig
··· 17 17 select DRM_SCHED 18 18 select SHMEM 19 19 select TMPFS 20 - select QCOM_SCM if ARCH_QCOM 20 + select QCOM_SCM 21 21 select WANT_DEV_COREDUMP 22 22 select SND_SOC_HDMI_CODEC if SND_SOC 23 23 select SYNC_FILE ··· 55 55 56 56 config DRM_MSM_HDMI_HDCP 57 57 bool "Enable HDMI HDCP support in MSM DRM driver" 58 - depends on DRM_MSM && QCOM_SCM 58 + depends on DRM_MSM 59 59 default y 60 60 help 61 61 Choose this option to enable HDCP state machine
+1 -2
drivers/iommu/Kconfig
··· 308 308 config ARM_SMMU 309 309 tristate "ARM Ltd. System MMU (SMMU) Support" 310 310 depends on ARM64 || ARM || (COMPILE_TEST && !GENERIC_ATOMIC64) 311 - depends on QCOM_SCM || !QCOM_SCM #if QCOM_SCM=m this can't be =y 312 311 select IOMMU_API 313 312 select IOMMU_IO_PGTABLE_LPAE 314 313 select ARM_DMA_USE_IOMMU if ARM ··· 437 438 # Note: iommu drivers cannot (yet?) be built as modules 438 439 bool "Qualcomm IOMMU Support" 439 440 depends on ARCH_QCOM || (COMPILE_TEST && !GENERIC_ATOMIC64) 440 - depends on QCOM_SCM=y 441 + select QCOM_SCM 441 442 select IOMMU_API 442 443 select IOMMU_IO_PGTABLE_LPAE 443 444 select ARM_DMA_USE_IOMMU
+2 -1
drivers/iommu/arm/arm-smmu/Makefile
··· 1 1 # SPDX-License-Identifier: GPL-2.0 2 2 obj-$(CONFIG_QCOM_IOMMU) += qcom_iommu.o 3 3 obj-$(CONFIG_ARM_SMMU) += arm_smmu.o 4 - arm_smmu-objs += arm-smmu.o arm-smmu-impl.o arm-smmu-nvidia.o arm-smmu-qcom.o 4 + arm_smmu-objs += arm-smmu.o arm-smmu-impl.o arm-smmu-nvidia.o 5 + arm_smmu-$(CONFIG_ARM_SMMU_QCOM) += arm-smmu-qcom.o
+2 -1
drivers/iommu/arm/arm-smmu/arm-smmu-impl.c
··· 215 215 of_device_is_compatible(np, "nvidia,tegra186-smmu")) 216 216 return nvidia_smmu_impl_init(smmu); 217 217 218 - smmu = qcom_smmu_impl_init(smmu); 218 + if (IS_ENABLED(CONFIG_ARM_SMMU_QCOM)) 219 + smmu = qcom_smmu_impl_init(smmu); 219 220 220 221 if (of_device_is_compatible(np, "marvell,ap806-smmu-500")) 221 222 smmu->impl = &mrvl_mmu500_impl;
+1 -1
drivers/media/platform/Kconfig
··· 565 565 depends on VIDEO_DEV && VIDEO_V4L2 && QCOM_SMEM 566 566 depends on (ARCH_QCOM && IOMMU_DMA) || COMPILE_TEST 567 567 select QCOM_MDT_LOADER if ARCH_QCOM 568 - select QCOM_SCM if ARCH_QCOM 568 + select QCOM_SCM 569 569 select VIDEOBUF2_DMA_CONTIG 570 570 select V4L2_MEM2MEM_DEV 571 571 help
+1 -1
drivers/mmc/host/Kconfig
··· 547 547 depends on MMC_SDHCI_PLTFM 548 548 select MMC_SDHCI_IO_ACCESSORS 549 549 select MMC_CQHCI 550 - select QCOM_SCM if MMC_CRYPTO && ARCH_QCOM 550 + select QCOM_SCM if MMC_CRYPTO 551 551 help 552 552 This selects the Secure Digital Host Controller Interface (SDHCI) 553 553 support present in Qualcomm SOCs. The controller supports
+1
drivers/net/ipa/Kconfig
··· 4 4 depends on ARCH_QCOM || COMPILE_TEST 5 5 depends on QCOM_RPROC_COMMON || (QCOM_RPROC_COMMON=n && COMPILE_TEST) 6 6 select QCOM_MDT_LOADER if ARCH_QCOM 7 + select QCOM_SCM 7 8 select QCOM_QMI_HELPERS 8 9 help 9 10 Choose Y or M here to include support for the Qualcomm
+1 -1
drivers/net/wireless/ath/ath10k/Kconfig
··· 44 44 tristate "Qualcomm ath10k SNOC support" 45 45 depends on ATH10K 46 46 depends on ARCH_QCOM || COMPILE_TEST 47 - depends on QCOM_SCM || !QCOM_SCM #if QCOM_SCM=m this can't be =y 47 + select QCOM_SCM 48 48 select QCOM_QMI_HELPERS 49 49 help 50 50 This module adds support for integrated WCN3990 chip connected
+2 -1
drivers/pinctrl/qcom/Kconfig
··· 3 3 4 4 config PINCTRL_MSM 5 5 tristate "Qualcomm core pin controller driver" 6 - depends on GPIOLIB && (QCOM_SCM || !QCOM_SCM) #if QCOM_SCM=m this can't be =y 6 + depends on GPIOLIB 7 + select QCOM_SCM 7 8 select PINMUX 8 9 select PINCONF 9 10 select GENERIC_PINCONF
+1 -1
include/asm-generic/io.h
··· 957 957 958 958 #ifndef iounmap 959 959 #define iounmap iounmap 960 - static inline void iounmap(void __iomem *addr) 960 + static inline void iounmap(volatile void __iomem *addr) 961 961 { 962 962 } 963 963 #endif
+10
include/linux/arm-smccc.h
··· 321 321 * from register 0 to 3 on return from the SMC instruction. An optional 322 322 * quirk structure provides vendor specific behavior. 323 323 */ 324 + #ifdef CONFIG_HAVE_ARM_SMCCC 324 325 asmlinkage void __arm_smccc_smc(unsigned long a0, unsigned long a1, 325 326 unsigned long a2, unsigned long a3, unsigned long a4, 326 327 unsigned long a5, unsigned long a6, unsigned long a7, 327 328 struct arm_smccc_res *res, struct arm_smccc_quirk *quirk); 329 + #else 330 + static inline void __arm_smccc_smc(unsigned long a0, unsigned long a1, 331 + unsigned long a2, unsigned long a3, unsigned long a4, 332 + unsigned long a5, unsigned long a6, unsigned long a7, 333 + struct arm_smccc_res *res, struct arm_smccc_quirk *quirk) 334 + { 335 + *res = (struct arm_smccc_res){}; 336 + } 337 + #endif 328 338 329 339 /** 330 340 * __arm_smccc_hvc() - make HVC calls
-71
include/linux/qcom_scm.h
··· 61 61 #define QCOM_SCM_PERM_RW (QCOM_SCM_PERM_READ | QCOM_SCM_PERM_WRITE) 62 62 #define QCOM_SCM_PERM_RWX (QCOM_SCM_PERM_RW | QCOM_SCM_PERM_EXEC) 63 63 64 - #if IS_ENABLED(CONFIG_QCOM_SCM) 65 64 extern bool qcom_scm_is_available(void); 66 65 67 66 extern int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus); ··· 114 115 extern int qcom_scm_lmh_profile_change(u32 profile_id); 115 116 extern bool qcom_scm_lmh_dcvsh_available(void); 116 117 117 - #else 118 - 119 - #include <linux/errno.h> 120 - 121 - static inline bool qcom_scm_is_available(void) { return false; } 122 - 123 - static inline int qcom_scm_set_cold_boot_addr(void *entry, 124 - const cpumask_t *cpus) { return -ENODEV; } 125 - static inline int qcom_scm_set_warm_boot_addr(void *entry, 126 - const cpumask_t *cpus) { return -ENODEV; } 127 - static inline void qcom_scm_cpu_power_down(u32 flags) {} 128 - static inline u32 qcom_scm_set_remote_state(u32 state,u32 id) 129 - { return -ENODEV; } 130 - 131 - static inline int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, 132 - size_t size) { return -ENODEV; } 133 - static inline int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, 134 - phys_addr_t size) { return -ENODEV; } 135 - static inline int qcom_scm_pas_auth_and_reset(u32 peripheral) 136 - { return -ENODEV; } 137 - static inline int qcom_scm_pas_shutdown(u32 peripheral) { return -ENODEV; } 138 - static inline bool qcom_scm_pas_supported(u32 peripheral) { return false; } 139 - 140 - static inline int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val) 141 - { return -ENODEV; } 142 - static inline int qcom_scm_io_writel(phys_addr_t addr, unsigned int val) 143 - { return -ENODEV; } 144 - 145 - static inline bool qcom_scm_restore_sec_cfg_available(void) { return false; } 146 - static inline int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare) 147 - { return -ENODEV; } 148 - static inline int qcom_scm_iommu_secure_ptbl_size(u32 spare, size_t *size) 149 - { return -ENODEV; } 150 - static inline int qcom_scm_iommu_secure_ptbl_init(u64 addr, u32 size, u32 spare) 151 - { return -ENODEV; } 152 - extern inline int qcom_scm_mem_protect_video_var(u32 cp_start, u32 cp_size, 153 - u32 cp_nonpixel_start, 154 - u32 cp_nonpixel_size) 155 - { return -ENODEV; } 156 - static inline int qcom_scm_assign_mem(phys_addr_t mem_addr, size_t mem_sz, 157 - unsigned int *src, const struct qcom_scm_vmperm *newvm, 158 - unsigned int dest_cnt) { return -ENODEV; } 159 - 160 - static inline bool qcom_scm_ocmem_lock_available(void) { return false; } 161 - static inline int qcom_scm_ocmem_lock(enum qcom_scm_ocmem_client id, u32 offset, 162 - u32 size, u32 mode) { return -ENODEV; } 163 - static inline int qcom_scm_ocmem_unlock(enum qcom_scm_ocmem_client id, 164 - u32 offset, u32 size) { return -ENODEV; } 165 - 166 - static inline bool qcom_scm_ice_available(void) { return false; } 167 - static inline int qcom_scm_ice_invalidate_key(u32 index) { return -ENODEV; } 168 - static inline int qcom_scm_ice_set_key(u32 index, const u8 *key, u32 key_size, 169 - enum qcom_scm_ice_cipher cipher, 170 - u32 data_unit_size) { return -ENODEV; } 171 - 172 - static inline bool qcom_scm_hdcp_available(void) { return false; } 173 - static inline int qcom_scm_hdcp_req(struct qcom_scm_hdcp_req *req, u32 req_cnt, 174 - u32 *resp) { return -ENODEV; } 175 - 176 - static inline int qcom_scm_qsmmu500_wait_safe_toggle(bool en) 177 - { return -ENODEV; } 178 - 179 - static inline int qcom_scm_lmh_dcvsh(u32 payload_fn, u32 payload_reg, u32 payload_val, 180 - u64 limit_node, u32 node_id, u64 version) 181 - { return -ENODEV; } 182 - 183 - static inline int qcom_scm_lmh_profile_change(u32 profile_id) { return -ENODEV; } 184 - 185 - static inline bool qcom_scm_lmh_dcvsh_available(void) { return -ENODEV; } 186 - #endif 187 118 #endif