Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/amdgpu: get_fw_version isn't ASIC specific

Method of getting firmware version is the same across ASICs, so remove
them from ASIC-specific files and create one in amdgpu_amdkfd.c. This new
created get_fw_version simply reads fw_version from adev->gfx than parsing
the ucode header.

Signed-off-by: Amber Lin <Amber.Lin@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Amber Lin and committed by
Alex Deucher
0da8b10e a1b11201

+53 -194
+37
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
··· 335 335 amdgpu_bo_unref(&(bo)); 336 336 } 337 337 338 + uint32_t amdgpu_amdkfd_get_fw_version(struct kgd_dev *kgd, 339 + enum kgd_engine_type type) 340 + { 341 + struct amdgpu_device *adev = (struct amdgpu_device *)kgd; 342 + 343 + switch (type) { 344 + case KGD_ENGINE_PFP: 345 + return adev->gfx.pfp_fw_version; 346 + 347 + case KGD_ENGINE_ME: 348 + return adev->gfx.me_fw_version; 349 + 350 + case KGD_ENGINE_CE: 351 + return adev->gfx.ce_fw_version; 352 + 353 + case KGD_ENGINE_MEC1: 354 + return adev->gfx.mec_fw_version; 355 + 356 + case KGD_ENGINE_MEC2: 357 + return adev->gfx.mec2_fw_version; 358 + 359 + case KGD_ENGINE_RLC: 360 + return adev->gfx.rlc_fw_version; 361 + 362 + case KGD_ENGINE_SDMA1: 363 + return adev->sdma.instance[0].fw_version; 364 + 365 + case KGD_ENGINE_SDMA2: 366 + return adev->sdma.instance[1].fw_version; 367 + 368 + default: 369 + return 0; 370 + } 371 + 372 + return 0; 373 + } 374 + 338 375 void amdgpu_amdkfd_get_local_mem_info(struct kgd_dev *kgd, 339 376 struct kfd_local_mem_info *mem_info) 340 377 {
+14
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.h
··· 81 81 uint64_t vram_used; 82 82 }; 83 83 84 + enum kgd_engine_type { 85 + KGD_ENGINE_PFP = 1, 86 + KGD_ENGINE_ME, 87 + KGD_ENGINE_CE, 88 + KGD_ENGINE_MEC1, 89 + KGD_ENGINE_MEC2, 90 + KGD_ENGINE_RLC, 91 + KGD_ENGINE_SDMA1, 92 + KGD_ENGINE_SDMA2, 93 + KGD_ENGINE_MAX 94 + }; 95 + 84 96 struct amdgpu_amdkfd_fence *amdgpu_amdkfd_fence_create(u64 context, 85 97 struct mm_struct *mm); 86 98 bool amdkfd_fence_check_mm(struct dma_fence *f, struct mm_struct *mm); ··· 154 142 void **mem_obj, uint64_t *gpu_addr, 155 143 void **cpu_ptr, bool mqd_gfx9); 156 144 void amdgpu_amdkfd_free_gtt_mem(struct kgd_dev *kgd, void *mem_obj); 145 + uint32_t amdgpu_amdkfd_get_fw_version(struct kgd_dev *kgd, 146 + enum kgd_engine_type type); 157 147 void amdgpu_amdkfd_get_local_mem_info(struct kgd_dev *kgd, 158 148 struct kfd_local_mem_info *mem_info); 159 149 uint64_t amdgpu_amdkfd_get_gpu_clock_counter(struct kgd_dev *kgd);
-61
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c
··· 22 22 23 23 #include <linux/fdtable.h> 24 24 #include <linux/uaccess.h> 25 - #include <linux/firmware.h> 26 25 #include <linux/mmu_context.h> 27 26 #include <drm/drmP.h> 28 27 #include "amdgpu.h" 29 28 #include "amdgpu_amdkfd.h" 30 29 #include "cikd.h" 31 30 #include "cik_sdma.h" 32 - #include "amdgpu_ucode.h" 33 31 #include "gfx_v7_0.h" 34 32 #include "gca/gfx_7_2_d.h" 35 33 #include "gca/gfx_7_2_enum.h" ··· 137 139 static uint16_t get_atc_vmid_pasid_mapping_pasid(struct kgd_dev *kgd, 138 140 uint8_t vmid); 139 141 140 - static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type); 141 142 static void set_scratch_backing_va(struct kgd_dev *kgd, 142 143 uint64_t va, uint32_t vmid); 143 144 static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid, ··· 188 191 .address_watch_get_offset = kgd_address_watch_get_offset, 189 192 .get_atc_vmid_pasid_mapping_pasid = get_atc_vmid_pasid_mapping_pasid, 190 193 .get_atc_vmid_pasid_mapping_valid = get_atc_vmid_pasid_mapping_valid, 191 - .get_fw_version = get_fw_version, 192 194 .set_scratch_backing_va = set_scratch_backing_va, 193 195 .get_tile_config = get_tile_config, 194 196 .set_vm_context_page_table_base = set_vm_context_page_table_base, ··· 786 790 lock_srbm(kgd, 0, 0, 0, vmid); 787 791 WREG32(mmSH_HIDDEN_PRIVATE_BASE_VMID, va); 788 792 unlock_srbm(kgd); 789 - } 790 - 791 - static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type) 792 - { 793 - struct amdgpu_device *adev = (struct amdgpu_device *) kgd; 794 - const union amdgpu_firmware_header *hdr; 795 - 796 - switch (type) { 797 - case KGD_ENGINE_PFP: 798 - hdr = (const union amdgpu_firmware_header *) 799 - adev->gfx.pfp_fw->data; 800 - break; 801 - 802 - case KGD_ENGINE_ME: 803 - hdr = (const union amdgpu_firmware_header *) 804 - adev->gfx.me_fw->data; 805 - break; 806 - 807 - case KGD_ENGINE_CE: 808 - hdr = (const union amdgpu_firmware_header *) 809 - adev->gfx.ce_fw->data; 810 - break; 811 - 812 - case KGD_ENGINE_MEC1: 813 - hdr = (const union amdgpu_firmware_header *) 814 - adev->gfx.mec_fw->data; 815 - break; 816 - 817 - case KGD_ENGINE_MEC2: 818 - hdr = (const union amdgpu_firmware_header *) 819 - adev->gfx.mec2_fw->data; 820 - break; 821 - 822 - case KGD_ENGINE_RLC: 823 - hdr = (const union amdgpu_firmware_header *) 824 - adev->gfx.rlc_fw->data; 825 - break; 826 - 827 - case KGD_ENGINE_SDMA1: 828 - hdr = (const union amdgpu_firmware_header *) 829 - adev->sdma.instance[0].fw->data; 830 - break; 831 - 832 - case KGD_ENGINE_SDMA2: 833 - hdr = (const union amdgpu_firmware_header *) 834 - adev->sdma.instance[1].fw->data; 835 - break; 836 - 837 - default: 838 - return 0; 839 - } 840 - 841 - if (hdr == NULL) 842 - return 0; 843 - 844 - /* Only 12 bit in use*/ 845 - return hdr->common.ucode_version; 846 793 } 847 794 848 795 static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid,
-61
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c
··· 23 23 #include <linux/module.h> 24 24 #include <linux/fdtable.h> 25 25 #include <linux/uaccess.h> 26 - #include <linux/firmware.h> 27 26 #include <linux/mmu_context.h> 28 27 #include <drm/drmP.h> 29 28 #include "amdgpu.h" 30 29 #include "amdgpu_amdkfd.h" 31 - #include "amdgpu_ucode.h" 32 30 #include "gfx_v8_0.h" 33 31 #include "gca/gfx_8_0_sh_mask.h" 34 32 #include "gca/gfx_8_0_d.h" ··· 93 95 uint8_t vmid); 94 96 static uint16_t get_atc_vmid_pasid_mapping_pasid(struct kgd_dev *kgd, 95 97 uint8_t vmid); 96 - static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type); 97 98 static void set_scratch_backing_va(struct kgd_dev *kgd, 98 99 uint64_t va, uint32_t vmid); 99 100 static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid, ··· 145 148 get_atc_vmid_pasid_mapping_pasid, 146 149 .get_atc_vmid_pasid_mapping_valid = 147 150 get_atc_vmid_pasid_mapping_valid, 148 - .get_fw_version = get_fw_version, 149 151 .set_scratch_backing_va = set_scratch_backing_va, 150 152 .get_tile_config = get_tile_config, 151 153 .set_vm_context_page_table_base = set_vm_context_page_table_base, ··· 745 749 lock_srbm(kgd, 0, 0, 0, vmid); 746 750 WREG32(mmSH_HIDDEN_PRIVATE_BASE_VMID, va); 747 751 unlock_srbm(kgd); 748 - } 749 - 750 - static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type) 751 - { 752 - struct amdgpu_device *adev = (struct amdgpu_device *) kgd; 753 - const union amdgpu_firmware_header *hdr; 754 - 755 - switch (type) { 756 - case KGD_ENGINE_PFP: 757 - hdr = (const union amdgpu_firmware_header *) 758 - adev->gfx.pfp_fw->data; 759 - break; 760 - 761 - case KGD_ENGINE_ME: 762 - hdr = (const union amdgpu_firmware_header *) 763 - adev->gfx.me_fw->data; 764 - break; 765 - 766 - case KGD_ENGINE_CE: 767 - hdr = (const union amdgpu_firmware_header *) 768 - adev->gfx.ce_fw->data; 769 - break; 770 - 771 - case KGD_ENGINE_MEC1: 772 - hdr = (const union amdgpu_firmware_header *) 773 - adev->gfx.mec_fw->data; 774 - break; 775 - 776 - case KGD_ENGINE_MEC2: 777 - hdr = (const union amdgpu_firmware_header *) 778 - adev->gfx.mec2_fw->data; 779 - break; 780 - 781 - case KGD_ENGINE_RLC: 782 - hdr = (const union amdgpu_firmware_header *) 783 - adev->gfx.rlc_fw->data; 784 - break; 785 - 786 - case KGD_ENGINE_SDMA1: 787 - hdr = (const union amdgpu_firmware_header *) 788 - adev->sdma.instance[0].fw->data; 789 - break; 790 - 791 - case KGD_ENGINE_SDMA2: 792 - hdr = (const union amdgpu_firmware_header *) 793 - adev->sdma.instance[1].fw->data; 794 - break; 795 - 796 - default: 797 - return 0; 798 - } 799 - 800 - if (hdr == NULL) 801 - return 0; 802 - 803 - /* Only 12 bit in use*/ 804 - return hdr->common.ucode_version; 805 752 } 806 753 807 754 static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid,
-54
drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v9.c
··· 25 25 #include <linux/module.h> 26 26 #include <linux/fdtable.h> 27 27 #include <linux/uaccess.h> 28 - #include <linux/firmware.h> 29 28 #include <linux/mmu_context.h> 30 29 #include <drm/drmP.h> 31 30 #include "amdgpu.h" 32 31 #include "amdgpu_amdkfd.h" 33 - #include "amdgpu_ucode.h" 34 32 #include "soc15_hw_ip.h" 35 33 #include "gc/gc_9_0_offset.h" 36 34 #include "gc/gc_9_0_sh_mask.h" ··· 109 111 uint8_t vmid); 110 112 static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid, 111 113 uint64_t page_table_base); 112 - static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type); 113 114 static void set_scratch_backing_va(struct kgd_dev *kgd, 114 115 uint64_t va, uint32_t vmid); 115 116 static int invalidate_tlbs(struct kgd_dev *kgd, uint16_t pasid); ··· 155 158 get_atc_vmid_pasid_mapping_pasid, 156 159 .get_atc_vmid_pasid_mapping_valid = 157 160 get_atc_vmid_pasid_mapping_valid, 158 - .get_fw_version = get_fw_version, 159 161 .set_scratch_backing_va = set_scratch_backing_va, 160 162 .get_tile_config = amdgpu_amdkfd_get_tile_config, 161 163 .set_vm_context_page_table_base = set_vm_context_page_table_base, ··· 868 872 * passed to the shader by the CP. It's the user mode driver's 869 873 * responsibility. 870 874 */ 871 - } 872 - 873 - /* FIXME: Does this need to be ASIC-specific code? */ 874 - static uint16_t get_fw_version(struct kgd_dev *kgd, enum kgd_engine_type type) 875 - { 876 - struct amdgpu_device *adev = (struct amdgpu_device *) kgd; 877 - const union amdgpu_firmware_header *hdr; 878 - 879 - switch (type) { 880 - case KGD_ENGINE_PFP: 881 - hdr = (const union amdgpu_firmware_header *)adev->gfx.pfp_fw->data; 882 - break; 883 - 884 - case KGD_ENGINE_ME: 885 - hdr = (const union amdgpu_firmware_header *)adev->gfx.me_fw->data; 886 - break; 887 - 888 - case KGD_ENGINE_CE: 889 - hdr = (const union amdgpu_firmware_header *)adev->gfx.ce_fw->data; 890 - break; 891 - 892 - case KGD_ENGINE_MEC1: 893 - hdr = (const union amdgpu_firmware_header *)adev->gfx.mec_fw->data; 894 - break; 895 - 896 - case KGD_ENGINE_MEC2: 897 - hdr = (const union amdgpu_firmware_header *)adev->gfx.mec2_fw->data; 898 - break; 899 - 900 - case KGD_ENGINE_RLC: 901 - hdr = (const union amdgpu_firmware_header *)adev->gfx.rlc_fw->data; 902 - break; 903 - 904 - case KGD_ENGINE_SDMA1: 905 - hdr = (const union amdgpu_firmware_header *)adev->sdma.instance[0].fw->data; 906 - break; 907 - 908 - case KGD_ENGINE_SDMA2: 909 - hdr = (const union amdgpu_firmware_header *)adev->sdma.instance[1].fw->data; 910 - break; 911 - 912 - default: 913 - return 0; 914 - } 915 - 916 - if (hdr == NULL) 917 - return 0; 918 - 919 - /* Only 12 bit in use*/ 920 - return hdr->common.ucode_version; 921 875 } 922 876 923 877 static void set_vm_context_page_table_base(struct kgd_dev *kgd, uint32_t vmid,
+2 -2
drivers/gpu/drm/amd/amdkfd/kfd_device.c
··· 493 493 { 494 494 unsigned int size; 495 495 496 - kfd->mec_fw_version = kfd->kfd2kgd->get_fw_version(kfd->kgd, 496 + kfd->mec_fw_version = amdgpu_amdkfd_get_fw_version(kfd->kgd, 497 497 KGD_ENGINE_MEC1); 498 - kfd->sdma_fw_version = kfd->kfd2kgd->get_fw_version(kfd->kgd, 498 + kfd->sdma_fw_version = amdgpu_amdkfd_get_fw_version(kfd->kgd, 499 499 KGD_ENGINE_SDMA1); 500 500 kfd->shared_resources = *gpu_resources; 501 501
-16
drivers/gpu/drm/amd/include/kgd_kfd_interface.h
··· 85 85 KGD_POOL_FRAMEBUFFER = 3, 86 86 }; 87 87 88 - enum kgd_engine_type { 89 - KGD_ENGINE_PFP = 1, 90 - KGD_ENGINE_ME, 91 - KGD_ENGINE_CE, 92 - KGD_ENGINE_MEC1, 93 - KGD_ENGINE_MEC2, 94 - KGD_ENGINE_RLC, 95 - KGD_ENGINE_SDMA1, 96 - KGD_ENGINE_SDMA2, 97 - KGD_ENGINE_MAX 98 - }; 99 - 100 88 /** 101 89 * enum kfd_sched_policy 102 90 * ··· 218 230 * @hqd_sdma_destroy: Destructs and preempts the SDMA queue assigned to that 219 231 * SDMA hqd slot. 220 232 * 221 - * @get_fw_version: Returns FW versions from the header 222 - * 223 233 * @set_scratch_backing_va: Sets VA for scratch backing memory of a VMID. 224 234 * Only used for no cp scheduling mode 225 235 * ··· 297 311 struct kgd_dev *kgd, 298 312 uint8_t vmid); 299 313 300 - uint16_t (*get_fw_version)(struct kgd_dev *kgd, 301 - enum kgd_engine_type type); 302 314 void (*set_scratch_backing_va)(struct kgd_dev *kgd, 303 315 uint64_t va, uint32_t vmid); 304 316 int (*get_tile_config)(struct kgd_dev *kgd, struct tile_config *config);