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ARM: dts: imx6qdl-sr-som: split out Broadcom Wi-Fi support
There are two variants of the imx6qdl som: one with Broadcom Wi-Fi and
another with Texas Instruments Wi-Fi. The two Wi-Fi devices require
different DT bindings, so it's necessary to split out the Broadcom
specifics.
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
authored by
Russell King
and committed by
Shawn Guo
0ce6fb5a
42b769f6
+149
-99
+1
arch/arm/boot/dts/imx6dl-cubox-i.dts
+1
arch/arm/boot/dts/imx6dl-cubox-i.dts
+1
arch/arm/boot/dts/imx6dl-hummingboard.dts
+1
arch/arm/boot/dts/imx6dl-hummingboard.dts
+1
arch/arm/boot/dts/imx6q-cubox-i.dts
+1
arch/arm/boot/dts/imx6q-cubox-i.dts
+1
arch/arm/boot/dts/imx6q-h100.dts
+1
arch/arm/boot/dts/imx6q-h100.dts
+1
arch/arm/boot/dts/imx6q-hummingboard.dts
+1
arch/arm/boot/dts/imx6q-hummingboard.dts
+144
arch/arm/boot/dts/imx6qdl-sr-som-brcm.dtsi
+144
arch/arm/boot/dts/imx6qdl-sr-som-brcm.dtsi
···
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/*
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* Copyright (C) 2013,2014 Russell King
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <dt-bindings/gpio/gpio.h>
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/ {
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clk_sdio: sdio-clock {
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compatible = "gpio-gate-clock";
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#clock-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_microsom_brcm_osc>;
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enable-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
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};
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+
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reg_brcm: brcm-reg {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio3 19 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_microsom_brcm_reg>;
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regulator-name = "brcm_reg";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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startup-delay-us = <200000>;
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};
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+
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usdhc1_pwrseq: usdhc1_pwrseq {
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compatible = "mmc-pwrseq-simple";
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reset-gpios = <&gpio5 26 GPIO_ACTIVE_LOW>,
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<&gpio6 0 GPIO_ACTIVE_LOW>;
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clocks = <&clk_sdio>;
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clock-names = "ext_clock";
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};
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};
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+
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&iomuxc {
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microsom {
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pinctrl_microsom_brcm_bt: microsom-brcm-bt {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00 0x40013070
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MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01 0x40013070
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MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04 0x40013070
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>;
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};
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pinctrl_microsom_brcm_osc: microsom-brcm-osc {
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fsl,pins = <
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MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x40013070
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>;
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};
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pinctrl_microsom_brcm_reg: microsom-brcm-reg {
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fsl,pins = <
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MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x40013070
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>;
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};
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pinctrl_microsom_brcm_wifi: microsom-brcm-wifi {
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fsl,pins = <
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MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K 0x1b0b0
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MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x40013070
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MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x40013070
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MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x40013070
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>;
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};
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pinctrl_microsom_uart4: microsom-uart4 {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
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MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
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MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
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MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
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>;
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};
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pinctrl_microsom_usdhc1: microsom-usdhc1 {
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fsl,pins = <
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MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
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MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
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MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
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MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
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MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
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MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
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>;
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};
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};
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};
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/* UART4 - Connected to optional BRCM Wifi/BT/FM */
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&uart4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_microsom_brcm_bt &pinctrl_microsom_uart4>;
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uart-has-rtscts;
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status = "okay";
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};
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/* USDHC1 - Connected to optional BRCM Wifi/BT/FM */
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&usdhc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_microsom_brcm_wifi &pinctrl_microsom_usdhc1>;
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bus-width = <4>;
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mmc-pwrseq = <&usdhc1_pwrseq>;
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keep-power-in-suspend;
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no-1-8-v;
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non-removable;
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vmmc-supply = <®_brcm>;
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status = "okay";
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};
-99
arch/arm/boot/dts/imx6qdl-sr-som.dtsi
-99
arch/arm/boot/dts/imx6qdl-sr-som.dtsi
···
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#include <dt-bindings/gpio/gpio.h>
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/ {
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clk_sdio: sdio-clock {
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compatible = "gpio-gate-clock";
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#clock-cells = <0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_microsom_brcm_osc>;
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enable-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
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};
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-
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reg_brcm: brcm-reg {
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compatible = "regulator-fixed";
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enable-active-high;
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gpio = <&gpio3 19 0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_microsom_brcm_reg>;
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regulator-name = "brcm_reg";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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startup-delay-us = <200000>;
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};
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-
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usdhc1_pwrseq: usdhc1_pwrseq {
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compatible = "mmc-pwrseq-simple";
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reset-gpios = <&gpio5 26 GPIO_ACTIVE_LOW>,
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<&gpio6 0 GPIO_ACTIVE_LOW>;
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clocks = <&clk_sdio>;
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clock-names = "ext_clock";
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};
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};
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&fec {
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pinctrl-names = "default";
···
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&iomuxc {
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microsom {
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pinctrl_microsom_brcm_bt: microsom-brcm-bt {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00 0x40013070
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MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01 0x40013070
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MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04 0x40013070
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>;
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};
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pinctrl_microsom_brcm_osc: microsom-brcm-osc {
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fsl,pins = <
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MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x40013070
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>;
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};
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-
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pinctrl_microsom_brcm_reg: microsom-brcm-reg {
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fsl,pins = <
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MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x40013070
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>;
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};
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-
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pinctrl_microsom_brcm_wifi: microsom-brcm-wifi {
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fsl,pins = <
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MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K 0x1b0b0
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MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x40013070
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MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x40013070
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MX6QDL_PAD_CSI0_DAT9__GPIO5_IO27 0x40013070
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>;
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};
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-
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pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 {
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fsl,pins = <
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MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b8b0
···
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MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
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>;
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};
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-
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pinctrl_microsom_uart4: microsom-uart4 {
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fsl,pins = <
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MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
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MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
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MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
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MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
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>;
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};
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-
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pinctrl_microsom_usdhc1: microsom-usdhc1 {
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fsl,pins = <
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MX6QDL_PAD_SD1_CMD__SD1_CMD 0x17059
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MX6QDL_PAD_SD1_CLK__SD1_CLK 0x10059
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MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17059
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-
MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17059
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MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17059
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MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17059
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>;
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};
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};
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};
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&uart1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_microsom_uart1>;
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status = "okay";
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};
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-
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/* UART4 - Connected to optional BRCM Wifi/BT/FM */
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&uart4 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_microsom_brcm_bt &pinctrl_microsom_uart4>;
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uart-has-rtscts;
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status = "okay";
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};
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-
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/* USDHC1 - Connected to optional BRCM Wifi/BT/FM */
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&usdhc1 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_microsom_brcm_wifi &pinctrl_microsom_usdhc1>;
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bus-width = <4>;
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mmc-pwrseq = <&usdhc1_pwrseq>;
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keep-power-in-suspend;
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no-1-8-v;
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non-removable;
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vmmc-supply = <®_brcm>;
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status = "okay";
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};