Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

clk: mediatek: Add SMI LARBs reset for MT8188

SMI LARBs require reset functions when MTCMOS powers on or off.
Add reset platform data for SMI LARBs in the image, camera and IPE
subsystems.

Signed-off-by: Friday Yang <friday.yang@mediatek.com>
Link: https://lore.kernel.org/r/20250221075058.14180-3-friday.yang@mediatek.com
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

authored by

Friday Yang and committed by
Stephen Boyd
0ca0dc89 9a5cd596

+49
+17
drivers/clk/mediatek/clk-mt8188-cam.c
··· 20 20 #define GATE_CAM(_id, _name, _parent, _shift) \ 21 21 GATE_MTK(_id, _name, _parent, &cam_cg_regs, _shift, &mtk_clk_gate_ops_setclr) 22 22 23 + #define CAM_SYS_SMI_LARB_RST_OFF (0xA0) 24 + 23 25 static const struct mtk_gate cam_main_clks[] = { 24 26 GATE_CAM(CLK_CAM_MAIN_LARB13, "cam_main_larb13", "top_cam", 0), 25 27 GATE_CAM(CLK_CAM_MAIN_LARB14, "cam_main_larb14", "top_cam", 1), ··· 74 72 GATE_CAM(CLK_CAM_YUVB_CAMTG, "cam_yuvb_camtg", "top_cam", 2), 75 73 }; 76 74 75 + /* Reset for SMI larb 16a/16b/17a/17b */ 76 + static u16 cam_sys_rst_ofs[] = { 77 + CAM_SYS_SMI_LARB_RST_OFF, 78 + }; 79 + 80 + static const struct mtk_clk_rst_desc cam_sys_rst_desc = { 81 + .version = MTK_RST_SIMPLE, 82 + .rst_bank_ofs = cam_sys_rst_ofs, 83 + .rst_bank_nr = ARRAY_SIZE(cam_sys_rst_ofs), 84 + }; 85 + 77 86 static const struct mtk_clk_desc cam_main_desc = { 78 87 .clks = cam_main_clks, 79 88 .num_clks = ARRAY_SIZE(cam_main_clks), ··· 93 80 static const struct mtk_clk_desc cam_rawa_desc = { 94 81 .clks = cam_rawa_clks, 95 82 .num_clks = ARRAY_SIZE(cam_rawa_clks), 83 + .rst_desc = &cam_sys_rst_desc, 96 84 }; 97 85 98 86 static const struct mtk_clk_desc cam_rawb_desc = { 99 87 .clks = cam_rawb_clks, 100 88 .num_clks = ARRAY_SIZE(cam_rawb_clks), 89 + .rst_desc = &cam_sys_rst_desc, 101 90 }; 102 91 103 92 static const struct mtk_clk_desc cam_yuva_desc = { 104 93 .clks = cam_yuva_clks, 105 94 .num_clks = ARRAY_SIZE(cam_yuva_clks), 95 + .rst_desc = &cam_sys_rst_desc, 106 96 }; 107 97 108 98 static const struct mtk_clk_desc cam_yuvb_desc = { 109 99 .clks = cam_yuvb_clks, 110 100 .num_clks = ARRAY_SIZE(cam_yuvb_clks), 101 + .rst_desc = &cam_sys_rst_desc, 111 102 }; 112 103 113 104 static const struct of_device_id of_match_clk_mt8188_cam[] = {
+18
drivers/clk/mediatek/clk-mt8188-img.c
··· 20 20 #define GATE_IMGSYS(_id, _name, _parent, _shift) \ 21 21 GATE_MTK(_id, _name, _parent, &imgsys_cg_regs, _shift, &mtk_clk_gate_ops_setclr) 22 22 23 + #define IMG_SYS_SMI_LARB_RST_OFF (0xC) 24 + 23 25 static const struct mtk_gate imgsys_main_clks[] = { 24 26 GATE_IMGSYS(CLK_IMGSYS_MAIN_LARB9, "imgsys_main_larb9", "top_img", 0), 25 27 GATE_IMGSYS(CLK_IMGSYS_MAIN_TRAW0, "imgsys_main_traw0", "top_img", 1), ··· 60 58 GATE_IMGSYS(CLK_IMGSYS1_DIP_NR_DIP_NR, "imgsys1_dip_nr_dip_nr", "top_img", 1), 61 59 }; 62 60 61 + /* Reset for SMI larb 10/11a/11b/11c/15 */ 62 + static u16 img_sys_rst_ofs[] = { 63 + IMG_SYS_SMI_LARB_RST_OFF, 64 + }; 65 + 66 + static const struct mtk_clk_rst_desc img_sys_rst_desc = { 67 + .version = MTK_RST_SIMPLE, 68 + .rst_bank_ofs = img_sys_rst_ofs, 69 + .rst_bank_nr = ARRAY_SIZE(img_sys_rst_ofs), 70 + }; 71 + 63 72 static const struct mtk_clk_desc imgsys_main_desc = { 64 73 .clks = imgsys_main_clks, 65 74 .num_clks = ARRAY_SIZE(imgsys_main_clks), ··· 79 66 static const struct mtk_clk_desc imgsys_wpe1_desc = { 80 67 .clks = imgsys_wpe1_clks, 81 68 .num_clks = ARRAY_SIZE(imgsys_wpe1_clks), 69 + .rst_desc = &img_sys_rst_desc, 82 70 }; 83 71 84 72 static const struct mtk_clk_desc imgsys_wpe2_desc = { 85 73 .clks = imgsys_wpe2_clks, 86 74 .num_clks = ARRAY_SIZE(imgsys_wpe2_clks), 75 + .rst_desc = &img_sys_rst_desc, 87 76 }; 88 77 89 78 static const struct mtk_clk_desc imgsys_wpe3_desc = { 90 79 .clks = imgsys_wpe3_clks, 91 80 .num_clks = ARRAY_SIZE(imgsys_wpe3_clks), 81 + .rst_desc = &img_sys_rst_desc, 92 82 }; 93 83 94 84 static const struct mtk_clk_desc imgsys1_dip_top_desc = { 95 85 .clks = imgsys1_dip_top_clks, 96 86 .num_clks = ARRAY_SIZE(imgsys1_dip_top_clks), 87 + .rst_desc = &img_sys_rst_desc, 97 88 }; 98 89 99 90 static const struct mtk_clk_desc imgsys1_dip_nr_desc = { 100 91 .clks = imgsys1_dip_nr_clks, 101 92 .num_clks = ARRAY_SIZE(imgsys1_dip_nr_clks), 93 + .rst_desc = &img_sys_rst_desc, 102 94 }; 103 95 104 96 static const struct of_device_id of_match_clk_mt8188_imgsys_main[] = {
+14
drivers/clk/mediatek/clk-mt8188-ipe.c
··· 20 20 #define GATE_IPE(_id, _name, _parent, _shift) \ 21 21 GATE_MTK(_id, _name, _parent, &ipe_cg_regs, _shift, &mtk_clk_gate_ops_setclr) 22 22 23 + #define IPE_SYS_SMI_LARB_RST_OFF (0xC) 24 + 23 25 static const struct mtk_gate ipe_clks[] = { 24 26 GATE_IPE(CLK_IPE_DPE, "ipe_dpe", "top_ipe", 0), 25 27 GATE_IPE(CLK_IPE_FDVT, "ipe_fdvt", "top_ipe", 1), ··· 30 28 GATE_IPE(CLK_IPE_SMI_LARB12, "ipe_smi_larb12", "top_ipe", 4), 31 29 }; 32 30 31 + /* Reset for SMI larb 12 */ 32 + static u16 ipe_sys_rst_ofs[] = { 33 + IPE_SYS_SMI_LARB_RST_OFF, 34 + }; 35 + 36 + static const struct mtk_clk_rst_desc ipe_sys_rst_desc = { 37 + .version = MTK_RST_SIMPLE, 38 + .rst_bank_ofs = ipe_sys_rst_ofs, 39 + .rst_bank_nr = ARRAY_SIZE(ipe_sys_rst_ofs), 40 + }; 41 + 33 42 static const struct mtk_clk_desc ipe_desc = { 34 43 .clks = ipe_clks, 35 44 .num_clks = ARRAY_SIZE(ipe_clks), 45 + .rst_desc = &ipe_sys_rst_desc, 36 46 }; 37 47 38 48 static const struct of_device_id of_match_clk_mt8188_ipe[] = {