Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/panel: simple: Add DLC DLC0700YZG-1 panel

This patch adds support for DLC DLC0700YZG-1 1024x600 LVDS panels
to the simple-panel driver.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
[m.felsch@pengutronix.de: fix typo in compatible dt-binding]
[m.felsch@pengutronix.de: add property bindings]
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Reviewed-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180523092504.5142-3-m.felsch@pengutronix.de

authored by

Philipp Zabel and committed by
Thierry Reding
0ca0c827 7a6aca49

+45
+13
Documentation/devicetree/bindings/display/panel/dlc,dlc0700yzg-1.txt
··· 1 + DLC Display Co. DLC0700YZG-1 7.0" WSVGA TFT LCD panel 2 + 3 + Required properties: 4 + - compatible: should be "dlc,dlc0700yzg-1" 5 + - power-supply: See simple-panel.txt 6 + 7 + Optional properties: 8 + - reset-gpios: See panel-common.txt 9 + - enable-gpios: See simple-panel.txt 10 + - backlight: See simple-panel.txt 11 + 12 + This binding is compatible with the simple-panel binding, which is specified 13 + in simple-panel.txt in this directory.
+32
drivers/gpu/drm/panel/panel-simple.c
··· 884 884 }, 885 885 }; 886 886 887 + static const struct display_timing dlc_dlc0700yzg_1_timing = { 888 + .pixelclock = { 45000000, 51200000, 57000000 }, 889 + .hactive = { 1024, 1024, 1024 }, 890 + .hfront_porch = { 100, 106, 113 }, 891 + .hback_porch = { 100, 106, 113 }, 892 + .hsync_len = { 100, 108, 114 }, 893 + .vactive = { 600, 600, 600 }, 894 + .vfront_porch = { 8, 11, 15 }, 895 + .vback_porch = { 8, 11, 15 }, 896 + .vsync_len = { 9, 13, 15 }, 897 + .flags = DISPLAY_FLAGS_DE_HIGH, 898 + }; 899 + 900 + static const struct panel_desc dlc_dlc0700yzg_1 = { 901 + .timings = &dlc_dlc0700yzg_1_timing, 902 + .num_timings = 1, 903 + .bpc = 6, 904 + .size = { 905 + .width = 154, 906 + .height = 86, 907 + }, 908 + .delay = { 909 + .prepare = 30, 910 + .enable = 200, 911 + .disable = 200, 912 + }, 913 + .bus_format = MEDIA_BUS_FMT_RGB666_1X7X3_SPWG, 914 + }; 915 + 887 916 static const struct drm_display_mode edt_et057090dhu_mode = { 888 917 .clock = 25175, 889 918 .hdisplay = 640, ··· 2249 2220 }, { 2250 2221 .compatible = "chunghwa,claa101wb01", 2251 2222 .data = &chunghwa_claa101wb01 2223 + }, { 2224 + .compatible = "dlc,dlc0700yzg-1", 2225 + .data = &dlc_dlc0700yzg_1, 2252 2226 }, { 2253 2227 .compatible = "edt,et057090dhu", 2254 2228 .data = &edt_et057090dhu,