Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'imx-bindings-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX DT bindings update for 5.4
- Add SoC bindings for i.MX8MN.
- Add board bindings for pico-pi-imx8m, Hummingboard Pulse, imx8mq
nitrogen, i.MX8QXP AI_ML, ls1046a-frwy etc.
- Add vendor prefix for Anvo-Systems and Einfochips.
- Update LPUART bindings for i.MX8QXP clock requirement.
- Update imx-weim bindings for optional burst clock mode support.
- Update EEPROM bindings for Anvo ANV32E61W device support.

* tag 'imx-bindings-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
dt-bindings: arm: fsl: Add Kontron i.MX6UL N6310 compatibles
dt-bindings: eeprom: at25: Add Anvo ANV32E61W
dt-bindings: vendor-prefixes: Add Anvo-Systems
dt-bindings: arm: fsl: add Hummingboard Pulse
dt-bindings: arm: imx: add imx8mq nitrogen support
dt-bindings: fsl: dspi: Add fsl,ls1088a-dspi compatible string
dt-bindings: arm: imx: Add the soc binding for i.MX8MN
dt-bindings: bus: imx-weim: document optional burst clock mode
dt-bindings: arm: fsl: Add the pico-pi-imx8m board
dt-bindings: arm: Document i.MX8QXP AI_ML board binding
dt-bindings: Add Vendor prefix for Einfochips
dt-bindings: arm: nxp: Add device tree binding for ls1046a-frwy board
dt-bindings: serial: lpuart: add the clock requirement for imx8qxp
dt-bindings: arm: fsl: Add support for ZII i.MX7 RMU2 board

Link: https://lore.kernel.org/r/20190825153237.28829-3-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

+40 -1
+26
Documentation/devicetree/bindings/arm/fsl.yaml
··· 161 161 items: 162 162 - enum: 163 163 - fsl,imx6ul-14x14-evk # i.MX6 UltraLite 14x14 EVK Board 164 + - kontron,imx6ul-n6310-som # Kontron N6310 SOM 165 + - const: fsl,imx6ul 166 + 167 + - description: Kontron N6310 S Board 168 + items: 169 + - const: kontron,imx6ul-n6310-s 170 + - const: kontron,imx6ul-n6310-som 171 + - const: fsl,imx6ul 172 + 173 + - description: Kontron N6310 S 43 Board 174 + items: 175 + - const: kontron,imx6ul-n6310-s-43 176 + - const: kontron,imx6ul-n6310-s 177 + - const: kontron,imx6ul-n6310-som 164 178 - const: fsl,imx6ul 165 179 166 180 - description: i.MX6ULL based Boards ··· 202 188 - fsl,imx7d-sdb # i.MX7 SabreSD Board 203 189 - novtech,imx7d-meerkat96 # i.MX7 Meerkat96 Board 204 190 - tq,imx7d-mba7 # i.MX7D TQ MBa7 with TQMa7D SoM 191 + - zii,imx7d-rmu2 # ZII RMU2 Board 205 192 - zii,imx7d-rpu2 # ZII RPU2 Board 206 193 - const: fsl,imx7d 207 194 ··· 229 214 - fsl,imx8mm-evk # i.MX8MM EVK Board 230 215 - const: fsl,imx8mm 231 216 217 + - description: i.MX8MN based Boards 218 + items: 219 + - enum: 220 + - fsl,imx8mn-ddr4-evk # i.MX8MN DDR4 EVK Board 221 + - const: fsl,imx8mn 222 + 232 223 - description: i.MX8MQ based Boards 233 224 items: 234 225 - enum: 226 + - boundary,imx8mq-nitrogen8m # i.MX8MQ NITROGEN Board 235 227 - fsl,imx8mq-evk # i.MX8MQ EVK Board 236 228 - purism,librem5-devkit # Purism Librem5 devkit 229 + - solidrun,hummingboard-pulse # SolidRun Hummingboard Pulse 230 + - technexion,pico-pi-imx8m # TechNexion PICO-PI-8M evk 237 231 - const: fsl,imx8mq 238 232 239 233 - description: i.MX8QXP based Boards 240 234 items: 241 235 - enum: 236 + - einfochips,imx8qxp-ai_ml # i.MX8QXP AI_ML Board 242 237 - fsl,imx8qxp-mek # i.MX8QXP MEK Board 243 238 - const: fsl,imx8qxp 244 239 ··· 308 283 - description: LS1046A based Boards 309 284 items: 310 285 - enum: 286 + - fsl,ls1046a-frwy 311 287 - fsl,ls1046a-qds 312 288 - fsl,ls1046a-rdb 313 289 - const: fsl,ls1046a
+4
Documentation/devicetree/bindings/bus/imx-weim.txt
··· 44 44 what bootloader sets up in IOMUXC_GPR1[11:0] will be 45 45 used. 46 46 47 + - fsl,burst-clk-enable For "fsl,imx50-weim" and "fsl,imx6q-weim" type of 48 + devices, the presence of this property indicates that 49 + the weim bus should operate in Burst Clock Mode. 50 + 47 51 Timing property for child nodes. It is mandatory, not optional. 48 52 49 53 - fsl,weim-cs-timing: The timing array, contains timing values for the
+1
Documentation/devicetree/bindings/eeprom/at25.txt
··· 3 3 Required properties: 4 4 - compatible : Should be "<vendor>,<type>", and generic value "atmel,at25". 5 5 Example "<vendor>,<type>" values: 6 + "anvo,anv32e61w" 6 7 "microchip,25lc040" 7 8 "st,m95m02" 8 9 "st,m95256"
+4 -1
Documentation/devicetree/bindings/serial/fsl-lpuart.txt
··· 13 13 - reg : Address and length of the register set for the device 14 14 - interrupts : Should contain uart interrupt 15 15 - clocks : phandle + clock specifier pairs, one for each entry in clock-names 16 - - clock-names : should contain: "ipg" - the uart clock 16 + - clock-names : For vf610/ls1021a/imx7ulp, "ipg" clock is for uart bus/baud 17 + clock. For imx8qxp lpuart, "ipg" clock is bus clock that is used to access 18 + lpuart controller registers, it also requires "baud" clock for module to 19 + receive/transmit data. 17 20 18 21 Optional properties: 19 22 - dmas: A list of two dma specifiers, one for each entry in dma-names.
+1
Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt
··· 6 6 or 7 7 "fsl,ls2080a-dspi" followed by "fsl,ls2085a-dspi" 8 8 "fsl,ls1012a-dspi" followed by "fsl,ls1021a-v1.0-dspi" 9 + "fsl,ls1088a-dspi" followed by "fsl,ls1021a-v1.0-dspi" 9 10 - reg : Offset and length of the register set for the device 10 11 - interrupts : Should contain SPI controller interrupt 11 12 - clocks: from common clock binding: handle to dspi clock.
+4
Documentation/devicetree/bindings/vendor-prefixes.yaml
··· 81 81 description: Analogix Semiconductor, Inc. 82 82 "^andestech,.*": 83 83 description: Andes Technology Corporation 84 + "^anvo,.*": 85 + description: Anvo-Systems Dresden GmbH 84 86 "^apm,.*": 85 87 description: Applied Micro Circuits Corporation (APM) 86 88 "^aptina,.*": ··· 271 269 description: Emerging Display Technologies 272 270 "^eeti,.*": 273 271 description: eGalax_eMPIA Technology Inc 272 + "^einfochips,.*": 273 + description: Einfochips 274 274 "^elan,.*": 275 275 description: Elan Microelectronic Corp. 276 276 "^elgin,.*":