Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'v6.2-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into asahi-wip

New boards:
- Model A and blade baseboards for the SOQuartz (rk3568) SoM,
- Anberic RG351M, RG353V, RG353VS; Odroid Go Super, Advance gaming devices
- Odroid M1
- Theobroma px30 SoM with baseboard
- Rockchip's own rk3566 demo board

Some core support for per SoC specifics:
- crypto support for rk3399 and rk3328
- second I2S controller for rk3568
- Cache properties for follow the binding for rk3308 and rk3328

Bigger device support updates for:
- SOQuartz: PCIe2, video output, gpu, HDMI sound
- Rock 3A: eth regulator, eth clock input, Wifi+Bt, I2S, PCIe3

As well as some minor extensions for Rock960 (hdmi supplies),
rk3566-roc-pc (PCIe2), Rock 4C+ (thermal support), Pinephone Pro (Wifi+Bt)

* tag 'v6.2-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (51 commits)
arm64: dts: rockchip: update cache properties for rk3308 and rk3328
arm64: dts: rockchip: Add SOQuartz Model A baseboard
dt-bindings: arm: rockchip: Add SOQuartz Model A
arm64: dts: rockchip: Add SOQuartz blade board
dt-bindings: arm: rockchip: Add SOQuartz Blade
arm64: dts: rockchip: Add Anbernic RG351M
arm64: dts: rockchip: Add Odroid Go Super
arm64: dts: rockchip: Add Odroid Go Advance Black Edition
dt-bindings: arm: rockchip: Add more RK3326 devices
arm64: dts: rockchip: Move most of Odroid Go Advance DTS into a DTSI
arm64: dts: rockchip: Add support of regulator for ethernet node on Rock 3A SBC
arm64: dts: rockchip: Add support of external clock to ethernet node on Rock 3A SBC
arm64: dts: rockchip: Add HDMI supplies on Rock960
arm64: dts: rockchip: Add dts for rockchip rk3566 box demo board
dt-bindings: rockchip: Add Rockchip rk3566 box demo board
arm64: dts: rockchip: Enable PCIe 2 on SOQuartz CM4IO
arm64: dts: rockchip: Enable HDMI sound on SOQuartz
arm64: dts: rockchip: Enable video output and HDMI on SOQuartz
arm64: dts: rockchip: Enable GPU on SOQuartz CM4
arm64: dts: rockchip: enable pcie2 on rk3566-roc-pc
...

Link: https://lore.kernel.org/r/4716610.aeNJFYEL58@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

+4148 -724
+42
Documentation/devicetree/bindings/arm/rockchip.yaml
··· 30 30 - const: amarula,vyasa-rk3288 31 31 - const: rockchip,rk3288 32 32 33 + - description: Anbernic RG351M 34 + items: 35 + - const: anbernic,rg351m 36 + - const: rockchip,rk3326 37 + 33 38 - description: Anbernic RG353P 34 39 items: 35 40 - const: anbernic,rg353p 41 + - const: rockchip,rk3566 42 + 43 + - description: Anbernic RG353V 44 + items: 45 + - const: anbernic,rg353v 46 + - const: rockchip,rk3566 47 + 48 + - description: Anbernic RG353VS 49 + items: 50 + - const: anbernic,rg353vs 36 51 - const: rockchip,rk3566 37 52 38 53 - description: Anbernic RG503 ··· 483 468 - const: hardkernel,rk3326-odroid-go2 484 469 - const: rockchip,rk3326 485 470 471 + - description: Hardkernel Odroid Go Advance Black Edition 472 + items: 473 + - const: hardkernel,rk3326-odroid-go2-v11 474 + - const: rockchip,rk3326 475 + 476 + - description: Hardkernel Odroid Go Super 477 + items: 478 + - const: hardkernel,rk3326-odroid-go3 479 + - const: rockchip,rk3326 480 + 481 + - description: Hardkernel Odroid M1 482 + items: 483 + - const: rockchip,rk3568-odroid-m1 484 + - const: rockchip,rk3568 485 + 486 486 - description: Hugsun X99 TV Box 487 487 items: 488 488 - const: hugsun,x99 ··· 593 563 - description: Pine64 SoQuartz SoM 594 564 items: 595 565 - enum: 566 + - pine64,soquartz-blade 596 567 - pine64,soquartz-cm4io 568 + - pine64,soquartz-model-a 597 569 - const: pine64,soquartz 598 570 - const: rockchip,rk3566 599 571 ··· 741 709 - const: rockchip,rv1108-evb 742 710 - const: rockchip,rv1108 743 711 712 + - description: Theobroma Systems PX30-uQ7 with Haikou baseboard 713 + items: 714 + - const: tsd,px30-ringneck-haikou 715 + - const: rockchip,px30 716 + 744 717 - description: Theobroma Systems RK3368-uQ7 with Haikou baseboard 745 718 items: 746 719 - const: tsd,rk3368-lion-haikou ··· 765 728 items: 766 729 - const: zkmagic,a95x-z2 767 730 - const: rockchip,rk3318 731 + 732 + - description: Rockchip RK3566 BOX Evaluation Demo board 733 + items: 734 + - const: rockchip,rk3566-box-demo 735 + - const: rockchip,rk3566 768 736 769 737 - description: Rockchip RK3568 Evaluation board 770 738 items:
+10
arch/arm64/boot/dts/rockchip/Makefile
··· 3 3 dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-ctouch2.dtb 4 4 dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-ctouch2-of10.dtb 5 5 dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-engicam-px30-core-edimm2.2.dtb 6 + dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-ringneck-haikou.dtb 6 7 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-evb.dtb 7 8 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-roc-cc.dtb 8 9 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3308-rock-pi-s.dtb 9 10 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3318-a95x-z2.dtb 11 + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-anbernic-rg351m.dtb 10 12 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2.dtb 13 + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go2-v11.dtb 14 + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3326-odroid-go3.dtb 11 15 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-a1.dtb 12 16 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb 13 17 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb ··· 66 62 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-sapphire-excavator.dtb 67 63 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb 68 64 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg353p.dtb 65 + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg353v.dtb 66 + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg353vs.dtb 69 67 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-anbernic-rg503.dtb 70 68 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.1.dtb 71 69 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-pinenote-v1.2.dtb 72 70 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-a.dtb 73 71 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-quartz64-b.dtb 74 72 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-roc-pc.dtb 73 + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-soquartz-blade.dtb 75 74 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-soquartz-cm4.dtb 75 + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-soquartz-model-a.dtb 76 + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3566-box-demo.dtb 76 77 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-bpi-r2-pro.dtb 77 78 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-evb1-v10.dtb 79 + dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-odroid-m1.dtb 78 80 dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3568-rock-3a.dtb
+232
arch/arm64/boot/dts/rockchip/px30-ringneck-haikou.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 + /* 3 + * Copyright (c) 2022 Theobroma Systems Design und Consulting GmbH 4 + */ 5 + 6 + /dts-v1/; 7 + #include "px30-ringneck.dtsi" 8 + #include <dt-bindings/input/input.h> 9 + #include <dt-bindings/leds/common.h> 10 + 11 + / { 12 + model = "Theobroma Systems PX30-uQ7 SoM on Haikou devkit"; 13 + compatible = "tsd,px30-ringneck-haikou", "rockchip,px30"; 14 + 15 + aliases { 16 + mmc2 = &sdmmc; 17 + }; 18 + 19 + chosen { 20 + stdout-path = "serial0:115200n8"; 21 + }; 22 + 23 + gpio-keys { 24 + compatible = "gpio-keys"; 25 + pinctrl-0 = <&haikou_keys_pin>; 26 + pinctrl-names = "default"; 27 + 28 + button-batlow-n { 29 + label = "BATLOW#"; 30 + linux,code = <KEY_BATTERY>; 31 + gpios = <&gpio3 RK_PA7 GPIO_ACTIVE_LOW>; 32 + }; 33 + 34 + button-slp-btn-n { 35 + label = "SLP_BTN#"; 36 + linux,code = <KEY_SLEEP>; 37 + gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_LOW>; 38 + }; 39 + 40 + button-wake-n { 41 + label = "WAKE#"; 42 + linux,code = <KEY_WAKEUP>; 43 + gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>; 44 + wakeup-source; 45 + }; 46 + 47 + switch-lid-btn-n { 48 + label = "LID_BTN#"; 49 + linux,code = <SW_LID>; 50 + linux,input-type = <EV_SW>; 51 + gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>; 52 + }; 53 + }; 54 + 55 + leds { 56 + pinctrl-0 = <&module_led_pin>, <&sd_card_led_pin>; 57 + 58 + sd_card_led: led-1 { 59 + gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_HIGH>; 60 + linux,default-trigger = "mmc2"; 61 + function = LED_FUNCTION_SD; 62 + color = <LED_COLOR_ID_BLUE>; 63 + }; 64 + }; 65 + 66 + i2s0-sound { 67 + compatible = "simple-audio-card"; 68 + simple-audio-card,format = "i2s"; 69 + simple-audio-card,name = "Haikou,I2S-codec"; 70 + simple-audio-card,mclk-fs = <512>; 71 + 72 + simple-audio-card,codec { 73 + clocks = <&sgtl5000_clk>; 74 + sound-dai = <&sgtl5000>; 75 + }; 76 + 77 + simple-audio-card,cpu { 78 + bitclock-master; 79 + frame-master; 80 + sound-dai = <&i2s0_8ch>; 81 + }; 82 + }; 83 + 84 + sgtl5000_clk: sgtl5000-oscillator { 85 + compatible = "fixed-clock"; 86 + #clock-cells = <0>; 87 + clock-frequency = <24576000>; 88 + }; 89 + 90 + dc_12v: dc-12v-regulator { 91 + compatible = "regulator-fixed"; 92 + regulator-name = "dc_12v"; 93 + regulator-always-on; 94 + regulator-boot-on; 95 + regulator-min-microvolt = <12000000>; 96 + regulator-max-microvolt = <12000000>; 97 + }; 98 + 99 + vcc3v3_baseboard: vcc3v3-baseboard-regulator { 100 + compatible = "regulator-fixed"; 101 + regulator-name = "vcc3v3_baseboard"; 102 + regulator-always-on; 103 + regulator-boot-on; 104 + regulator-min-microvolt = <3300000>; 105 + regulator-max-microvolt = <3300000>; 106 + vin-supply = <&dc_12v>; 107 + }; 108 + 109 + vcc5v0_baseboard: vcc5v0-baseboard-regulator { 110 + compatible = "regulator-fixed"; 111 + regulator-name = "vcc5v0_baseboard"; 112 + regulator-always-on; 113 + regulator-boot-on; 114 + regulator-min-microvolt = <5000000>; 115 + regulator-max-microvolt = <5000000>; 116 + vin-supply = <&dc_12v>; 117 + }; 118 + 119 + vdda_codec: vdda-codec-regulator { 120 + compatible = "regulator-fixed"; 121 + regulator-name = "vdda_codec"; 122 + regulator-boot-on; 123 + regulator-min-microvolt = <3300000>; 124 + regulator-max-microvolt = <3300000>; 125 + vin-supply = <&vcc5v0_baseboard>; 126 + }; 127 + 128 + vddd_codec: vddd-codec-regulator { 129 + compatible = "regulator-fixed"; 130 + regulator-name = "vddd_codec"; 131 + regulator-boot-on; 132 + regulator-min-microvolt = <1600000>; 133 + regulator-max-microvolt = <1600000>; 134 + vin-supply = <&vcc5v0_baseboard>; 135 + }; 136 + }; 137 + 138 + &i2c2 { 139 + status = "okay"; 140 + clock-frequency = <400000>; 141 + 142 + sgtl5000: codec@a { 143 + compatible = "fsl,sgtl5000"; 144 + reg = <0x0a>; 145 + clocks = <&sgtl5000_clk>; 146 + #sound-dai-cells = <0>; 147 + VDDA-supply = <&vdda_codec>; 148 + VDDIO-supply = <&vcc3v3_baseboard>; 149 + VDDD-supply = <&vddd_codec>; 150 + }; 151 + }; 152 + 153 + &i2c3 { 154 + eeprom@50 { 155 + reg = <0x50>; 156 + compatible = "atmel,24c01"; 157 + pagesize = <8>; 158 + size = <128>; 159 + vcc-supply = <&vcc3v3_baseboard>; 160 + }; 161 + }; 162 + 163 + &i2s0_8ch { 164 + status = "okay"; 165 + }; 166 + 167 + &gmac { 168 + status = "okay"; 169 + }; 170 + 171 + &pinctrl { 172 + haikou { 173 + haikou_keys_pin: haikou-keys-pin { 174 + rockchip,pins = 175 + /* WAKE# */ 176 + <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>, 177 + /* SLP_BTN# */ 178 + <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>, 179 + /* LID_BTN */ 180 + <3 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>, 181 + /* BATLOW# */ 182 + <3 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>, 183 + /* BIOS_DISABLE# */ 184 + <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>; 185 + }; 186 + }; 187 + 188 + leds { 189 + sd_card_led_pin: sd-card-led-pin { 190 + rockchip,pins = 191 + <3 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 192 + }; 193 + }; 194 + }; 195 + 196 + &pwm0 { 197 + status = "okay"; 198 + }; 199 + 200 + &sdmmc { 201 + sd-uhs-sdr12; 202 + sd-uhs-sdr25; 203 + sd-uhs-sdr50; 204 + bus-width = <4>; 205 + cap-mmc-highspeed; 206 + cap-sd-highspeed; 207 + cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>; 208 + disable-wp; 209 + vmmc-supply = <&vcc3v3_baseboard>; 210 + status = "okay"; 211 + }; 212 + 213 + &spi1 { 214 + status = "okay"; 215 + }; 216 + 217 + &u2phy_otg { 218 + status = "okay"; 219 + }; 220 + 221 + &uart0 { 222 + status = "okay"; 223 + }; 224 + 225 + &uart5 { 226 + pinctrl-0 = <&uart5_xfer>; 227 + status = "okay"; 228 + }; 229 + 230 + &usb20_otg { 231 + status = "okay"; 232 + };
+382
arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 + /* 3 + * Copyright (c) 2022 Theobroma Systems Design und Consulting GmbH 4 + */ 5 + 6 + /dts-v1/; 7 + #include "px30.dtsi" 8 + #include <dt-bindings/leds/common.h> 9 + 10 + / { 11 + aliases { 12 + mmc0 = &emmc; 13 + mmc1 = &sdio; 14 + rtc0 = &rtc_twi; 15 + rtc1 = &rk809; 16 + }; 17 + 18 + emmc_pwrseq: emmc-pwrseq { 19 + compatible = "mmc-pwrseq-emmc"; 20 + pinctrl-0 = <&emmc_reset>; 21 + pinctrl-names = "default"; 22 + reset-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_HIGH>; 23 + }; 24 + 25 + leds { 26 + compatible = "gpio-leds"; 27 + pinctrl-names = "default"; 28 + pinctrl-0 = <&module_led_pin>; 29 + status = "okay"; 30 + 31 + module_led: led-0 { 32 + gpios = <&gpio1 RK_PB0 GPIO_ACTIVE_HIGH>; 33 + function = LED_FUNCTION_HEARTBEAT; 34 + linux,default-trigger = "heartbeat"; 35 + color = <LED_COLOR_ID_AMBER>; 36 + }; 37 + }; 38 + 39 + vcc5v0_sys: vccsys-regulator { 40 + compatible = "regulator-fixed"; 41 + regulator-name = "vcc5v0_sys"; 42 + regulator-always-on; 43 + regulator-boot-on; 44 + regulator-min-microvolt = <5000000>; 45 + regulator-max-microvolt = <5000000>; 46 + }; 47 + }; 48 + 49 + &cpu0 { 50 + cpu-supply = <&vdd_arm>; 51 + }; 52 + 53 + &cpu1 { 54 + cpu-supply = <&vdd_arm>; 55 + }; 56 + 57 + &cpu2 { 58 + cpu-supply = <&vdd_arm>; 59 + }; 60 + 61 + &cpu3 { 62 + cpu-supply = <&vdd_arm>; 63 + }; 64 + 65 + &emmc { 66 + bus-width = <8>; 67 + cap-mmc-highspeed; 68 + mmc-hs200-1_8v; 69 + supports-emmc; 70 + mmc-pwrseq = <&emmc_pwrseq>; 71 + non-removable; 72 + vmmc-supply = <&vcc_3v3>; 73 + vqmmc-supply = <&vcc_emmc>; 74 + 75 + status = "okay"; 76 + }; 77 + 78 + /* On-module TI DP83825I PHY but no connector, enable in carrierboard */ 79 + &gmac { 80 + snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; 81 + snps,reset-active-low; 82 + snps,reset-delays-us = <0 50000 50000>; 83 + phy-supply = <&vcc_3v3>; 84 + clock_in_out = "output"; 85 + }; 86 + 87 + &gpio2 { 88 + /* 89 + * The Qseven BIOS_DISABLE signal on the PX30-µQ7 keeps the on-module 90 + * eMMC powered-down initially (in fact it keeps the reset signal 91 + * asserted). BIOS_DISABLE_OVERRIDE pin allows to re-enable eMMC after 92 + * the SPL has been booted from SD Card. 93 + */ 94 + bios-disable-override-hog { 95 + gpios = <RK_PB5 GPIO_ACTIVE_LOW>; 96 + output-high; 97 + line-name = "bios_disable_override"; 98 + gpio-hog; 99 + }; 100 + 101 + /* 102 + * The BIOS_DISABLE hog is a feedback pin for the actual status of the 103 + * signal, ignoring the BIOS_DISABLE_OVERRIDE logic. This usually 104 + * represents the state of a switch on the baseboard. 105 + */ 106 + bios-disable-n-hog { 107 + gpios = <RK_PC2 GPIO_ACTIVE_LOW>; 108 + line-name = "bios_disable"; 109 + input; 110 + gpio-hog; 111 + }; 112 + }; 113 + 114 + &gpu { 115 + status = "okay"; 116 + }; 117 + 118 + &i2c0 { 119 + status = "okay"; 120 + 121 + rk809: pmic@20 { 122 + compatible = "rockchip,rk809"; 123 + reg = <0x20>; 124 + interrupt-parent = <&gpio0>; 125 + interrupts = <7 IRQ_TYPE_LEVEL_LOW>; 126 + pinctrl-0 = <&pmic_int>; 127 + pinctrl-names = "default"; 128 + #clock-cells = <0>; 129 + clock-output-names = "xin32k"; 130 + rockchip,system-power-controller; 131 + wakeup-source; 132 + 133 + vcc1-supply = <&vcc5v0_sys>; 134 + vcc2-supply = <&vcc5v0_sys>; 135 + vcc3-supply = <&vcc5v0_sys>; 136 + vcc4-supply = <&vcc5v0_sys>; 137 + vcc5-supply = <&vcc_3v3>; 138 + vcc6-supply = <&vcc_3v3>; 139 + vcc7-supply = <&vcc_3v3>; 140 + vcc9-supply = <&vcc5v0_sys>; 141 + 142 + regulators { 143 + vdd_log: DCDC_REG1 { 144 + regulator-name = "vdd_log"; 145 + regulator-min-microvolt = <950000>; 146 + regulator-max-microvolt = <1350000>; 147 + regulator-ramp-delay = <6001>; 148 + regulator-always-on; 149 + regulator-boot-on; 150 + 151 + regulator-state-mem { 152 + regulator-on-in-suspend; 153 + regulator-suspend-microvolt = <950000>; 154 + }; 155 + }; 156 + 157 + vdd_arm: DCDC_REG2 { 158 + regulator-name = "vdd_arm"; 159 + regulator-min-microvolt = <950000>; 160 + regulator-max-microvolt = <1350000>; 161 + regulator-ramp-delay = <6001>; 162 + regulator-always-on; 163 + regulator-boot-on; 164 + 165 + regulator-state-mem { 166 + regulator-off-in-suspend; 167 + regulator-suspend-microvolt = <950000>; 168 + }; 169 + }; 170 + 171 + vcc_ddr: DCDC_REG3 { 172 + regulator-name = "vcc_ddr"; 173 + regulator-always-on; 174 + regulator-boot-on; 175 + 176 + regulator-state-mem { 177 + regulator-on-in-suspend; 178 + }; 179 + }; 180 + 181 + vcc_3v0_1v8: vcc_emmc: DCDC_REG4 { 182 + regulator-name = "vcc_3v0_1v8"; 183 + regulator-min-microvolt = <1800000>; 184 + regulator-max-microvolt = <3000000>; 185 + regulator-always-on; 186 + regulator-boot-on; 187 + 188 + regulator-state-mem { 189 + regulator-on-in-suspend; 190 + regulator-suspend-microvolt = <3000000>; 191 + }; 192 + }; 193 + 194 + vcc_3v3: DCDC_REG5 { 195 + regulator-name = "vcc_3v3"; 196 + regulator-min-microvolt = <3300000>; 197 + regulator-max-microvolt = <3300000>; 198 + regulator-always-on; 199 + regulator-boot-on; 200 + 201 + regulator-state-mem { 202 + regulator-on-in-suspend; 203 + regulator-suspend-microvolt = <3300000>; 204 + }; 205 + }; 206 + 207 + vcc_1v8: LDO_REG2 { 208 + regulator-name = "vcc_1v8"; 209 + regulator-min-microvolt = <1800000>; 210 + regulator-max-microvolt = <1800000>; 211 + regulator-always-on; 212 + regulator-boot-on; 213 + 214 + regulator-state-mem { 215 + regulator-on-in-suspend; 216 + regulator-suspend-microvolt = <1800000>; 217 + }; 218 + }; 219 + 220 + vcc_1v0: LDO_REG3 { 221 + regulator-name = "vcc_1v0"; 222 + regulator-min-microvolt = <1000000>; 223 + regulator-max-microvolt = <1000000>; 224 + regulator-always-on; 225 + regulator-boot-on; 226 + 227 + regulator-state-mem { 228 + regulator-on-in-suspend; 229 + regulator-suspend-microvolt = <1000000>; 230 + }; 231 + }; 232 + 233 + vccio_sd: LDO_REG5 { 234 + regulator-name = "vccio_sd"; 235 + regulator-min-microvolt = <1800000>; 236 + regulator-max-microvolt = <3300000>; 237 + regulator-always-on; 238 + regulator-boot-on; 239 + 240 + regulator-state-mem { 241 + regulator-on-in-suspend; 242 + regulator-suspend-microvolt = <3300000>; 243 + }; 244 + }; 245 + 246 + vcc_lcd: LDO_REG7 { 247 + regulator-always-on; 248 + regulator-boot-on; 249 + regulator-min-microvolt = <1000000>; 250 + regulator-max-microvolt = <1000000>; 251 + regulator-name = "vcc_lcd"; 252 + 253 + regulator-state-mem { 254 + regulator-off-in-suspend; 255 + regulator-suspend-microvolt = <1000000>; 256 + }; 257 + }; 258 + 259 + vcc_1v8_lcd: LDO_REG8 { 260 + regulator-name = "vcc_1v8_lcd"; 261 + regulator-min-microvolt = <1800000>; 262 + regulator-max-microvolt = <1800000>; 263 + regulator-always-on; 264 + regulator-boot-on; 265 + 266 + regulator-state-mem { 267 + regulator-on-in-suspend; 268 + regulator-suspend-microvolt = <1800000>; 269 + }; 270 + }; 271 + 272 + vcca_1v8: LDO_REG9 { 273 + regulator-name = "vcca_1v8"; 274 + regulator-min-microvolt = <1800000>; 275 + regulator-max-microvolt = <1800000>; 276 + regulator-always-on; 277 + regulator-boot-on; 278 + 279 + regulator-state-mem { 280 + regulator-off-in-suspend; 281 + regulator-suspend-microvolt = <1800000>; 282 + }; 283 + }; 284 + }; 285 + }; 286 + }; 287 + 288 + &i2c1 { 289 + status = "okay"; 290 + 291 + /* SE05x is limited to Fast Mode */ 292 + clock-frequency = <400000>; 293 + 294 + fan: fan@18 { 295 + compatible = "ti,amc6821"; 296 + reg = <0x18>; 297 + #cooling-cells = <2>; 298 + }; 299 + 300 + rtc_twi: rtc@6f { 301 + compatible = "isil,isl1208"; 302 + reg = <0x6f>; 303 + }; 304 + }; 305 + 306 + &i2c3 { 307 + status = "okay"; 308 + }; 309 + 310 + &i2s0_8ch { 311 + rockchip,trcm-sync-tx-only; 312 + 313 + pinctrl-0 = <&i2s0_8ch_sclktx &i2s0_8ch_lrcktx 314 + &i2s0_8ch_sdo0 &i2s0_8ch_sdi0>; 315 + }; 316 + 317 + &io_domains { 318 + vccio1-supply = <&vcc_3v3>; 319 + vccio2-supply = <&vccio_sd>; 320 + vccio3-supply = <&vcc_3v3>; 321 + vccio4-supply = <&vcc_3v3>; 322 + vccio5-supply = <&vcc_3v3>; 323 + vccio6-supply = <&vcc_emmc>; 324 + vccio-oscgpi-supply = <&vcc_3v3>; 325 + 326 + status = "okay"; 327 + }; 328 + 329 + &pinctrl { 330 + emmc { 331 + emmc_reset: emmc-reset { 332 + rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 333 + }; 334 + }; 335 + 336 + leds { 337 + module_led_pin: module-led-pin { 338 + rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 339 + }; 340 + }; 341 + 342 + pmic { 343 + pmic_int: pmic-int { 344 + rockchip,pins = 345 + <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; 346 + }; 347 + }; 348 + }; 349 + 350 + &saradc { 351 + vref-supply = <&vcc_1v8>; 352 + status = "okay"; 353 + }; 354 + 355 + &sdmmc { 356 + vqmmc-supply = <&vccio_sd>; 357 + }; 358 + 359 + &tsadc { 360 + status = "okay"; 361 + }; 362 + 363 + &u2phy { 364 + status = "okay"; 365 + }; 366 + 367 + &u2phy_host { 368 + status = "okay"; 369 + }; 370 + 371 + /* Mule UCAN */ 372 + &usb_host0_ehci { 373 + status = "okay"; 374 + }; 375 + 376 + &usb_host0_ohci { 377 + status = "okay"; 378 + }; 379 + 380 + &wdt { 381 + status = "okay"; 382 + };
+1
arch/arm64/boot/dts/rockchip/rk3308.dtsi
··· 96 96 97 97 l2: l2-cache { 98 98 compatible = "cache"; 99 + cache-level = <2>; 99 100 }; 100 101 }; 101 102
+33
arch/arm64/boot/dts/rockchip/rk3326-anbernic-rg351m.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 + /* 3 + * Copyright (c) 2019 Hardkernel Co., Ltd 4 + * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH 5 + * Copyright (c) 2022 Maya Matuszczyk <maccraft123mc@gmail.com> 6 + */ 7 + 8 + /dts-v1/; 9 + #include "rk3326-odroid-go.dtsi" 10 + 11 + / { 12 + model = "Anbernic RG351M"; 13 + compatible = "anbernic,rg351m", "rockchip,rk3326"; 14 + 15 + vibrator { 16 + compatible = "pwm-vibrator"; 17 + pwms = <&pwm0 0 1000000 0>; 18 + pwm-names = "enable"; 19 + }; 20 + }; 21 + 22 + /delete-node/ &builtin_gamepad; 23 + /delete-node/ &vcc_host; /* conflicts with pwm vibration motor */ 24 + 25 + &internal_display { 26 + compatible = "elida,kd35t133"; 27 + }; 28 + 29 + &pwm0 { 30 + status = "okay"; 31 + }; 32 + 33 + /delete-node/ &rk817_charger;
+600
arch/arm64/boot/dts/rockchip/rk3326-odroid-go.dtsi
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 + /* 3 + * Copyright (c) 2019 Hardkernel Co., Ltd 4 + * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH 5 + * Copyright (c) 2022 Maya Matuszczyk <maccraft123mc@gmail.com> 6 + */ 7 + 8 + /dts-v1/; 9 + #include <dt-bindings/gpio/gpio.h> 10 + #include <dt-bindings/input/input.h> 11 + #include <dt-bindings/pinctrl/rockchip.h> 12 + #include "rk3326.dtsi" 13 + 14 + / { 15 + aliases { 16 + mmc0 = &sdmmc; 17 + }; 18 + 19 + chosen { 20 + stdout-path = "serial2:115200n8"; 21 + }; 22 + 23 + backlight: backlight { 24 + compatible = "pwm-backlight"; 25 + power-supply = <&vcc_bl>; 26 + pwms = <&pwm1 0 25000 0>; 27 + }; 28 + 29 + builtin_gamepad: gpio-keys { 30 + compatible = "gpio-keys"; 31 + pinctrl-names = "default"; 32 + pinctrl-0 = <&btn_pins>; 33 + 34 + button-sw1 { 35 + gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_LOW>; 36 + label = "DPAD-UP"; 37 + linux,code = <BTN_DPAD_UP>; 38 + }; 39 + button-sw2 { 40 + gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>; 41 + label = "DPAD-DOWN"; 42 + linux,code = <BTN_DPAD_DOWN>; 43 + }; 44 + button-sw3 { 45 + gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>; 46 + label = "DPAD-LEFT"; 47 + linux,code = <BTN_DPAD_LEFT>; 48 + }; 49 + button-sw4 { 50 + gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_LOW>; 51 + label = "DPAD-RIGHT"; 52 + linux,code = <BTN_DPAD_RIGHT>; 53 + }; 54 + button-sw5 { 55 + gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>; 56 + label = "BTN-A"; 57 + linux,code = <BTN_EAST>; 58 + }; 59 + button-sw6 { 60 + gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_LOW>; 61 + label = "BTN-B"; 62 + linux,code = <BTN_SOUTH>; 63 + }; 64 + button-sw7 { 65 + gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_LOW>; 66 + label = "BTN-Y"; 67 + linux,code = <BTN_WEST>; 68 + }; 69 + button-sw8 { 70 + gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>; 71 + label = "BTN-X"; 72 + linux,code = <BTN_NORTH>; 73 + }; 74 + btn_f1: button-sw9 { 75 + gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>; 76 + label = "F1"; 77 + linux,code = <BTN_TRIGGER_HAPPY1>; 78 + }; 79 + btn_f2: button-sw10 { 80 + gpios = <&gpio2 RK_PA1 GPIO_ACTIVE_LOW>; 81 + label = "F2"; 82 + linux,code = <BTN_TRIGGER_HAPPY2>; 83 + }; 84 + btn_f3: button-sw11 { 85 + gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>; 86 + label = "F3"; 87 + linux,code = <BTN_TRIGGER_HAPPY3>; 88 + }; 89 + btn_f4: button-sw12 { 90 + gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_LOW>; 91 + label = "F4"; 92 + linux,code = <BTN_TRIGGER_HAPPY4>; 93 + }; 94 + btn_f5: button-sw13 { 95 + gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_LOW>; 96 + label = "F5"; 97 + linux,code = <BTN_TRIGGER_HAPPY5>; 98 + }; 99 + btn_f6: button-sw14 { 100 + gpios = <&gpio2 RK_PA5 GPIO_ACTIVE_LOW>; 101 + label = "F6"; 102 + linux,code = <BTN_TRIGGER_HAPPY6>; 103 + }; 104 + button-sw15 { 105 + gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>; 106 + label = "TOP-LEFT"; 107 + linux,code = <BTN_TL>; 108 + }; 109 + button-sw16 { 110 + gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_LOW>; 111 + label = "TOP-RIGHT"; 112 + linux,code = <BTN_TR>; 113 + }; 114 + }; 115 + 116 + leds: gpio-leds { 117 + compatible = "gpio-leds"; 118 + pinctrl-names = "default"; 119 + pinctrl-0 = <&blue_led_pin>; 120 + 121 + blue_led: led-0 { 122 + label = "blue:heartbeat"; 123 + gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; 124 + linux,default-trigger = "heartbeat"; 125 + }; 126 + }; 127 + 128 + rk817-sound { 129 + compatible = "simple-audio-card"; 130 + simple-audio-card,name = "Analog"; 131 + simple-audio-card,format = "i2s"; 132 + simple-audio-card,hp-det-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; 133 + simple-audio-card,mclk-fs = <256>; 134 + simple-audio-card,widgets = 135 + "Microphone", "Mic Jack", 136 + "Headphone", "Headphones", 137 + "Speaker", "Speaker"; 138 + simple-audio-card,routing = 139 + "MICL", "Mic Jack", 140 + "Headphones", "HPOL", 141 + "Headphones", "HPOR", 142 + "Speaker", "SPKO"; 143 + 144 + simple-audio-card,codec { 145 + sound-dai = <&rk817>; 146 + }; 147 + 148 + simple-audio-card,cpu { 149 + sound-dai = <&i2s1_2ch>; 150 + }; 151 + }; 152 + 153 + vccsys: vccsys { 154 + compatible = "regulator-fixed"; 155 + regulator-name = "vcc3v8_sys"; 156 + regulator-always-on; 157 + regulator-min-microvolt = <3800000>; 158 + regulator-max-microvolt = <3800000>; 159 + }; 160 + 161 + vcc_host: vcc_host { 162 + compatible = "regulator-fixed"; 163 + regulator-name = "vcc_host"; 164 + regulator-min-microvolt = <5000000>; 165 + regulator-max-microvolt = <5000000>; 166 + 167 + gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; 168 + enable-active-high; 169 + regulator-always-on; 170 + regulator-boot-on; 171 + vin-supply = <&usb_midu>; 172 + }; 173 + }; 174 + 175 + &cpu0 { 176 + cpu-supply = <&vdd_arm>; 177 + }; 178 + 179 + &cpu1 { 180 + cpu-supply = <&vdd_arm>; 181 + }; 182 + 183 + &cpu2 { 184 + cpu-supply = <&vdd_arm>; 185 + }; 186 + 187 + &cpu3 { 188 + cpu-supply = <&vdd_arm>; 189 + }; 190 + 191 + &cru { 192 + assigned-clocks = <&cru PLL_NPLL>, 193 + <&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>, 194 + <&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>, 195 + <&cru PCLK_BUS_PRE>, <&cru SCLK_GPU>, 196 + <&cru PLL_CPLL>; 197 + 198 + assigned-clock-rates = <1188000000>, 199 + <200000000>, <200000000>, 200 + <150000000>, <150000000>, 201 + <100000000>, <200000000>, 202 + <17000000>; 203 + }; 204 + 205 + &display_subsystem { 206 + status = "okay"; 207 + }; 208 + 209 + &dsi { 210 + status = "okay"; 211 + 212 + ports { 213 + mipi_out: port@1 { 214 + reg = <1>; 215 + 216 + mipi_out_panel: endpoint { 217 + remote-endpoint = <&mipi_in_panel>; 218 + }; 219 + }; 220 + }; 221 + 222 + internal_display: panel@0 { 223 + reg = <0>; 224 + backlight = <&backlight>; 225 + iovcc-supply = <&vcc_lcd>; 226 + reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; 227 + rotation = <270>; 228 + vdd-supply = <&vcc_lcd>; 229 + 230 + port { 231 + mipi_in_panel: endpoint { 232 + remote-endpoint = <&mipi_out_panel>; 233 + }; 234 + }; 235 + }; 236 + }; 237 + 238 + &dsi_dphy { 239 + status = "okay"; 240 + }; 241 + 242 + &gpu { 243 + mali-supply = <&vdd_logic>; 244 + status = "okay"; 245 + }; 246 + 247 + &i2c0 { 248 + clock-frequency = <400000>; 249 + i2c-scl-falling-time-ns = <16>; 250 + i2c-scl-rising-time-ns = <280>; 251 + status = "okay"; 252 + 253 + rk817: pmic@20 { 254 + compatible = "rockchip,rk817"; 255 + reg = <0x20>; 256 + interrupt-parent = <&gpio0>; 257 + interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>; 258 + clock-output-names = "rk808-clkout1", "xin32k"; 259 + clock-names = "mclk"; 260 + clocks = <&cru SCLK_I2S1_OUT>; 261 + pinctrl-names = "default"; 262 + pinctrl-0 = <&pmic_int>, <&i2s1_2ch_mclk>; 263 + wakeup-source; 264 + #clock-cells = <1>; 265 + #sound-dai-cells = <0>; 266 + 267 + vcc1-supply = <&vccsys>; 268 + vcc2-supply = <&vccsys>; 269 + vcc3-supply = <&vccsys>; 270 + vcc4-supply = <&vccsys>; 271 + vcc5-supply = <&vccsys>; 272 + vcc6-supply = <&vccsys>; 273 + vcc7-supply = <&vccsys>; 274 + vcc8-supply = <&vccsys>; 275 + 276 + regulators { 277 + vdd_logic: DCDC_REG1 { 278 + regulator-name = "vdd_logic"; 279 + regulator-min-microvolt = <950000>; 280 + regulator-max-microvolt = <1150000>; 281 + regulator-ramp-delay = <6001>; 282 + regulator-always-on; 283 + regulator-boot-on; 284 + 285 + regulator-state-mem { 286 + regulator-on-in-suspend; 287 + regulator-suspend-microvolt = <950000>; 288 + }; 289 + }; 290 + 291 + vdd_arm: DCDC_REG2 { 292 + regulator-name = "vdd_arm"; 293 + regulator-min-microvolt = <950000>; 294 + regulator-max-microvolt = <1350000>; 295 + regulator-ramp-delay = <6001>; 296 + regulator-always-on; 297 + regulator-boot-on; 298 + 299 + regulator-state-mem { 300 + regulator-off-in-suspend; 301 + regulator-suspend-microvolt = <950000>; 302 + }; 303 + }; 304 + 305 + vcc_ddr: DCDC_REG3 { 306 + regulator-name = "vcc_ddr"; 307 + regulator-always-on; 308 + regulator-boot-on; 309 + 310 + regulator-state-mem { 311 + regulator-on-in-suspend; 312 + }; 313 + }; 314 + 315 + vcc_3v3: DCDC_REG4 { 316 + regulator-name = "vcc_3v3"; 317 + regulator-min-microvolt = <3300000>; 318 + regulator-max-microvolt = <3300000>; 319 + regulator-always-on; 320 + regulator-boot-on; 321 + 322 + regulator-state-mem { 323 + regulator-off-in-suspend; 324 + regulator-suspend-microvolt = <3300000>; 325 + }; 326 + }; 327 + 328 + vcc_1v8: LDO_REG2 { 329 + regulator-name = "vcc_1v8"; 330 + regulator-min-microvolt = <1800000>; 331 + regulator-max-microvolt = <1800000>; 332 + regulator-always-on; 333 + regulator-boot-on; 334 + 335 + regulator-state-mem { 336 + regulator-on-in-suspend; 337 + regulator-suspend-microvolt = <1800000>; 338 + }; 339 + }; 340 + 341 + vdd_1v0: LDO_REG3 { 342 + regulator-name = "vdd_1v0"; 343 + regulator-min-microvolt = <1000000>; 344 + regulator-max-microvolt = <1000000>; 345 + regulator-always-on; 346 + regulator-boot-on; 347 + 348 + regulator-state-mem { 349 + regulator-on-in-suspend; 350 + regulator-suspend-microvolt = <1000000>; 351 + }; 352 + }; 353 + 354 + vcc3v3_pmu: LDO_REG4 { 355 + regulator-name = "vcc3v3_pmu"; 356 + regulator-min-microvolt = <3300000>; 357 + regulator-max-microvolt = <3300000>; 358 + regulator-always-on; 359 + regulator-boot-on; 360 + 361 + regulator-state-mem { 362 + regulator-on-in-suspend; 363 + regulator-suspend-microvolt = <3300000>; 364 + }; 365 + }; 366 + 367 + vccio_sd: LDO_REG5 { 368 + regulator-name = "vccio_sd"; 369 + regulator-min-microvolt = <1800000>; 370 + regulator-max-microvolt = <3300000>; 371 + regulator-always-on; 372 + regulator-boot-on; 373 + 374 + regulator-state-mem { 375 + regulator-on-in-suspend; 376 + regulator-suspend-microvolt = <3300000>; 377 + }; 378 + }; 379 + 380 + vcc_sd: LDO_REG6 { 381 + regulator-name = "vcc_sd"; 382 + regulator-min-microvolt = <3300000>; 383 + regulator-max-microvolt = <3300000>; 384 + regulator-boot-on; 385 + 386 + regulator-state-mem { 387 + regulator-on-in-suspend; 388 + regulator-suspend-microvolt = <3300000>; 389 + }; 390 + }; 391 + 392 + vcc_bl: LDO_REG7 { 393 + regulator-name = "vcc_bl"; 394 + regulator-min-microvolt = <3300000>; 395 + regulator-max-microvolt = <3300000>; 396 + 397 + regulator-state-mem { 398 + regulator-off-in-suspend; 399 + regulator-suspend-microvolt = <3300000>; 400 + }; 401 + }; 402 + 403 + vcc_lcd: LDO_REG8 { 404 + regulator-name = "vcc_lcd"; 405 + regulator-min-microvolt = <2800000>; 406 + regulator-max-microvolt = <2800000>; 407 + 408 + regulator-state-mem { 409 + regulator-off-in-suspend; 410 + regulator-suspend-microvolt = <2800000>; 411 + }; 412 + }; 413 + 414 + LDO_REG9 { 415 + /* unused */ 416 + }; 417 + 418 + usb_midu: BOOST { 419 + regulator-name = "usb_midu"; 420 + regulator-min-microvolt = <5000000>; 421 + regulator-max-microvolt = <5400000>; 422 + regulator-always-on; 423 + regulator-boot-on; 424 + }; 425 + }; 426 + 427 + rk817_charger: charger { 428 + rockchip,resistor-sense-micro-ohms = <10000>; 429 + rockchip,sleep-enter-current-microamp = <300000>; 430 + rockchip,sleep-filter-current-microamp = <100000>; 431 + }; 432 + 433 + rk817_codec: codec { 434 + rockchip,mic-in-differential; 435 + }; 436 + }; 437 + }; 438 + 439 + /* EXT Header(P2): 7(SCL:GPIO0.C2), 8(SDA:GPIO0.C3) */ 440 + &i2c1 { 441 + clock-frequency = <400000>; 442 + status = "okay"; 443 + }; 444 + 445 + /* I2S 1 Channel Used */ 446 + &i2s1_2ch { 447 + status = "okay"; 448 + }; 449 + 450 + &io_domains { 451 + vccio1-supply = <&vcc_3v3>; 452 + vccio2-supply = <&vccio_sd>; 453 + vccio3-supply = <&vcc_3v3>; 454 + vccio4-supply = <&vcc_3v3>; 455 + vccio5-supply = <&vcc_3v3>; 456 + vccio6-supply = <&vcc_3v3>; 457 + status = "okay"; 458 + }; 459 + 460 + &pmu_io_domains { 461 + pmuio1-supply = <&vcc3v3_pmu>; 462 + pmuio2-supply = <&vcc3v3_pmu>; 463 + status = "okay"; 464 + }; 465 + 466 + &pwm1 { 467 + status = "okay"; 468 + }; 469 + 470 + &saradc { 471 + vref-supply = <&vcc_1v8>; 472 + status = "okay"; 473 + }; 474 + 475 + &sdmmc { 476 + cap-sd-highspeed; 477 + card-detect-delay = <200>; 478 + cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>; /*[> CD GPIO <]*/ 479 + sd-uhs-sdr12; 480 + sd-uhs-sdr25; 481 + sd-uhs-sdr50; 482 + sd-uhs-sdr104; 483 + vmmc-supply = <&vcc_sd>; 484 + vqmmc-supply = <&vccio_sd>; 485 + status = "okay"; 486 + }; 487 + 488 + &sfc { 489 + pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus2>; 490 + pinctrl-names = "default"; 491 + #address-cells = <1>; 492 + #size-cells = <0>; 493 + status = "okay"; 494 + 495 + flash@0 { 496 + compatible = "jedec,spi-nor"; 497 + reg = <0>; 498 + spi-max-frequency = <108000000>; 499 + spi-rx-bus-width = <2>; 500 + spi-tx-bus-width = <1>; 501 + }; 502 + }; 503 + 504 + &tsadc { 505 + status = "okay"; 506 + }; 507 + 508 + &u2phy { 509 + status = "okay"; 510 + 511 + u2phy_host: host-port { 512 + status = "okay"; 513 + }; 514 + 515 + u2phy_otg: otg-port { 516 + status = "disabled"; 517 + }; 518 + }; 519 + 520 + &usb20_otg { 521 + status = "okay"; 522 + }; 523 + 524 + /* EXT Header(P2): 2(RXD:GPIO1.C0),3(TXD:.C1),4(CTS:.C2),5(RTS:.C3) */ 525 + &uart1 { 526 + pinctrl-names = "default"; 527 + pinctrl-0 = <&uart1_xfer &uart1_cts>; 528 + status = "okay"; 529 + }; 530 + 531 + &uart2 { 532 + pinctrl-names = "default"; 533 + pinctrl-0 = <&uart2m1_xfer>; 534 + status = "okay"; 535 + }; 536 + 537 + &vopb { 538 + status = "okay"; 539 + }; 540 + 541 + &vopb_mmu { 542 + status = "okay"; 543 + }; 544 + 545 + &pinctrl { 546 + btns { 547 + btn_pins: btn-pins { 548 + rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, 549 + <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>, 550 + <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>, 551 + <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>, 552 + <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>, 553 + <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>, 554 + <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>, 555 + <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>, 556 + <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>, 557 + <2 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>, 558 + <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, 559 + <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>, 560 + <2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>, 561 + <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>, 562 + <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>, 563 + <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; 564 + }; 565 + }; 566 + 567 + headphone { 568 + hp_det: hp-det { 569 + rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>; 570 + }; 571 + }; 572 + 573 + leds { 574 + blue_led_pin: blue-led-pin { 575 + rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; 576 + }; 577 + }; 578 + 579 + pmic { 580 + dc_det: dc-det { 581 + rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 582 + }; 583 + 584 + pmic_int: pmic-int { 585 + rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; 586 + }; 587 + 588 + soc_slppin_gpio: soc_slppin_gpio { 589 + rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>; 590 + }; 591 + 592 + soc_slppin_rst: soc_slppin_rst { 593 + rockchip,pins = <0 RK_PA4 2 &pcfg_pull_none>; 594 + }; 595 + 596 + soc_slppin_slp: soc_slppin_slp { 597 + rockchip,pins = <0 RK_PA4 1 &pcfg_pull_none>; 598 + }; 599 + }; 600 + };
+156
arch/arm64/boot/dts/rockchip/rk3326-odroid-go2-v11.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 + /* 3 + * Copyright (c) 2019 Hardkernel Co., Ltd 4 + * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH 5 + * Copyright (c) 2022 Maya Matuszczyk <maccraft123mc@gmail.com> 6 + */ 7 + 8 + /dts-v1/; 9 + #include "rk3326-odroid-go.dtsi" 10 + 11 + / { 12 + model = "ODROID-GO Advance Black Edition"; 13 + compatible = "hardkernel,rk3326-odroid-go2-v11", "rockchip,rk3326"; 14 + 15 + aliases { 16 + mmc1 = &sdio; 17 + }; 18 + 19 + analog_sticks: adc-joystick { 20 + compatible = "adc-joystick"; 21 + io-channels = <&saradc 1>, 22 + <&saradc 2>; 23 + poll-interval = <60>; 24 + #address-cells = <1>; 25 + #size-cells = <0>; 26 + 27 + axis@0 { 28 + reg = <0>; 29 + abs-flat = <10>; 30 + abs-fuzz = <10>; 31 + abs-range = <172 772>; 32 + linux,code = <ABS_X>; 33 + }; 34 + 35 + axis@1 { 36 + reg = <1>; 37 + abs-flat = <10>; 38 + abs-fuzz = <10>; 39 + abs-range = <278 815>; 40 + linux,code = <ABS_Y>; 41 + }; 42 + }; 43 + 44 + battery: battery { 45 + compatible = "simple-battery"; 46 + charge-full-design-microamp-hours = <3000000>; 47 + charge-term-current-microamp = <300000>; 48 + constant-charge-current-max-microamp = <2000000>; 49 + constant-charge-voltage-max-microvolt = <4200000>; 50 + factory-internal-resistance-micro-ohms = <180000>; 51 + voltage-max-design-microvolt = <4100000>; 52 + voltage-min-design-microvolt = <3500000>; 53 + 54 + ocv-capacity-celsius = <20>; 55 + ocv-capacity-table-0 = <4046950 100>, <4001920 95>, <3967900 90>, <3919950 85>, 56 + <3888450 80>, <3861850 75>, <3831540 70>, <3799130 65>, 57 + <3768190 60>, <3745650 55>, <3726610 50>, <3711630 45>, 58 + <3696720 40>, <3685660 35>, <3674950 30>, <3663050 25>, 59 + <3649470 20>, <3635260 15>, <3616920 10>, <3592440 5>, 60 + <3574170 0>; 61 + }; 62 + 63 + wifi_pwrseq: wifi-pwrseq { 64 + compatible = "mmc-pwrseq-simple"; 65 + pinctrl-names = "default"; 66 + pinctrl-0 = <&wifi_pwrseq_pins>; 67 + reset-gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>; 68 + }; 69 + }; 70 + 71 + &builtin_gamepad { 72 + button-sw20 { 73 + gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 74 + label = "TOP-LEFT 2"; 75 + linux,code = <BTN_TL2>; 76 + }; 77 + button-sw21 { 78 + gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>; 79 + label = "TOP-RIGHT 2"; 80 + linux,code = <BTN_TR2>; 81 + }; 82 + }; 83 + 84 + &internal_display { 85 + compatible = "elida,kd35t133"; 86 + }; 87 + 88 + &rk817 { 89 + regulators { 90 + vcc_wifi: LDO_REG9 { 91 + regulator-name = "vcc_wifi"; 92 + regulator-min-microvolt = <3300000>; 93 + regulator-max-microvolt = <3300000>; 94 + 95 + regulator-state-mem { 96 + regulator-on-in-suspend; 97 + regulator-suspend-microvolt = <3300000>; 98 + }; 99 + }; 100 + }; 101 + }; 102 + 103 + &rk817_charger { 104 + monitored-battery = <&battery>; 105 + }; 106 + 107 + &sdio { 108 + bus-width = <4>; 109 + cap-sd-highspeed; 110 + cap-sdio-irq; 111 + disable-wp; 112 + keep-power-in-suspend; 113 + mmc-pwrseq = <&wifi_pwrseq>; 114 + non-removable; 115 + vmmc-supply = <&vcc_wifi>; 116 + #address-cells = <1>; 117 + #size-cells = <0>; 118 + status = "okay"; 119 + 120 + esp8089: wifi@1 { 121 + compatible = "esp,esp8089"; 122 + reg = <1>; 123 + }; 124 + }; 125 + 126 + &pinctrl { 127 + btns { 128 + btn_pins: btn-pins { 129 + rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, 130 + <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>, 131 + <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>, 132 + <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>, 133 + <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>, 134 + <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>, 135 + <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>, 136 + <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>, 137 + <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>, 138 + <2 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>, 139 + <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, 140 + <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>, 141 + <2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>, 142 + <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>, 143 + <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>, 144 + <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>, 145 + <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>, 146 + <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>; 147 + }; 148 + }; 149 + 150 + wifi { 151 + wifi_pwrseq_pins: wifi-pwrseq-pins { 152 + rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>, 153 + <3 RK_PB6 RK_FUNC_GPIO &pcfg_output_high>; 154 + }; 155 + }; 156 + };
+9 -611
arch/arm64/boot/dts/rockchip/rk3326-odroid-go2.dts
··· 2 2 /* 3 3 * Copyright (c) 2019 Hardkernel Co., Ltd 4 4 * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH 5 + * Copyright (c) 2022 Maya Matuszczyk <maccraft123mc@gmail.com> 5 6 */ 6 7 7 8 /dts-v1/; 8 - #include <dt-bindings/gpio/gpio.h> 9 - #include <dt-bindings/input/input.h> 10 - #include <dt-bindings/pinctrl/rockchip.h> 11 - #include "rk3326.dtsi" 9 + #include "rk3326-odroid-go.dtsi" 12 10 13 11 / { 14 12 model = "ODROID-GO Advance"; 15 13 compatible = "hardkernel,rk3326-odroid-go2", "rockchip,rk3326"; 16 14 17 - aliases { 18 - mmc0 = &sdmmc; 19 - }; 20 - 21 - chosen { 22 - stdout-path = "serial2:115200n8"; 23 - }; 24 - 25 - adc-joystick { 15 + analog_sticks: adc-joystick { 26 16 compatible = "adc-joystick"; 27 17 io-channels = <&saradc 1>, 28 18 <&saradc 2>; 19 + poll-interval = <60>; 29 20 #address-cells = <1>; 30 21 #size-cells = <0>; 31 22 ··· 37 46 }; 38 47 }; 39 48 40 - backlight: backlight { 41 - compatible = "pwm-backlight"; 42 - power-supply = <&vcc_bl>; 43 - pwms = <&pwm1 0 25000 0>; 44 - }; 45 - 46 49 battery: battery { 47 50 compatible = "simple-battery"; 48 51 charge-full-design-microamp-hours = <3000000>; ··· 48 63 voltage-min-design-microvolt = <3500000>; 49 64 50 65 ocv-capacity-celsius = <20>; 51 - ocv-capacity-table-0 = <4046950 100>, <4001920 95>, <3967900 90>, <3919950 85>, 66 + ocv-capacity-table-0 = <4046950 100>, <4001920 95>, <3967900 90>, <3919950 85>, 52 67 <3888450 80>, <3861850 75>, <3831540 70>, <3799130 65>, 53 68 <3768190 60>, <3745650 55>, <3726610 50>, <3711630 45>, 54 69 <3696720 40>, <3685660 35>, <3674950 30>, <3663050 25>, 55 70 <3649470 20>, <3635260 15>, <3616920 10>, <3592440 5>, 56 71 <3574170 0>; 57 72 }; 58 - 59 - gpio-keys { 60 - compatible = "gpio-keys"; 61 - pinctrl-names = "default"; 62 - pinctrl-0 = <&btn_pins>; 63 - 64 - /* 65 - * *** ODROIDGO2-Advance Switch layout *** 66 - * |------------------------------------------------| 67 - * | sw15 sw16 | 68 - * |------------------------------------------------| 69 - * | sw1 |-------------------| sw8 | 70 - * | sw3 sw4 | | sw7 sw5 | 71 - * | sw2 | LCD Display | sw6 | 72 - * | | | | 73 - * | |-------------------| | 74 - * | sw9 sw10 sw11 sw12 sw13 sw14 | 75 - * |------------------------------------------------| 76 - */ 77 - 78 - button-sw1 { 79 - gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_LOW>; 80 - label = "DPAD-UP"; 81 - linux,code = <BTN_DPAD_UP>; 82 - }; 83 - button-sw2 { 84 - gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_LOW>; 85 - label = "DPAD-DOWN"; 86 - linux,code = <BTN_DPAD_DOWN>; 87 - }; 88 - button-sw3 { 89 - gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_LOW>; 90 - label = "DPAD-LEFT"; 91 - linux,code = <BTN_DPAD_LEFT>; 92 - }; 93 - button-sw4 { 94 - gpios = <&gpio1 RK_PB7 GPIO_ACTIVE_LOW>; 95 - label = "DPAD-RIGHT"; 96 - linux,code = <BTN_DPAD_RIGHT>; 97 - }; 98 - button-sw5 { 99 - gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_LOW>; 100 - label = "BTN-A"; 101 - linux,code = <BTN_EAST>; 102 - }; 103 - button-sw6 { 104 - gpios = <&gpio1 RK_PA5 GPIO_ACTIVE_LOW>; 105 - label = "BTN-B"; 106 - linux,code = <BTN_SOUTH>; 107 - }; 108 - button-sw7 { 109 - gpios = <&gpio1 RK_PA6 GPIO_ACTIVE_LOW>; 110 - label = "BTN-Y"; 111 - linux,code = <BTN_WEST>; 112 - }; 113 - button-sw8 { 114 - gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>; 115 - label = "BTN-X"; 116 - linux,code = <BTN_NORTH>; 117 - }; 118 - button-sw9 { 119 - gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>; 120 - label = "F1"; 121 - linux,code = <BTN_TRIGGER_HAPPY1>; 122 - }; 123 - button-sw10 { 124 - gpios = <&gpio2 RK_PA1 GPIO_ACTIVE_LOW>; 125 - label = "F2"; 126 - linux,code = <BTN_TRIGGER_HAPPY2>; 127 - }; 128 - button-sw11 { 129 - gpios = <&gpio2 RK_PA2 GPIO_ACTIVE_LOW>; 130 - label = "F3"; 131 - linux,code = <BTN_TRIGGER_HAPPY3>; 132 - }; 133 - button-sw12 { 134 - gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_LOW>; 135 - label = "F4"; 136 - linux,code = <BTN_TRIGGER_HAPPY4>; 137 - }; 138 - button-sw13 { 139 - gpios = <&gpio2 RK_PA4 GPIO_ACTIVE_LOW>; 140 - label = "F5"; 141 - linux,code = <BTN_TRIGGER_HAPPY5>; 142 - }; 143 - button-sw14 { 144 - gpios = <&gpio2 RK_PA5 GPIO_ACTIVE_LOW>; 145 - label = "F6"; 146 - linux,code = <BTN_TRIGGER_HAPPY6>; 147 - }; 148 - button-sw15 { 149 - gpios = <&gpio2 RK_PA6 GPIO_ACTIVE_LOW>; 150 - label = "TOP-LEFT"; 151 - linux,code = <BTN_TL>; 152 - }; 153 - button-sw16 { 154 - gpios = <&gpio2 RK_PA7 GPIO_ACTIVE_LOW>; 155 - label = "TOP-RIGHT"; 156 - linux,code = <BTN_TR>; 157 - }; 158 - }; 159 - 160 - leds: gpio-leds { 161 - compatible = "gpio-leds"; 162 - pinctrl-names = "default"; 163 - pinctrl-0 = <&blue_led_pin>; 164 - 165 - blue_led: led-0 { 166 - label = "blue:heartbeat"; 167 - gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>; 168 - linux,default-trigger = "heartbeat"; 169 - }; 170 - }; 171 - 172 - rk817-sound { 173 - compatible = "simple-audio-card"; 174 - simple-audio-card,name = "Analog"; 175 - simple-audio-card,format = "i2s"; 176 - simple-audio-card,hp-det-gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; 177 - simple-audio-card,mclk-fs = <256>; 178 - simple-audio-card,widgets = 179 - "Microphone", "Mic Jack", 180 - "Headphone", "Headphones", 181 - "Speaker", "Speaker"; 182 - simple-audio-card,routing = 183 - "MICL", "Mic Jack", 184 - "Headphones", "HPOL", 185 - "Headphones", "HPOR", 186 - "Speaker", "SPKO"; 187 - 188 - simple-audio-card,codec { 189 - sound-dai = <&rk817>; 190 - }; 191 - 192 - simple-audio-card,cpu { 193 - sound-dai = <&i2s1_2ch>; 194 - }; 195 - }; 196 - 197 - vccsys: vccsys { 198 - compatible = "regulator-fixed"; 199 - regulator-name = "vcc3v8_sys"; 200 - regulator-always-on; 201 - regulator-min-microvolt = <3800000>; 202 - regulator-max-microvolt = <3800000>; 203 - }; 204 - 205 - vcc_host: vcc_host { 206 - compatible = "regulator-fixed"; 207 - regulator-name = "vcc_host"; 208 - regulator-min-microvolt = <5000000>; 209 - regulator-max-microvolt = <5000000>; 210 - 211 - gpio = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; 212 - enable-active-high; 213 - regulator-always-on; 214 - regulator-boot-on; 215 - vin-supply = <&usb_midu>; 216 - }; 217 73 }; 218 74 219 - &cpu0 { 220 - cpu-supply = <&vdd_arm>; 75 + &internal_display { 76 + compatible = "elida,kd35t133"; 221 77 }; 222 78 223 - &cpu1 { 224 - cpu-supply = <&vdd_arm>; 225 - }; 226 - 227 - &cpu2 { 228 - cpu-supply = <&vdd_arm>; 229 - }; 230 - 231 - &cpu3 { 232 - cpu-supply = <&vdd_arm>; 233 - }; 234 - 235 - &cru { 236 - assigned-clocks = <&cru PLL_NPLL>, 237 - <&cru ACLK_BUS_PRE>, <&cru ACLK_PERI_PRE>, 238 - <&cru HCLK_BUS_PRE>, <&cru HCLK_PERI_PRE>, 239 - <&cru PCLK_BUS_PRE>, <&cru SCLK_GPU>, 240 - <&cru PLL_CPLL>; 241 - 242 - assigned-clock-rates = <1188000000>, 243 - <200000000>, <200000000>, 244 - <150000000>, <150000000>, 245 - <100000000>, <200000000>, 246 - <17000000>; 247 - }; 248 - 249 - &display_subsystem { 250 - status = "okay"; 251 - }; 252 - 253 - &dsi { 254 - status = "okay"; 255 - 256 - ports { 257 - mipi_out: port@1 { 258 - reg = <1>; 259 - 260 - mipi_out_panel: endpoint { 261 - remote-endpoint = <&mipi_in_panel>; 262 - }; 263 - }; 264 - }; 265 - 266 - panel@0 { 267 - compatible = "elida,kd35t133"; 268 - reg = <0>; 269 - backlight = <&backlight>; 270 - iovcc-supply = <&vcc_lcd>; 271 - reset-gpios = <&gpio3 RK_PC0 GPIO_ACTIVE_LOW>; 272 - rotation = <270>; 273 - vdd-supply = <&vcc_lcd>; 274 - 275 - port { 276 - mipi_in_panel: endpoint { 277 - remote-endpoint = <&mipi_out_panel>; 278 - }; 279 - }; 280 - }; 281 - }; 282 - 283 - &dsi_dphy { 284 - status = "okay"; 285 - }; 286 - 287 - &gpu { 288 - mali-supply = <&vdd_logic>; 289 - status = "okay"; 290 - }; 291 - 292 - &i2c0 { 293 - clock-frequency = <400000>; 294 - i2c-scl-falling-time-ns = <16>; 295 - i2c-scl-rising-time-ns = <280>; 296 - status = "okay"; 297 - 298 - rk817: pmic@20 { 299 - compatible = "rockchip,rk817"; 300 - reg = <0x20>; 301 - interrupt-parent = <&gpio0>; 302 - interrupts = <RK_PB2 IRQ_TYPE_LEVEL_LOW>; 303 - clock-output-names = "rk808-clkout1", "xin32k"; 304 - clock-names = "mclk"; 305 - clocks = <&cru SCLK_I2S1_OUT>; 306 - pinctrl-names = "default"; 307 - pinctrl-0 = <&pmic_int>, <&i2s1_2ch_mclk>; 308 - wakeup-source; 309 - #clock-cells = <1>; 310 - #sound-dai-cells = <0>; 311 - 312 - vcc1-supply = <&vccsys>; 313 - vcc2-supply = <&vccsys>; 314 - vcc3-supply = <&vccsys>; 315 - vcc4-supply = <&vccsys>; 316 - vcc5-supply = <&vccsys>; 317 - vcc6-supply = <&vccsys>; 318 - vcc7-supply = <&vccsys>; 319 - vcc8-supply = <&vccsys>; 320 - 321 - regulators { 322 - vdd_logic: DCDC_REG1 { 323 - regulator-name = "vdd_logic"; 324 - regulator-min-microvolt = <950000>; 325 - regulator-max-microvolt = <1150000>; 326 - regulator-ramp-delay = <6001>; 327 - regulator-always-on; 328 - regulator-boot-on; 329 - 330 - regulator-state-mem { 331 - regulator-on-in-suspend; 332 - regulator-suspend-microvolt = <950000>; 333 - }; 334 - }; 335 - 336 - vdd_arm: DCDC_REG2 { 337 - regulator-name = "vdd_arm"; 338 - regulator-min-microvolt = <950000>; 339 - regulator-max-microvolt = <1350000>; 340 - regulator-ramp-delay = <6001>; 341 - regulator-always-on; 342 - regulator-boot-on; 343 - 344 - regulator-state-mem { 345 - regulator-off-in-suspend; 346 - regulator-suspend-microvolt = <950000>; 347 - }; 348 - }; 349 - 350 - vcc_ddr: DCDC_REG3 { 351 - regulator-name = "vcc_ddr"; 352 - regulator-always-on; 353 - regulator-boot-on; 354 - 355 - regulator-state-mem { 356 - regulator-on-in-suspend; 357 - }; 358 - }; 359 - 360 - vcc_3v3: DCDC_REG4 { 361 - regulator-name = "vcc_3v3"; 362 - regulator-min-microvolt = <3300000>; 363 - regulator-max-microvolt = <3300000>; 364 - regulator-always-on; 365 - regulator-boot-on; 366 - 367 - regulator-state-mem { 368 - regulator-off-in-suspend; 369 - regulator-suspend-microvolt = <3300000>; 370 - }; 371 - }; 372 - 373 - vcc_1v8: LDO_REG2 { 374 - regulator-name = "vcc_1v8"; 375 - regulator-min-microvolt = <1800000>; 376 - regulator-max-microvolt = <1800000>; 377 - regulator-always-on; 378 - regulator-boot-on; 379 - 380 - regulator-state-mem { 381 - regulator-on-in-suspend; 382 - regulator-suspend-microvolt = <1800000>; 383 - }; 384 - }; 385 - 386 - vdd_1v0: LDO_REG3 { 387 - regulator-name = "vdd_1v0"; 388 - regulator-min-microvolt = <1000000>; 389 - regulator-max-microvolt = <1000000>; 390 - regulator-always-on; 391 - regulator-boot-on; 392 - 393 - regulator-state-mem { 394 - regulator-on-in-suspend; 395 - regulator-suspend-microvolt = <1000000>; 396 - }; 397 - }; 398 - 399 - vcc3v3_pmu: LDO_REG4 { 400 - regulator-name = "vcc3v3_pmu"; 401 - regulator-min-microvolt = <3300000>; 402 - regulator-max-microvolt = <3300000>; 403 - regulator-always-on; 404 - regulator-boot-on; 405 - 406 - regulator-state-mem { 407 - regulator-on-in-suspend; 408 - regulator-suspend-microvolt = <3300000>; 409 - }; 410 - }; 411 - 412 - vccio_sd: LDO_REG5 { 413 - regulator-name = "vccio_sd"; 414 - regulator-min-microvolt = <1800000>; 415 - regulator-max-microvolt = <3300000>; 416 - regulator-always-on; 417 - regulator-boot-on; 418 - 419 - regulator-state-mem { 420 - regulator-on-in-suspend; 421 - regulator-suspend-microvolt = <3300000>; 422 - }; 423 - }; 424 - 425 - vcc_sd: LDO_REG6 { 426 - regulator-name = "vcc_sd"; 427 - regulator-min-microvolt = <3300000>; 428 - regulator-max-microvolt = <3300000>; 429 - regulator-boot-on; 430 - 431 - regulator-state-mem { 432 - regulator-on-in-suspend; 433 - regulator-suspend-microvolt = <3300000>; 434 - }; 435 - }; 436 - 437 - vcc_bl: LDO_REG7 { 438 - regulator-name = "vcc_bl"; 439 - regulator-min-microvolt = <3300000>; 440 - regulator-max-microvolt = <3300000>; 441 - 442 - regulator-state-mem { 443 - regulator-off-in-suspend; 444 - regulator-suspend-microvolt = <3300000>; 445 - }; 446 - }; 447 - 448 - vcc_lcd: LDO_REG8 { 449 - regulator-name = "vcc_lcd"; 450 - regulator-min-microvolt = <2800000>; 451 - regulator-max-microvolt = <2800000>; 452 - 453 - regulator-state-mem { 454 - regulator-off-in-suspend; 455 - regulator-suspend-microvolt = <2800000>; 456 - }; 457 - }; 458 - 459 - vcc_cam: LDO_REG9 { 460 - regulator-name = "vcc_cam"; 461 - regulator-min-microvolt = <3000000>; 462 - regulator-max-microvolt = <3000000>; 463 - 464 - regulator-state-mem { 465 - regulator-off-in-suspend; 466 - regulator-suspend-microvolt = <3000000>; 467 - }; 468 - }; 469 - 470 - usb_midu: BOOST { 471 - regulator-name = "usb_midu"; 472 - regulator-min-microvolt = <5000000>; 473 - regulator-max-microvolt = <5400000>; 474 - regulator-always-on; 475 - regulator-boot-on; 476 - }; 477 - }; 478 - 479 - rk817_charger: charger { 480 - monitored-battery = <&battery>; 481 - rockchip,resistor-sense-micro-ohms = <10000>; 482 - rockchip,sleep-enter-current-microamp = <300000>; 483 - rockchip,sleep-filter-current-microamp = <100000>; 484 - }; 485 - 486 - rk817_codec: codec { 487 - rockchip,mic-in-differential; 488 - }; 489 - }; 490 - }; 491 - 492 - /* EXT Header(P2): 7(SCL:GPIO0.C2), 8(SDA:GPIO0.C3) */ 493 - &i2c1 { 494 - clock-frequency = <400000>; 495 - status = "okay"; 496 - }; 497 - 498 - /* I2S 1 Channel Used */ 499 - &i2s1_2ch { 500 - status = "okay"; 501 - }; 502 - 503 - &io_domains { 504 - vccio1-supply = <&vcc_3v3>; 505 - vccio2-supply = <&vccio_sd>; 506 - vccio3-supply = <&vcc_3v3>; 507 - vccio4-supply = <&vcc_3v3>; 508 - vccio5-supply = <&vcc_3v3>; 509 - vccio6-supply = <&vcc_3v3>; 510 - status = "okay"; 511 - }; 512 - 513 - &pmu_io_domains { 514 - pmuio1-supply = <&vcc3v3_pmu>; 515 - pmuio2-supply = <&vcc3v3_pmu>; 516 - status = "okay"; 517 - }; 518 - 519 - &pwm1 { 520 - status = "okay"; 521 - }; 522 - 523 - &saradc { 524 - vref-supply = <&vcc_1v8>; 525 - status = "okay"; 526 - }; 527 - 528 - &sdmmc { 529 - cap-sd-highspeed; 530 - card-detect-delay = <200>; 531 - cd-gpios = <&gpio0 RK_PA3 GPIO_ACTIVE_LOW>; /*[> CD GPIO <]*/ 532 - sd-uhs-sdr12; 533 - sd-uhs-sdr25; 534 - sd-uhs-sdr50; 535 - sd-uhs-sdr104; 536 - vmmc-supply = <&vcc_sd>; 537 - vqmmc-supply = <&vccio_sd>; 538 - status = "okay"; 539 - }; 540 - 541 - &sfc { 542 - pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus2>; 543 - pinctrl-names = "default"; 544 - #address-cells = <1>; 545 - #size-cells = <0>; 546 - status = "okay"; 547 - 548 - flash@0 { 549 - compatible = "jedec,spi-nor"; 550 - reg = <0>; 551 - spi-max-frequency = <108000000>; 552 - spi-rx-bus-width = <2>; 553 - spi-tx-bus-width = <1>; 554 - }; 555 - }; 556 - 557 - &tsadc { 558 - status = "okay"; 559 - }; 560 - 561 - &u2phy { 562 - status = "okay"; 563 - 564 - u2phy_host: host-port { 565 - status = "okay"; 566 - }; 567 - 568 - u2phy_otg: otg-port { 569 - status = "disabled"; 570 - }; 571 - }; 572 - 573 - &usb20_otg { 574 - status = "okay"; 575 - }; 576 - 577 - /* EXT Header(P2): 2(RXD:GPIO1.C0),3(TXD:.C1),4(CTS:.C2),5(RTS:.C3) */ 578 - &uart1 { 579 - pinctrl-names = "default"; 580 - pinctrl-0 = <&uart1_xfer &uart1_cts>; 581 - status = "okay"; 582 - }; 583 - 584 - &uart2 { 585 - pinctrl-names = "default"; 586 - pinctrl-0 = <&uart2m1_xfer>; 587 - status = "okay"; 588 - }; 589 - 590 - &vopb { 591 - status = "okay"; 592 - }; 593 - 594 - &vopb_mmu { 595 - status = "okay"; 596 - }; 597 - 598 - &pinctrl { 599 - btns { 600 - btn_pins: btn-pins { 601 - rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, 602 - <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>, 603 - <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>, 604 - <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>, 605 - <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>, 606 - <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>, 607 - <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>, 608 - <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>, 609 - <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>, 610 - <2 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>, 611 - <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, 612 - <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>, 613 - <2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>, 614 - <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>, 615 - <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>, 616 - <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>; 617 - }; 618 - }; 619 - 620 - headphone { 621 - hp_det: hp-det { 622 - rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_down>; 623 - }; 624 - }; 625 - 626 - leds { 627 - blue_led_pin: blue-led-pin { 628 - rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; 629 - }; 630 - }; 631 - 632 - pmic { 633 - dc_det: dc-det { 634 - rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 635 - }; 636 - 637 - pmic_int: pmic-int { 638 - rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>; 639 - }; 640 - 641 - soc_slppin_gpio: soc_slppin_gpio { 642 - rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>; 643 - }; 644 - 645 - soc_slppin_rst: soc_slppin_rst { 646 - rockchip,pins = <0 RK_PA4 2 &pcfg_pull_none>; 647 - }; 648 - 649 - soc_slppin_slp: soc_slppin_slp { 650 - rockchip,pins = <0 RK_PA4 1 &pcfg_pull_none>; 651 - }; 652 - }; 79 + &rk817_charger { 80 + monitored-battery = <&battery>; 653 81 };
+185
arch/arm64/boot/dts/rockchip/rk3326-odroid-go3.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 + /* 3 + * Copyright (c) 2019 Hardkernel Co., Ltd 4 + * Copyright (c) 2020 Theobroma Systems Design und Consulting GmbH 5 + * Copyright (c) 2022 Maya Matuszczyk <maccraft123mc@gmail.com> 6 + */ 7 + 8 + /dts-v1/; 9 + #include "rk3326-odroid-go.dtsi" 10 + 11 + / { 12 + model = "ODROID-GO Super"; 13 + compatible = "hardkernel,rk3326-odroid-go3", "rockchip,rk3326"; 14 + 15 + joystick_mux_controller: mux-controller { 16 + compatible = "gpio-mux"; 17 + pinctrl = <&mux_en_pins>; 18 + #mux-control-cells = <0>; 19 + 20 + mux-gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>, 21 + <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; 22 + }; 23 + 24 + joystick_mux: adc-mux { 25 + compatible = "io-channel-mux"; 26 + io-channels = <&saradc 1>; 27 + io-channel-names = "parent"; 28 + #io-channel-cells = <1>; 29 + 30 + mux-controls = <&joystick_mux_controller>; 31 + channels = "0", "1", "2", "3"; 32 + }; 33 + 34 + analog_sticks: adc-joystick { 35 + compatible = "adc-joystick"; 36 + io-channels = <&joystick_mux 0>, 37 + <&joystick_mux 1>, 38 + <&joystick_mux 2>, 39 + <&joystick_mux 3>; 40 + poll-interval = <60>; 41 + #address-cells = <1>; 42 + #size-cells = <0>; 43 + 44 + axis@0 { 45 + reg = <0>; 46 + abs-flat = <10>; 47 + abs-fuzz = <10>; 48 + abs-range = <180 800>; 49 + linux,code = <ABS_X>; 50 + }; 51 + 52 + axis@1 { 53 + reg = <1>; 54 + abs-flat = <10>; 55 + abs-fuzz = <10>; 56 + abs-range = <180 800>; 57 + linux,code = <ABS_RX>; 58 + }; 59 + 60 + axis@2 { 61 + reg = <2>; 62 + abs-flat = <10>; 63 + abs-fuzz = <10>; 64 + abs-range = <180 800>; 65 + linux,code = <ABS_Y>; 66 + }; 67 + 68 + axis@3 { 69 + reg = <3>; 70 + abs-flat = <10>; 71 + abs-fuzz = <10>; 72 + abs-range = <180 800>; 73 + linux,code = <ABS_RY>; 74 + }; 75 + }; 76 + 77 + battery: battery { 78 + compatible = "simple-battery"; 79 + charge-full-design-microamp-hours = <4000000>; 80 + charge-term-current-microamp = <300000>; 81 + constant-charge-current-max-microamp = <2000000>; 82 + constant-charge-voltage-max-microvolt = <4200000>; 83 + factory-internal-resistance-micro-ohms = <180000>; 84 + voltage-max-design-microvolt = <4100000>; 85 + voltage-min-design-microvolt = <3500000>; 86 + 87 + ocv-capacity-celsius = <20>; 88 + ocv-capacity-table-0 = <4046950 100>, <4001920 95>, <3967900 90>, <3919950 85>, 89 + <3888450 80>, <3861850 75>, <3831540 70>, <3799130 65>, 90 + <3768190 60>, <3745650 55>, <3726610 50>, <3711630 45>, 91 + <3696720 40>, <3685660 35>, <3674950 30>, <3663050 25>, 92 + <3649470 20>, <3635260 15>, <3616920 10>, <3592440 5>, 93 + <3574170 0>; 94 + }; 95 + 96 + gpio-keys-vol { 97 + compatible = "gpio-keys"; 98 + autorepeat; 99 + pinctrl-0 = <&btn_pins_vol>; 100 + pinctrl-names = "default"; 101 + 102 + button-vol-down { 103 + gpios = <&gpio2 RK_PA1 GPIO_ACTIVE_LOW>; 104 + label = "VOLUMEDOWN"; 105 + linux,code = <KEY_VOLUMEDOWN>; 106 + }; 107 + 108 + button-volume-up { 109 + gpios = <&gpio2 RK_PA0 GPIO_ACTIVE_LOW>; 110 + label = "VOLUMEUP"; 111 + linux,code = <KEY_VOLUMEUP>; 112 + }; 113 + }; 114 + }; 115 + 116 + /* f1 and f2 conflict with volume buttons */ 117 + /delete-node/ &btn_f1; 118 + /delete-node/ &btn_f2; 119 + 120 + &builtin_gamepad { 121 + button-sw19 { 122 + gpios = <&gpio3 RK_PB1 GPIO_ACTIVE_LOW>; 123 + label = "SELECT"; 124 + linux,code = <BTN_SELECT>; 125 + }; 126 + /* note that TR2 and TL2 are swapped */ 127 + button-sw20 { 128 + gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 129 + label = "TOP-RIGHT 2"; 130 + linux,code = <BTN_TR2>; 131 + }; 132 + button-sw21 { 133 + gpios = <&gpio3 RK_PB2 GPIO_ACTIVE_LOW>; 134 + label = "TOP-LEFT 2"; 135 + linux,code = <BTN_TL2>; 136 + }; 137 + button-sw22 { 138 + gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; 139 + label = "START"; 140 + linux,code = <BTN_START>; 141 + }; 142 + }; 143 + 144 + &internal_display { 145 + status = "disabled"; 146 + }; 147 + 148 + &rk817_charger { 149 + monitored-battery = <&battery>; 150 + }; 151 + 152 + &pinctrl { 153 + btns { 154 + btn_pins: btn-pins { 155 + rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, 156 + <1 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>, 157 + <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>, 158 + <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>, 159 + <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>, 160 + <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>, 161 + <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>, 162 + <1 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>, 163 + <2 RK_PA2 RK_FUNC_GPIO &pcfg_pull_up>, 164 + <2 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>, 165 + <2 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>, 166 + <2 RK_PA5 RK_FUNC_GPIO &pcfg_pull_up>, 167 + <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>, 168 + <2 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>, 169 + <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>, 170 + <3 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>, 171 + <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>, 172 + <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_up>; 173 + }; 174 + btn_pins_vol: btn-pins-vol { 175 + rockchip,pins = <2 RK_PA0 RK_FUNC_GPIO &pcfg_pull_up>, 176 + <2 RK_PA1 RK_FUNC_GPIO &pcfg_pull_up>; 177 + }; 178 + }; 179 + 180 + joystick { 181 + mux_en_pins: mux-pins { 182 + rockchip,pins = <3 RK_PB5 RK_FUNC_GPIO &pcfg_output_low>; 183 + }; 184 + }; 185 + };
+12
arch/arm64/boot/dts/rockchip/rk3328.dtsi
··· 102 102 103 103 l2: l2-cache0 { 104 104 compatible = "cache"; 105 + cache-level = <2>; 105 106 }; 106 107 }; 107 108 ··· 1024 1023 <0x0 0xff816000 0 0x2000>; 1025 1024 interrupts = <GIC_PPI 9 1026 1025 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; 1026 + }; 1027 + 1028 + crypto: crypto@ff060000 { 1029 + compatible = "rockchip,rk3328-crypto"; 1030 + reg = <0x0 0xff060000 0x0 0x4000>; 1031 + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1032 + clocks = <&cru HCLK_CRYPTO_MST>, <&cru HCLK_CRYPTO_SLV>, 1033 + <&cru SCLK_CRYPTO>; 1034 + clock-names = "hclk_master", "hclk_slave", "sclk"; 1035 + resets = <&cru SRST_CRYPTO>; 1036 + reset-names = "crypto-rst"; 1027 1037 }; 1028 1038 1029 1039 pinctrl: pinctrl {
+76
arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts
··· 81 81 regulator-max-microvolt = <1800000>; 82 82 vin-supply = <&vcc3v3_sys>; 83 83 }; 84 + 85 + wifi_pwrseq: sdio-wifi-pwrseq { 86 + compatible = "mmc-pwrseq-simple"; 87 + clocks = <&rk818 1>; 88 + clock-names = "ext_clock"; 89 + pinctrl-names = "default"; 90 + pinctrl-0 = <&wifi_enable_h_pin>; 91 + /* 92 + * Wait between power-on and SDIO access for CYP43455 93 + * POR circuit. 94 + */ 95 + post-power-on-delay-ms = <110>; 96 + /* 97 + * Wait between consecutive toggles for CYP43455 CBUCK 98 + * regulator discharge. 99 + */ 100 + power-off-delay-us = <10000>; 101 + 102 + /* WL_REG_ON on module */ 103 + reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>; 104 + }; 84 105 }; 85 106 86 107 &cpu_l0 { ··· 381 360 }; 382 361 }; 383 362 363 + sdio-pwrseq { 364 + wifi_enable_h_pin: wifi-enable-h-pin { 365 + rockchip,pins = <0 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 366 + }; 367 + }; 368 + 384 369 sound { 385 370 vcc1v8_codec_en: vcc1v8-codec-en { 386 371 rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_down>; 387 372 }; 388 373 }; 374 + 375 + wireless-bluetooth { 376 + bt_wake_pin: bt-wake-pin { 377 + rockchip,pins = <2 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; 378 + }; 379 + 380 + bt_host_wake_pin: bt-host-wake-pin { 381 + rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 382 + }; 383 + 384 + bt_reset_pin: bt-reset-pin { 385 + rockchip,pins = <0 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 386 + }; 387 + }; 388 + }; 389 + 390 + &sdio0 { 391 + bus-width = <4>; 392 + cap-sd-highspeed; 393 + cap-sdio-irq; 394 + disable-wp; 395 + keep-power-in-suspend; 396 + mmc-pwrseq = <&wifi_pwrseq>; 397 + non-removable; 398 + pinctrl-names = "default"; 399 + pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk>; 400 + sd-uhs-sdr104; 401 + status = "okay"; 389 402 }; 390 403 391 404 &sdmmc { ··· 446 391 rockchip,hw-tshut-mode = <1>; 447 392 rockchip,hw-tshut-polarity = <1>; 448 393 status = "okay"; 394 + }; 395 + 396 + &uart0 { 397 + pinctrl-names = "default"; 398 + pinctrl-0 = <&uart0_xfer &uart0_cts &uart0_rts>; 399 + uart-has-rtscts; 400 + status = "okay"; 401 + 402 + bluetooth { 403 + compatible = "brcm,bcm4345c5"; 404 + clocks = <&rk818 1>; 405 + clock-names = "lpo"; 406 + device-wakeup-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_HIGH>; 407 + host-wakeup-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_HIGH>; 408 + max-speed = <1500000>; 409 + pinctrl-names = "default"; 410 + pinctrl-0 = <&bt_host_wake_pin &bt_wake_pin &bt_reset_pin>; 411 + shutdown-gpios = <&gpio0 RK_PB1 GPIO_ACTIVE_HIGH>; 412 + vbat-supply = <&vcc3v3_sys>; 413 + vddio-supply = <&vcc_1v8>; 414 + }; 449 415 }; 450 416 451 417 &uart2 {
+6
arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts
··· 601 601 status = "okay"; 602 602 }; 603 603 604 + &tsadc { 605 + rockchip,hw-tshut-mode = <1>; 606 + rockchip,hw-tshut-polarity = <1>; 607 + status = "okay"; 608 + }; 609 + 604 610 &u2phy0 { 605 611 status = "okay"; 606 612
+2
arch/arm64/boot/dts/rockchip/rk3399-rock960.dtsi
··· 128 128 }; 129 129 130 130 &hdmi { 131 + avdd-0v9-supply = <&vcca0v9_hdmi>; 132 + avdd-1v8-supply = <&vcca1v8_hdmi>; 131 133 ddc-i2c-bus = <&i2c3>; 132 134 pinctrl-names = "default"; 133 135 pinctrl-0 = <&hdmi_cec>;
+20
arch/arm64/boot/dts/rockchip/rk3399.dtsi
··· 582 582 status = "disabled"; 583 583 }; 584 584 585 + crypto0: crypto@ff8b0000 { 586 + compatible = "rockchip,rk3399-crypto"; 587 + reg = <0x0 0xff8b0000 0x0 0x4000>; 588 + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 0>; 589 + clocks = <&cru HCLK_M_CRYPTO0>, <&cru HCLK_S_CRYPTO0>, <&cru SCLK_CRYPTO0>; 590 + clock-names = "hclk_master", "hclk_slave", "sclk"; 591 + resets = <&cru SRST_CRYPTO0>, <&cru SRST_CRYPTO0_S>, <&cru SRST_CRYPTO0_M>; 592 + reset-names = "master", "lave", "crypto"; 593 + }; 594 + 595 + crypto1: crypto@ff8b8000 { 596 + compatible = "rockchip,rk3399-crypto"; 597 + reg = <0x0 0xff8b8000 0x0 0x4000>; 598 + interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH 0>; 599 + clocks = <&cru HCLK_M_CRYPTO1>, <&cru HCLK_S_CRYPTO1>, <&cru SCLK_CRYPTO1>; 600 + clock-names = "hclk_master", "hclk_slave", "sclk"; 601 + resets = <&cru SRST_CRYPTO1>, <&cru SRST_CRYPTO1_S>, <&cru SRST_CRYPTO1_M>; 602 + reset-names = "master", "slave", "crypto"; 603 + }; 604 + 585 605 i2c1: i2c@ff110000 { 586 606 compatible = "rockchip,rk3399-i2c"; 587 607 reg = <0x0 0xff110000 0x0 0x1000>;
+73 -40
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353p.dts
··· 5 5 #include <dt-bindings/gpio/gpio.h> 6 6 #include <dt-bindings/input/linux-event-codes.h> 7 7 #include <dt-bindings/pinctrl/rockchip.h> 8 - #include "rk3566-anbernic-rgxx3.dtsi" 8 + #include "rk3566-anbernic-rg353x.dtsi" 9 9 10 10 / { 11 11 model = "RG353P"; ··· 18 18 mmc3 = &sdmmc2; 19 19 }; 20 20 21 - backlight: backlight { 22 - compatible = "pwm-backlight"; 23 - power-supply = <&vcc_sys>; 24 - pwms = <&pwm4 0 25000 0>; 21 + battery: battery { 22 + compatible = "simple-battery"; 23 + charge-full-design-microamp-hours = <3472000>; 24 + charge-term-current-microamp = <300000>; 25 + constant-charge-current-max-microamp = <2000000>; 26 + constant-charge-voltage-max-microvolt = <4200000>; 27 + factory-internal-resistance-micro-ohms = <117000>; 28 + voltage-max-design-microvolt = <4172000>; 29 + voltage-min-design-microvolt = <3400000>; 30 + 31 + ocv-capacity-celsius = <20>; 32 + ocv-capacity-table-0 = <4172000 100>, <4054000 95>, <3984000 90>, <3926000 85>, 33 + <3874000 80>, <3826000 75>, <3783000 70>, <3746000 65>, 34 + <3714000 60>, <3683000 55>, <3650000 50>, <3628000 45>, 35 + <3612000 40>, <3600000 35>, <3587000 30>, <3571000 25>, 36 + <3552000 20>, <3525000 15>, <3492000 10>, <3446000 5>, 37 + <3400000 0>; 38 + }; 39 + 40 + /* Channels reversed for both headphones and speakers. */ 41 + sound { 42 + compatible = "simple-audio-card"; 43 + simple-audio-card,name = "rk817_ext"; 44 + simple-audio-card,aux-devs = <&spk_amp>; 45 + simple-audio-card,format = "i2s"; 46 + simple-audio-card,hp-det-gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; 47 + simple-audio-card,mclk-fs = <256>; 48 + simple-audio-card,widgets = 49 + "Microphone", "Mic Jack", 50 + "Headphone", "Headphones", 51 + "Speaker", "Internal Speakers"; 52 + simple-audio-card,routing = 53 + "MICL", "Mic Jack", 54 + "Headphones", "HPOL", 55 + "Headphones", "HPOR", 56 + "Internal Speakers", "Speaker Amp OUTL", 57 + "Internal Speakers", "Speaker Amp OUTR", 58 + "Speaker Amp INL", "HPOL", 59 + "Speaker Amp INR", "HPOR"; 60 + simple-audio-card,pin-switches = "Internal Speakers"; 61 + 62 + simple-audio-card,codec { 63 + sound-dai = <&rk817>; 64 + }; 65 + 66 + simple-audio-card,cpu { 67 + sound-dai = <&i2s1_8ch>; 68 + }; 69 + }; 70 + 71 + spk_amp: audio-amplifier { 72 + compatible = "simple-audio-amplifier"; 73 + enable-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; 74 + pinctrl-0 = <&spk_amp_enable_h>; 75 + pinctrl-names = "default"; 76 + sound-name-prefix = "Speaker Amp"; 25 77 }; 26 78 }; 27 79 28 80 &gpio_keys_control { 29 - button-a { 30 - gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>; 31 - label = "EAST"; 32 - linux,code = <BTN_EAST>; 33 - }; 34 - 35 - button-left { 36 - gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>; 37 - label = "DPAD-LEFT"; 38 - linux,code = <BTN_DPAD_LEFT>; 39 - }; 40 - 41 81 button-r1 { 42 82 gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; 43 83 label = "TR"; ··· 89 49 label = "TR2"; 90 50 linux,code = <BTN_TR2>; 91 51 }; 92 - 93 - button-right { 94 - gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>; 95 - label = "DPAD-RIGHT"; 96 - linux,code = <BTN_DPAD_RIGHT>; 97 - }; 98 - 99 - button-y { 100 - gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>; 101 - label = "WEST"; 102 - linux,code = <BTN_WEST>; 103 - }; 104 - }; 105 - 106 - &i2c0 { 107 - /* This hardware is physically present but unused. */ 108 - power-monitor@62 { 109 - compatible = "cellwise,cw2015"; 110 - reg = <0x62>; 111 - status = "disabled"; 112 - }; 113 52 }; 114 53 115 54 &i2c2 { ··· 97 78 status = "okay"; 98 79 }; 99 80 100 - &pwm4 { 101 - status = "okay"; 81 + &pinctrl { 82 + audio-amplifier { 83 + spk_amp_enable_h: spk-amp-enable-h { 84 + rockchip,pins = 85 + <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; 86 + }; 87 + }; 88 + }; 89 + 90 + &rk817 { 91 + rk817_charger: charger { 92 + monitored-battery = <&battery>; 93 + rockchip,resistor-sense-micro-ohms = <10000>; 94 + rockchip,sleep-enter-current-microamp = <300000>; 95 + rockchip,sleep-filter-current-microamp = <100000>; 96 + }; 102 97 }; 103 98 104 99 &sdhci {
+114
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353v.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 + 3 + /dts-v1/; 4 + 5 + #include <dt-bindings/gpio/gpio.h> 6 + #include <dt-bindings/input/linux-event-codes.h> 7 + #include <dt-bindings/pinctrl/rockchip.h> 8 + #include "rk3566-anbernic-rg353x.dtsi" 9 + 10 + / { 11 + model = "RG353V"; 12 + compatible = "anbernic,rg353v", "rockchip,rk3566"; 13 + 14 + aliases { 15 + mmc0 = &sdhci; 16 + mmc1 = &sdmmc0; 17 + mmc2 = &sdmmc1; 18 + mmc3 = &sdmmc2; 19 + }; 20 + 21 + battery: battery { 22 + compatible = "simple-battery"; 23 + charge-full-design-microamp-hours = <3151000>; 24 + charge-term-current-microamp = <300000>; 25 + constant-charge-current-max-microamp = <2000000>; 26 + constant-charge-voltage-max-microvolt = <4200000>; 27 + factory-internal-resistance-micro-ohms = <117000>; 28 + voltage-max-design-microvolt = <4172000>; 29 + voltage-min-design-microvolt = <3400000>; 30 + 31 + ocv-capacity-celsius = <20>; 32 + ocv-capacity-table-0 = <4172000 100>, <4054000 95>, <3984000 90>, <3926000 85>, 33 + <3874000 80>, <3826000 75>, <3783000 70>, <3746000 65>, 34 + <3714000 60>, <3683000 55>, <3650000 50>, <3628000 45>, 35 + <3612000 40>, <3600000 35>, <3587000 30>, <3571000 25>, 36 + <3552000 20>, <3525000 15>, <3492000 10>, <3446000 5>, 37 + <3400000 0>; 38 + }; 39 + 40 + /* Channels reversed for headphones. */ 41 + sound { 42 + compatible = "simple-audio-card"; 43 + simple-audio-card,name = "rk817_int"; 44 + simple-audio-card,format = "i2s"; 45 + simple-audio-card,hp-det-gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; 46 + simple-audio-card,mclk-fs = <256>; 47 + simple-audio-card,widgets = 48 + "Microphone", "Mic Jack", 49 + "Headphone", "Headphones", 50 + "Speaker", "Internal Speakers"; 51 + simple-audio-card,routing = 52 + "MICL", "Mic Jack", 53 + "Headphones", "HPOL", 54 + "Headphones", "HPOR", 55 + "Internal Speakers", "SPKO"; 56 + 57 + simple-audio-card,codec { 58 + sound-dai = <&rk817>; 59 + }; 60 + 61 + simple-audio-card,cpu { 62 + sound-dai = <&i2s1_8ch>; 63 + }; 64 + }; 65 + }; 66 + 67 + &gpio_keys_control { 68 + button-r1 { 69 + gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>; 70 + label = "TR"; 71 + linux,code = <BTN_TR>; 72 + }; 73 + 74 + button-r2 { 75 + gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; 76 + label = "TR2"; 77 + linux,code = <BTN_TR2>; 78 + }; 79 + }; 80 + 81 + &i2c2 { 82 + pintctrl-names = "default"; 83 + pinctrl-0 = <&i2c2m1_xfer>; 84 + status = "okay"; 85 + }; 86 + 87 + &pinctrl { 88 + touch { 89 + touch_rst: touch-rst { 90 + rockchip,pins = 91 + <4 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; 92 + }; 93 + }; 94 + }; 95 + 96 + &rk817 { 97 + rk817_charger: charger { 98 + monitored-battery = <&battery>; 99 + rockchip,resistor-sense-micro-ohms = <10000>; 100 + rockchip,sleep-enter-current-microamp = <300000>; 101 + rockchip,sleep-filter-current-microamp = <100000>; 102 + }; 103 + }; 104 + 105 + &sdhci { 106 + pinctrl-0 = <&emmc_bus8>, <&emmc_clk>, <&emmc_cmd>, <&emmc_datastrobe>, <&emmc_rstnout>; 107 + pinctrl-names = "default"; 108 + bus-width = <8>; 109 + mmc-hs200-1_8v; 110 + non-removable; 111 + vmmc-supply = <&vcc_3v3>; 112 + vqmmc-supply = <&vcc_1v8>; 113 + status = "okay"; 114 + };
+87
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353vs.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 + 3 + /dts-v1/; 4 + 5 + #include <dt-bindings/gpio/gpio.h> 6 + #include <dt-bindings/input/linux-event-codes.h> 7 + #include <dt-bindings/pinctrl/rockchip.h> 8 + #include "rk3566-anbernic-rg353x.dtsi" 9 + 10 + / { 11 + model = "RG353VS"; 12 + compatible = "anbernic,rg353vs", "rockchip,rk3566"; 13 + 14 + aliases { 15 + mmc0 = &sdmmc0; 16 + mmc1 = &sdmmc1; 17 + mmc2 = &sdmmc2; 18 + }; 19 + 20 + battery: battery { 21 + compatible = "simple-battery"; 22 + charge-full-design-microamp-hours = <3151000>; 23 + charge-term-current-microamp = <300000>; 24 + constant-charge-current-max-microamp = <2000000>; 25 + constant-charge-voltage-max-microvolt = <4200000>; 26 + factory-internal-resistance-micro-ohms = <117000>; 27 + voltage-max-design-microvolt = <4172000>; 28 + voltage-min-design-microvolt = <3400000>; 29 + 30 + ocv-capacity-celsius = <20>; 31 + ocv-capacity-table-0 = <4172000 100>, <4054000 95>, <3984000 90>, <3926000 85>, 32 + <3874000 80>, <3826000 75>, <3783000 70>, <3746000 65>, 33 + <3714000 60>, <3683000 55>, <3650000 50>, <3628000 45>, 34 + <3612000 40>, <3600000 35>, <3587000 30>, <3571000 25>, 35 + <3552000 20>, <3525000 15>, <3492000 10>, <3446000 5>, 36 + <3400000 0>; 37 + }; 38 + 39 + /* Channels reversed for headphones. */ 40 + sound { 41 + compatible = "simple-audio-card"; 42 + simple-audio-card,name = "rk817_int"; 43 + simple-audio-card,format = "i2s"; 44 + simple-audio-card,hp-det-gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; 45 + simple-audio-card,mclk-fs = <256>; 46 + simple-audio-card,widgets = 47 + "Microphone", "Mic Jack", 48 + "Headphone", "Headphones", 49 + "Speaker", "Internal Speakers"; 50 + simple-audio-card,routing = 51 + "MICL", "Mic Jack", 52 + "Headphones", "HPOL", 53 + "Headphones", "HPOR", 54 + "Internal Speakers", "SPKO"; 55 + 56 + simple-audio-card,codec { 57 + sound-dai = <&rk817>; 58 + }; 59 + 60 + simple-audio-card,cpu { 61 + sound-dai = <&i2s1_8ch>; 62 + }; 63 + }; 64 + }; 65 + 66 + &gpio_keys_control { 67 + button-r1 { 68 + gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>; 69 + label = "TR"; 70 + linux,code = <BTN_TR>; 71 + }; 72 + 73 + button-r2 { 74 + gpios = <&gpio3 RK_PB4 GPIO_ACTIVE_LOW>; 75 + label = "TR2"; 76 + linux,code = <BTN_TR2>; 77 + }; 78 + }; 79 + 80 + &rk817 { 81 + rk817_charger: charger { 82 + monitored-battery = <&battery>; 83 + rockchip,resistor-sense-micro-ohms = <10000>; 84 + rockchip,sleep-enter-current-microamp = <300000>; 85 + rockchip,sleep-filter-current-microamp = <100000>; 86 + }; 87 + };
+60
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg353x.dtsi
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 + 3 + /dts-v1/; 4 + 5 + #include <dt-bindings/gpio/gpio.h> 6 + #include <dt-bindings/input/linux-event-codes.h> 7 + #include <dt-bindings/pinctrl/rockchip.h> 8 + #include "rk3566-anbernic-rgxx3.dtsi" 9 + 10 + / { 11 + backlight: backlight { 12 + compatible = "pwm-backlight"; 13 + power-supply = <&vcc_sys>; 14 + pwms = <&pwm4 0 25000 0>; 15 + }; 16 + }; 17 + 18 + &cru { 19 + assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>, <&cru PLL_VPLL>; 20 + assigned-clock-rates = <1200000000>, <200000000>, <241500000>; 21 + }; 22 + 23 + &gpio_keys_control { 24 + button-a { 25 + gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_LOW>; 26 + label = "EAST"; 27 + linux,code = <BTN_EAST>; 28 + }; 29 + 30 + button-left { 31 + gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>; 32 + label = "DPAD-LEFT"; 33 + linux,code = <BTN_DPAD_LEFT>; 34 + }; 35 + 36 + button-right { 37 + gpios = <&gpio3 RK_PA5 GPIO_ACTIVE_LOW>; 38 + label = "DPAD-RIGHT"; 39 + linux,code = <BTN_DPAD_RIGHT>; 40 + }; 41 + 42 + button-y { 43 + gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_LOW>; 44 + label = "WEST"; 45 + linux,code = <BTN_WEST>; 46 + }; 47 + }; 48 + 49 + &i2c0 { 50 + /* This hardware is physically present but unused. */ 51 + power-monitor@62 { 52 + compatible = "cellwise,cw2015"; 53 + reg = <0x62>; 54 + status = "disabled"; 55 + }; 56 + }; 57 + 58 + &pwm4 { 59 + status = "okay"; 60 + };
+79
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rg503.dts
··· 17 17 mmc2 = &sdmmc2; 18 18 }; 19 19 20 + battery: battery { 21 + compatible = "simple-battery"; 22 + charge-full-design-microamp-hours = <3472000>; 23 + charge-term-current-microamp = <300000>; 24 + constant-charge-current-max-microamp = <2000000>; 25 + constant-charge-voltage-max-microvolt = <4200000>; 26 + factory-internal-resistance-micro-ohms = <117000>; 27 + voltage-max-design-microvolt = <4172000>; 28 + voltage-min-design-microvolt = <3400000>; 29 + 30 + ocv-capacity-celsius = <20>; 31 + ocv-capacity-table-0 = <4172000 100>, <4054000 95>, <3984000 90>, <3926000 85>, 32 + <3874000 80>, <3826000 75>, <3783000 70>, <3746000 65>, 33 + <3714000 60>, <3683000 55>, <3650000 50>, <3628000 45>, 34 + <3612000 40>, <3600000 35>, <3587000 30>, <3571000 25>, 35 + <3552000 20>, <3525000 15>, <3492000 10>, <3446000 5>, 36 + <3400000 0>; 37 + }; 38 + 20 39 gpio_spi: spi { 21 40 compatible = "spi-gpio"; 22 41 pinctrl-names = "default"; ··· 48 29 cs-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; 49 30 num-chipselects = <0>; 50 31 }; 32 + 33 + /* Channels reversed for both headphones and speakers. */ 34 + sound { 35 + compatible = "simple-audio-card"; 36 + simple-audio-card,name = "rk817_ext"; 37 + simple-audio-card,aux-devs = <&spk_amp>; 38 + simple-audio-card,format = "i2s"; 39 + simple-audio-card,hp-det-gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; 40 + simple-audio-card,mclk-fs = <256>; 41 + simple-audio-card,widgets = 42 + "Microphone", "Mic Jack", 43 + "Headphone", "Headphones", 44 + "Speaker", "Internal Speakers"; 45 + simple-audio-card,routing = 46 + "MICL", "Mic Jack", 47 + "Headphones", "HPOL", 48 + "Headphones", "HPOR", 49 + "Internal Speakers", "Speaker Amp OUTL", 50 + "Internal Speakers", "Speaker Amp OUTR", 51 + "Speaker Amp INL", "HPOL", 52 + "Speaker Amp INR", "HPOR"; 53 + simple-audio-card,pin-switches = "Internal Speakers"; 54 + 55 + simple-audio-card,codec { 56 + sound-dai = <&rk817>; 57 + }; 58 + 59 + simple-audio-card,cpu { 60 + sound-dai = <&i2s1_8ch>; 61 + }; 62 + }; 63 + 64 + spk_amp: audio-amplifier { 65 + compatible = "simple-audio-amplifier"; 66 + enable-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; 67 + pinctrl-0 = <&spk_amp_enable_h>; 68 + pinctrl-names = "default"; 69 + sound-name-prefix = "Speaker Amp"; 70 + }; 71 + }; 72 + 73 + &cru { 74 + assigned-clocks = <&cru PLL_GPLL>, <&pmucru PLL_PPLL>, <&cru PLL_VPLL>; 75 + assigned-clock-rates = <1200000000>, <200000000>, <500000000>; 51 76 }; 52 77 53 78 &gpio_keys_control { ··· 139 76 }; 140 77 141 78 &pinctrl { 79 + audio-amplifier { 80 + spk_amp_enable_h: spk-amp-enable-h { 81 + rockchip,pins = 82 + <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; 83 + }; 84 + }; 85 + 142 86 gpio-spi { 143 87 spi_pins: spi-pins { 144 88 rockchip,pins = ··· 153 83 <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>, 154 84 <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>; 155 85 }; 86 + }; 87 + }; 88 + 89 + &rk817 { 90 + rk817_charger: charger { 91 + monitored-battery = <&battery>; 92 + rockchip,resistor-sense-micro-ohms = <10000>; 93 + rockchip,sleep-enter-current-microamp = <300000>; 94 + rockchip,sleep-filter-current-microamp = <100000>; 156 95 }; 157 96 };
+1 -46
arch/arm64/boot/dts/rockchip/rk3566-anbernic-rgxx3.dtsi
··· 22 22 <&adc_mux 3>; 23 23 pinctrl-0 = <&joy_mux_en>; 24 24 pinctrl-names = "default"; 25 + poll-interval = <60>; 25 26 #address-cells = <1>; 26 27 #size-cells = <0>; 27 28 ··· 218 217 }; 219 218 }; 220 219 221 - /* Channels reversed for both headphones and speakers. */ 222 - sound { 223 - compatible = "simple-audio-card"; 224 - simple-audio-card,name = "anbernic_rk817"; 225 - simple-audio-card,aux-devs = <&spk_amp>; 226 - simple-audio-card,format = "i2s"; 227 - simple-audio-card,hp-det-gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; 228 - simple-audio-card,mclk-fs = <256>; 229 - simple-audio-card,widgets = 230 - "Microphone", "Mic Jack", 231 - "Headphone", "Headphones", 232 - "Speaker", "Internal Speakers"; 233 - simple-audio-card,routing = 234 - "MICL", "Mic Jack", 235 - "Headphones", "HPOL", 236 - "Headphones", "HPOR", 237 - "Internal Speakers", "Speaker Amp OUTL", 238 - "Internal Speakers", "Speaker Amp OUTR", 239 - "Speaker Amp INL", "HPOL", 240 - "Speaker Amp INR", "HPOR"; 241 - simple-audio-card,pin-switches = "Internal Speakers"; 242 - 243 - simple-audio-card,codec { 244 - sound-dai = <&rk817>; 245 - }; 246 - 247 - simple-audio-card,cpu { 248 - sound-dai = <&i2s1_8ch>; 249 - }; 250 - }; 251 - 252 220 sdio_pwrseq: sdio-pwrseq { 253 221 compatible = "mmc-pwrseq-simple"; 254 222 clocks = <&rk817 1>; ··· 226 256 pinctrl-names = "default"; 227 257 post-power-on-delay-ms = <200>; 228 258 reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_LOW>; 229 - }; 230 - 231 - spk_amp: audio-amplifier { 232 - compatible = "simple-audio-amplifier"; 233 - enable-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; 234 - pinctrl-0 = <&spk_amp_enable_h>; 235 - pinctrl-names = "default"; 236 - sound-name-prefix = "Speaker Amp"; 237 259 }; 238 260 239 261 vcc3v3_lcd0_n: regulator-vcc3v3-lcd0 { ··· 569 607 }; 570 608 571 609 &pinctrl { 572 - audio-amplifier { 573 - spk_amp_enable_h: spk-amp-enable-h { 574 - rockchip,pins = 575 - <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; 576 - }; 577 - }; 578 - 579 610 gpio-btns { 580 611 btn_pins_ctrl: btn-pins-ctrl { 581 612 rockchip,pins =
+503
arch/arm64/boot/dts/rockchip/rk3566-box-demo.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 + 3 + /* 4 + * Author: Piotr Oniszczuk piotr.oniszczuk@gmail.com 5 + * Based on Quartz64 DT by: Peter Geis pgwipeout@gmail.com 6 + */ 7 + 8 + /dts-v1/; 9 + 10 + #include <dt-bindings/gpio/gpio.h> 11 + #include <dt-bindings/leds/common.h> 12 + #include <dt-bindings/pinctrl/rockchip.h> 13 + #include <dt-bindings/soc/rockchip,vop2.h> 14 + #include "rk3566.dtsi" 15 + 16 + / { 17 + model = "Rockchip RK3566 BOX DEMO Board"; 18 + compatible = "rockchip,rk3566-box-demo", "rockchip,rk3566"; 19 + 20 + aliases { 21 + ethernet0 = &gmac1; 22 + mmc0 = &sdmmc0; 23 + mmc1 = &sdmmc1; 24 + mmc2 = &sdhci; 25 + }; 26 + 27 + chosen: chosen { 28 + stdout-path = "serial2:1500000n8"; 29 + }; 30 + 31 + gmac1_clkin: external-gmac1-clock { 32 + compatible = "fixed-clock"; 33 + clock-frequency = <125000000>; 34 + clock-output-names = "gmac1_clkin"; 35 + #clock-cells = <0>; 36 + }; 37 + 38 + hdmi-con { 39 + compatible = "hdmi-connector"; 40 + type = "a"; 41 + 42 + port { 43 + hdmi_con_in: endpoint { 44 + remote-endpoint = <&hdmi_out_con>; 45 + }; 46 + }; 47 + }; 48 + 49 + ir-receiver { 50 + compatible = "gpio-ir-receiver"; 51 + gpios = <&gpio4 RK_PC3 GPIO_ACTIVE_LOW>; 52 + pinctrl-0 = <&ir_int>; 53 + linux,rc-map-name = "rc-beelink-gs1"; 54 + status = "okay"; 55 + }; 56 + 57 + leds { 58 + compatible = "gpio-leds"; 59 + 60 + led_work: led-0 { 61 + gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>; 62 + function = LED_FUNCTION_HEARTBEAT; 63 + color = <LED_COLOR_ID_BLUE>; 64 + linux,default-trigger = "heartbeat"; 65 + pinctrl-names = "default"; 66 + pinctrl-0 = <&led_work_en>; 67 + }; 68 + }; 69 + 70 + sdio_pwrseq: sdio-pwrseq { 71 + status = "okay"; 72 + compatible = "mmc-pwrseq-simple"; 73 + clocks = <&pmucru CLK_RTC_32K>; 74 + clock-names = "ext_clock"; 75 + pinctrl-names = "default"; 76 + pinctrl-0 = <&wifi_enable_h &wifi_32k>; 77 + reset-gpios = <&gpio2 RK_PB1 GPIO_ACTIVE_LOW>; 78 + }; 79 + 80 + spdif_dit: spdif-dit { 81 + compatible = "linux,spdif-dit"; 82 + #sound-dai-cells = <0>; 83 + }; 84 + 85 + spdif_sound: spdif-sound { 86 + compatible = "simple-audio-card"; 87 + simple-audio-card,name = "SPDIF"; 88 + 89 + simple-audio-card,cpu { 90 + sound-dai = <&spdif>; 91 + }; 92 + 93 + simple-audio-card,codec { 94 + sound-dai = <&spdif_dit>; 95 + }; 96 + }; 97 + 98 + vcc12v0_dcin: regulator-vcc12v0-dcin { 99 + compatible = "regulator-fixed"; 100 + regulator-name = "vcc12v0_dcin"; 101 + regulator-always-on; 102 + regulator-boot-on; 103 + regulator-min-microvolt = <12000000>; 104 + regulator-max-microvolt = <12000000>; 105 + }; 106 + 107 + vcc5v0_sys: regulator-vcc5v0-sys { 108 + compatible = "regulator-fixed"; 109 + regulator-name = "vcc5v0_sys"; 110 + regulator-always-on; 111 + regulator-boot-on; 112 + regulator-min-microvolt = <5000000>; 113 + regulator-max-microvolt = <5000000>; 114 + vin-supply = <&vcc12v0_dcin>; 115 + }; 116 + 117 + vcc3v3_sys: regulator-vcc3v3-sys { 118 + compatible = "regulator-fixed"; 119 + regulator-name = "vcc3v3_sys"; 120 + regulator-always-on; 121 + regulator-boot-on; 122 + regulator-min-microvolt = <3300000>; 123 + regulator-max-microvolt = <3300000>; 124 + vin-supply = <&vcc12v0_dcin>; 125 + }; 126 + 127 + vcc_3v3: regulator-vcc-3v3 { 128 + compatible = "regulator-fixed"; 129 + regulator-name = "vcc_3v3"; 130 + regulator-always-on; 131 + regulator-boot-on; 132 + regulator-min-microvolt = <3300000>; 133 + regulator-max-microvolt = <3300000>; 134 + vin-supply = <&vcc3v3_sys>; 135 + }; 136 + 137 + vcc5v0_usb_host: regulator-vcc5v0-usb-host { 138 + compatible = "regulator-fixed"; 139 + enable-active-high; 140 + gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; 141 + pinctrl-names = "default"; 142 + pinctrl-0 = <&vcc5v0_usb_host_en>; 143 + regulator-name = "vcc5v0_usb_host"; 144 + regulator-min-microvolt = <5000000>; 145 + regulator-max-microvolt = <5000000>; 146 + vin-supply = <&vcc5v0_sys>; 147 + }; 148 + 149 + vcc5v0_usb2_otg: regulator-vcc5v0-usb2-otg { 150 + compatible = "regulator-fixed"; 151 + enable-active-high; 152 + gpio = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; 153 + pinctrl-names = "default"; 154 + pinctrl-0 = <&vcc5v0_usb2_otg_en>; 155 + regulator-name = "vcc5v0_usb_otg"; 156 + regulator-min-microvolt = <5000000>; 157 + regulator-max-microvolt = <5000000>; 158 + vin-supply = <&vcc5v0_sys>; 159 + }; 160 + 161 + vcca_1v8: regulator-vcca-1v8 { 162 + compatible = "regulator-fixed"; 163 + regulator-name = "vcca_1v8"; 164 + regulator-always-on; 165 + regulator-boot-on; 166 + regulator-min-microvolt = <1800000>; 167 + regulator-max-microvolt = <1800000>; 168 + vin-supply = <&vcc3v3_sys>; 169 + }; 170 + 171 + vdda_0v9: regulator-vdda-0v9 { 172 + compatible = "regulator-fixed"; 173 + regulator-name = "vdda_0v9"; 174 + regulator-always-on; 175 + regulator-boot-on; 176 + regulator-min-microvolt = <900000>; 177 + regulator-max-microvolt = <900000>; 178 + vin-supply = <&vcc3v3_sys>; 179 + }; 180 + 181 + vdd_fixed: regulator-vdd-fixed { 182 + compatible = "regulator-fixed"; 183 + regulator-name = "vdd_fixed"; 184 + regulator-min-microvolt = <950000>; 185 + regulator-max-microvolt = <950000>; 186 + regulator-always-on; 187 + regulator-boot-on; 188 + vin-supply = <&vcc5v0_sys>; 189 + }; 190 + 191 + vdd_cpu: regulator-vdd-cpu { 192 + compatible = "pwm-regulator"; 193 + pwms = <&pwm0 0 5000 1>; 194 + regulator-name = "vdd_cpu"; 195 + regulator-min-microvolt = <800000>; 196 + regulator-max-microvolt = <1200000>; 197 + regulator-always-on; 198 + regulator-boot-on; 199 + regulator-settling-time-up-us = <250>; 200 + pwm-supply = <&vcc5v0_sys>; 201 + }; 202 + 203 + vdd_logic: regulator-vdd-logic { 204 + compatible = "pwm-regulator"; 205 + pwms = <&pwm1 0 5000 1>; 206 + regulator-name = "vdd_logic"; 207 + regulator-min-microvolt = <800000>; 208 + regulator-max-microvolt = <1100000>; 209 + regulator-always-on; 210 + regulator-boot-on; 211 + regulator-settling-time-up-us = <250>; 212 + pwm-supply = <&vcc5v0_sys>; 213 + }; 214 + }; 215 + 216 + &combphy1 { 217 + status = "okay"; 218 + }; 219 + 220 + &combphy2 { 221 + status = "okay"; 222 + }; 223 + 224 + &cpu0 { 225 + cpu-supply = <&vdd_cpu>; 226 + }; 227 + 228 + &cpu1 { 229 + cpu-supply = <&vdd_cpu>; 230 + }; 231 + 232 + &cpu2 { 233 + cpu-supply = <&vdd_cpu>; 234 + }; 235 + 236 + &cpu3 { 237 + cpu-supply = <&vdd_cpu>; 238 + }; 239 + 240 + &gmac1 { 241 + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; 242 + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>; 243 + phy-mode = "rgmii"; 244 + clock_in_out = "input"; 245 + pinctrl-names = "default"; 246 + pinctrl-0 = <&gmac1m1_miim 247 + &gmac1m1_tx_bus2 248 + &gmac1m1_rx_bus2 249 + &gmac1m1_rgmii_clk 250 + &gmac1m1_rgmii_bus 251 + &gmac1m1_clkinout>; 252 + snps,reset-gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>; 253 + snps,reset-active-low; 254 + /* Reset time is 20ms, 100ms for rtl8211f */ 255 + snps,reset-delays-us = <0 20000 100000>; 256 + 257 + tx_delay = <0x4f>; 258 + rx_delay = <0x2d>; 259 + phy-handle = <&rgmii_phy1>; 260 + status = "okay"; 261 + }; 262 + 263 + &mdio1 { 264 + rgmii_phy1: ethernet-phy@1 { 265 + compatible = "ethernet-phy-ieee802.3-c22"; 266 + reg = <0x1>; 267 + }; 268 + }; 269 + 270 + &hdmi { 271 + assigned-clocks = <&cru CLK_HDMI_CEC>; 272 + assigned-clock-rates = <32768>; 273 + avdd-0v9-supply = <&vdda_0v9>; 274 + avdd-1v8-supply = <&vcca_1v8>; 275 + status = "okay"; 276 + }; 277 + 278 + &hdmi_in { 279 + hdmi_in_vp0: endpoint { 280 + remote-endpoint = <&vp0_out_hdmi>; 281 + }; 282 + }; 283 + 284 + &hdmi_out { 285 + hdmi_out_con: endpoint { 286 + remote-endpoint = <&hdmi_con_in>; 287 + }; 288 + }; 289 + 290 + &hdmi_sound { 291 + status = "okay"; 292 + }; 293 + 294 + &gpu { 295 + status = "okay"; 296 + }; 297 + 298 + &i2s0_8ch { 299 + status = "okay"; 300 + }; 301 + 302 + &i2s1_8ch { 303 + rockchip,trcm-sync-tx-only; 304 + status = "okay"; 305 + }; 306 + 307 + &pinctrl { 308 + bt { 309 + bt_enable_h: bt-enable-h { 310 + rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 311 + }; 312 + 313 + bt_host_wake_l: bt-host-wake-l { 314 + rockchip,pins = <2 RK_PC0 RK_FUNC_GPIO &pcfg_pull_down>; 315 + }; 316 + 317 + bt_wake_l: bt-wake-l { 318 + rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; 319 + }; 320 + }; 321 + 322 + sdio-pwrseq { 323 + wifi_enable_h: wifi-enable-h { 324 + rockchip,pins = <2 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; 325 + }; 326 + 327 + wifi_32k: wifi-32k { 328 + rockchip,pins = <0 RK_PB0 2 &pcfg_pull_none>; 329 + }; 330 + }; 331 + 332 + usb { 333 + vcc5v0_usb_host_en: vcc5v0_usb_host_en { 334 + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; 335 + }; 336 + 337 + vcc5v0_usb2_otg_en: vcc5v0_usb2_otg_en { 338 + rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; 339 + }; 340 + 341 + }; 342 + 343 + ir { 344 + ir_int: ir-int { 345 + rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; 346 + }; 347 + }; 348 + 349 + led { 350 + led_work_en: led_work_en { 351 + rockchip,pins = <0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>; 352 + }; 353 + }; 354 + }; 355 + 356 + &pwm0 { 357 + status = "okay"; 358 + }; 359 + 360 + &pwm1 { 361 + status = "okay"; 362 + }; 363 + 364 + &sdhci { 365 + bus-width = <8>; 366 + mmc-hs200-1_8v; 367 + non-removable; 368 + status = "okay"; 369 + }; 370 + 371 + &sdmmc0 { 372 + bus-width = <4>; 373 + cap-sd-highspeed; 374 + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; 375 + disable-wp; 376 + pinctrl-names = "default"; 377 + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; 378 + vmmc-supply = <&vcc_3v3>; 379 + status = "okay"; 380 + }; 381 + 382 + &sdmmc1 { 383 + bus-width = <4>; 384 + cap-sd-highspeed; 385 + disable-wp; 386 + mmc-pwrseq = <&sdio_pwrseq>; 387 + non-removable; 388 + pinctrl-names = "default"; 389 + pinctrl-0 = <&sdmmc1_bus4 &sdmmc1_cmd &sdmmc1_clk>; 390 + vmmc-supply = <&vcc_3v3>; 391 + vqmmc-supply = <&vcca_1v8>; 392 + status = "okay"; 393 + }; 394 + 395 + &spdif { 396 + status = "okay"; 397 + }; 398 + 399 + &spi1 { 400 + pinctrl-names = "default"; 401 + pinctrl-0 = <&spi1m1_cs0 &spi1m1_pins>; 402 + }; 403 + 404 + &tsadc { 405 + /* tshut mode 0:CRU 1:GPIO */ 406 + rockchip,hw-tshut-mode = <1>; 407 + /* tshut polarity 0:LOW 1:HIGH */ 408 + rockchip,hw-tshut-polarity = <0>; 409 + status = "okay"; 410 + }; 411 + 412 + &uart1 { 413 + pinctrl-names = "default"; 414 + pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn>; 415 + status = "okay"; 416 + uart-has-rtscts; 417 + 418 + bluetooth { 419 + compatible = "brcm,bcm43438-bt"; 420 + clocks = <&pmucru CLK_RTC_32K>; 421 + clock-names = "ext_clock"; 422 + device-wake-gpios = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; 423 + host-wake-gpios = <&gpio2 RK_PC0 GPIO_ACTIVE_HIGH>; 424 + shutdown-gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; 425 + pinctrl-names = "default"; 426 + pinctrl-0 = <&bt_host_wake_l &bt_wake_l &bt_enable_h>; 427 + vbat-supply = <&vcc3v3_sys>; 428 + vddio-supply = <&vcca_1v8>; 429 + }; 430 + }; 431 + 432 + &uart2 { 433 + status = "okay"; 434 + }; 435 + 436 + &vop { 437 + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; 438 + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; 439 + status = "okay"; 440 + }; 441 + 442 + &vop_mmu { 443 + status = "okay"; 444 + }; 445 + 446 + &vp0 { 447 + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 448 + reg = <ROCKCHIP_VOP2_EP_HDMI0>; 449 + remote-endpoint = <&hdmi_in_vp0>; 450 + }; 451 + }; 452 + 453 + &vpu { 454 + status = "okay"; 455 + }; 456 + 457 + &vdpu_mmu { 458 + status = "okay"; 459 + }; 460 + 461 + &usb2phy0_host { 462 + phy-supply = <&vcc5v0_usb_host>; 463 + status = "okay"; 464 + }; 465 + 466 + &usb2phy0_otg { 467 + vbus-supply = <&vcc5v0_usb2_otg>; 468 + status = "okay"; 469 + }; 470 + 471 + &usb2phy1_host { 472 + phy-supply = <&vcc5v0_usb_host>; 473 + status = "okay"; 474 + }; 475 + 476 + &usb2phy1_otg { 477 + phy-supply = <&vcc5v0_usb_host>; 478 + status = "okay"; 479 + }; 480 + 481 + &usb2phy1 { 482 + status = "okay"; 483 + }; 484 + 485 + &usb_host0_ehci { 486 + status = "okay"; 487 + }; 488 + 489 + &usb_host0_ohci { 490 + status = "okay"; 491 + }; 492 + 493 + &usb_host1_ehci { 494 + status = "okay"; 495 + }; 496 + 497 + &usb_host1_ohci { 498 + status = "okay"; 499 + }; 500 + 501 + &usb_host1_xhci { 502 + status = "okay"; 503 + };
+34
arch/arm64/boot/dts/rockchip/rk3566-roc-pc.dts
··· 82 82 vin-supply = <&usb_5v>; 83 83 }; 84 84 85 + vcc3v3_pcie: vcc3v3-pcie-regulator { 86 + compatible = "regulator-fixed"; 87 + enable-active-high; 88 + gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; 89 + pinctrl-names = "default"; 90 + pinctrl-0 = <&pcie_enable_h>; 91 + regulator-name = "vcc3v3_pcie"; 92 + regulator-min-microvolt = <3300000>; 93 + regulator-max-microvolt = <3300000>; 94 + vin-supply = <&vcc5v0_sys>; 95 + }; 96 + 85 97 vcc3v3_sys: vcc3v3-sys-regulator { 86 98 compatible = "regulator-fixed"; 87 99 regulator-name = "vcc3v3_sys"; ··· 131 119 }; 132 120 133 121 &combphy1 { 122 + status = "okay"; 123 + }; 124 + 125 + &combphy2 { 134 126 status = "okay"; 135 127 }; 136 128 ··· 463 447 }; 464 448 }; 465 449 450 + &pcie2x1 { 451 + pinctrl-names = "default"; 452 + pinctrl-0 = <&pcie_reset_h>; 453 + reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; 454 + vpcie3v3-supply = <&vcc3v3_pcie>; 455 + status = "okay"; 456 + }; 457 + 466 458 &pinctrl { 467 459 bt { 468 460 bt_enable_h: bt-enable-h { ··· 489 465 leds { 490 466 user_led_enable_h: user-led-enable-h { 491 467 rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; 468 + }; 469 + }; 470 + 471 + pcie { 472 + pcie_enable_h: pcie-enable-h { 473 + rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; 474 + }; 475 + 476 + pcie_reset_h: pcie-reset-h { 477 + rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 492 478 }; 493 479 }; 494 480
+194
arch/arm64/boot/dts/rockchip/rk3566-soquartz-blade.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 + 3 + /dts-v1/; 4 + 5 + #include <dt-bindings/gpio/gpio.h> 6 + #include <dt-bindings/input/input.h> 7 + #include <dt-bindings/leds/common.h> 8 + #include <dt-bindings/pinctrl/rockchip.h> 9 + 10 + #include "rk3566-soquartz.dtsi" 11 + 12 + / { 13 + model = "PINE64 RK3566 SOQuartz on Blade carrier board"; 14 + compatible = "pine64,soquartz-blade", "pine64,soquartz", "rockchip,rk3566"; 15 + 16 + /* labeled VCC3V0_SD in schematic to not conflict with PMIC regulator */ 17 + vcc3v0_sd: vcc3v0-sd-regulator { 18 + compatible = "regulator-fixed"; 19 + regulator-name = "vcc3v0_sd"; 20 + regulator-always-on; 21 + regulator-boot-on; 22 + regulator-min-microvolt = <3300000>; 23 + regulator-max-microvolt = <3300000>; 24 + vin-supply = <&vcc3v3_sys>; 25 + }; 26 + 27 + /* labeled VCC_SSD in schematic */ 28 + vcc3v3_pcie_p: vcc3v3-pcie-regulator { 29 + compatible = "regulator-fixed"; 30 + regulator-name = "vcc3v3_pcie_p"; 31 + regulator-always-on; 32 + regulator-boot-on; 33 + regulator-min-microvolt = <3300000>; 34 + regulator-max-microvolt = <3300000>; 35 + vin-supply = <&vbus>; 36 + }; 37 + 38 + vcc5v_dcin: vcc5v-dcin-regulator { 39 + compatible = "regulator-fixed"; 40 + regulator-name = "vcc5v_dcin"; 41 + regulator-always-on; 42 + regulator-boot-on; 43 + regulator-min-microvolt = <5000000>; 44 + regulator-max-microvolt = <5000000>; 45 + }; 46 + }; 47 + 48 + &combphy2 { 49 + phy-supply = <&vcc3v3_sys>; 50 + status = "okay"; 51 + }; 52 + 53 + &gmac1 { 54 + status = "okay"; 55 + }; 56 + 57 + /* 58 + * i2c1 is exposed on CM1 / Module1A 59 + * pin 80 - SCL0 - i2c1_scl_m0, pullup to vcc3v3_pmu 60 + * pin 82 - SDA0 - i2c1_sda_m0, pullup to vcc3v3_pmu 61 + */ 62 + &i2c1 { 63 + status = "okay"; 64 + 65 + }; 66 + 67 + /* 68 + * i2c2 is exposed on CM1 / Module1A - to PI40 69 + * pin 56 - GPIO3 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch 70 + * pin 58 - GPIO2 - i2c2_sda_m1, pullup to vcc_3v3 71 + */ 72 + &i2c2 { 73 + status = "disabled"; 74 + }; 75 + 76 + /* 77 + * i2c3 is exposed on CM1 / Module1A - to PI40 78 + * pin 35 - ID_SC(GPIO28) - i2c3_scl_m0, pullup to vcc_3v3 79 + * pin 36 - ID_SD(GPIO27) - i2c3_sda_m0, pullup to vcc_3v3 80 + */ 81 + &i2c3 { 82 + status = "disabled"; 83 + }; 84 + 85 + /* 86 + * i2c4 is exposed on CM2 / Module1B - to PI40 87 + * pin 45 - GPIO24 - i2c4_scl_m1 88 + * pin 47 - GPIO23 - i2c4_sda_m1 89 + */ 90 + &i2c4 { 91 + status = "disabled"; 92 + }; 93 + 94 + /* 95 + * i2s1_8ch is exposed on CM1 / Module1A - to PI40 96 + * pin 24 - GPIO26 - i2s1_sdi1_m1 97 + * pin 25 - GPIO21 - i2s1_sdo0_m1 98 + * pin 26 - GPIO19 - i2s1_lrck_tx_m1 99 + * pin 27 - GPIO20 - i2s1_sdi0_m1 100 + * pin 29 - GPIO16 - i2s1_sdi3_m1 101 + * pin 30 - GPIO6 - i2s1_sdi2_m1 102 + * pin 40 - GPIO9 - i2s1_sdo1_m1, shared with spi3 103 + * pin 41 - GPIO25 - i2s1_sdo2_m1 104 + * pin 49 - GPIO18 - i2s1_sclk_tx_m1 105 + * pin 50 - GPIO17 - i2s1_mclk_m1 106 + * pin 56 - GPIO3 - i2s1_sdo3_m1, shared with i2c2 107 + */ 108 + &i2s1_8ch { 109 + status = "disabled"; 110 + }; 111 + 112 + &led_diy { 113 + color = <LED_COLOR_ID_RED>; 114 + function = LED_FUNCTION_DISK_ACTIVITY; 115 + linux,default-trigger = "disk-activity"; 116 + status = "okay"; 117 + }; 118 + 119 + &led_work { 120 + color = <LED_COLOR_ID_GREEN>; 121 + function = LED_FUNCTION_STATUS; 122 + linux,default-trigger = "heartbeat"; 123 + status = "okay"; 124 + }; 125 + 126 + &pcie2x1 { 127 + vpcie3v3-supply = <&vcc3v3_pcie_p>; 128 + status = "okay"; 129 + }; 130 + 131 + &rgmii_phy1 { 132 + status = "okay"; 133 + }; 134 + 135 + /* 136 + * saradc is exposed on CM1 / Module1A - to J2 137 + * pin 94 - AIN1 - saradc_vin3 138 + * pin 96 - AIN0 - saradc_vin2 139 + */ 140 + &saradc { 141 + status = "disabled"; 142 + }; 143 + 144 + &sdmmc0 { 145 + vmmc-supply = <&vcc3v0_sd>; 146 + status = "okay"; 147 + }; 148 + 149 + /* 150 + * spi3 is exposed on CM1 / Module1A - to PI40 151 + * pin 37 - GPIO7 - spi3_cs1_m0 152 + * pin 38 - GPIO11 - spi3_clk_m0 153 + * pin 39 - GPIO8 - spi3_cs0_m0 154 + * pin 40 - GPIO9 - spi3_miso_m0, shared with i2s1_8ch 155 + * pin 44 - GPIO10 - spi3_mosi_m0 156 + */ 157 + &spi3 { 158 + status = "disabled"; 159 + }; 160 + 161 + /* 162 + * uart2 is exposed on CM1 / Module1A - to PI40 163 + * pin 51 - GPIO15 - uart2_rx_m0 164 + * pin 55 - GPIO14 - uart2_tx_m0 165 + */ 166 + &uart2 { 167 + status = "okay"; 168 + }; 169 + 170 + /* 171 + * uart7 is exposed on CM1 / Module1A - to PI40 172 + * pin 46 - GPIO22 - uart7_tx_m2 173 + * pin 47 - GPIO23 - uart7_rx_m2 174 + */ 175 + &uart7 { 176 + status = "okay"; 177 + }; 178 + 179 + &usb2phy0 { 180 + status = "okay"; 181 + }; 182 + 183 + &usb2phy0_otg { 184 + phy-supply = <&vbus>; 185 + status = "okay"; 186 + }; 187 + 188 + &usb_host0_xhci { 189 + status = "okay"; 190 + }; 191 + 192 + &vbus { 193 + vin-supply = <&vcc5v_dcin>; 194 + };
+11
arch/arm64/boot/dts/rockchip/rk3566-soquartz-cm4.dts
··· 30 30 }; 31 31 }; 32 32 33 + /* phy for pcie */ 34 + &combphy2 { 35 + phy-supply = <&vcc3v3_sys>; 36 + status = "okay"; 37 + }; 38 + 33 39 &gmac1 { 34 40 status = "okay"; 35 41 }; ··· 108 102 }; 109 103 110 104 &led_work { 105 + status = "okay"; 106 + }; 107 + 108 + &pcie2x1 { 109 + vpcie3v3-supply = <&vcc_3v3>; 111 110 status = "okay"; 112 111 }; 113 112
+232
arch/arm64/boot/dts/rockchip/rk3566-soquartz-model-a.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 + 3 + /dts-v1/; 4 + 5 + #include "rk3566-soquartz.dtsi" 6 + 7 + / { 8 + model = "PINE64 RK3566 SOQuartz on Model A carrier board"; 9 + compatible = "pine64,soquartz-model-a", "pine64,soquartz", "rockchip,rk3566"; 10 + 11 + /* labeled DCIN_12V in schematic */ 12 + vcc12v_dcin: vcc12v-dcin-regulator { 13 + compatible = "regulator-fixed"; 14 + regulator-name = "vcc12v_dcin"; 15 + regulator-always-on; 16 + regulator-boot-on; 17 + regulator-min-microvolt = <12000000>; 18 + regulator-max-microvolt = <12000000>; 19 + }; 20 + 21 + vcc5v0_usb: vcc5v0-usb-regulator { 22 + compatible = "regulator-fixed"; 23 + regulator-name = "vcc5v0_usb"; 24 + regulator-always-on; 25 + regulator-boot-on; 26 + regulator-min-microvolt = <5000000>; 27 + regulator-max-microvolt = <5000000>; 28 + vin-supply = <&vcc12v_dcin>; 29 + }; 30 + 31 + /* 32 + * Labelled VCC3V0_SD in schematic to not conflict with PMIC 33 + * regulator, it's 3.3v in actuality 34 + */ 35 + vcc3v0_sd: vcc3v0-sd-regulator { 36 + compatible = "regulator-fixed"; 37 + regulator-name = "vcc3v0_sd"; 38 + regulator-always-on; 39 + regulator-boot-on; 40 + regulator-min-microvolt = <3300000>; 41 + regulator-max-microvolt = <3300000>; 42 + vin-supply = <&vcc3v3_sys>; 43 + }; 44 + 45 + vcc3v3_pcie: vcc3v3-pcie-regulator { 46 + compatible = "regulator-fixed"; 47 + regulator-name = "vcc3v3_pcie"; 48 + regulator-always-on; 49 + regulator-boot-on; 50 + regulator-min-microvolt = <3300000>; 51 + regulator-max-microvolt = <3300000>; 52 + vin-supply = <&vcc12v_dcin>; 53 + }; 54 + 55 + vcc12v_pcie: vcc12v-pcie-regulator { 56 + compatible = "regulator-fixed"; 57 + regulator-name = "vcc12v_pcie"; 58 + regulator-always-on; 59 + regulator-boot-on; 60 + regulator-min-microvolt = <12000000>; 61 + regulator-max-microvolt = <12000000>; 62 + vin-supply = <&vcc12v_dcin>; 63 + }; 64 + }; 65 + 66 + /* phy for pcie */ 67 + &combphy2 { 68 + phy-supply = <&vcc3v3_sys>; 69 + status = "okay"; 70 + }; 71 + 72 + &gmac1 { 73 + status = "okay"; 74 + }; 75 + 76 + /* 77 + * i2c1 is exposed on CM1 / Module1A 78 + * pin 80 - SCL0 - i2c1_scl_m0, pullup to vcc3v3_pmu 79 + * pin 82 - SDA0 - i2c1_sda_m0, pullup to vcc3v3_pmu 80 + */ 81 + &i2c1 { 82 + status = "okay"; 83 + 84 + /* 85 + * the rtc interrupt is tied to PMIC_PWRON, 86 + * it will force reset the board if triggered. 87 + */ 88 + pcf85063: rtc@51 { 89 + compatible = "nxp,pcf85063"; 90 + reg = <0x51>; 91 + }; 92 + }; 93 + 94 + /* 95 + * i2c2 is exposed on CM1 / Module1A - to PI40 96 + * pin 56 - GPIO3 - i2c2_scl_m1, pullup to vcc_3v3, shared with i2s1_8ch 97 + * pin 58 - GPIO2 - i2c2_sda_m1, pullup to vcc_3v3 98 + */ 99 + &i2c2 { 100 + status = "disabled"; 101 + }; 102 + 103 + /* 104 + * i2c3 is exposed on CM1 / Module1A - to PI40 105 + * pin 35 - ID_SC(GPIO28) - i2c3_scl_m0, pullup to vcc_3v3 106 + * pin 36 - ID_SD(GPIO27) - i2c3_sda_m0, pullup to vcc_3v3 107 + */ 108 + &i2c3 { 109 + status = "disabled"; 110 + }; 111 + 112 + /* 113 + * i2c4 is exposed on CM2 / Module1B - to PI40 114 + * pin 45 - GPIO24 - i2c4_scl_m1 115 + * pin 47 - GPIO23 - i2c4_sda_m1 116 + */ 117 + &i2c4 { 118 + status = "disabled"; 119 + }; 120 + 121 + /* 122 + * i2s1_8ch is exposed on CM1 / Module1A - to PI40 123 + * pin 24 - GPIO26 - i2s1_sdi1_m1 124 + * pin 25 - GPIO21 - i2s1_sdo0_m1 125 + * pin 26 - GPIO19 - i2s1_lrck_tx_m1 126 + * pin 27 - GPIO20 - i2s1_sdi0_m1 127 + * pin 29 - GPIO16 - i2s1_sdi3_m1 128 + * pin 30 - GPIO6 - i2s1_sdi2_m1 129 + * pin 40 - GPIO9 - i2s1_sdo1_m1, shared with spi3 130 + * pin 41 - GPIO25 - i2s1_sdo2_m1 131 + * pin 49 - GPIO18 - i2s1_sclk_tx_m1 132 + * pin 50 - GPIO17 - i2s1_mclk_m1 133 + * pin 56 - GPIO3 - i2s1_sdo3_m1, shared with i2c2 134 + */ 135 + &i2s1_8ch { 136 + status = "disabled"; 137 + }; 138 + 139 + &led_diy { 140 + status = "okay"; 141 + }; 142 + 143 + &led_work { 144 + status = "okay"; 145 + }; 146 + 147 + &pcie2x1 { 148 + vpcie3v3-supply = <&vcc3v3_pcie>; 149 + status = "okay"; 150 + }; 151 + 152 + &rgmii_phy1 { 153 + status = "okay"; 154 + }; 155 + 156 + &rgmii_phy1 { 157 + status = "okay"; 158 + }; 159 + 160 + /* 161 + * saradc is exposed on CM1 / Module1A - to J2 162 + * pin 94 - AIN1 - saradc_vin3 163 + * pin 96 - AIN0 - saradc_vin2 164 + */ 165 + &saradc { 166 + status = "disabled"; 167 + }; 168 + 169 + /* 170 + * vmmc-supply is vcc3v3_sd on v1.0 and vcc3v0_sd on v1.1+ 171 + * the soquartz SoM has SDMMC_PWR (CM1 pin 75) hardwired to vcc3v3_sys, 172 + * so we use vcc3v3_sd here to ensure the regulator is enabled on older boards. 173 + */ 174 + &sdmmc0 { 175 + vmmc-supply = <&vcc3v3_sd>; 176 + status = "okay"; 177 + }; 178 + 179 + /* 180 + * spi3 is exposed on CM1 / Module1A - to PI40 181 + * pin 37 - GPIO7 - spi3_cs1_m0 182 + * pin 38 - GPIO11 - spi3_clk_m0 183 + * pin 39 - GPIO8 - spi3_cs0_m0 184 + * pin 40 - GPIO9 - spi3_miso_m0, shared with i2s1_8ch 185 + * pin 44 - GPIO10 - spi3_mosi_m0 186 + */ 187 + &spi3 { 188 + status = "disabled"; 189 + }; 190 + 191 + /* 192 + * uart2 is exposed on CM1 / Module1A - to PI40 193 + * pin 51 - GPIO15 - uart2_rx_m0 194 + * pin 55 - GPIO14 - uart2_tx_m0 195 + */ 196 + &uart2 { 197 + status = "okay"; 198 + }; 199 + 200 + /* 201 + * uart7 is exposed on CM1 / Module1A - to PI40 202 + * pin 46 - GPIO22 - uart7_tx_m2 203 + * pin 47 - GPIO23 - uart7_rx_m2 204 + */ 205 + &uart7 { 206 + status = "okay"; 207 + }; 208 + 209 + &usb2phy0 { 210 + status = "okay"; 211 + }; 212 + 213 + &usb2phy0_otg { 214 + phy-supply = <&vcc5v0_usb>; 215 + status = "okay"; 216 + }; 217 + 218 + &usb_host0_xhci { 219 + status = "okay"; 220 + }; 221 + 222 + &vbus { 223 + vin-supply = <&vcc5v0_usb>; 224 + }; 225 + 226 + &vcc3v3_sd { 227 + regulator-always-on; 228 + regulator-boot-on; 229 + regulator-min-microvolt = <3300000>; 230 + regulator-max-microvolt = <3300000>; 231 + status = "okay"; 232 + };
+75
arch/arm64/boot/dts/rockchip/rk3566-soquartz.dtsi
··· 4 4 5 5 #include <dt-bindings/gpio/gpio.h> 6 6 #include <dt-bindings/pinctrl/rockchip.h> 7 + #include <dt-bindings/soc/rockchip,vop2.h> 7 8 #include "rk3566.dtsi" 8 9 9 10 / { ··· 27 26 clock-frequency = <125000000>; 28 27 clock-output-names = "gmac1_clkin"; 29 28 #clock-cells = <0>; 29 + }; 30 + 31 + hdmi-con { 32 + compatible = "hdmi-connector"; 33 + type = "a"; 34 + 35 + port { 36 + hdmi_con_in: endpoint { 37 + remote-endpoint = <&hdmi_out_con>; 38 + }; 39 + }; 30 40 }; 31 41 32 42 leds { ··· 153 141 rx_delay = <0x10>; 154 142 phy-handle = <&rgmii_phy1>; 155 143 status = "disabled"; 144 + }; 145 + 146 + &gpu { 147 + mali-supply = <&vdd_gpu>; 148 + status = "okay"; 149 + }; 150 + 151 + &hdmi { 152 + avdd-0v9-supply = <&vdda0v9_image>; 153 + avdd-1v8-supply = <&vcca1v8_image>; 154 + status = "okay"; 155 + }; 156 + 157 + &hdmi_in { 158 + hdmi_in_vp0: endpoint { 159 + remote-endpoint = <&vp0_out_hdmi>; 160 + }; 161 + }; 162 + 163 + &hdmi_out { 164 + hdmi_out_con: endpoint { 165 + remote-endpoint = <&hdmi_con_in>; 166 + }; 167 + }; 168 + 169 + &hdmi_sound { 170 + status = "okay"; 156 171 }; 157 172 158 173 &i2c0 { ··· 450 411 status = "disabled"; 451 412 }; 452 413 414 + &i2s0_8ch { 415 + status = "okay"; 416 + }; 417 + 453 418 /* 454 419 * i2s1_8ch is exposed on CM1 / Module1A 455 420 * pin 24 - i2s1_sdi1_m1 ··· 487 444 }; 488 445 }; 489 446 447 + &pcie2x1 { 448 + pinctrl-names = "default"; 449 + pinctrl-0 = <&pcie_reset_h>; 450 + reset-gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; 451 + }; 452 + 490 453 &pinctrl { 491 454 bt { 492 455 bt_enable_h: bt-enable-h { ··· 515 466 516 467 diy_led_enable_h: diy-led-enable-h { 517 468 rockchip,pins = <0 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>; 469 + }; 470 + }; 471 + 472 + pcie { 473 + pcie_clkreq_h: pcie-clkreq-h { 474 + rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 475 + }; 476 + pcie_reset_h: pcie-reset-h { 477 + rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 518 478 }; 519 479 }; 520 480 ··· 671 613 672 614 &usb_host0_xhci { 673 615 status = "disabled"; 616 + }; 617 + 618 + &vop { 619 + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; 620 + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; 621 + status = "okay"; 622 + }; 623 + 624 + &vop_mmu { 625 + status = "okay"; 626 + }; 627 + 628 + &vp0 { 629 + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 630 + reg = <ROCKCHIP_VOP2_EP_HDMI0>; 631 + remote-endpoint = <&hdmi_in_vp0>; 632 + }; 674 633 };
+744
arch/arm64/boot/dts/rockchip/rk3568-odroid-m1.dts
··· 1 + // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2 + /* 3 + * Copyright (c) 2022 Hardkernel Co., Ltd. 4 + * 5 + */ 6 + 7 + /dts-v1/; 8 + #include <dt-bindings/gpio/gpio.h> 9 + #include <dt-bindings/leds/common.h> 10 + #include <dt-bindings/pinctrl/rockchip.h> 11 + #include <dt-bindings/soc/rockchip,vop2.h> 12 + #include "rk3568.dtsi" 13 + 14 + / { 15 + model = "Hardkernel ODROID-M1"; 16 + compatible = "rockchip,rk3568-odroid-m1", "rockchip,rk3568"; 17 + 18 + aliases { 19 + ethernet0 = &gmac0; 20 + i2c0 = &i2c3; 21 + i2c3 = &i2c0; 22 + mmc0 = &sdhci; 23 + mmc1 = &sdmmc0; 24 + serial0 = &uart1; 25 + serial1 = &uart0; 26 + }; 27 + 28 + chosen { 29 + stdout-path = "serial2:1500000n8"; 30 + }; 31 + 32 + dc_12v: dc-12v-regulator { 33 + compatible = "regulator-fixed"; 34 + regulator-name = "dc_12v"; 35 + regulator-always-on; 36 + regulator-boot-on; 37 + regulator-min-microvolt = <12000000>; 38 + regulator-max-microvolt = <12000000>; 39 + }; 40 + 41 + hdmi-con { 42 + compatible = "hdmi-connector"; 43 + type = "a"; 44 + 45 + port { 46 + hdmi_con_in: endpoint { 47 + remote-endpoint = <&hdmi_out_con>; 48 + }; 49 + }; 50 + }; 51 + 52 + ir-receiver { 53 + compatible = "gpio-ir-receiver"; 54 + gpios = <&gpio0 RK_PC2 GPIO_ACTIVE_LOW>; 55 + pinctrl-names = "default"; 56 + pinctrl-0 = <&ir_receiver_pin>; 57 + }; 58 + 59 + leds { 60 + compatible = "gpio-leds"; 61 + 62 + led_power: led-0 { 63 + gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; 64 + function = LED_FUNCTION_POWER; 65 + color = <LED_COLOR_ID_RED>; 66 + default-state = "keep"; 67 + linux,default-trigger = "default-on"; 68 + pinctrl-names = "default"; 69 + pinctrl-0 = <&led_power_pin>; 70 + }; 71 + led_work: led-1 { 72 + gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; 73 + function = LED_FUNCTION_HEARTBEAT; 74 + color = <LED_COLOR_ID_BLUE>; 75 + linux,default-trigger = "heartbeat"; 76 + pinctrl-names = "default"; 77 + pinctrl-0 = <&led_work_pin>; 78 + }; 79 + }; 80 + 81 + rk809-sound { 82 + compatible = "simple-audio-card"; 83 + pinctrl-names = "default"; 84 + pinctrl-0 = <&hp_det_pin>; 85 + simple-audio-card,name = "Analog RK817"; 86 + simple-audio-card,format = "i2s"; 87 + simple-audio-card,hp-det-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; 88 + simple-audio-card,mclk-fs = <256>; 89 + simple-audio-card,widgets = 90 + "Headphone", "Headphones", 91 + "Speaker", "Speaker"; 92 + simple-audio-card,routing = 93 + "Headphones", "HPOL", 94 + "Headphones", "HPOR", 95 + "Speaker", "SPKO"; 96 + 97 + simple-audio-card,cpu { 98 + sound-dai = <&i2s1_8ch>; 99 + }; 100 + 101 + simple-audio-card,codec { 102 + sound-dai = <&rk809>; 103 + }; 104 + }; 105 + 106 + vcc3v3_pcie: vcc3v3-pcie-regulator { 107 + compatible = "regulator-fixed"; 108 + regulator-name = "vcc3v3_pcie"; 109 + enable-active-high; 110 + gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; 111 + pinctrl-names = "default"; 112 + pinctrl-0 = <&vcc3v3_pcie_en_pin>; 113 + regulator-min-microvolt = <3300000>; 114 + regulator-max-microvolt = <3300000>; 115 + startup-delay-us = <5000>; 116 + vin-supply = <&vcc3v3_sys>; 117 + }; 118 + 119 + vcc3v3_sys: vcc3v3-sys-regulator { 120 + compatible = "regulator-fixed"; 121 + regulator-name = "vcc3v3_sys"; 122 + regulator-always-on; 123 + regulator-boot-on; 124 + regulator-min-microvolt = <3300000>; 125 + regulator-max-microvolt = <3300000>; 126 + vin-supply = <&dc_12v>; 127 + }; 128 + 129 + vcc5v0_sys: vcc5v0-sys-regulator { 130 + compatible = "regulator-fixed"; 131 + regulator-name = "vcc5v0_sys"; 132 + regulator-always-on; 133 + regulator-boot-on; 134 + regulator-min-microvolt = <5000000>; 135 + regulator-max-microvolt = <5000000>; 136 + vin-supply = <&dc_12v>; 137 + }; 138 + 139 + vcc5v0_usb_host: vcc5v0-usb-host-regulator { 140 + compatible = "regulator-fixed"; 141 + regulator-name = "vcc5v0_usb_host"; 142 + enable-active-high; 143 + gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; 144 + pinctrl-names = "default"; 145 + pinctrl-0 = <&vcc5v0_usb_host_en_pin>; 146 + regulator-min-microvolt = <5000000>; 147 + regulator-max-microvolt = <5000000>; 148 + vin-supply = <&vcc5v0_sys>; 149 + }; 150 + 151 + vcc5v0_usb_otg: vcc5v0-usb-otg-regulator { 152 + compatible = "regulator-fixed"; 153 + regulator-name = "vcc5v0_usb_otg"; 154 + enable-active-high; 155 + gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; 156 + pinctrl-names = "default"; 157 + pinctrl-0 = <&vcc5v0_usb_otg_en_pin>; 158 + regulator-min-microvolt = <5000000>; 159 + regulator-max-microvolt = <5000000>; 160 + vin-supply = <&vcc5v0_sys>; 161 + }; 162 + }; 163 + 164 + &combphy0 { 165 + /* Used for USB3 */ 166 + phy-supply = <&vcc5v0_usb_host>; 167 + status = "okay"; 168 + }; 169 + 170 + &combphy1 { 171 + /* Used for USB3 */ 172 + phy-supply = <&vcc5v0_usb_otg>; 173 + status = "okay"; 174 + }; 175 + 176 + &combphy2 { 177 + /* used for SATA */ 178 + status = "okay"; 179 + }; 180 + 181 + &cpu0 { 182 + cpu-supply = <&vdd_cpu>; 183 + }; 184 + 185 + &cpu1 { 186 + cpu-supply = <&vdd_cpu>; 187 + }; 188 + 189 + &cpu2 { 190 + cpu-supply = <&vdd_cpu>; 191 + }; 192 + 193 + &cpu3 { 194 + cpu-supply = <&vdd_cpu>; 195 + }; 196 + 197 + &gmac0 { 198 + assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; 199 + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>; 200 + assigned-clock-rates = <0>, <125000000>; 201 + clock_in_out = "output"; 202 + phy-handle = <&rgmii_phy0>; 203 + phy-mode = "rgmii"; 204 + phy-supply = <&vcc3v3_sys>; 205 + pinctrl-names = "default"; 206 + pinctrl-0 = <&gmac0_miim 207 + &gmac0_tx_bus2 208 + &gmac0_rx_bus2 209 + &gmac0_rgmii_clk 210 + &gmac0_rgmii_bus>; 211 + status = "okay"; 212 + 213 + tx_delay = <0x4f>; 214 + rx_delay = <0x2d>; 215 + }; 216 + 217 + &gpu { 218 + mali-supply = <&vdd_gpu>; 219 + status = "okay"; 220 + }; 221 + 222 + &hdmi { 223 + avdd-0v9-supply = <&vdda0v9_image>; 224 + avdd-1v8-supply = <&vcca1v8_image>; 225 + status = "okay"; 226 + }; 227 + 228 + &hdmi_in { 229 + hdmi_in_vp0: endpoint { 230 + remote-endpoint = <&vp0_out_hdmi>; 231 + }; 232 + }; 233 + 234 + &hdmi_out { 235 + hdmi_out_con: endpoint { 236 + remote-endpoint = <&hdmi_con_in>; 237 + }; 238 + }; 239 + 240 + &hdmi_sound { 241 + status = "okay"; 242 + }; 243 + 244 + &i2c0 { 245 + status = "okay"; 246 + 247 + vdd_cpu: regulator@1c { 248 + compatible = "tcs,tcs4525"; 249 + reg = <0x1c>; 250 + fcs,suspend-voltage-selector = <1>; 251 + regulator-name = "vdd_cpu"; 252 + regulator-always-on; 253 + regulator-boot-on; 254 + regulator-min-microvolt = <800000>; 255 + regulator-max-microvolt = <1150000>; 256 + regulator-ramp-delay = <2300>; 257 + vin-supply = <&vcc3v3_sys>; 258 + 259 + regulator-state-mem { 260 + regulator-off-in-suspend; 261 + }; 262 + }; 263 + 264 + rk809: pmic@20 { 265 + compatible = "rockchip,rk809"; 266 + reg = <0x20>; 267 + interrupt-parent = <&gpio0>; 268 + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; 269 + assigned-clocks = <&cru I2S1_MCLKOUT_TX>; 270 + assigned-clock-parents = <&cru CLK_I2S1_8CH_TX>; 271 + #clock-cells = <1>; 272 + clock-names = "mclk"; 273 + clocks = <&cru I2S1_MCLKOUT_TX>; 274 + pinctrl-names = "default"; 275 + pinctrl-0 = <&pmic_int_l>, <&i2s1m0_mclk>; 276 + rockchip,system-power-controller; 277 + #sound-dai-cells = <0>; 278 + vcc1-supply = <&vcc3v3_sys>; 279 + vcc2-supply = <&vcc3v3_sys>; 280 + vcc3-supply = <&vcc3v3_sys>; 281 + vcc4-supply = <&vcc3v3_sys>; 282 + vcc5-supply = <&vcc3v3_sys>; 283 + vcc6-supply = <&vcc3v3_sys>; 284 + vcc7-supply = <&vcc3v3_sys>; 285 + vcc8-supply = <&vcc3v3_sys>; 286 + vcc9-supply = <&vcc3v3_sys>; 287 + wakeup-source; 288 + 289 + regulators { 290 + vdd_logic: DCDC_REG1 { 291 + regulator-name = "vdd_logic"; 292 + regulator-always-on; 293 + regulator-boot-on; 294 + regulator-init-microvolt = <900000>; 295 + regulator-initial-mode = <0x2>; 296 + regulator-min-microvolt = <500000>; 297 + regulator-max-microvolt = <1350000>; 298 + regulator-ramp-delay = <6001>; 299 + 300 + regulator-state-mem { 301 + regulator-off-in-suspend; 302 + }; 303 + }; 304 + 305 + vdd_gpu: DCDC_REG2 { 306 + regulator-name = "vdd_gpu"; 307 + regulator-always-on; 308 + regulator-init-microvolt = <900000>; 309 + regulator-initial-mode = <0x2>; 310 + regulator-min-microvolt = <500000>; 311 + regulator-max-microvolt = <1350000>; 312 + regulator-ramp-delay = <6001>; 313 + 314 + regulator-state-mem { 315 + regulator-off-in-suspend; 316 + }; 317 + }; 318 + 319 + vcc_ddr: DCDC_REG3 { 320 + regulator-name = "vcc_ddr"; 321 + regulator-always-on; 322 + regulator-boot-on; 323 + regulator-initial-mode = <0x2>; 324 + 325 + regulator-state-mem { 326 + regulator-on-in-suspend; 327 + }; 328 + }; 329 + 330 + vdd_npu: DCDC_REG4 { 331 + regulator-name = "vdd_npu"; 332 + regulator-init-microvolt = <900000>; 333 + regulator-initial-mode = <0x2>; 334 + regulator-min-microvolt = <500000>; 335 + regulator-max-microvolt = <1350000>; 336 + regulator-ramp-delay = <6001>; 337 + 338 + regulator-state-mem { 339 + regulator-off-in-suspend; 340 + }; 341 + }; 342 + 343 + vcc_1v8: DCDC_REG5 { 344 + regulator-name = "vcc_1v8"; 345 + regulator-always-on; 346 + regulator-boot-on; 347 + regulator-min-microvolt = <1800000>; 348 + regulator-max-microvolt = <1800000>; 349 + 350 + regulator-state-mem { 351 + regulator-off-in-suspend; 352 + }; 353 + }; 354 + 355 + vdda0v9_image: LDO_REG1 { 356 + regulator-name = "vdda0v9_image"; 357 + regulator-always-on; 358 + regulator-min-microvolt = <900000>; 359 + regulator-max-microvolt = <900000>; 360 + 361 + regulator-state-mem { 362 + regulator-off-in-suspend; 363 + }; 364 + }; 365 + 366 + vdda_0v9: LDO_REG2 { 367 + regulator-name = "vdda_0v9"; 368 + regulator-always-on; 369 + regulator-boot-on; 370 + regulator-min-microvolt = <900000>; 371 + regulator-max-microvolt = <900000>; 372 + 373 + regulator-state-mem { 374 + regulator-off-in-suspend; 375 + }; 376 + }; 377 + 378 + vdda0v9_pmu: LDO_REG3 { 379 + regulator-name = "vdda0v9_pmu"; 380 + regulator-always-on; 381 + regulator-boot-on; 382 + regulator-min-microvolt = <900000>; 383 + regulator-max-microvolt = <900000>; 384 + 385 + regulator-state-mem { 386 + regulator-on-in-suspend; 387 + regulator-suspend-microvolt = <900000>; 388 + }; 389 + }; 390 + 391 + vccio_acodec: LDO_REG4 { 392 + regulator-name = "vccio_acodec"; 393 + regulator-always-on; 394 + regulator-boot-on; 395 + regulator-min-microvolt = <3300000>; 396 + regulator-max-microvolt = <3300000>; 397 + 398 + regulator-state-mem { 399 + regulator-off-in-suspend; 400 + }; 401 + }; 402 + 403 + vccio_sd: LDO_REG5 { 404 + regulator-name = "vccio_sd"; 405 + regulator-min-microvolt = <1800000>; 406 + regulator-max-microvolt = <3300000>; 407 + 408 + regulator-state-mem { 409 + regulator-off-in-suspend; 410 + }; 411 + }; 412 + 413 + vcc3v3_pmu: LDO_REG6 { 414 + regulator-name = "vcc3v3_pmu"; 415 + regulator-always-on; 416 + regulator-boot-on; 417 + regulator-min-microvolt = <3300000>; 418 + regulator-max-microvolt = <3300000>; 419 + 420 + regulator-state-mem { 421 + regulator-on-in-suspend; 422 + regulator-suspend-microvolt = <3300000>; 423 + }; 424 + }; 425 + 426 + vcca_1v8: LDO_REG7 { 427 + regulator-name = "vcca_1v8"; 428 + regulator-always-on; 429 + regulator-boot-on; 430 + regulator-min-microvolt = <1800000>; 431 + regulator-max-microvolt = <1800000>; 432 + 433 + regulator-state-mem { 434 + regulator-off-in-suspend; 435 + }; 436 + }; 437 + 438 + vcca1v8_pmu: LDO_REG8 { 439 + regulator-name = "vcca1v8_pmu"; 440 + regulator-always-on; 441 + regulator-boot-on; 442 + regulator-min-microvolt = <1800000>; 443 + regulator-max-microvolt = <1800000>; 444 + 445 + regulator-state-mem { 446 + regulator-on-in-suspend; 447 + regulator-suspend-microvolt = <1800000>; 448 + }; 449 + }; 450 + 451 + vcca1v8_image: LDO_REG9 { 452 + regulator-name = "vcca1v8_image"; 453 + regulator-always-on; 454 + regulator-min-microvolt = <1800000>; 455 + regulator-max-microvolt = <1800000>; 456 + 457 + regulator-state-mem { 458 + regulator-off-in-suspend; 459 + }; 460 + }; 461 + 462 + vcc_3v3: SWITCH_REG1 { 463 + regulator-name = "vcc_3v3"; 464 + regulator-always-on; 465 + regulator-boot-on; 466 + 467 + regulator-state-mem { 468 + regulator-off-in-suspend; 469 + }; 470 + }; 471 + 472 + vcc3v3_sd: SWITCH_REG2 { 473 + regulator-name = "vcc3v3_sd"; 474 + 475 + regulator-state-mem { 476 + regulator-off-in-suspend; 477 + }; 478 + }; 479 + }; 480 + }; 481 + }; 482 + 483 + &i2s0_8ch { 484 + status = "okay"; 485 + }; 486 + 487 + &i2s1_8ch { 488 + rockchip,trcm-sync-tx-only; 489 + status = "okay"; 490 + }; 491 + 492 + &mdio0 { 493 + rgmii_phy0: ethernet-phy@0 { 494 + compatible = "ethernet-phy-ieee802.3-c22"; 495 + reg = <0x0>; 496 + reset-assert-us = <20000>; 497 + reset-deassert-us = <100000>; 498 + reset-gpios = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 499 + }; 500 + }; 501 + 502 + &pcie30phy { 503 + status = "okay"; 504 + }; 505 + 506 + &pcie3x2 { 507 + pinctrl-names = "default"; 508 + pinctrl-0 = <&pcie_reset_pin>; 509 + reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; 510 + vpcie3v3-supply = <&vcc3v3_pcie>; 511 + status = "okay"; 512 + }; 513 + 514 + &pinctrl { 515 + fspi { 516 + fspi_dual_io_pins: fspi-dual-io-pins { 517 + rockchip,pins = 518 + /* fspi_clk */ 519 + <1 RK_PD0 1 &pcfg_pull_none>, 520 + /* fspi_cs0n */ 521 + <1 RK_PD3 1 &pcfg_pull_none>, 522 + /* fspi_d0 */ 523 + <1 RK_PD1 1 &pcfg_pull_none>, 524 + /* fspi_d1 */ 525 + <1 RK_PD2 1 &pcfg_pull_none>; 526 + }; 527 + }; 528 + 529 + ir-receiver { 530 + ir_receiver_pin: ir-receiver-pin { 531 + /* external pullup to VCC3V3_SYS */ 532 + rockchip,pins = <0 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; 533 + }; 534 + }; 535 + 536 + leds { 537 + led_power_pin: led-power-pin { 538 + rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; 539 + }; 540 + led_work_pin: led-work-pin { 541 + rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; 542 + }; 543 + }; 544 + 545 + pcie { 546 + pcie_reset_pin: pcie-reset-pin { 547 + rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; 548 + }; 549 + vcc3v3_pcie_en_pin: vcc3v3-pcie-en-pin { 550 + rockchip,pins = <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; 551 + }; 552 + }; 553 + 554 + pmic { 555 + pmic_int_l: pmic-int-l { 556 + rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; 557 + }; 558 + }; 559 + 560 + rk809 { 561 + hp_det_pin: hp-det-pin { 562 + rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; 563 + }; 564 + }; 565 + 566 + usb { 567 + vcc5v0_usb_host_en_pin: vcc5v0-usb-host-en-pin { 568 + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; 569 + }; 570 + vcc5v0_usb_otg_en_pin: vcc5v0-usb-dr-en-pin { 571 + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; 572 + }; 573 + }; 574 + }; 575 + 576 + &pmu_io_domains { 577 + pmuio1-supply = <&vcc3v3_pmu>; 578 + pmuio2-supply = <&vcc3v3_pmu>; 579 + vccio1-supply = <&vccio_acodec>; 580 + vccio2-supply = <&vcc_1v8>; 581 + vccio3-supply = <&vccio_sd>; 582 + vccio4-supply = <&vcc_1v8>; 583 + vccio5-supply = <&vcc_3v3>; 584 + vccio6-supply = <&vcc_3v3>; 585 + vccio7-supply = <&vcc_3v3>; 586 + status = "okay"; 587 + }; 588 + 589 + &saradc { 590 + vref-supply = <&vcca_1v8>; 591 + status = "okay"; 592 + }; 593 + 594 + &sata2 { 595 + status = "okay"; 596 + }; 597 + 598 + &sdhci { 599 + bus-width = <8>; 600 + max-frequency = <200000000>; 601 + non-removable; 602 + pinctrl-names = "default"; 603 + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe &emmc_rstnout>; 604 + vmmc-supply = <&vcc_3v3>; 605 + vqmmc-supply = <&vcc_1v8>; 606 + status = "okay"; 607 + }; 608 + 609 + &sdmmc0 { 610 + bus-width = <4>; 611 + cap-sd-highspeed; 612 + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; 613 + disable-wp; 614 + pinctrl-names = "default"; 615 + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; 616 + sd-uhs-sdr50; 617 + vmmc-supply = <&vcc3v3_sd>; 618 + vqmmc-supply = <&vccio_sd>; 619 + status = "okay"; 620 + }; 621 + 622 + &sfc { 623 + /* Dual I/O mode as the D2 pin conflicts with the eMMC */ 624 + pinctrl-0 = <&fspi_dual_io_pins>; 625 + pinctrl-names = "default"; 626 + #address-cells = <1>; 627 + #size-cells = <0>; 628 + status = "okay"; 629 + 630 + flash@0 { 631 + compatible = "jedec,spi-nor"; 632 + reg = <0>; 633 + spi-max-frequency = <100000000>; 634 + spi-rx-bus-width = <2>; 635 + spi-tx-bus-width = <1>; 636 + 637 + partitions { 638 + compatible = "fixed-partitions"; 639 + #address-cells = <1>; 640 + #size-cells = <1>; 641 + 642 + partition@0 { 643 + label = "SPL"; 644 + reg = <0x0 0xe0000>; 645 + }; 646 + partition@e0000 { 647 + label = "U-Boot Env"; 648 + reg = <0xe0000 0x20000>; 649 + }; 650 + partition@100000 { 651 + label = "U-Boot"; 652 + reg = <0x100000 0x200000>; 653 + }; 654 + partition@300000 { 655 + label = "splash"; 656 + reg = <0x300000 0x100000>; 657 + }; 658 + partition@400000 { 659 + label = "Filesystem"; 660 + reg = <0x400000 0xc00000>; 661 + }; 662 + }; 663 + }; 664 + }; 665 + 666 + &tsadc { 667 + rockchip,hw-tshut-mode = <1>; 668 + rockchip,hw-tshut-polarity = <0>; 669 + status = "okay"; 670 + }; 671 + 672 + &uart2 { 673 + status = "okay"; 674 + }; 675 + 676 + &usb_host0_ehci { 677 + status = "okay"; 678 + }; 679 + 680 + &usb_host0_ohci { 681 + status = "okay"; 682 + }; 683 + 684 + &usb_host0_xhci { 685 + dr_mode = "host"; 686 + status = "okay"; 687 + }; 688 + 689 + &usb_host1_ehci { 690 + status = "okay"; 691 + }; 692 + 693 + &usb_host1_ohci { 694 + status = "okay"; 695 + }; 696 + 697 + &usb_host1_xhci { 698 + status = "okay"; 699 + }; 700 + 701 + &usb2phy0 { 702 + status = "okay"; 703 + }; 704 + 705 + &usb2phy0_host { 706 + phy-supply = <&vcc5v0_usb_host>; 707 + status = "okay"; 708 + }; 709 + 710 + &usb2phy0_otg { 711 + phy-supply = <&vcc5v0_usb_otg>; 712 + status = "okay"; 713 + }; 714 + 715 + &usb2phy1 { 716 + status = "okay"; 717 + }; 718 + 719 + &usb2phy1_host { 720 + phy-supply = <&vcc5v0_usb_host>; 721 + status = "okay"; 722 + }; 723 + 724 + &usb2phy1_otg { 725 + phy-supply = <&vcc5v0_usb_host>; 726 + status = "okay"; 727 + }; 728 + 729 + &vop { 730 + assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; 731 + assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; 732 + status = "okay"; 733 + }; 734 + 735 + &vop_mmu { 736 + status = "okay"; 737 + }; 738 + 739 + &vp0 { 740 + vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { 741 + reg = <ROCKCHIP_VOP2_EP_HDMI0>; 742 + remote-endpoint = <&hdmi_in_vp0>; 743 + }; 744 + };
+136 -10
arch/arm64/boot/dts/rockchip/rk3568-rock-3a.dts
··· 32 32 }; 33 33 }; 34 34 35 + gmac1_clkin: external-gmac1-clock { 36 + compatible = "fixed-clock"; 37 + clock-frequency = <125000000>; 38 + clock-output-names = "gmac1_clkin"; 39 + #clock-cells = <0>; 40 + }; 41 + 35 42 leds { 36 43 compatible = "gpio-leds"; 37 44 ··· 67 60 }; 68 61 }; 69 62 70 - vcc12v_dcin: vcc12v-dcin { 63 + sdio_pwrseq: sdio-pwrseq { 64 + compatible = "mmc-pwrseq-simple"; 65 + clocks = <&rk809 1>; 66 + clock-names = "ext_clock"; 67 + pinctrl-names = "default"; 68 + pinctrl-0 = <&wifi_enable>; 69 + post-power-on-delay-ms = <100>; 70 + power-off-delay-us = <5000000>; 71 + reset-gpios = <&gpio3 RK_PD4 GPIO_ACTIVE_LOW>; 72 + }; 73 + 74 + vcc12v_dcin: vcc12v-dcin-regulator { 71 75 compatible = "regulator-fixed"; 72 76 regulator-name = "vcc12v_dcin"; 73 77 regulator-always-on; 74 78 regulator-boot-on; 79 + }; 80 + 81 + pcie30_avdd0v9: pcie30-avdd0v9-regulator { 82 + compatible = "regulator-fixed"; 83 + regulator-name = "pcie30_avdd0v9"; 84 + regulator-always-on; 85 + regulator-boot-on; 86 + regulator-min-microvolt = <900000>; 87 + regulator-max-microvolt = <900000>; 88 + vin-supply = <&vcc3v3_sys>; 89 + }; 90 + 91 + pcie30_avdd1v8: pcie30-avdd1v8-regulator { 92 + compatible = "regulator-fixed"; 93 + regulator-name = "pcie30_avdd1v8"; 94 + regulator-always-on; 95 + regulator-boot-on; 96 + regulator-min-microvolt = <1800000>; 97 + regulator-max-microvolt = <1800000>; 98 + vin-supply = <&vcc3v3_sys>; 99 + }; 100 + 101 + /* pi6c pcie clock generator */ 102 + vcc3v3_pi6c_03: vcc3v3-pi6c-03-regulator { 103 + compatible = "regulator-fixed"; 104 + regulator-name = "vcc3v3_pi6c_03"; 105 + regulator-always-on; 106 + regulator-boot-on; 107 + regulator-min-microvolt = <3300000>; 108 + regulator-max-microvolt = <3300000>; 109 + vin-supply = <&vcc5v0_sys>; 75 110 }; 76 111 77 112 vcc3v3_pcie: vcc3v3-pcie-regulator { ··· 128 79 vin-supply = <&vcc5v0_sys>; 129 80 }; 130 81 131 - vcc3v3_sys: vcc3v3-sys { 82 + vcc3v3_sys: vcc3v3-sys-regulator { 132 83 compatible = "regulator-fixed"; 133 84 regulator-name = "vcc3v3_sys"; 134 85 regulator-always-on; ··· 138 89 vin-supply = <&vcc12v_dcin>; 139 90 }; 140 91 141 - vcc5v0_sys: vcc5v0-sys { 92 + vcc5v0_sys: vcc5v0-sys-regulator { 142 93 compatible = "regulator-fixed"; 143 94 regulator-name = "vcc5v0_sys"; 144 95 regulator-always-on; ··· 148 99 vin-supply = <&vcc12v_dcin>; 149 100 }; 150 101 151 - vcc5v0_usb: vcc5v0-usb { 102 + vcc5v0_usb: vcc5v0-usb-regulator { 152 103 compatible = "regulator-fixed"; 153 104 regulator-name = "vcc5v0_usb"; 154 105 regulator-always-on; ··· 158 109 vin-supply = <&vcc12v_dcin>; 159 110 }; 160 111 161 - vcc5v0_usb_host: vcc5v0-usb-host { 112 + vcc5v0_usb_host: vcc5v0-usb-host-regulator { 162 113 compatible = "regulator-fixed"; 163 114 enable-active-high; 164 115 gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; ··· 193 144 vin-supply = <&vcc5v0_usb>; 194 145 }; 195 146 196 - vcc_cam: vcc-cam { 147 + vcc_cam: vcc-cam-regulator { 197 148 compatible = "regulator-fixed"; 198 149 enable-active-high; 199 150 gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; ··· 209 160 }; 210 161 }; 211 162 212 - vcc_mipi: vcc-mipi { 163 + vcc_mipi: vcc-mipi-regulator { 213 164 compatible = "regulator-fixed"; 214 165 enable-active-high; 215 166 gpio = <&gpio3 RK_PC0 GPIO_ACTIVE_HIGH>; ··· 256 207 257 208 &gmac1 { 258 209 assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; 259 - assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>; 260 - assigned-clock-rates = <0>, <125000000>; 261 - clock_in_out = "output"; 210 + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>; 211 + clock_in_out = "input"; 262 212 phy-handle = <&rgmii_phy1>; 263 213 phy-mode = "rgmii-id"; 214 + phy-supply = <&vcc_3v3>; 264 215 pinctrl-names = "default"; 265 216 pinctrl-0 = <&gmac1m1_miim 266 217 &gmac1m1_tx_bus2 267 218 &gmac1m1_rx_bus2 268 219 &gmac1m1_rgmii_clk 220 + &gmac1m1_clkinout 269 221 &gmac1m1_rgmii_bus>; 270 222 status = "okay"; 271 223 }; ··· 576 526 status = "okay"; 577 527 }; 578 528 529 + &i2s2_2ch { 530 + rockchip,trcm-sync-tx-only; 531 + status = "okay"; 532 + }; 533 + 579 534 &mdio1 { 580 535 rgmii_phy1: ethernet-phy@0 { 581 536 compatible = "ethernet-phy-ieee802.3-c22"; ··· 597 542 pinctrl-names = "default"; 598 543 pinctrl-0 = <&pcie_reset_h>; 599 544 reset-gpios = <&gpio3 RK_PC1 GPIO_ACTIVE_HIGH>; 545 + vpcie3v3-supply = <&vcc3v3_pcie>; 546 + status = "okay"; 547 + }; 548 + 549 + &pcie30phy { 550 + phy-supply = <&vcc3v3_pi6c_03>; 551 + status = "okay"; 552 + }; 553 + 554 + &pcie3x2 { 555 + pinctrl-names = "default"; 556 + pinctrl-0 = <&pcie30x2m1_pins>; 557 + reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; 600 558 vpcie3v3-supply = <&vcc3v3_pcie>; 601 559 status = "okay"; 602 560 }; ··· 673 605 rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; 674 606 }; 675 607 }; 608 + 609 + bt { 610 + bt_enable: bt-enable { 611 + rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; 612 + }; 613 + 614 + bt_host_wake: bt-host-wake { 615 + rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>; 616 + }; 617 + 618 + bt_wake: bt-wake { 619 + rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; 620 + }; 621 + }; 622 + 623 + sdio-pwrseq { 624 + wifi_enable: wifi-enable { 625 + rockchip,pins = <3 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; 626 + }; 627 + }; 676 628 }; 677 629 678 630 &pmu_io_domains { ··· 737 649 status = "okay"; 738 650 }; 739 651 652 + &sdmmc2 { 653 + supports-sdio; 654 + bus-width = <4>; 655 + disable-wp; 656 + cap-sd-highspeed; 657 + cap-sdio-irq; 658 + keep-power-in-suspend; 659 + mmc-pwrseq = <&sdio_pwrseq>; 660 + non-removable; 661 + pinctrl-names = "default"; 662 + pinctrl-0 = <&sdmmc2m0_bus4 &sdmmc2m0_cmd &sdmmc2m0_clk>; 663 + sd-uhs-sdr104; 664 + vmmc-supply = <&vcc3v3_sys>; 665 + vqmmc-supply = <&vcc_1v8>; 666 + status = "okay"; 667 + }; 668 + 740 669 &tsadc { 741 670 rockchip,hw-tshut-mode = <1>; 742 671 rockchip,hw-tshut-polarity = <0>; 743 672 status = "okay"; 673 + }; 674 + 675 + &uart1 { 676 + pinctrl-names = "default"; 677 + pinctrl-0 = <&uart1m0_xfer &uart1m0_ctsn &uart1m0_rtsn>; 678 + uart-has-rtscts; 679 + status = "okay"; 680 + 681 + bluetooth { 682 + compatible = "brcm,bcm43438-bt"; 683 + clocks = <&rk809 1>; 684 + clock-names = "lpo"; 685 + device-wakeup-gpios = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>; 686 + host-wakeup-gpios = <&gpio4 RK_PB4 GPIO_ACTIVE_HIGH>; 687 + shutdown-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; 688 + pinctrl-names = "default"; 689 + pinctrl-0 = <&bt_host_wake &bt_wake &bt_enable>; 690 + vbat-supply = <&vcc3v3_sys>; 691 + vddio-supply = <&vcc_1v8>; 692 + /* vddio comes from regulator on module, use IO bank voltage instead */ 693 + }; 744 694 }; 745 695 746 696 &uart2 {
+36 -14
arch/arm64/boot/dts/rockchip/rk356x.dtsi
··· 1049 1049 status = "disabled"; 1050 1050 }; 1051 1051 1052 - spdif: spdif@fe460000 { 1053 - compatible = "rockchip,rk3568-spdif"; 1054 - reg = <0x0 0xfe460000 0x0 0x1000>; 1055 - interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1056 - clock-names = "mclk", "hclk"; 1057 - clocks = <&cru MCLK_SPDIF_8CH>, <&cru HCLK_SPDIF_8CH>; 1058 - dmas = <&dmac1 1>; 1059 - dma-names = "tx"; 1060 - pinctrl-names = "default"; 1061 - pinctrl-0 = <&spdifm0_tx>; 1062 - #sound-dai-cells = <0>; 1063 - status = "disabled"; 1064 - }; 1065 - 1066 1052 i2s0_8ch: i2s@fe400000 { 1067 1053 compatible = "rockchip,rk3568-i2s-tdm"; 1068 1054 reg = <0x0 0xfe400000 0x0 0x1000>; ··· 1091 1105 status = "disabled"; 1092 1106 }; 1093 1107 1108 + i2s2_2ch: i2s@fe420000 { 1109 + compatible = "rockchip,rk3568-i2s-tdm"; 1110 + reg = <0x0 0xfe420000 0x0 0x1000>; 1111 + interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; 1112 + assigned-clocks = <&cru CLK_I2S2_2CH_SRC>; 1113 + assigned-clock-rates = <1188000000>; 1114 + clocks = <&cru MCLK_I2S2_2CH>, <&cru MCLK_I2S2_2CH>, <&cru HCLK_I2S2_2CH>; 1115 + clock-names = "mclk_tx", "mclk_rx", "hclk"; 1116 + dmas = <&dmac1 4>, <&dmac1 5>; 1117 + dma-names = "tx", "rx"; 1118 + resets = <&cru SRST_M_I2S2_2CH>; 1119 + reset-names = "m"; 1120 + rockchip,grf = <&grf>; 1121 + pinctrl-names = "default"; 1122 + pinctrl-0 = <&i2s2m0_sclktx 1123 + &i2s2m0_lrcktx 1124 + &i2s2m0_sdi 1125 + &i2s2m0_sdo>; 1126 + #sound-dai-cells = <0>; 1127 + status = "disabled"; 1128 + }; 1129 + 1094 1130 i2s3_2ch: i2s@fe430000 { 1095 1131 compatible = "rockchip,rk3568-i2s-tdm"; 1096 1132 reg = <0x0 0xfe430000 0x0 0x1000>; ··· 1146 1138 pinctrl-names = "default"; 1147 1139 resets = <&cru SRST_M_PDM>; 1148 1140 reset-names = "pdm-m"; 1141 + #sound-dai-cells = <0>; 1142 + status = "disabled"; 1143 + }; 1144 + 1145 + spdif: spdif@fe460000 { 1146 + compatible = "rockchip,rk3568-spdif"; 1147 + reg = <0x0 0xfe460000 0x0 0x1000>; 1148 + interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 1149 + clock-names = "mclk", "hclk"; 1150 + clocks = <&cru MCLK_SPDIF_8CH>, <&cru HCLK_SPDIF_8CH>; 1151 + dmas = <&dmac1 1>; 1152 + dma-names = "tx"; 1153 + pinctrl-names = "default"; 1154 + pinctrl-0 = <&spdifm0_tx>; 1149 1155 #sound-dai-cells = <0>; 1150 1156 status = "disabled"; 1151 1157 };
+3 -3
include/dt-bindings/clock/rk3399-cru.h
··· 547 547 #define SRST_H_PERILP0 171 548 548 #define SRST_H_PERILP0_NOC 172 549 549 #define SRST_ROM 173 550 - #define SRST_CRYPTO_S 174 551 - #define SRST_CRYPTO_M 175 550 + #define SRST_CRYPTO0_S 174 551 + #define SRST_CRYPTO0_M 175 552 552 553 553 /* cru_softrst_con11 */ 554 554 #define SRST_P_DCF 176 ··· 556 556 #define SRST_CM0S 178 557 557 #define SRST_CM0S_DBG 179 558 558 #define SRST_CM0S_PO 180 559 - #define SRST_CRYPTO 181 559 + #define SRST_CRYPTO0 181 560 560 #define SRST_P_PERILP1_SGRF 182 561 561 #define SRST_P_PERILP1_GRF 183 562 562 #define SRST_CRYPTO1_S 184