Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ALSA: cs46xx: Use guard() for spin locks

Clean up the code using guard() for spin locks.

Merely code refactoring, and no behavior change.

Signed-off-by: Takashi Iwai <tiwai@suse.de>
Link: https://patch.msgid.link/20250829144342.4290-21-tiwai@suse.de

+69 -108
+48 -65
sound/pci/cs46xx/cs46xx_lib.c
··· 707 707 708 708 static void snd_cs46xx_set_play_sample_rate(struct snd_cs46xx *chip, unsigned int rate) 709 709 { 710 - unsigned long flags; 711 710 unsigned int tmp1, tmp2; 712 711 unsigned int phiIncr; 713 712 unsigned int correctionPerGOF, correctionPerSec; ··· 743 744 /* 744 745 * Fill in the SampleRateConverter control block. 745 746 */ 746 - spin_lock_irqsave(&chip->reg_lock, flags); 747 + guard(spinlock_irqsave)(&chip->reg_lock); 747 748 snd_cs46xx_poke(chip, BA1_PSRC, 748 749 ((correctionPerSec << 16) & 0xFFFF0000) | (correctionPerGOF & 0xFFFF)); 749 750 snd_cs46xx_poke(chip, BA1_PPI, phiIncr); 750 - spin_unlock_irqrestore(&chip->reg_lock, flags); 751 751 } 752 752 753 753 static void snd_cs46xx_set_capture_sample_rate(struct snd_cs46xx *chip, unsigned int rate) 754 754 { 755 - unsigned long flags; 756 755 unsigned int phiIncr, coeffIncr, tmp1, tmp2; 757 756 unsigned int correctionPerGOF, correctionPerSec, initialDelay; 758 757 unsigned int frameGroupLength, cnt; ··· 815 818 /* 816 819 * Fill in the VariDecimate control block. 817 820 */ 818 - spin_lock_irqsave(&chip->reg_lock, flags); 819 - snd_cs46xx_poke(chip, BA1_CSRC, 820 - ((correctionPerSec << 16) & 0xFFFF0000) | (correctionPerGOF & 0xFFFF)); 821 - snd_cs46xx_poke(chip, BA1_CCI, coeffIncr); 822 - snd_cs46xx_poke(chip, BA1_CD, 823 - (((BA1_VARIDEC_BUF_1 + (initialDelay << 2)) << 16) & 0xFFFF0000) | 0x80); 824 - snd_cs46xx_poke(chip, BA1_CPI, phiIncr); 825 - spin_unlock_irqrestore(&chip->reg_lock, flags); 821 + scoped_guard(spinlock_irqsave, &chip->reg_lock) { 822 + snd_cs46xx_poke(chip, BA1_CSRC, 823 + ((correctionPerSec << 16) & 0xFFFF0000) | (correctionPerGOF & 0xFFFF)); 824 + snd_cs46xx_poke(chip, BA1_CCI, coeffIncr); 825 + snd_cs46xx_poke(chip, BA1_CD, 826 + (((BA1_VARIDEC_BUF_1 + (initialDelay << 2)) << 16) & 0xFFFF0000) | 0x80); 827 + snd_cs46xx_poke(chip, BA1_CPI, phiIncr); 828 + } 826 829 827 830 /* 828 831 * Figure out the frame group length for the write back task. Basically, ··· 845 848 /* 846 849 * Fill in the WriteBack control block. 847 850 */ 848 - spin_lock_irqsave(&chip->reg_lock, flags); 851 + guard(spinlock_irqsave)(&chip->reg_lock); 849 852 snd_cs46xx_poke(chip, BA1_CFG1, frameGroupLength); 850 853 snd_cs46xx_poke(chip, BA1_CFG2, (0x00800000 | frameGroupLength)); 851 854 snd_cs46xx_poke(chip, BA1_CCST, 0x0000FFFF); 852 855 snd_cs46xx_poke(chip, BA1_CSPB, ((65536 * rate) / 24000)); 853 856 snd_cs46xx_poke(chip, (BA1_CSPB + 4), 0x0000FFFF); 854 - spin_unlock_irqrestore(&chip->reg_lock, flags); 855 857 } 856 858 857 859 /* ··· 965 969 if (substream->runtime->periods != CS46XX_FRAGS) 966 970 snd_cs46xx_playback_transfer(substream); 967 971 #else 968 - spin_lock(&chip->reg_lock); 969 - if (substream->runtime->periods != CS46XX_FRAGS) 970 - snd_cs46xx_playback_transfer(substream); 971 - { unsigned int tmp; 972 - tmp = snd_cs46xx_peek(chip, BA1_PCTL); 973 - tmp &= 0x0000ffff; 974 - snd_cs46xx_poke(chip, BA1_PCTL, chip->play_ctl | tmp); 972 + scoped_guard(spinlock, &chip->reg_lock) { 973 + unsigned int tmp; 974 + if (substream->runtime->periods != CS46XX_FRAGS) 975 + snd_cs46xx_playback_transfer(substream); 976 + tmp = snd_cs46xx_peek(chip, BA1_PCTL); 977 + tmp &= 0x0000ffff; 978 + snd_cs46xx_poke(chip, BA1_PCTL, chip->play_ctl | tmp); 975 979 } 976 - spin_unlock(&chip->reg_lock); 977 980 #endif 978 981 break; 979 982 case SNDRV_PCM_TRIGGER_STOP: ··· 985 990 if (!cpcm->pcm_channel->unlinked) 986 991 cs46xx_dsp_pcm_unlink(chip,cpcm->pcm_channel); 987 992 #else 988 - spin_lock(&chip->reg_lock); 989 - { unsigned int tmp; 990 - tmp = snd_cs46xx_peek(chip, BA1_PCTL); 991 - tmp &= 0x0000ffff; 992 - snd_cs46xx_poke(chip, BA1_PCTL, tmp); 993 + scoped_guard(spinlock, &chip->reg_lock) { 994 + unsigned int tmp; 995 + tmp = snd_cs46xx_peek(chip, BA1_PCTL); 996 + tmp &= 0x0000ffff; 997 + snd_cs46xx_poke(chip, BA1_PCTL, tmp); 993 998 } 994 - spin_unlock(&chip->reg_lock); 995 999 #endif 996 1000 break; 997 1001 default: ··· 1006 1012 { 1007 1013 struct snd_cs46xx *chip = snd_pcm_substream_chip(substream); 1008 1014 unsigned int tmp; 1009 - int result = 0; 1010 1015 1011 - spin_lock(&chip->reg_lock); 1016 + guard(spinlock)(&chip->reg_lock); 1012 1017 switch (cmd) { 1013 1018 case SNDRV_PCM_TRIGGER_START: 1014 1019 case SNDRV_PCM_TRIGGER_RESUME: ··· 1022 1029 snd_cs46xx_poke(chip, BA1_CCTL, tmp); 1023 1030 break; 1024 1031 default: 1025 - result = -EINVAL; 1026 - break; 1032 + return -EINVAL; 1027 1033 } 1028 - spin_unlock(&chip->reg_lock); 1029 - 1030 - return result; 1034 + return 0; 1031 1035 } 1032 1036 1033 1037 #ifdef CONFIG_SND_CS46XX_NEW_DSP ··· 1361 1371 if ((status1 & HISR_MIDI) && chip->rmidi) { 1362 1372 unsigned char c; 1363 1373 1364 - spin_lock(&chip->reg_lock); 1374 + guard(spinlock)(&chip->reg_lock); 1365 1375 while ((snd_cs46xx_peekBA0(chip, BA0_MIDSR) & MIDSR_RBE) == 0) { 1366 1376 c = snd_cs46xx_peekBA0(chip, BA0_MIDRP); 1367 1377 if ((chip->midcr & MIDCR_RIE) == 0) ··· 1378 1388 } 1379 1389 snd_cs46xx_pokeBA0(chip, BA0_MIDWP, c); 1380 1390 } 1381 - spin_unlock(&chip->reg_lock); 1382 1391 } 1383 1392 /* 1384 1393 * EOI to the PCI part....reenables interrupts ··· 2498 2509 struct snd_cs46xx *chip = substream->rmidi->private_data; 2499 2510 2500 2511 chip->active_ctrl(chip, 1); 2501 - spin_lock_irq(&chip->reg_lock); 2512 + guard(spinlock_irq)(&chip->reg_lock); 2502 2513 chip->uartm |= CS46XX_MODE_INPUT; 2503 2514 chip->midcr |= MIDCR_RXE; 2504 2515 chip->midi_input = substream; ··· 2507 2518 } else { 2508 2519 snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr); 2509 2520 } 2510 - spin_unlock_irq(&chip->reg_lock); 2511 2521 return 0; 2512 2522 } 2513 2523 ··· 2514 2526 { 2515 2527 struct snd_cs46xx *chip = substream->rmidi->private_data; 2516 2528 2517 - spin_lock_irq(&chip->reg_lock); 2518 - chip->midcr &= ~(MIDCR_RXE | MIDCR_RIE); 2519 - chip->midi_input = NULL; 2520 - if (!(chip->uartm & CS46XX_MODE_OUTPUT)) { 2521 - snd_cs46xx_midi_reset(chip); 2522 - } else { 2523 - snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr); 2529 + scoped_guard(spinlock_irq, &chip->reg_lock) { 2530 + chip->midcr &= ~(MIDCR_RXE | MIDCR_RIE); 2531 + chip->midi_input = NULL; 2532 + if (!(chip->uartm & CS46XX_MODE_OUTPUT)) { 2533 + snd_cs46xx_midi_reset(chip); 2534 + } else { 2535 + snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr); 2536 + } 2537 + chip->uartm &= ~CS46XX_MODE_INPUT; 2524 2538 } 2525 - chip->uartm &= ~CS46XX_MODE_INPUT; 2526 - spin_unlock_irq(&chip->reg_lock); 2527 2539 chip->active_ctrl(chip, -1); 2528 2540 return 0; 2529 2541 } ··· 2534 2546 2535 2547 chip->active_ctrl(chip, 1); 2536 2548 2537 - spin_lock_irq(&chip->reg_lock); 2549 + guard(spinlock_irq)(&chip->reg_lock); 2538 2550 chip->uartm |= CS46XX_MODE_OUTPUT; 2539 2551 chip->midcr |= MIDCR_TXE; 2540 2552 chip->midi_output = substream; ··· 2543 2555 } else { 2544 2556 snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr); 2545 2557 } 2546 - spin_unlock_irq(&chip->reg_lock); 2547 2558 return 0; 2548 2559 } 2549 2560 ··· 2550 2563 { 2551 2564 struct snd_cs46xx *chip = substream->rmidi->private_data; 2552 2565 2553 - spin_lock_irq(&chip->reg_lock); 2554 - chip->midcr &= ~(MIDCR_TXE | MIDCR_TIE); 2555 - chip->midi_output = NULL; 2556 - if (!(chip->uartm & CS46XX_MODE_INPUT)) { 2557 - snd_cs46xx_midi_reset(chip); 2558 - } else { 2559 - snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr); 2566 + scoped_guard(spinlock_irq, &chip->reg_lock) { 2567 + chip->midcr &= ~(MIDCR_TXE | MIDCR_TIE); 2568 + chip->midi_output = NULL; 2569 + if (!(chip->uartm & CS46XX_MODE_INPUT)) { 2570 + snd_cs46xx_midi_reset(chip); 2571 + } else { 2572 + snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr); 2573 + } 2574 + chip->uartm &= ~CS46XX_MODE_OUTPUT; 2560 2575 } 2561 - chip->uartm &= ~CS46XX_MODE_OUTPUT; 2562 - spin_unlock_irq(&chip->reg_lock); 2563 2576 chip->active_ctrl(chip, -1); 2564 2577 return 0; 2565 2578 } 2566 2579 2567 2580 static void snd_cs46xx_midi_input_trigger(struct snd_rawmidi_substream *substream, int up) 2568 2581 { 2569 - unsigned long flags; 2570 2582 struct snd_cs46xx *chip = substream->rmidi->private_data; 2571 2583 2572 - spin_lock_irqsave(&chip->reg_lock, flags); 2584 + guard(spinlock_irqsave)(&chip->reg_lock); 2573 2585 if (up) { 2574 2586 if ((chip->midcr & MIDCR_RIE) == 0) { 2575 2587 chip->midcr |= MIDCR_RIE; ··· 2580 2594 snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr); 2581 2595 } 2582 2596 } 2583 - spin_unlock_irqrestore(&chip->reg_lock, flags); 2584 2597 } 2585 2598 2586 2599 static void snd_cs46xx_midi_output_trigger(struct snd_rawmidi_substream *substream, int up) 2587 2600 { 2588 - unsigned long flags; 2589 2601 struct snd_cs46xx *chip = substream->rmidi->private_data; 2590 2602 unsigned char byte; 2591 2603 2592 - spin_lock_irqsave(&chip->reg_lock, flags); 2604 + guard(spinlock_irqsave)(&chip->reg_lock); 2593 2605 if (up) { 2594 2606 if ((chip->midcr & MIDCR_TIE) == 0) { 2595 2607 chip->midcr |= MIDCR_TIE; ··· 2608 2624 snd_cs46xx_pokeBA0(chip, BA0_MIDCR, chip->midcr); 2609 2625 } 2610 2626 } 2611 - spin_unlock_irqrestore(&chip->reg_lock, flags); 2612 2627 } 2613 2628 2614 2629 static const struct snd_rawmidi_ops snd_cs46xx_midi_output =
+1 -3
sound/pci/cs46xx/dsp_spos.c
··· 1696 1696 ins->spdif_in_src, 1697 1697 SCB_ON_PARENT_SUBLIST_SCB); 1698 1698 1699 - spin_lock_irq(&chip->reg_lock); 1699 + guard(spinlock_irq)(&chip->reg_lock); 1700 1700 1701 1701 /* reset SPDIF input sample buffer pointer */ 1702 1702 /*snd_cs46xx_poke (chip, (SPDIFI_SCB_INST + 0x0c) << 2, ··· 1708 1708 1709 1709 /* unmute SRC volume */ 1710 1710 cs46xx_dsp_scb_set_volume (chip,ins->spdif_in_src,0x7fff,0x7fff); 1711 - 1712 - spin_unlock_irq(&chip->reg_lock); 1713 1711 1714 1712 /* set SPDIF input sample rate and unmute 1715 1713 NOTE: only 48khz support for SPDIF input this time */
+20 -40
sound/pci/cs46xx/dsp_spos_scb_lib.c
··· 159 159 void cs46xx_dsp_remove_scb (struct snd_cs46xx *chip, struct dsp_scb_descriptor * scb) 160 160 { 161 161 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 162 - unsigned long flags; 163 162 164 163 /* check integrety */ 165 164 if (snd_BUG_ON(scb->index < 0 || ··· 174 175 goto _end; 175 176 #endif 176 177 177 - spin_lock_irqsave(&chip->reg_lock, flags); 178 - _dsp_unlink_scb (chip,scb); 179 - spin_unlock_irqrestore(&chip->reg_lock, flags); 178 + scoped_guard(spinlock_irqsave, &chip->reg_lock) { 179 + _dsp_unlink_scb(chip, scb); 180 + } 180 181 181 182 cs46xx_dsp_proc_free_scb_desc(scb); 182 183 if (snd_BUG_ON(!scb->scb_symbol)) ··· 261 262 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 262 263 struct dsp_scb_descriptor * scb; 263 264 264 - unsigned long flags; 265 - 266 265 if (snd_BUG_ON(!ins->the_null_scb)) 267 266 return NULL; 268 267 ··· 314 317 snd_BUG(); 315 318 } 316 319 317 - spin_lock_irqsave(&chip->reg_lock, flags); 318 - 319 - /* update entry in DSP RAM */ 320 - cs46xx_dsp_spos_update_scb(chip,scb->parent_scb_ptr); 321 - 322 - spin_unlock_irqrestore(&chip->reg_lock, flags); 320 + scoped_guard(spinlock_irqsave, &chip->reg_lock) { 321 + /* update entry in DSP RAM */ 322 + cs46xx_dsp_spos_update_scb(chip, scb->parent_scb_ptr); 323 + } 323 324 } 324 325 325 326 ··· 1214 1219 /* struct dsp_scb_descriptor * pcm_parent_scb; */ 1215 1220 char scb_name[DSP_MAX_SCB_NAME]; 1216 1221 int i, pcm_index = -1, insert_point, src_index = -1, pass_through = 0; 1217 - unsigned long flags; 1218 1222 1219 1223 switch (pcm_channel_id) { 1220 1224 case DSP_PCM_MAIN_CHANNEL: ··· 1350 1356 return NULL; 1351 1357 } 1352 1358 1353 - spin_lock_irqsave(&chip->reg_lock, flags); 1359 + guard(spinlock_irqsave)(&chip->reg_lock); 1354 1360 ins->pcm_channels[pcm_index].sample_rate = sample_rate; 1355 1361 ins->pcm_channels[pcm_index].pcm_reader_scb = pcm_scb; 1356 1362 ins->pcm_channels[pcm_index].src_scb = src_scb; ··· 1361 1367 ins->pcm_channels[pcm_index].pcm_slot = pcm_index; 1362 1368 ins->pcm_channels[pcm_index].mixer_scb = mixer_scb; 1363 1369 ins->npcm_channels ++; 1364 - spin_unlock_irqrestore(&chip->reg_lock, flags); 1365 1370 1366 1371 return (ins->pcm_channels + pcm_index); 1367 1372 } ··· 1448 1455 struct dsp_pcm_channel_descriptor * pcm_channel) 1449 1456 { 1450 1457 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1451 - unsigned long flags; 1452 1458 1453 1459 if (snd_BUG_ON(!pcm_channel->active || 1454 1460 ins->npcm_channels <= 0 || 1455 1461 pcm_channel->src_scb->ref_count <= 0)) 1456 1462 return; 1457 1463 1458 - spin_lock_irqsave(&chip->reg_lock, flags); 1459 - pcm_channel->unlinked = 1; 1460 - pcm_channel->active = 0; 1461 - pcm_channel->private_data = NULL; 1462 - pcm_channel->src_scb->ref_count --; 1463 - ins->npcm_channels --; 1464 - spin_unlock_irqrestore(&chip->reg_lock, flags); 1464 + scoped_guard(spinlock_irqsave, &chip->reg_lock) { 1465 + pcm_channel->unlinked = 1; 1466 + pcm_channel->active = 0; 1467 + pcm_channel->private_data = NULL; 1468 + pcm_channel->src_scb->ref_count--; 1469 + ins->npcm_channels--; 1470 + } 1465 1471 1466 1472 cs46xx_dsp_remove_scb(chip,pcm_channel->pcm_reader_scb); 1467 1473 ··· 1479 1487 int cs46xx_dsp_pcm_unlink (struct snd_cs46xx * chip, 1480 1488 struct dsp_pcm_channel_descriptor * pcm_channel) 1481 1489 { 1482 - unsigned long flags; 1483 - 1484 1490 if (snd_BUG_ON(!pcm_channel->active || 1485 1491 chip->dsp_spos_instance->npcm_channels <= 0)) 1486 1492 return -EIO; 1487 1493 1488 - spin_lock_irqsave(&chip->reg_lock, flags); 1489 - if (pcm_channel->unlinked) { 1490 - spin_unlock_irqrestore(&chip->reg_lock, flags); 1494 + guard(spinlock_irqsave)(&chip->reg_lock); 1495 + if (pcm_channel->unlinked) 1491 1496 return -EIO; 1492 - } 1493 1497 1494 1498 pcm_channel->unlinked = 1; 1495 1499 1496 1500 _dsp_unlink_scb (chip,pcm_channel->pcm_reader_scb); 1497 - spin_unlock_irqrestore(&chip->reg_lock, flags); 1498 1501 1499 1502 return 0; 1500 1503 } ··· 1500 1513 struct dsp_spos_instance * ins = chip->dsp_spos_instance; 1501 1514 struct dsp_scb_descriptor * parent_scb; 1502 1515 struct dsp_scb_descriptor * src_scb = pcm_channel->src_scb; 1503 - unsigned long flags; 1504 1516 1505 - spin_lock_irqsave(&chip->reg_lock, flags); 1517 + guard(spinlock_irqsave)(&chip->reg_lock); 1506 1518 1507 - if (pcm_channel->unlinked == 0) { 1508 - spin_unlock_irqrestore(&chip->reg_lock, flags); 1519 + if (pcm_channel->unlinked == 0) 1509 1520 return -EIO; 1510 - } 1511 1521 1512 1522 parent_scb = src_scb; 1513 1523 ··· 1525 1541 cs46xx_dsp_spos_update_scb(chip,parent_scb); 1526 1542 1527 1543 pcm_channel->unlinked = 0; 1528 - spin_unlock_irqrestore(&chip->reg_lock, flags); 1529 1544 return 0; 1530 1545 } 1531 1546 ··· 1557 1574 1558 1575 int cs46xx_src_unlink(struct snd_cs46xx *chip, struct dsp_scb_descriptor * src) 1559 1576 { 1560 - unsigned long flags; 1561 - 1562 1577 if (snd_BUG_ON(!src->parent_scb_ptr)) 1563 1578 return -EINVAL; 1564 1579 1565 1580 /* mute SCB */ 1566 1581 cs46xx_dsp_scb_set_volume (chip,src,0,0); 1567 1582 1568 - spin_lock_irqsave(&chip->reg_lock, flags); 1583 + guard(spinlock_irqsave)(&chip->reg_lock); 1569 1584 _dsp_unlink_scb (chip,src); 1570 - spin_unlock_irqrestore(&chip->reg_lock, flags); 1571 1585 1572 1586 return 0; 1573 1587 }