m68k: Convert irq function namespace

Scripted with coccinelle.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>

+26 -26
+1 -1
arch/m68k/kernel/irq.c
··· 44 44 if (ap) { 45 45 seq_printf(p, "%3d: ", irq); 46 46 seq_printf(p, "%10u ", kstat_irqs(irq)); 47 - seq_printf(p, "%14s ", get_irq_desc_chip(desc)->name); 47 + seq_printf(p, "%14s ", irq_desc_get_chip(desc)->name); 48 48 49 49 seq_printf(p, "%s", ap->name); 50 50 for (ap = ap->next; ap; ap = ap->next)
+2 -2
arch/m68k/platform/5249/intc2.c
··· 51 51 52 52 /* GPIO interrupt sources */ 53 53 for (irq = MCFINTC2_GPIOIRQ0; (irq <= MCFINTC2_GPIOIRQ7); irq++) { 54 - set_irq_chip(irq, &intc2_irq_gpio_chip); 55 - set_irq_handler(irq, handle_edge_irq); 54 + irq_set_chip(irq, &intc2_irq_gpio_chip); 55 + irq_set_handler(irq, handle_edge_irq); 56 56 } 57 57 58 58 return 0;
+6 -6
arch/m68k/platform/5272/intc.c
··· 145 145 */ 146 146 static void intc_external_irq(unsigned int irq, struct irq_desc *desc) 147 147 { 148 - get_irq_desc_chip(desc)->irq_ack(&desc->irq_data); 148 + irq_desc_get_chip(desc)->irq_ack(&desc->irq_data); 149 149 handle_simple_irq(irq, desc); 150 150 } 151 151 ··· 171 171 writel(0x88888888, MCF_MBAR + MCFSIM_ICR4); 172 172 173 173 for (irq = 0; (irq < NR_IRQS); irq++) { 174 - set_irq_chip(irq, &intc_irq_chip); 174 + irq_set_chip(irq, &intc_irq_chip); 175 175 edge = 0; 176 176 if ((irq >= MCFINT_VECBASE) && (irq <= MCFINT_VECMAX)) 177 177 edge = intc_irqmap[irq - MCFINT_VECBASE].ack; 178 178 if (edge) { 179 - set_irq_type(irq, IRQ_TYPE_EDGE_RISING); 180 - set_irq_handler(irq, intc_external_irq); 179 + irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING); 180 + irq_set_handler(irq, intc_external_irq); 181 181 } else { 182 - set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH); 183 - set_irq_handler(irq, handle_level_irq); 182 + irq_set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH); 183 + irq_set_handler(irq, handle_level_irq); 184 184 } 185 185 } 186 186 }
+2 -2
arch/m68k/platform/68328/ints.c
··· 179 179 IMR = ~0; 180 180 181 181 for (i = 0; (i < NR_IRQS); i++) { 182 - set_irq_chip(i, &intc_irq_chip); 183 - set_irq_handler(i, handle_level_irq); 182 + irq_set_chip(i, &intc_irq_chip); 183 + irq_set_handler(i, handle_level_irq); 184 184 } 185 185 } 186 186
+2 -2
arch/m68k/platform/68360/ints.c
··· 132 132 pquicc->intr_cimr = 0x00000000; 133 133 134 134 for (i = 0; (i < NR_IRQS); i++) { 135 - set_irq_chip(i, &intc_irq_chip); 136 - set_irq_handler(i, handle_level_irq); 135 + irq_set_chip(i, &intc_irq_chip); 136 + irq_set_handler(i, handle_level_irq); 137 137 } 138 138 } 139 139
+5 -5
arch/m68k/platform/coldfire/intc-2.c
··· 164 164 } 165 165 166 166 if (tb) 167 - set_irq_handler(irq, handle_edge_irq); 167 + irq_set_handler(irq, handle_edge_irq); 168 168 169 169 irq -= EINT0; 170 170 pa = __raw_readw(MCFEPORT_EPPAR); ··· 204 204 205 205 for (irq = MCFINT_VECBASE; (irq < MCFINT_VECBASE + NR_VECS); irq++) { 206 206 if ((irq >= EINT1) && (irq <=EINT7)) 207 - set_irq_chip(irq, &intc_irq_chip_edge_port); 207 + irq_set_chip(irq, &intc_irq_chip_edge_port); 208 208 else 209 - set_irq_chip(irq, &intc_irq_chip); 210 - set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH); 211 - set_irq_handler(irq, handle_level_irq); 209 + irq_set_chip(irq, &intc_irq_chip); 210 + irq_set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH); 211 + irq_set_handler(irq, handle_level_irq); 212 212 } 213 213 } 214 214
+5 -5
arch/m68k/platform/coldfire/intc-simr.c
··· 141 141 } 142 142 143 143 if (tb) 144 - set_irq_handler(irq, handle_edge_irq); 144 + irq_set_handler(irq, handle_edge_irq); 145 145 146 146 ebit = irq2ebit(irq) * 2; 147 147 pa = __raw_readw(MCFEPORT_EPPAR); ··· 181 181 eirq = MCFINT_VECBASE + 64 + (MCFINTC1_ICR0 ? 64 : 0); 182 182 for (irq = MCFINT_VECBASE; (irq < eirq); irq++) { 183 183 if ((irq >= EINT1) && (irq <= EINT7)) 184 - set_irq_chip(irq, &intc_irq_chip_edge_port); 184 + irq_set_chip(irq, &intc_irq_chip_edge_port); 185 185 else 186 - set_irq_chip(irq, &intc_irq_chip); 187 - set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH); 188 - set_irq_handler(irq, handle_level_irq); 186 + irq_set_chip(irq, &intc_irq_chip); 187 + irq_set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH); 188 + irq_set_handler(irq, handle_level_irq); 189 189 } 190 190 } 191 191
+3 -3
arch/m68k/platform/coldfire/intc.c
··· 143 143 mcf_maskimr(0xffffffff); 144 144 145 145 for (irq = 0; (irq < NR_IRQS); irq++) { 146 - set_irq_chip(irq, &intc_irq_chip); 147 - set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH); 148 - set_irq_handler(irq, handle_level_irq); 146 + irq_set_chip(irq, &intc_irq_chip); 147 + irq_set_irq_type(irq, IRQ_TYPE_LEVEL_HIGH); 148 + irq_set_handler(irq, handle_level_irq); 149 149 } 150 150 } 151 151