misc: pci_endpoint_test: Add support to not enable MSI interrupts

Some platforms like TI's K2G have a restriction that the host side buffer
address should be aligned to either 1MB/2MB/4MB or 8MB addresses depending
on how it is configured in the endpoint (Ref: 11.14.4.9.1 Outbound Address
Translation in K2G TRM SPRUHY8F January 2016 – Revised May 2017). This
restriction also applies to the MSI addresses provided by the RC. However
it's not possible for the RC to know about this restriction and it may not
provide 1MB/2MB/4MB or 8MB aligned address. So MSI interrupts should be
disabled even if the K2G EP has MSI capabiltiy register.

Add support to not enable MSI interrupts in pci_endpoint_test driver so
that it can be used to test K2G EP.

Signed-off-by: Kishon Vijay Abraham I <[e-mail]>
Signed-off-by: Bjorn Helgaas <[e-mail]>

drivers/misc/pci_endpoint_test.c

···
 struct pci_endpoint_test_data {
 	enum pci_barno test_reg_bar;
 	size_t alignment;
+	bool no_msi;
 };
 
 static int bar_size[] = { 512, 512, 1024, 16384, 131072, 1048576 };
···
 {
 	int i;
 	int err;
-	int irq;
+	int irq = 0;
 	int id;
+	bool no_msi = false;
 	char name[20];
 	enum pci_barno bar;
 	void __iomem *base;
···
 	if (data) {
 		test_reg_bar = data->test_reg_bar;
 		test->alignment = data->alignment;
+		no_msi = data->no_msi;
 	}
 
 	init_completion(&test->irq_raised);
···
 
 	pci_set_master(pdev);
 
-	irq = pci_alloc_irq_vectors(pdev, 1, 32, PCI_IRQ_MSI);
-	if (irq < 0)
-		dev_err(dev, "failed to get MSI interrupts\n");
+	if (!no_msi) {
+		irq = pci_alloc_irq_vectors(pdev, 1, 32, PCI_IRQ_MSI);
+		if (irq < 0)
+			dev_err(dev, "failed to get MSI interrupts\n");
+	}
 
 	err = devm_request_irq(dev, pdev->irq, pci_endpoint_test_irqhandler,
 			       IRQF_SHARED, DRV_MODULE_NAME, test);