clk: at91: sama7g5: set low limit for mck0 at 32KHz

MCK0 could go as low as 32KHz. Set this limit.

Signed-off-by: Claudiu Beznea <[e-mail]>
Link: https://lore.kernel.org/r/[e-mail]
Acked-by: Nicolas Ferre <[e-mail]>
Signed-off-by: Stephen Boyd <[e-mail]>

drivers/clk/at91/sama7g5.c

···
 
 /* MCK0 characteristics. */
 static const struct clk_master_characteristics mck0_characteristics = {
-	.output = { .min = 50000000, .max = 200000000 },
+	.output = { .min = 32768, .max = 200000000 },
 	.divisors = { 1, 2, 4, 3, 5 },
 	.have_div3_pres = 1,
 };