Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

ARM: dts: imx: add Gateworks Ventana GW5904 support

The Gateworks Ventana GW5904 is a single-board computer based on the NXP
IMX6 SoC with the following features:
* IMX6 DualLite Soc (supports IMX6S,IMX6DL,IMX6Q)
* 2048MB DDR3 DRAM (4x64bit) (options up to 4GiB)
* 8GB eMMC
* Gateworks System Controller:
- hardware watchdog
- hardware monitor
- pushbutton controller
- EEPROM storage
- power control
* JTAG programmable
* 1x miniPCIe socket (with PCIe, USB)
* 1x miniPCIe socket (USB)
* 1x M.2 socket (USB, 2x SIM)
* Inertial Module (LSM9DS1 9DOF: 3x acc, 3x rate, 3x mag)
* GPS (optional uBlox EVA-M8M)
* Application headers:
- 2x RS232 UART (TX/RX/CTS/RTS)
- 8x TTL GPIO (3x configurable as PWM)
- 1x LVDS display 3D+C with i2c touch and PWM backlight
* MV88E6176 GbE Switch (uplink to IMX FEC)
* Front panel connectors:
- 1x user programmable LED
- 1x configurable user pushbutton
- 1x USB OTG
- 4x GbE LAN

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

authored by

Tim Harvey and committed by
Shawn Guo
0afe7a34 e6e9d8ec

+757
+2
arch/arm/boot/dts/Makefile
··· 352 352 imx6dl-gw551x.dtb \ 353 353 imx6dl-gw552x.dtb \ 354 354 imx6dl-gw553x.dtb \ 355 + imx6dl-gw5904.dtb \ 355 356 imx6dl-hummingboard.dtb \ 356 357 imx6dl-icore.dtb \ 357 358 imx6dl-icore-rqs.dtb \ ··· 396 395 imx6q-gw551x.dtb \ 397 396 imx6q-gw552x.dtb \ 398 397 imx6q-gw553x.dtb \ 398 + imx6q-gw5904.dtb \ 399 399 imx6q-h100.dtb \ 400 400 imx6q-hummingboard.dtb \ 401 401 imx6q-icore.dtb \
+55
arch/arm/boot/dts/imx6dl-gw5904.dts
··· 1 + /* 2 + * Copyright 2017 Gateworks Corporation 3 + * 4 + * This file is dual-licensed: you can use it either under the terms 5 + * of the GPL or the X11 license, at your option. Note that this dual 6 + * licensing only applies to this file, and not this project as a 7 + * whole. 8 + * 9 + * a) This file is free software; you can redistribute it and/or 10 + * modify it under the terms of the GNU General Public License as 11 + * published by the Free Software Foundation; either version 2 of 12 + * the License, or (at your option) any later version. 13 + * 14 + * This file is distributed in the hope that it will be useful, 15 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 + * GNU General Public License for more details. 18 + * 19 + * You should have received a copy of the GNU General Public 20 + * License along with this file; if not, write to the Free 21 + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, 22 + * MA 02110-1301 USA 23 + * 24 + * Or, alternatively, 25 + * 26 + * b) Permission is hereby granted, free of charge, to any person 27 + * obtaining a copy of this software and associated documentation 28 + * files (the "Software"), to deal in the Software without 29 + * restriction, including without limitation the rights to use, 30 + * copy, modify, merge, publish, distribute, sublicense, and/or 31 + * sell copies of the Software, and to permit persons to whom the 32 + * Software is furnished to do so, subject to the following 33 + * conditions: 34 + * 35 + * The above copyright notice and this permission notice shall be 36 + * included in all copies or substantial portions of the Software. 37 + * 38 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 39 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 40 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 41 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 42 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 43 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 44 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 45 + * OTHER DEALINGS IN THE SOFTWARE. 46 + */ 47 + 48 + /dts-v1/; 49 + #include "imx6dl.dtsi" 50 + #include "imx6qdl-gw5904.dtsi" 51 + 52 + / { 53 + model = "Gateworks Ventana i.MX6 DualLite/Solo GW5904"; 54 + compatible = "gw,imx6dl-gw5904", "gw,ventana", "fsl,imx6dl"; 55 + };
+59
arch/arm/boot/dts/imx6q-gw5904.dts
··· 1 + /* 2 + * Copyright 2017 Gateworks Corporation 3 + * 4 + * This file is dual-licensed: you can use it either under the terms 5 + * of the GPL or the X11 license, at your option. Note that this dual 6 + * licensing only applies to this file, and not this project as a 7 + * whole. 8 + * 9 + * a) This file is free software; you can redistribute it and/or 10 + * modify it under the terms of the GNU General Public License as 11 + * published by the Free Software Foundation; either version 2 of 12 + * the License, or (at your option) any later version. 13 + * 14 + * This file is distributed in the hope that it will be useful, 15 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 + * GNU General Public License for more details. 18 + * 19 + * You should have received a copy of the GNU General Public 20 + * License along with this file; if not, write to the Free 21 + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, 22 + * MA 02110-1301 USA 23 + * 24 + * Or, alternatively, 25 + * 26 + * b) Permission is hereby granted, free of charge, to any person 27 + * obtaining a copy of this software and associated documentation 28 + * files (the "Software"), to deal in the Software without 29 + * restriction, including without limitation the rights to use, 30 + * copy, modify, merge, publish, distribute, sublicense, and/or 31 + * sell copies of the Software, and to permit persons to whom the 32 + * Software is furnished to do so, subject to the following 33 + * conditions: 34 + * 35 + * The above copyright notice and this permission notice shall be 36 + * included in all copies or substantial portions of the Software. 37 + * 38 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 39 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 40 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 41 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 42 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 43 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 44 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 45 + * OTHER DEALINGS IN THE SOFTWARE. 46 + */ 47 + 48 + /dts-v1/; 49 + #include "imx6q.dtsi" 50 + #include "imx6qdl-gw5904.dtsi" 51 + 52 + / { 53 + model = "Gateworks Ventana i.MX6 Dual/Quad GW5904"; 54 + compatible = "gw,imx6q-gw5904", "gw,ventana", "fsl,imx6q"; 55 + }; 56 + 57 + &sata { 58 + status = "okay"; 59 + };
+641
arch/arm/boot/dts/imx6qdl-gw5904.dtsi
··· 1 + /* 2 + * Copyright 2017 Gateworks Corporation 3 + * 4 + * This file is dual-licensed: you can use it either under the terms 5 + * of the GPL or the X11 license, at your option. Note that this dual 6 + * licensing only applies to this file, and not this project as a 7 + * whole. 8 + * 9 + * a) This file is free software; you can redistribute it and/or 10 + * modify it under the terms of the GNU General Public License as 11 + * published by the Free Software Foundation; either version 2 of 12 + * the License, or (at your option) any later version. 13 + * 14 + * This file is distributed in the hope that it will be useful, 15 + * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 + * GNU General Public License for more details. 18 + * 19 + * You should have received a copy of the GNU General Public 20 + * License along with this file; if not, write to the Free 21 + * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, 22 + * MA 02110-1301 USA 23 + * 24 + * Or, alternatively, 25 + * 26 + * b) Permission is hereby granted, free of charge, to any person 27 + * obtaining a copy of this software and associated documentation 28 + * files (the "Software"), to deal in the Software without 29 + * restriction, including without limitation the rights to use, 30 + * copy, modify, merge, publish, distribute, sublicense, and/or 31 + * sell copies of the Software, and to permit persons to whom the 32 + * Software is furnished to do so, subject to the following 33 + * conditions: 34 + * 35 + * The above copyright notice and this permission notice shall be 36 + * included in all copies or substantial portions of the Software. 37 + * 38 + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 39 + * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 40 + * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 41 + * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 42 + * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 43 + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 44 + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 45 + * OTHER DEALINGS IN THE SOFTWARE. 46 + */ 47 + 48 + #include <dt-bindings/gpio/gpio.h> 49 + 50 + / { 51 + /* these are used by bootloader for disabling nodes */ 52 + aliases { 53 + led0 = &led0; 54 + led1 = &led1; 55 + led2 = &led2; 56 + usb0 = &usbh1; 57 + usb1 = &usbotg; 58 + }; 59 + 60 + chosen { 61 + stdout-path = &uart2; 62 + }; 63 + 64 + backlight { 65 + compatible = "pwm-backlight"; 66 + pwms = <&pwm4 0 5000000>; 67 + brightness-levels = <0 4 8 16 32 64 128 255>; 68 + default-brightness-level = <7>; 69 + }; 70 + 71 + leds { 72 + compatible = "gpio-leds"; 73 + pinctrl-names = "default"; 74 + pinctrl-0 = <&pinctrl_gpio_leds>; 75 + 76 + led0: user1 { 77 + label = "user1"; 78 + gpios = <&gpio4 6 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDG */ 79 + default-state = "on"; 80 + linux,default-trigger = "heartbeat"; 81 + }; 82 + 83 + led1: user2 { 84 + label = "user2"; 85 + gpios = <&gpio4 7 GPIO_ACTIVE_HIGH>; /* MX6_PANLEDR */ 86 + default-state = "off"; 87 + }; 88 + 89 + led2: user3 { 90 + label = "user3"; 91 + gpios = <&gpio4 15 GPIO_ACTIVE_LOW>; /* MX6_LOCLED# */ 92 + default-state = "off"; 93 + }; 94 + }; 95 + 96 + memory { 97 + reg = <0x10000000 0x40000000>; 98 + }; 99 + 100 + pps { 101 + compatible = "pps-gpio"; 102 + pinctrl-names = "default"; 103 + pinctrl-0 = <&pinctrl_pps>; 104 + gpios = <&gpio1 26 GPIO_ACTIVE_HIGH>; 105 + }; 106 + 107 + reg_1p0v: regulator-1p0v { 108 + compatible = "regulator-fixed"; 109 + regulator-name = "1P0V"; 110 + regulator-min-microvolt = <1000000>; 111 + regulator-max-microvolt = <1000000>; 112 + regulator-always-on; 113 + }; 114 + 115 + reg_3p3v: regulator-3p3v { 116 + compatible = "regulator-fixed"; 117 + regulator-name = "3P3V"; 118 + regulator-min-microvolt = <3300000>; 119 + regulator-max-microvolt = <3300000>; 120 + regulator-always-on; 121 + }; 122 + 123 + reg_usb_h1_vbus: regulator-usb-h1-vbus { 124 + compatible = "regulator-fixed"; 125 + regulator-name = "usb_h1_vbus"; 126 + regulator-min-microvolt = <5000000>; 127 + regulator-max-microvolt = <5000000>; 128 + regulator-always-on; 129 + }; 130 + 131 + reg_usb_otg_vbus: regulator-usb-otg-vbus { 132 + compatible = "regulator-fixed"; 133 + regulator-name = "usb_otg_vbus"; 134 + regulator-min-microvolt = <5000000>; 135 + regulator-max-microvolt = <5000000>; 136 + gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 137 + enable-active-high; 138 + }; 139 + }; 140 + 141 + &clks { 142 + assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, 143 + <&clks IMX6QDL_CLK_LDB_DI1_SEL>; 144 + assigned-clock-parents = <&clks IMX6QDL_CLK_PLL3_USB_OTG>, 145 + <&clks IMX6QDL_CLK_PLL3_USB_OTG>; 146 + }; 147 + 148 + &fec { 149 + pinctrl-names = "default"; 150 + pinctrl-0 = <&pinctrl_enet>; 151 + phy-mode = "rgmii-id"; 152 + status = "okay"; 153 + 154 + fixed-link { 155 + speed = <1000>; 156 + full-duplex; 157 + }; 158 + 159 + mdio { 160 + #address-cells = <1>; 161 + #size-cells = <0>; 162 + 163 + switch@0 { 164 + compatible = "marvell,mv88e6085"; 165 + #address-cells = <1>; 166 + #size-cells = <0>; 167 + reg = <0>; 168 + 169 + ports { 170 + #address-cells = <1>; 171 + #size-cells = <0>; 172 + 173 + port@0 { 174 + reg = <0>; 175 + label = "lan4"; 176 + }; 177 + 178 + port@1 { 179 + reg = <1>; 180 + label = "lan3"; 181 + }; 182 + 183 + port@2 { 184 + reg = <2>; 185 + label = "lan2"; 186 + }; 187 + 188 + port@3 { 189 + reg = <3>; 190 + label = "lan1"; 191 + }; 192 + 193 + port@5 { 194 + reg = <5>; 195 + label = "cpu"; 196 + ethernet = <&fec>; 197 + }; 198 + }; 199 + }; 200 + }; 201 + }; 202 + 203 + &i2c1 { 204 + clock-frequency = <100000>; 205 + pinctrl-names = "default"; 206 + pinctrl-0 = <&pinctrl_i2c1>; 207 + status = "okay"; 208 + 209 + pca9555: gpio@23 { 210 + compatible = "nxp,pca9555"; 211 + reg = <0x23>; 212 + gpio-controller; 213 + #gpio-cells = <2>; 214 + }; 215 + 216 + eeprom1: eeprom@50 { 217 + compatible = "atmel,24c02"; 218 + reg = <0x50>; 219 + pagesize = <16>; 220 + }; 221 + 222 + eeprom2: eeprom@51 { 223 + compatible = "atmel,24c02"; 224 + reg = <0x51>; 225 + pagesize = <16>; 226 + }; 227 + 228 + eeprom3: eeprom@52 { 229 + compatible = "atmel,24c02"; 230 + reg = <0x52>; 231 + pagesize = <16>; 232 + }; 233 + 234 + eeprom4: eeprom@53 { 235 + compatible = "atmel,24c02"; 236 + reg = <0x53>; 237 + pagesize = <16>; 238 + }; 239 + 240 + dts1672: rtc@68 { 241 + compatible = "dallas,ds1672"; 242 + reg = <0x68>; 243 + }; 244 + }; 245 + 246 + &i2c2 { 247 + clock-frequency = <100000>; 248 + pinctrl-names = "default"; 249 + pinctrl-0 = <&pinctrl_i2c2>; 250 + status = "okay"; 251 + 252 + ltc3676: pmic@3c { 253 + compatible = "lltc,ltc3676"; 254 + reg = <0x3c>; 255 + interrupt-parent = <&gpio1>; 256 + interrupts = <8 IRQ_TYPE_EDGE_FALLING>; 257 + 258 + regulators { 259 + /* VDD_SOC (1+R1/R2 = 1.635) */ 260 + reg_vdd_soc: sw1 { 261 + regulator-name = "vddsoc"; 262 + regulator-min-microvolt = <674400>; 263 + regulator-max-microvolt = <1308000>; 264 + lltc,fb-voltage-divider = <127000 200000>; 265 + regulator-ramp-delay = <7000>; 266 + regulator-boot-on; 267 + regulator-always-on; 268 + }; 269 + 270 + /* VDD_1P8 (1+R1/R2 = 2.505): GbE switch */ 271 + reg_1p8v: sw2 { 272 + regulator-name = "vdd1p8"; 273 + regulator-min-microvolt = <1033310>; 274 + regulator-max-microvolt = <2004000>; 275 + lltc,fb-voltage-divider = <301000 200000>; 276 + regulator-ramp-delay = <7000>; 277 + regulator-boot-on; 278 + regulator-always-on; 279 + }; 280 + 281 + /* VDD_ARM (1+R1/R2 = 1.635) */ 282 + reg_vdd_arm: sw3 { 283 + regulator-name = "vddarm"; 284 + regulator-min-microvolt = <674400>; 285 + regulator-max-microvolt = <1308000>; 286 + lltc,fb-voltage-divider = <127000 200000>; 287 + regulator-ramp-delay = <7000>; 288 + regulator-boot-on; 289 + regulator-always-on; 290 + }; 291 + 292 + /* VDD_DDR (1+R1/R2 = 2.105) */ 293 + reg_vdd_ddr: sw4 { 294 + regulator-name = "vddddr"; 295 + regulator-min-microvolt = <868310>; 296 + regulator-max-microvolt = <1684000>; 297 + lltc,fb-voltage-divider = <221000 200000>; 298 + regulator-ramp-delay = <7000>; 299 + regulator-boot-on; 300 + regulator-always-on; 301 + }; 302 + 303 + /* VDD_2P5 (1+R1/R2 = 3.435): PCIe/ENET-PHY */ 304 + reg_2p5v: ldo2 { 305 + regulator-name = "vdd2p5"; 306 + regulator-min-microvolt = <2490375>; 307 + regulator-max-microvolt = <2490375>; 308 + lltc,fb-voltage-divider = <487000 200000>; 309 + regulator-boot-on; 310 + regulator-always-on; 311 + }; 312 + 313 + /* VDD_HIGH (1+R1/R2 = 4.17) */ 314 + reg_3p0v: ldo4 { 315 + regulator-name = "vdd3p0"; 316 + regulator-min-microvolt = <3023250>; 317 + regulator-max-microvolt = <3023250>; 318 + lltc,fb-voltage-divider = <634000 200000>; 319 + regulator-boot-on; 320 + regulator-always-on; 321 + }; 322 + }; 323 + }; 324 + }; 325 + 326 + &i2c3 { 327 + clock-frequency = <100000>; 328 + pinctrl-names = "default"; 329 + pinctrl-0 = <&pinctrl_i2c3>; 330 + status = "okay"; 331 + 332 + egalax_ts: touchscreen@4 { 333 + compatible = "eeti,egalax_ts"; 334 + reg = <0x04>; 335 + interrupt-parent = <&gpio1>; 336 + interrupts = <11 IRQ_TYPE_EDGE_FALLING>; 337 + wakeup-gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; 338 + }; 339 + }; 340 + 341 + &ldb { 342 + status = "okay"; 343 + 344 + lvds-channel@0 { 345 + fsl,data-mapping = "spwg"; 346 + fsl,data-width = <18>; 347 + status = "okay"; 348 + 349 + display-timings { 350 + native-mode = <&timing0>; 351 + timing0: hsd100pxn1 { 352 + clock-frequency = <65000000>; 353 + hactive = <1024>; 354 + vactive = <768>; 355 + hback-porch = <220>; 356 + hfront-porch = <40>; 357 + vback-porch = <21>; 358 + vfront-porch = <7>; 359 + hsync-len = <60>; 360 + vsync-len = <10>; 361 + }; 362 + }; 363 + }; 364 + }; 365 + 366 + &pcie { 367 + pinctrl-names = "default"; 368 + pinctrl-0 = <&pinctrl_pcie>; 369 + reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>; 370 + status = "okay"; 371 + }; 372 + 373 + &pwm2 { 374 + pinctrl-names = "default"; 375 + pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */ 376 + status = "disabled"; 377 + }; 378 + 379 + &pwm3 { 380 + pinctrl-names = "default"; 381 + pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */ 382 + status = "disabled"; 383 + }; 384 + 385 + &pwm4 { 386 + pinctrl-names = "default"; 387 + pinctrl-0 = <&pinctrl_pwm4>; 388 + status = "okay"; 389 + }; 390 + 391 + &uart1 { 392 + pinctrl-names = "default"; 393 + pinctrl-0 = <&pinctrl_uart1>; 394 + status = "okay"; 395 + }; 396 + 397 + &uart2 { 398 + pinctrl-names = "default"; 399 + pinctrl-0 = <&pinctrl_uart2>; 400 + status = "okay"; 401 + }; 402 + 403 + &uart3 { 404 + pinctrl-names = "default"; 405 + pinctrl-0 = <&pinctrl_uart3>; 406 + uart-has-rtscts; 407 + status = "okay"; 408 + }; 409 + 410 + &uart4 { 411 + pinctrl-names = "default"; 412 + pinctrl-0 = <&pinctrl_uart4>; 413 + uart-has-rtscts; 414 + status = "okay"; 415 + }; 416 + 417 + &uart5 { 418 + pinctrl-names = "default"; 419 + pinctrl-0 = <&pinctrl_uart5>; 420 + status = "okay"; 421 + }; 422 + 423 + &usbotg { 424 + vbus-supply = <&reg_usb_otg_vbus>; 425 + pinctrl-names = "default"; 426 + pinctrl-0 = <&pinctrl_usbotg>; 427 + disable-over-current; 428 + status = "okay"; 429 + }; 430 + 431 + &usbh1 { 432 + vbus-supply = <&reg_usb_h1_vbus>; 433 + status = "okay"; 434 + }; 435 + 436 + &usdhc3 { 437 + pinctrl-names = "default", "state_100mhz", "state_200mhz"; 438 + pinctrl-0 = <&pinctrl_usdhc3>; 439 + pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 440 + pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 441 + non-removable; 442 + vmmc-supply = <&reg_3p3v>; 443 + keep-power-in-suspend; 444 + status = "okay"; 445 + }; 446 + 447 + &wdog1 { 448 + pinctrl-names = "default"; 449 + pinctrl-0 = <&pinctrl_wdog>; 450 + fsl,ext-reset-output; 451 + }; 452 + 453 + &iomuxc { 454 + pinctrl_enet: enetgrp { 455 + fsl,pins = < 456 + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 457 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 458 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 459 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 460 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 461 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 462 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b030 463 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b030 464 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b030 465 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b030 466 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b030 467 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b030 468 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 469 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 470 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 471 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 472 + MX6QDL_PAD_ENET_TXD0__GPIO1_IO30 0x4001b0b0 /* PHY_RST# */ 473 + >; 474 + }; 475 + 476 + pinctrl_gpio_leds: gpioledsgrp { 477 + fsl,pins = < 478 + MX6QDL_PAD_KEY_COL0__GPIO4_IO06 0x1b0b0 479 + MX6QDL_PAD_KEY_ROW0__GPIO4_IO07 0x1b0b0 480 + MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0 481 + >; 482 + }; 483 + 484 + pinctrl_i2c1: i2c1grp { 485 + fsl,pins = < 486 + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 487 + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 488 + >; 489 + }; 490 + 491 + pinctrl_i2c2: i2c2grp { 492 + fsl,pins = < 493 + MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 494 + MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 495 + >; 496 + }; 497 + 498 + pinctrl_i2c3: i2c3grp { 499 + fsl,pins = < 500 + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 501 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 502 + >; 503 + }; 504 + 505 + pinctrl_pcie: pciegrp { 506 + fsl,pins = < 507 + MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0 /* PCIE RST */ 508 + >; 509 + }; 510 + 511 + pinctrl_pmic: pmicgrp { 512 + fsl,pins = < 513 + MX6QDL_PAD_GPIO_8__GPIO1_IO08 0x1b0b0 /* PMIC_IRQ# */ 514 + >; 515 + }; 516 + 517 + pinctrl_pps: ppsgrp { 518 + fsl,pins = < 519 + MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x1b0b1 520 + >; 521 + }; 522 + 523 + pinctrl_pwm2: pwm2grp { 524 + fsl,pins = < 525 + MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1 526 + >; 527 + }; 528 + 529 + pinctrl_pwm3: pwm3grp { 530 + fsl,pins = < 531 + MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1 532 + >; 533 + }; 534 + 535 + pinctrl_pwm4: pwm4grp { 536 + fsl,pins = < 537 + MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 538 + >; 539 + }; 540 + 541 + pinctrl_uart1: uart1grp { 542 + fsl,pins = < 543 + MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1 544 + MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1 545 + >; 546 + }; 547 + 548 + pinctrl_uart2: uart2grp { 549 + fsl,pins = < 550 + MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1 551 + MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA 0x1b0b1 552 + >; 553 + }; 554 + 555 + pinctrl_uart3: uart3grp { 556 + fsl,pins = < 557 + MX6QDL_PAD_EIM_D23__UART3_CTS_B 0x1b0b1 558 + MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 559 + MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 560 + MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1 561 + >; 562 + }; 563 + 564 + pinctrl_uart4: uart4grp { 565 + fsl,pins = < 566 + MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1 567 + MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1 568 + MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1 569 + MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1 570 + >; 571 + }; 572 + 573 + pinctrl_uart5: uart5grp { 574 + fsl,pins = < 575 + MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1 576 + MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1 577 + >; 578 + }; 579 + 580 + pinctrl_usbotg: usbotggrp { 581 + fsl,pins = < 582 + MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 583 + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x1b0b0 /* PWR_EN */ 584 + MX6QDL_PAD_KEY_COL4__GPIO4_IO14 0x1b0b0 /* OC */ 585 + >; 586 + }; 587 + 588 + pinctrl_usdhc3: usdhc3grp { 589 + fsl,pins = < 590 + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059 591 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059 592 + MX6QDL_PAD_SD3_RST__SD3_RESET 0x10059 593 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059 594 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059 595 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059 596 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059 597 + MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 598 + MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 599 + MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 600 + MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 601 + >; 602 + }; 603 + 604 + pinctrl_usdhc3_100mhz: usdhc3grp100mhz { 605 + fsl,pins = < 606 + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170b9 607 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100b9 608 + MX6QDL_PAD_SD3_RST__SD3_RESET 0x100b9 609 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170b9 610 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170b9 611 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170b9 612 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170b9 613 + MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170b9 614 + MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170b9 615 + MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170b9 616 + MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170b9 617 + >; 618 + }; 619 + 620 + pinctrl_usdhc3_200mhz: usdhc3grp200mhz { 621 + fsl,pins = < 622 + MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170f9 623 + MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100f9 624 + MX6QDL_PAD_SD3_RST__SD3_RESET 0x100f9 625 + MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170f9 626 + MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170f9 627 + MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170f9 628 + MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170f9 629 + MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170f9 630 + MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170f9 631 + MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170f9 632 + MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170f9 633 + >; 634 + }; 635 + 636 + pinctrl_wdog: wdoggrp { 637 + fsl,pins = < 638 + MX6QDL_PAD_DISP0_DAT8__WDOG1_B 0x1b0b0 639 + >; 640 + }; 641 + };