[PATCH] shpchp: cleanup bus speed handling

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

The code related to handling bus speed in SHPCHP driver is
unnecessarily complex. This patch cleans up and simplify that.

Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>

authored by

Kenji Kaneshige and committed by

Greg Kroah-Hartman 20 years ago 0afabe90 3c990e92

+189 -429

2 changed files

expand all

drivers

pci

hotplug

shpchp_ctrl.c

shpchp_hpc.c

+36 -116

drivers/pci/hotplug/shpchp_ctrl.c

··· 198 198 199 199 dbg("%s: change to speed %d\n", __FUNCTION__, speed); 200 200 if ((rc = p_slot->hpc_ops->set_bus_speed_mode(p_slot, speed))) { 201 - err("%s: Issue of set bus speed mode command failed\n", __FUNCTION__); 201 + err("%s: Issue of set bus speed mode command failed\n", 202 + __FUNCTION__); 202 203 return WRONG_BUS_FREQUENCY; 203 204 } 204 205 return rc; ··· 210 209 enum pci_bus_speed msp) 211 210 { 212 211 int rc = 0; 213 - 214 - if (flag != 0) { /* Other slots on the same bus are occupied */ 215 - if ( asp < bsp ) { 216 - err("%s: speed of bus %x and adapter %x mismatch\n", __FUNCTION__, bsp, asp); 217 - return WRONG_BUS_FREQUENCY; 212 + 213 + /* 214 + * If other slots on the same bus are occupied, we cannot 215 + * change the bus speed. 216 + */ 217 + if (flag) { 218 + if (asp < bsp) { 219 + err("%s: speed of bus %x and adapter %x mismatch\n", 220 + __FUNCTION__, bsp, asp); 221 + rc = WRONG_BUS_FREQUENCY; 218 222 } 223 + return rc; 224 + } 225 + 226 + if (asp < msp) { 227 + if (bsp != asp) 228 + rc = change_bus_speed(ctrl, pslot, asp); 219 229 } else { 220 - /* Other slots on the same bus are empty */ 221 - if (msp == bsp) { 222 - /* if adapter_speed >= bus_speed, do nothing */ 223 - if (asp < bsp) { 224 - /* 225 - * Try to lower bus speed to accommodate the adapter if other slots 226 - * on the same controller are empty 227 - */ 228 - if ((rc = change_bus_speed(ctrl, pslot, asp))) 229 - return rc; 230 - } 231 - } else { 232 - if (asp < msp) { 233 - if ((rc = change_bus_speed(ctrl, pslot, asp))) 234 - return rc; 235 - } else { 236 - if ((rc = change_bus_speed(ctrl, pslot, msp))) 237 - return rc; 238 - } 239 - } 230 + if (bsp != msp) 231 + rc = change_bus_speed(ctrl, pslot, msp); 240 232 } 241 233 return rc; 242 234 } ··· 246 252 u8 hp_slot; 247 253 u8 slots_not_empty = 0; 248 254 int rc = 0; 249 - enum pci_bus_speed adapter_speed, bus_speed, max_bus_speed; 250 - u8 pi, mode; 255 + enum pci_bus_speed asp, bsp, msp; 251 256 struct controller *ctrl = p_slot->ctrl; 252 257 253 258 hp_slot = p_slot->device - ctrl->slot_device_offset; ··· 278 285 } 279 286 } 280 287 281 - rc = p_slot->hpc_ops->get_adapter_speed(p_slot, &adapter_speed); 282 - /* 0 = PCI 33Mhz, 1 = PCI 66 Mhz, 2 = PCI-X 66 PA, 4 = PCI-X 66 ECC, */ 283 - /* 5 = PCI-X 133 PA, 7 = PCI-X 133 ECC, 0xa = PCI-X 133 Mhz 266, */ 284 - /* 0xd = PCI-X 133 Mhz 533 */ 285 - /* This encoding is different from the one used in cur_bus_speed & */ 286 - /* max_bus_speed */ 287 - 288 - if (rc || adapter_speed == PCI_SPEED_UNKNOWN) { 289 - err("%s: Can't get adapter speed or bus mode mismatch\n", __FUNCTION__); 288 + rc = p_slot->hpc_ops->get_adapter_speed(p_slot, &asp); 289 + if (rc) { 290 + err("%s: Can't get adapter speed or bus mode mismatch\n", 291 + __FUNCTION__); 290 292 return WRONG_BUS_FREQUENCY; 291 293 } 292 294 293 - rc = p_slot->hpc_ops->get_cur_bus_speed(p_slot, &bus_speed); 294 - if (rc || bus_speed == PCI_SPEED_UNKNOWN) { 295 + rc = p_slot->hpc_ops->get_cur_bus_speed(p_slot, &bsp); 296 + if (rc) { 295 297 err("%s: Can't get bus operation speed\n", __FUNCTION__); 296 298 return WRONG_BUS_FREQUENCY; 297 299 } 298 300 299 - rc = p_slot->hpc_ops->get_max_bus_speed(p_slot, &max_bus_speed); 300 - if (rc || max_bus_speed == PCI_SPEED_UNKNOWN) { 301 + rc = p_slot->hpc_ops->get_max_bus_speed(p_slot, &msp); 302 + if (rc) { 301 303 err("%s: Can't get max bus operation speed\n", __FUNCTION__); 302 - max_bus_speed = bus_speed; 303 - } 304 - 305 - if ((rc = p_slot->hpc_ops->get_prog_int(p_slot, &pi))) { 306 - err("%s: Can't get controller programming interface, set it to 1\n", __FUNCTION__); 307 - pi = 1; 304 + msp = bsp; 308 305 } 309 306 310 307 /* Check if there are other slots or devices on the same bus */ 311 308 if (!list_empty(&ctrl->pci_dev->subordinate->devices)) 312 309 slots_not_empty = 1; 313 310 314 - dbg("%s: slots_not_empty %d, pi %d\n", __FUNCTION__, 315 - slots_not_empty, pi); 316 - dbg("adapter_speed %d, bus_speed %d, max_bus_speed %d\n", 317 - adapter_speed, bus_speed, max_bus_speed); 311 + dbg("%s: slots_not_empty %d, adapter_speed %d, bus_speed %d, " 312 + "max_bus_speed %d\n", __FUNCTION__, slots_not_empty, asp, 313 + bsp, msp); 318 314 319 - if (pi == 2) { 320 - dbg("%s: In PI = %d\n", __FUNCTION__, pi); 321 - if ((rc = p_slot->hpc_ops->get_mode1_ECC_cap(p_slot, &mode))) { 322 - err("%s: Can't get Mode1_ECC, set mode to 0\n", __FUNCTION__); 323 - mode = 0; 324 - } 325 - 326 - switch (adapter_speed) { 327 - case PCI_SPEED_133MHz_PCIX_533: 328 - case PCI_SPEED_133MHz_PCIX_266: 329 - if ((bus_speed != adapter_speed) && 330 - ((rc = fix_bus_speed(ctrl, p_slot, slots_not_empty, adapter_speed, bus_speed, max_bus_speed)))) 331 - return rc; 332 - break; 333 - case PCI_SPEED_133MHz_PCIX_ECC: 334 - case PCI_SPEED_133MHz_PCIX: 335 - if (mode) { /* Bus - Mode 1 ECC */ 336 - if ((bus_speed != 0x7) && 337 - ((rc = fix_bus_speed(ctrl, p_slot, slots_not_empty, adapter_speed, bus_speed, max_bus_speed)))) 338 - return rc; 339 - } else { 340 - if ((bus_speed != 0x4) && 341 - ((rc = fix_bus_speed(ctrl, p_slot, slots_not_empty, adapter_speed, bus_speed, max_bus_speed)))) 342 - return rc; 343 - } 344 - break; 345 - case PCI_SPEED_66MHz_PCIX_ECC: 346 - case PCI_SPEED_66MHz_PCIX: 347 - if (mode) { /* Bus - Mode 1 ECC */ 348 - if ((bus_speed != 0x5) && 349 - ((rc = fix_bus_speed(ctrl, p_slot, slots_not_empty, adapter_speed, bus_speed, max_bus_speed)))) 350 - return rc; 351 - } else { 352 - if ((bus_speed != 0x2) && 353 - ((rc = fix_bus_speed(ctrl, p_slot, slots_not_empty, adapter_speed, bus_speed, max_bus_speed)))) 354 - return rc; 355 - } 356 - break; 357 - case PCI_SPEED_66MHz: 358 - if ((bus_speed != 0x1) && 359 - ((rc = fix_bus_speed(ctrl, p_slot, slots_not_empty, adapter_speed, bus_speed, max_bus_speed)))) 360 - return rc; 361 - break; 362 - case PCI_SPEED_33MHz: 363 - if (bus_speed > 0x0) { 364 - if (slots_not_empty == 0) { 365 - if ((rc = change_bus_speed(ctrl, p_slot, adapter_speed))) 366 - return rc; 367 - } else { 368 - err("%s: speed of bus %x and adapter %x mismatch\n", __FUNCTION__, bus_speed, adapter_speed); 369 - return WRONG_BUS_FREQUENCY; 370 - } 371 - } 372 - break; 373 - default: 374 - err("%s: speed of bus %x and adapter %x mismatch\n", __FUNCTION__, bus_speed, adapter_speed); 375 - return WRONG_BUS_FREQUENCY; 376 - } 377 - } else { 378 - /* If adpater_speed == bus_speed, nothing to do here */ 379 - dbg("%s: In PI = %d\n", __FUNCTION__, pi); 380 - if ((adapter_speed != bus_speed) && 381 - ((rc = fix_bus_speed(ctrl, p_slot, slots_not_empty, adapter_speed, bus_speed, max_bus_speed)))) 382 - return rc; 383 - } 315 + rc = fix_bus_speed(ctrl, p_slot, slots_not_empty, asp, bsp, msp); 316 + if (rc) 317 + return rc; 384 318 385 319 /* turn on board, blink green LED, turn off Amber LED */ 386 320 if ((rc = p_slot->hpc_ops->slot_enable(p_slot))) {

+153 -313

drivers/pci/hotplug/shpchp_hpc.c

··· 82 82 #define SLOT_100MHZ_PCIX_533 0x0f000000 83 83 #define SLOT_133MHZ_PCIX_533 0xf0000000 84 84 85 - 86 - /* Secondary Bus Configuration Register */ 87 - /* For PI = 1, Bits 0 to 2 have been encoded as follows to show current bus speed/mode */ 88 - #define PCI_33MHZ 0x0 89 - #define PCI_66MHZ 0x1 90 - #define PCIX_66MHZ 0x2 91 - #define PCIX_100MHZ 0x3 92 - #define PCIX_133MHZ 0x4 93 - 94 - /* For PI = 2, Bits 0 to 3 have been encoded as follows to show current bus speed/mode */ 95 - #define PCI_33MHZ 0x0 96 - #define PCI_66MHZ 0x1 97 - #define PCIX_66MHZ 0x2 98 - #define PCIX_100MHZ 0x3 99 - #define PCIX_133MHZ 0x4 100 - #define PCIX_66MHZ_ECC 0x5 101 - #define PCIX_100MHZ_ECC 0x6 102 - #define PCIX_133MHZ_ECC 0x7 103 - #define PCIX_66MHZ_266 0x9 104 - #define PCIX_100MHZ_266 0xa 105 - #define PCIX_133MHZ_266 0xb 106 - #define PCIX_66MHZ_533 0x11 107 - #define PCIX_100MHZ_533 0x12 108 - #define PCIX_133MHZ_533 0x13 109 - 110 85 /* Slot Configuration */ 111 86 #define SLOT_NUM 0x0000001F 112 87 #define FIRST_DEV_NUM 0x00001F00 ··· 523 548 524 549 static int hpc_get_adapter_speed(struct slot *slot, enum pci_bus_speed *value) 525 550 { 526 - struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; 527 - u32 slot_reg; 528 - u16 slot_status, sec_bus_status; 529 - u8 m66_cap, pcix_cap, pi; 530 551 int retval = 0; 552 + struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; 553 + u32 slot_reg = readl(php_ctlr->creg + SLOT1 + 4 * slot->hp_slot); 554 + u8 pcix_cap = (slot_reg >> 12) & 7; 555 + u8 m66_cap = (slot_reg >> 9) & 1; 531 556 532 557 DBG_ENTER_ROUTINE 533 558 534 - if (!slot->ctrl->hpc_ctlr_handle) { 535 - err("%s: Invalid HPC controller handle!\n", __FUNCTION__); 536 - return -1; 537 - } 559 + dbg("%s: slot_reg = %x, pcix_cap = %x, m66_cap = %x\n", 560 + __FUNCTION__, slot_reg, pcix_cap, m66_cap); 538 561 539 - if (slot->hp_slot >= php_ctlr->num_slots) { 540 - err("%s: Invalid HPC slot number!\n", __FUNCTION__); 541 - return -1; 542 - } 543 - 544 - pi = readb(php_ctlr->creg + PROG_INTERFACE); 545 - slot_reg = readl(php_ctlr->creg + SLOT1 + 4*(slot->hp_slot)); 546 - dbg("%s: pi = %d, slot_reg = %x\n", __FUNCTION__, pi, slot_reg); 547 - slot_status = (u16) slot_reg; 548 - dbg("%s: slot_status = %x\n", __FUNCTION__, slot_status); 549 - sec_bus_status = readw(php_ctlr->creg + SEC_BUS_CONFIG); 550 - 551 - pcix_cap = (u8) ((slot_status & 0x3000) >> 12); 552 - dbg("%s: pcix_cap = %x\n", __FUNCTION__, pcix_cap); 553 - m66_cap = (u8) ((slot_status & 0x0200) >> 9); 554 - dbg("%s: m66_cap = %x\n", __FUNCTION__, m66_cap); 555 - 556 - 557 - if (pi == 2) { 558 - switch (pcix_cap) { 559 - case 0: 560 - *value = m66_cap ? PCI_SPEED_66MHz : PCI_SPEED_33MHz; 561 - break; 562 - case 1: 563 - *value = PCI_SPEED_66MHz_PCIX; 564 - break; 565 - case 3: 566 - *value = PCI_SPEED_133MHz_PCIX; 567 - break; 568 - case 4: 569 - *value = PCI_SPEED_133MHz_PCIX_266; 570 - break; 571 - case 5: 572 - *value = PCI_SPEED_133MHz_PCIX_533; 573 - break; 574 - case 2: /* Reserved */ 575 - default: 576 - *value = PCI_SPEED_UNKNOWN; 577 - retval = -ENODEV; 578 - break; 579 - } 580 - } else { 581 - switch (pcix_cap) { 582 - case 0: 583 - *value = m66_cap ? PCI_SPEED_66MHz : PCI_SPEED_33MHz; 584 - break; 585 - case 1: 586 - *value = PCI_SPEED_66MHz_PCIX; 587 - break; 588 - case 3: 589 - *value = PCI_SPEED_133MHz_PCIX; 590 - break; 591 - case 2: /* Reserved */ 592 - default: 593 - *value = PCI_SPEED_UNKNOWN; 594 - retval = -ENODEV; 595 - break; 596 - } 562 + switch (pcix_cap) { 563 + case 0x0: 564 + *value = m66_cap ? PCI_SPEED_66MHz : PCI_SPEED_33MHz; 565 + break; 566 + case 0x1: 567 + *value = PCI_SPEED_66MHz_PCIX; 568 + break; 569 + case 0x3: 570 + *value = PCI_SPEED_133MHz_PCIX; 571 + break; 572 + case 0x4: 573 + *value = PCI_SPEED_133MHz_PCIX_266; 574 + break; 575 + case 0x5: 576 + *value = PCI_SPEED_133MHz_PCIX_533; 577 + break; 578 + case 0x2: 579 + default: 580 + *value = PCI_SPEED_UNKNOWN; 581 + retval = -ENODEV; 582 + break; 597 583 } 598 584 599 585 dbg("Adapter speed = %d\n", *value); 600 - 601 586 DBG_LEAVE_ROUTINE 602 587 return retval; 603 588 } ··· 900 965 901 966 static int hpc_set_bus_speed_mode(struct slot * slot, enum pci_bus_speed value) 902 967 { 903 - u8 slot_cmd; 904 - u8 pi; 905 - int retval = 0; 968 + int retval; 906 969 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; 970 + u8 pi, cmd; 907 971 908 972 DBG_ENTER_ROUTINE 909 - 910 - if (!slot->ctrl->hpc_ctlr_handle) { 911 - err("%s: Invalid HPC controller handle!\n", __FUNCTION__); 912 - return -1; 913 - } 914 973 915 974 pi = readb(php_ctlr->creg + PROG_INTERFACE); 916 - 917 - if (pi == 1) { 918 - switch (value) { 919 - case 0: 920 - slot_cmd = SETA_PCI_33MHZ; 921 - break; 922 - case 1: 923 - slot_cmd = SETA_PCI_66MHZ; 924 - break; 925 - case 2: 926 - slot_cmd = SETA_PCIX_66MHZ; 927 - break; 928 - case 3: 929 - slot_cmd = SETA_PCIX_100MHZ; 930 - break; 931 - case 4: 932 - slot_cmd = SETA_PCIX_133MHZ; 933 - break; 934 - default: 935 - slot_cmd = PCI_SPEED_UNKNOWN; 936 - retval = -ENODEV; 937 - return retval; 938 - } 939 - } else { 940 - switch (value) { 941 - case 0: 942 - slot_cmd = SETB_PCI_33MHZ; 943 - break; 944 - case 1: 945 - slot_cmd = SETB_PCI_66MHZ; 946 - break; 947 - case 2: 948 - slot_cmd = SETB_PCIX_66MHZ_PM; 949 - break; 950 - case 3: 951 - slot_cmd = SETB_PCIX_100MHZ_PM; 952 - break; 953 - case 4: 954 - slot_cmd = SETB_PCIX_133MHZ_PM; 955 - break; 956 - case 5: 957 - slot_cmd = SETB_PCIX_66MHZ_EM; 958 - break; 959 - case 6: 960 - slot_cmd = SETB_PCIX_100MHZ_EM; 961 - break; 962 - case 7: 963 - slot_cmd = SETB_PCIX_133MHZ_EM; 964 - break; 965 - case 8: 966 - slot_cmd = SETB_PCIX_66MHZ_266; 967 - break; 968 - case 0x9: 969 - slot_cmd = SETB_PCIX_100MHZ_266; 970 - break; 971 - case 0xa: 972 - slot_cmd = SETB_PCIX_133MHZ_266; 973 - break; 974 - case 0xb: 975 - slot_cmd = SETB_PCIX_66MHZ_533; 976 - break; 977 - case 0xc: 978 - slot_cmd = SETB_PCIX_100MHZ_533; 979 - break; 980 - case 0xd: 981 - slot_cmd = SETB_PCIX_133MHZ_533; 982 - break; 983 - default: 984 - slot_cmd = PCI_SPEED_UNKNOWN; 985 - retval = -ENODEV; 986 - return retval; 987 - } 975 + if ((pi == 1) && (value > PCI_SPEED_133MHz_PCIX)) 976 + return -EINVAL; 988 977 978 + switch (value) { 979 + case PCI_SPEED_33MHz: 980 + cmd = SETA_PCI_33MHZ; 981 + break; 982 + case PCI_SPEED_66MHz: 983 + cmd = SETA_PCI_66MHZ; 984 + break; 985 + case PCI_SPEED_66MHz_PCIX: 986 + cmd = SETA_PCIX_66MHZ; 987 + break; 988 + case PCI_SPEED_100MHz_PCIX: 989 + cmd = SETA_PCIX_100MHZ; 990 + break; 991 + case PCI_SPEED_133MHz_PCIX: 992 + cmd = SETA_PCIX_133MHZ; 993 + break; 994 + case PCI_SPEED_66MHz_PCIX_ECC: 995 + cmd = SETB_PCIX_66MHZ_EM; 996 + break; 997 + case PCI_SPEED_100MHz_PCIX_ECC: 998 + cmd = SETB_PCIX_100MHZ_EM; 999 + break; 1000 + case PCI_SPEED_133MHz_PCIX_ECC: 1001 + cmd = SETB_PCIX_133MHZ_EM; 1002 + break; 1003 + case PCI_SPEED_66MHz_PCIX_266: 1004 + cmd = SETB_PCIX_66MHZ_266; 1005 + break; 1006 + case PCI_SPEED_100MHz_PCIX_266: 1007 + cmd = SETB_PCIX_100MHZ_266; 1008 + break; 1009 + case PCI_SPEED_133MHz_PCIX_266: 1010 + cmd = SETB_PCIX_133MHZ_266; 1011 + break; 1012 + case PCI_SPEED_66MHz_PCIX_533: 1013 + cmd = SETB_PCIX_66MHZ_533; 1014 + break; 1015 + case PCI_SPEED_100MHz_PCIX_533: 1016 + cmd = SETB_PCIX_100MHZ_533; 1017 + break; 1018 + case PCI_SPEED_133MHz_PCIX_533: 1019 + cmd = SETB_PCIX_133MHZ_533; 1020 + break; 1021 + default: 1022 + return -EINVAL; 989 1023 } 990 - retval = shpc_write_cmd(slot, 0, slot_cmd); 991 - if (retval) { 1024 + 1025 + retval = shpc_write_cmd(slot, 0, cmd); 1026 + if (retval) 992 1027 err("%s: Write command failed!\n", __FUNCTION__); 993 - return -1; 994 - } 995 1028 996 1029 DBG_LEAVE_ROUTINE 997 1030 return retval; ··· 1066 1163 1067 1164 static int hpc_get_max_bus_speed (struct slot *slot, enum pci_bus_speed *value) 1068 1165 { 1166 + int retval = 0; 1069 1167 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; 1070 1168 enum pci_bus_speed bus_speed = PCI_SPEED_UNKNOWN; 1071 - int retval = 0; 1072 - u8 pi; 1073 - u32 slot_avail1, slot_avail2; 1169 + u8 pi = readb(php_ctlr->creg + PROG_INTERFACE); 1170 + u32 slot_avail1 = readl(php_ctlr->creg + SLOT_AVAIL1); 1171 + u32 slot_avail2 = readl(php_ctlr->creg + SLOT_AVAIL2); 1074 1172 1075 1173 DBG_ENTER_ROUTINE 1076 1174 1077 - if (!slot->ctrl->hpc_ctlr_handle) { 1078 - err("%s: Invalid HPC controller handle!\n", __FUNCTION__); 1079 - return -1; 1080 - } 1081 - 1082 - if (slot->hp_slot >= php_ctlr->num_slots) { 1083 - err("%s: Invalid HPC slot number!\n", __FUNCTION__); 1084 - return -1; 1085 - } 1086 - 1087 - pi = readb(php_ctlr->creg + PROG_INTERFACE); 1088 - slot_avail1 = readl(php_ctlr->creg + SLOT_AVAIL1); 1089 - slot_avail2 = readl(php_ctlr->creg + SLOT_AVAIL2); 1090 - 1091 1175 if (pi == 2) { 1092 1176 if (slot_avail2 & SLOT_133MHZ_PCIX_533) 1093 - bus_speed = PCIX_133MHZ_533; 1177 + bus_speed = PCI_SPEED_133MHz_PCIX_533; 1094 1178 else if (slot_avail2 & SLOT_100MHZ_PCIX_533) 1095 - bus_speed = PCIX_100MHZ_533; 1179 + bus_speed = PCI_SPEED_100MHz_PCIX_533; 1096 1180 else if (slot_avail2 & SLOT_66MHZ_PCIX_533) 1097 - bus_speed = PCIX_66MHZ_533; 1181 + bus_speed = PCI_SPEED_66MHz_PCIX_533; 1098 1182 else if (slot_avail2 & SLOT_133MHZ_PCIX_266) 1099 - bus_speed = PCIX_133MHZ_266; 1183 + bus_speed = PCI_SPEED_133MHz_PCIX_266; 1100 1184 else if (slot_avail2 & SLOT_100MHZ_PCIX_266) 1101 - bus_speed = PCIX_100MHZ_266; 1185 + bus_speed = PCI_SPEED_100MHz_PCIX_266; 1102 1186 else if (slot_avail2 & SLOT_66MHZ_PCIX_266) 1103 - bus_speed = PCIX_66MHZ_266; 1104 - else if (slot_avail1 & SLOT_133MHZ_PCIX) 1105 - bus_speed = PCIX_133MHZ; 1106 - else if (slot_avail1 & SLOT_100MHZ_PCIX) 1107 - bus_speed = PCIX_100MHZ; 1108 - else if (slot_avail1 & SLOT_66MHZ_PCIX) 1109 - bus_speed = PCIX_66MHZ; 1110 - else if (slot_avail2 & SLOT_66MHZ) 1111 - bus_speed = PCI_66MHZ; 1112 - else if (slot_avail1 & SLOT_33MHZ) 1113 - bus_speed = PCI_33MHZ; 1114 - else bus_speed = PCI_SPEED_UNKNOWN; 1115 - } else { 1187 + bus_speed = PCI_SPEED_66MHz_PCIX_266; 1188 + } 1189 + 1190 + if (bus_speed == PCI_SPEED_UNKNOWN) { 1116 1191 if (slot_avail1 & SLOT_133MHZ_PCIX) 1117 - bus_speed = PCIX_133MHZ; 1192 + bus_speed = PCI_SPEED_133MHz_PCIX; 1118 1193 else if (slot_avail1 & SLOT_100MHZ_PCIX) 1119 - bus_speed = PCIX_100MHZ; 1194 + bus_speed = PCI_SPEED_100MHz_PCIX; 1120 1195 else if (slot_avail1 & SLOT_66MHZ_PCIX) 1121 - bus_speed = PCIX_66MHZ; 1196 + bus_speed = PCI_SPEED_66MHz_PCIX; 1122 1197 else if (slot_avail2 & SLOT_66MHZ) 1123 - bus_speed = PCI_66MHZ; 1198 + bus_speed = PCI_SPEED_66MHz; 1124 1199 else if (slot_avail1 & SLOT_33MHZ) 1125 - bus_speed = PCI_33MHZ; 1126 - else bus_speed = PCI_SPEED_UNKNOWN; 1200 + bus_speed = PCI_SPEED_33MHz; 1201 + else 1202 + retval = -ENODEV; 1127 1203 } 1128 1204 1129 1205 *value = bus_speed; ··· 1113 1231 1114 1232 static int hpc_get_cur_bus_speed (struct slot *slot, enum pci_bus_speed *value) 1115 1233 { 1234 + int retval = 0; 1116 1235 struct php_ctlr_state_s *php_ctlr = slot->ctrl->hpc_ctlr_handle; 1117 1236 enum pci_bus_speed bus_speed = PCI_SPEED_UNKNOWN; 1118 - u16 sec_bus_status; 1119 - int retval = 0; 1120 - u8 pi; 1237 + u16 sec_bus_reg = readw(php_ctlr->creg + SEC_BUS_CONFIG); 1238 + u8 pi = readb(php_ctlr->creg + PROG_INTERFACE); 1239 + u8 speed_mode = (pi == 2) ? (sec_bus_reg & 0xF) : (sec_bus_reg & 0x7); 1121 1240 1122 1241 DBG_ENTER_ROUTINE 1123 1242 1124 - if (!slot->ctrl->hpc_ctlr_handle) { 1125 - err("%s: Invalid HPC controller handle!\n", __FUNCTION__); 1126 - return -1; 1243 + if ((pi == 1) && (speed_mode > 4)) { 1244 + *value = PCI_SPEED_UNKNOWN; 1245 + return -ENODEV; 1127 1246 } 1128 1247 1129 - if (slot->hp_slot >= php_ctlr->num_slots) { 1130 - err("%s: Invalid HPC slot number!\n", __FUNCTION__); 1131 - return -1; 1248 + switch (speed_mode) { 1249 + case 0x0: 1250 + *value = PCI_SPEED_33MHz; 1251 + break; 1252 + case 0x1: 1253 + *value = PCI_SPEED_66MHz; 1254 + break; 1255 + case 0x2: 1256 + *value = PCI_SPEED_66MHz_PCIX; 1257 + break; 1258 + case 0x3: 1259 + *value = PCI_SPEED_100MHz_PCIX; 1260 + break; 1261 + case 0x4: 1262 + *value = PCI_SPEED_133MHz_PCIX; 1263 + break; 1264 + case 0x5: 1265 + *value = PCI_SPEED_66MHz_PCIX_ECC; 1266 + break; 1267 + case 0x6: 1268 + *value = PCI_SPEED_100MHz_PCIX_ECC; 1269 + break; 1270 + case 0x7: 1271 + *value = PCI_SPEED_133MHz_PCIX_ECC; 1272 + break; 1273 + case 0x8: 1274 + *value = PCI_SPEED_66MHz_PCIX_266; 1275 + break; 1276 + case 0x9: 1277 + *value = PCI_SPEED_100MHz_PCIX_266; 1278 + break; 1279 + case 0xa: 1280 + *value = PCI_SPEED_133MHz_PCIX_266; 1281 + break; 1282 + case 0xb: 1283 + *value = PCI_SPEED_66MHz_PCIX_533; 1284 + break; 1285 + case 0xc: 1286 + *value = PCI_SPEED_100MHz_PCIX_533; 1287 + break; 1288 + case 0xd: 1289 + *value = PCI_SPEED_133MHz_PCIX_533; 1290 + break; 1291 + default: 1292 + *value = PCI_SPEED_UNKNOWN; 1293 + retval = -ENODEV; 1294 + break; 1132 1295 } 1133 1296 1134 - pi = readb(php_ctlr->creg + PROG_INTERFACE); 1135 - sec_bus_status = readw(php_ctlr->creg + SEC_BUS_CONFIG); 1136 - 1137 - if (pi == 2) { 1138 - switch (sec_bus_status & 0x000f) { 1139 - case 0: 1140 - bus_speed = PCI_SPEED_33MHz; 1141 - break; 1142 - case 1: 1143 - bus_speed = PCI_SPEED_66MHz; 1144 - break; 1145 - case 2: 1146 - bus_speed = PCI_SPEED_66MHz_PCIX; 1147 - break; 1148 - case 3: 1149 - bus_speed = PCI_SPEED_100MHz_PCIX; 1150 - break; 1151 - case 4: 1152 - bus_speed = PCI_SPEED_133MHz_PCIX; 1153 - break; 1154 - case 5: 1155 - bus_speed = PCI_SPEED_66MHz_PCIX_ECC; 1156 - break; 1157 - case 6: 1158 - bus_speed = PCI_SPEED_100MHz_PCIX_ECC; 1159 - break; 1160 - case 7: 1161 - bus_speed = PCI_SPEED_133MHz_PCIX_ECC; 1162 - break; 1163 - case 8: 1164 - bus_speed = PCI_SPEED_66MHz_PCIX_266; 1165 - break; 1166 - case 9: 1167 - bus_speed = PCI_SPEED_100MHz_PCIX_266; 1168 - break; 1169 - case 0xa: 1170 - bus_speed = PCI_SPEED_133MHz_PCIX_266; 1171 - break; 1172 - case 0xb: 1173 - bus_speed = PCI_SPEED_66MHz_PCIX_533; 1174 - break; 1175 - case 0xc: 1176 - bus_speed = PCI_SPEED_100MHz_PCIX_533; 1177 - break; 1178 - case 0xd: 1179 - bus_speed = PCI_SPEED_133MHz_PCIX_533; 1180 - break; 1181 - case 0xe: 1182 - case 0xf: 1183 - default: 1184 - bus_speed = PCI_SPEED_UNKNOWN; 1185 - break; 1186 - } 1187 - } else { 1188 - /* In the case where pi is undefined, default it to 1 */ 1189 - switch (sec_bus_status & 0x0007) { 1190 - case 0: 1191 - bus_speed = PCI_SPEED_33MHz; 1192 - break; 1193 - case 1: 1194 - bus_speed = PCI_SPEED_66MHz; 1195 - break; 1196 - case 2: 1197 - bus_speed = PCI_SPEED_66MHz_PCIX; 1198 - break; 1199 - case 3: 1200 - bus_speed = PCI_SPEED_100MHz_PCIX; 1201 - break; 1202 - case 4: 1203 - bus_speed = PCI_SPEED_133MHz_PCIX; 1204 - break; 1205 - case 5: 1206 - bus_speed = PCI_SPEED_UNKNOWN; /* Reserved */ 1207 - break; 1208 - case 6: 1209 - bus_speed = PCI_SPEED_UNKNOWN; /* Reserved */ 1210 - break; 1211 - case 7: 1212 - bus_speed = PCI_SPEED_UNKNOWN; /* Reserved */ 1213 - break; 1214 - default: 1215 - bus_speed = PCI_SPEED_UNKNOWN; 1216 - break; 1217 - } 1218 - } 1219 - 1220 - *value = bus_speed; 1221 1297 dbg("Current bus speed = %d\n", bus_speed); 1222 1298 DBG_LEAVE_ROUTINE 1223 1299 return retval;