Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

[ARM] mm 9: add additional device memory types

Add cached device type for ioremap_cached(). Group all device memory
types together, and ensure that they all have a "MT_DEVICE" prefix.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

authored by

Russell King and committed by
Russell King
0af92bef 9ef79635

+54 -44
+11 -11
arch/arm/mach-ixp2000/core.c
··· 84 84 .virtual = IXP2000_CAP_VIRT_BASE, 85 85 .pfn = __phys_to_pfn(IXP2000_CAP_PHYS_BASE), 86 86 .length = IXP2000_CAP_SIZE, 87 - .type = MT_IXP2000_DEVICE, 87 + .type = MT_DEVICE_IXP2000, 88 88 }, { 89 89 .virtual = IXP2000_INTCTL_VIRT_BASE, 90 90 .pfn = __phys_to_pfn(IXP2000_INTCTL_PHYS_BASE), 91 91 .length = IXP2000_INTCTL_SIZE, 92 - .type = MT_IXP2000_DEVICE, 92 + .type = MT_DEVICE_IXP2000, 93 93 }, { 94 94 .virtual = IXP2000_PCI_CREG_VIRT_BASE, 95 95 .pfn = __phys_to_pfn(IXP2000_PCI_CREG_PHYS_BASE), 96 96 .length = IXP2000_PCI_CREG_SIZE, 97 - .type = MT_IXP2000_DEVICE, 97 + .type = MT_DEVICE_IXP2000, 98 98 }, { 99 99 .virtual = IXP2000_PCI_CSR_VIRT_BASE, 100 100 .pfn = __phys_to_pfn(IXP2000_PCI_CSR_PHYS_BASE), 101 101 .length = IXP2000_PCI_CSR_SIZE, 102 - .type = MT_IXP2000_DEVICE, 102 + .type = MT_DEVICE_IXP2000, 103 103 }, { 104 104 .virtual = IXP2000_MSF_VIRT_BASE, 105 105 .pfn = __phys_to_pfn(IXP2000_MSF_PHYS_BASE), 106 106 .length = IXP2000_MSF_SIZE, 107 - .type = MT_IXP2000_DEVICE, 107 + .type = MT_DEVICE_IXP2000, 108 108 }, { 109 109 .virtual = IXP2000_SCRATCH_RING_VIRT_BASE, 110 110 .pfn = __phys_to_pfn(IXP2000_SCRATCH_RING_PHYS_BASE), 111 111 .length = IXP2000_SCRATCH_RING_SIZE, 112 - .type = MT_IXP2000_DEVICE, 112 + .type = MT_DEVICE_IXP2000, 113 113 }, { 114 114 .virtual = IXP2000_SRAM0_VIRT_BASE, 115 115 .pfn = __phys_to_pfn(IXP2000_SRAM0_PHYS_BASE), 116 116 .length = IXP2000_SRAM0_SIZE, 117 - .type = MT_IXP2000_DEVICE, 117 + .type = MT_DEVICE_IXP2000, 118 118 }, { 119 119 .virtual = IXP2000_PCI_IO_VIRT_BASE, 120 120 .pfn = __phys_to_pfn(IXP2000_PCI_IO_PHYS_BASE), 121 121 .length = IXP2000_PCI_IO_SIZE, 122 - .type = MT_IXP2000_DEVICE, 122 + .type = MT_DEVICE_IXP2000, 123 123 }, { 124 124 .virtual = IXP2000_PCI_CFG0_VIRT_BASE, 125 125 .pfn = __phys_to_pfn(IXP2000_PCI_CFG0_PHYS_BASE), 126 126 .length = IXP2000_PCI_CFG0_SIZE, 127 - .type = MT_IXP2000_DEVICE, 127 + .type = MT_DEVICE_IXP2000, 128 128 }, { 129 129 .virtual = IXP2000_PCI_CFG1_VIRT_BASE, 130 130 .pfn = __phys_to_pfn(IXP2000_PCI_CFG1_PHYS_BASE), 131 131 .length = IXP2000_PCI_CFG1_SIZE, 132 - .type = MT_IXP2000_DEVICE, 132 + .type = MT_DEVICE_IXP2000, 133 133 } 134 134 }; 135 135 136 136 void __init ixp2000_map_io(void) 137 137 { 138 138 /* 139 - * On IXP2400 CPUs we need to use MT_IXP2000_DEVICE so that 139 + * On IXP2400 CPUs we need to use MT_DEVICE_IXP2000 so that 140 140 * XCB=101 (to avoid triggering erratum #66), and given that 141 141 * this mode speeds up I/O accesses and we have write buffer 142 142 * flushes in the right places anyway, it doesn't hurt to use
+3 -3
arch/arm/mach-ixp2000/enp2611.c
··· 70 70 .virtual = ENP2611_CALEB_VIRT_BASE, 71 71 .pfn = __phys_to_pfn(ENP2611_CALEB_PHYS_BASE), 72 72 .length = ENP2611_CALEB_SIZE, 73 - .type = MT_IXP2000_DEVICE, 73 + .type = MT_DEVICE_IXP2000, 74 74 }, { 75 75 .virtual = ENP2611_PM3386_0_VIRT_BASE, 76 76 .pfn = __phys_to_pfn(ENP2611_PM3386_0_PHYS_BASE), 77 77 .length = ENP2611_PM3386_0_SIZE, 78 - .type = MT_IXP2000_DEVICE, 78 + .type = MT_DEVICE_IXP2000, 79 79 }, { 80 80 .virtual = ENP2611_PM3386_1_VIRT_BASE, 81 81 .pfn = __phys_to_pfn(ENP2611_PM3386_1_PHYS_BASE), 82 82 .length = ENP2611_PM3386_1_SIZE, 83 - .type = MT_IXP2000_DEVICE, 83 + .type = MT_DEVICE_IXP2000, 84 84 } 85 85 }; 86 86
+28 -22
arch/arm/mm/mmu.c
··· 176 176 } 177 177 #endif 178 178 179 + #define PROT_PTE_DEVICE L_PTE_PRESENT|L_PTE_YOUNG|L_PTE_DIRTY|L_PTE_WRITE 180 + #define PROT_SECT_DEVICE PMD_TYPE_SECT|PMD_SECT_XN|PMD_SECT_AP_WRITE 181 + 179 182 static struct mem_type mem_types[] = { 180 - [MT_DEVICE] = { 181 - .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | 182 - L_PTE_WRITE, 183 - .prot_l1 = PMD_TYPE_TABLE, 184 - .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN | PMD_SECT_UNCACHED | 185 - PMD_SECT_AP_WRITE, 186 - .domain = DOMAIN_IO, 183 + [MT_DEVICE] = { /* Strongly ordered / ARMv6 shared device */ 184 + .prot_pte = PROT_PTE_DEVICE, 185 + .prot_l1 = PMD_TYPE_TABLE, 186 + .prot_sect = PROT_SECT_DEVICE | PMD_SECT_UNCACHED, 187 + .domain = DOMAIN_IO, 188 + }, 189 + [MT_DEVICE_NONSHARED] = { /* ARMv6 non-shared device */ 190 + .prot_pte = PROT_PTE_DEVICE, 191 + .prot_pte_ext = PTE_EXT_TEX(2), 192 + .prot_l1 = PMD_TYPE_TABLE, 193 + .prot_sect = PROT_SECT_DEVICE | PMD_SECT_TEX(2), 194 + .domain = DOMAIN_IO, 195 + }, 196 + [MT_DEVICE_CACHED] = { /* ioremap_cached */ 197 + .prot_pte = PROT_PTE_DEVICE | L_PTE_CACHEABLE | L_PTE_BUFFERABLE, 198 + .prot_l1 = PMD_TYPE_TABLE, 199 + .prot_sect = PROT_SECT_DEVICE | PMD_SECT_WB, 200 + .domain = DOMAIN_IO, 201 + }, 202 + [MT_DEVICE_IXP2000] = { /* IXP2400 requires XCB=101 for on-chip I/O */ 203 + .prot_pte = PROT_PTE_DEVICE, 204 + .prot_l1 = PMD_TYPE_TABLE, 205 + .prot_sect = PROT_SECT_DEVICE | PMD_SECT_BUFFERABLE | 206 + PMD_SECT_TEX(1), 207 + .domain = DOMAIN_IO, 187 208 }, 188 209 [MT_CACHECLEAN] = { 189 210 .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN, ··· 234 213 .prot_sect = PMD_TYPE_SECT, 235 214 .domain = DOMAIN_KERNEL, 236 215 }, 237 - [MT_IXP2000_DEVICE] = { /* IXP2400 requires XCB=101 for on-chip I/O */ 238 - .prot_pte = L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_DIRTY | 239 - L_PTE_WRITE, 240 - .prot_l1 = PMD_TYPE_TABLE, 241 - .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN | PMD_SECT_UNCACHED | 242 - PMD_SECT_AP_WRITE | PMD_SECT_BUFFERABLE | 243 - PMD_SECT_TEX(1), 244 - .domain = DOMAIN_IO, 245 - }, 246 - [MT_NONSHARED_DEVICE] = { 247 - .prot_l1 = PMD_TYPE_TABLE, 248 - .prot_sect = PMD_TYPE_SECT | PMD_SECT_XN | PMD_SECT_NONSHARED_DEV | 249 - PMD_SECT_AP_WRITE, 250 - .domain = DOMAIN_IO, 251 - } 252 216 }; 253 217 254 218 const struct mem_type *get_mem_type(unsigned int type)
+12 -8
include/asm-arm/mach/map.h
··· 17 17 }; 18 18 19 19 #define MT_DEVICE 0 20 - #define MT_CACHECLEAN 1 21 - #define MT_MINICLEAN 2 22 - #define MT_LOW_VECTORS 3 23 - #define MT_HIGH_VECTORS 4 24 - #define MT_MEMORY 5 25 - #define MT_ROM 6 26 - #define MT_IXP2000_DEVICE 7 27 - #define MT_NONSHARED_DEVICE 8 20 + #define MT_DEVICE_NONSHARED 1 21 + #define MT_DEVICE_CACHED 2 22 + #define MT_DEVICE_IXP2000 3 23 + #define MT_CACHECLEAN 4 24 + #define MT_MINICLEAN 5 25 + #define MT_LOW_VECTORS 6 26 + #define MT_HIGH_VECTORS 7 27 + #define MT_MEMORY 8 28 + #define MT_ROM 9 29 + 30 + #define MT_NONSHARED_DEVICE MT_DEVICE_NONSHARED 31 + #define MT_IXP2000_DEVICE MT_DEVICE_IXP2000 28 32 29 33 #ifdef CONFIG_MMU 30 34 extern void iotable_init(struct map_desc *, int);