Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Merge tag 'intel-gpio-v5.15-1' of gitolite.kernel.org:pub/scm/linux/kernel/git/andy/linux-gpio-intel into gpio/for-next

intel-gpio for v5.15-1

* Rework DesignWare driver to use software nodes instead of platform data
* Drop duplication of forward declaration for ACPI in consumer.h
* Get rid of legacy PCI PM code in ML IOH driver

The following is an automated git shortlog grouped by driver:

dwapb:
- Get rid of legacy platform data
- Read GPIO base from gpio-base property
- Unify ACPI enumeration checks in get_irq() and configure_irqs()

gpiolib:
- Deduplicate forward declaration in the consumer.h header

mfd:
- intel_quark_i2c_gpio: Convert GPIO to use software nodes

ml-ioh:
- Convert to dev_pm_ops

+84 -123
+34 -22
drivers/gpio/gpio-dwapb.c
··· 16 16 #include <linux/mod_devicetable.h> 17 17 #include <linux/module.h> 18 18 #include <linux/of.h> 19 - #include <linux/platform_data/gpio-dwapb.h> 20 19 #include <linux/platform_device.h> 21 20 #include <linux/property.h> 22 21 #include <linux/reset.h> ··· 47 48 48 49 #define DWAPB_DRIVER_NAME "gpio-dwapb" 49 50 #define DWAPB_MAX_PORTS 4 51 + #define DWAPB_MAX_GPIOS 32 50 52 51 53 #define GPIO_EXT_PORT_STRIDE 0x04 /* register stride 32 bits */ 52 54 #define GPIO_SWPORT_DR_STRIDE 0x0c /* register stride 3*32 bits */ ··· 64 64 #define DWAPB_NR_CLOCKS 2 65 65 66 66 struct dwapb_gpio; 67 + 68 + struct dwapb_port_property { 69 + struct fwnode_handle *fwnode; 70 + unsigned int idx; 71 + unsigned int ngpio; 72 + unsigned int gpio_base; 73 + int irq[DWAPB_MAX_GPIOS]; 74 + }; 75 + 76 + struct dwapb_platform_data { 77 + struct dwapb_port_property *properties; 78 + unsigned int nports; 79 + }; 67 80 68 81 #ifdef CONFIG_PM_SLEEP 69 82 /* Store GPIO context across system-wide suspend/resume transitions */ ··· 449 436 pirq->irqchip.irq_set_wake = dwapb_irq_set_wake; 450 437 #endif 451 438 452 - if (!pp->irq_shared) { 453 - girq->num_parents = pirq->nr_irqs; 454 - girq->parents = pirq->irq; 455 - girq->parent_handler_data = gpio; 456 - girq->parent_handler = dwapb_irq_handler; 457 - } else { 458 - /* This will let us handle the parent IRQ in the driver */ 439 + /* 440 + * Intel ACPI-based platforms mostly have the DesignWare APB GPIO 441 + * IRQ lane shared between several devices. In that case the parental 442 + * IRQ has to be handled in the shared way so to be properly delivered 443 + * to all the connected devices. 444 + */ 445 + if (has_acpi_companion(gpio->dev)) { 459 446 girq->num_parents = 0; 460 447 girq->parents = NULL; 461 448 girq->parent_handler = NULL; 462 449 463 - /* 464 - * Request a shared IRQ since where MFD would have devices 465 - * using the same irq pin 466 - */ 467 450 err = devm_request_irq(gpio->dev, pp->irq[0], 468 451 dwapb_irq_handler_mfd, 469 452 IRQF_SHARED, DWAPB_DRIVER_NAME, gpio); ··· 467 458 dev_err(gpio->dev, "error requesting IRQ\n"); 468 459 goto err_kfree_pirq; 469 460 } 461 + } else { 462 + girq->num_parents = pirq->nr_irqs; 463 + girq->parents = pirq->irq; 464 + girq->parent_handler_data = gpio; 465 + girq->parent_handler = dwapb_irq_handler; 470 466 } 471 467 472 468 girq->chip = &pirq->irqchip; ··· 595 581 pp->ngpio = DWAPB_MAX_GPIOS; 596 582 } 597 583 598 - pp->irq_shared = false; 599 584 pp->gpio_base = -1; 585 + 586 + /* For internal use only, new platforms mustn't exercise this */ 587 + if (is_software_node(fwnode)) 588 + fwnode_property_read_u32(fwnode, "gpio-base", &pp->gpio_base); 600 589 601 590 /* 602 591 * Only port A can provide interrupts in all configurations of ··· 687 670 unsigned int i; 688 671 struct dwapb_gpio *gpio; 689 672 int err; 673 + struct dwapb_platform_data *pdata; 690 674 struct device *dev = &pdev->dev; 691 - struct dwapb_platform_data *pdata = dev_get_platdata(dev); 692 675 693 - if (!pdata) { 694 - pdata = dwapb_gpio_get_pdata(dev); 695 - if (IS_ERR(pdata)) 696 - return PTR_ERR(pdata); 697 - } 698 - 699 - if (!pdata->nports) 700 - return -ENODEV; 676 + pdata = dwapb_gpio_get_pdata(dev); 677 + if (IS_ERR(pdata)) 678 + return PTR_ERR(pdata); 701 679 702 680 gpio = devm_kzalloc(&pdev->dev, sizeof(*gpio), GFP_KERNEL); 703 681 if (!gpio)
+11 -38
drivers/gpio/gpio-ml-ioh.c
··· 155 155 return 0; 156 156 } 157 157 158 - #ifdef CONFIG_PM 159 158 /* 160 159 * Save register configuration and disable interrupts. 161 160 */ 162 - static void ioh_gpio_save_reg_conf(struct ioh_gpio *chip) 161 + static void __maybe_unused ioh_gpio_save_reg_conf(struct ioh_gpio *chip) 163 162 { 164 163 int i; 165 164 ··· 184 185 /* 185 186 * This function restores the register configuration of the GPIO device. 186 187 */ 187 - static void ioh_gpio_restore_reg_conf(struct ioh_gpio *chip) 188 + static void __maybe_unused ioh_gpio_restore_reg_conf(struct ioh_gpio *chip) 188 189 { 189 190 int i; 190 191 ··· 206 207 &chip->reg->ioh_sel_reg[i]); 207 208 } 208 209 } 209 - #endif 210 210 211 211 static int ioh_gpio_to_irq(struct gpio_chip *gpio, unsigned offset) 212 212 { ··· 520 522 kfree(chip); 521 523 } 522 524 523 - #ifdef CONFIG_PM 524 - static int ioh_gpio_suspend(struct pci_dev *pdev, pm_message_t state) 525 + static int __maybe_unused ioh_gpio_suspend(struct device *dev) 525 526 { 526 - s32 ret; 527 - struct ioh_gpio *chip = pci_get_drvdata(pdev); 527 + struct ioh_gpio *chip = dev_get_drvdata(dev); 528 528 unsigned long flags; 529 529 530 530 spin_lock_irqsave(&chip->spinlock, flags); 531 531 ioh_gpio_save_reg_conf(chip); 532 532 spin_unlock_irqrestore(&chip->spinlock, flags); 533 533 534 - ret = pci_save_state(pdev); 535 - if (ret) { 536 - dev_err(&pdev->dev, "pci_save_state Failed-%d\n", ret); 537 - return ret; 538 - } 539 - pci_disable_device(pdev); 540 - pci_set_power_state(pdev, PCI_D0); 541 - ret = pci_enable_wake(pdev, PCI_D0, 1); 542 - if (ret) 543 - dev_err(&pdev->dev, "pci_enable_wake Failed -%d\n", ret); 544 - 545 534 return 0; 546 535 } 547 536 548 - static int ioh_gpio_resume(struct pci_dev *pdev) 537 + static int __maybe_unused ioh_gpio_resume(struct device *dev) 549 538 { 550 - s32 ret; 551 - struct ioh_gpio *chip = pci_get_drvdata(pdev); 539 + struct ioh_gpio *chip = dev_get_drvdata(dev); 552 540 unsigned long flags; 553 - 554 - ret = pci_enable_wake(pdev, PCI_D0, 0); 555 - 556 - pci_set_power_state(pdev, PCI_D0); 557 - ret = pci_enable_device(pdev); 558 - if (ret) { 559 - dev_err(&pdev->dev, "pci_enable_device Failed-%d ", ret); 560 - return ret; 561 - } 562 - pci_restore_state(pdev); 563 541 564 542 spin_lock_irqsave(&chip->spinlock, flags); 565 543 iowrite32(0x01, &chip->reg->srst); ··· 545 571 546 572 return 0; 547 573 } 548 - #else 549 - #define ioh_gpio_suspend NULL 550 - #define ioh_gpio_resume NULL 551 - #endif 574 + 575 + static SIMPLE_DEV_PM_OPS(ioh_gpio_pm_ops, ioh_gpio_suspend, ioh_gpio_resume); 552 576 553 577 static const struct pci_device_id ioh_gpio_pcidev_id[] = { 554 578 { PCI_DEVICE(PCI_VENDOR_ID_ROHM, 0x802E) }, ··· 559 587 .id_table = ioh_gpio_pcidev_id, 560 588 .probe = ioh_gpio_probe, 561 589 .remove = ioh_gpio_remove, 562 - .suspend = ioh_gpio_suspend, 563 - .resume = ioh_gpio_resume 590 + .driver = { 591 + .pm = &ioh_gpio_pm_ops, 592 + }, 564 593 }; 565 594 566 595 module_pci_driver(ioh_gpio_driver);
+37 -34
drivers/mfd/intel_quark_i2c_gpio.c
··· 17 17 #include <linux/clk-provider.h> 18 18 #include <linux/dmi.h> 19 19 #include <linux/i2c.h> 20 - #include <linux/platform_data/gpio-dwapb.h> 21 20 #include <linux/property.h> 22 21 23 22 /* PCI BAR for register base address */ ··· 26 27 /* ACPI _ADR value to match the child node */ 27 28 #define MFD_ACPI_MATCH_GPIO 0ULL 28 29 #define MFD_ACPI_MATCH_I2C 1ULL 29 - 30 - /* The base GPIO number under GPIOLIB framework */ 31 - #define INTEL_QUARK_MFD_GPIO_BASE 8 32 - 33 - /* The default number of South-Cluster GPIO on Quark. */ 34 - #define INTEL_QUARK_MFD_NGPIO 8 35 - 36 - /* The DesignWare GPIO ports on Quark. */ 37 - #define INTEL_QUARK_GPIO_NPORTS 1 38 30 39 31 #define INTEL_QUARK_IORES_MEM 0 40 32 #define INTEL_QUARK_IORES_IRQ 1 ··· 101 111 [INTEL_QUARK_IORES_MEM] = { 102 112 .flags = IORESOURCE_MEM, 103 113 }, 114 + [INTEL_QUARK_IORES_IRQ] = { 115 + .flags = IORESOURCE_IRQ, 116 + }, 104 117 }; 105 118 106 119 static struct mfd_cell_acpi_match intel_quark_acpi_match_gpio = { 107 120 .adr = MFD_ACPI_MATCH_GPIO, 121 + }; 122 + 123 + static const struct software_node intel_quark_gpio_controller_node = { 124 + .name = "intel-quark-gpio-controller", 125 + }; 126 + 127 + static const struct property_entry intel_quark_gpio_portA_properties[] = { 128 + PROPERTY_ENTRY_U32("reg", 0), 129 + PROPERTY_ENTRY_U32("snps,nr-gpios", 8), 130 + PROPERTY_ENTRY_U32("gpio-base", 8), 131 + { } 132 + }; 133 + 134 + static const struct software_node intel_quark_gpio_portA_node = { 135 + .name = "portA", 136 + .parent = &intel_quark_gpio_controller_node, 137 + .properties = intel_quark_gpio_portA_properties, 138 + }; 139 + 140 + static const struct software_node *intel_quark_gpio_node_group[] = { 141 + &intel_quark_gpio_controller_node, 142 + &intel_quark_gpio_portA_node, 143 + NULL 108 144 }; 109 145 110 146 static struct mfd_cell intel_quark_mfd_cells[] = { ··· 219 203 { 220 204 struct mfd_cell *cell = &intel_quark_mfd_cells[MFD_GPIO_BAR]; 221 205 struct resource *res = intel_quark_gpio_res; 222 - struct dwapb_platform_data *pdata; 223 - struct device *dev = &pdev->dev; 206 + int ret; 224 207 225 208 res[INTEL_QUARK_IORES_MEM].start = pci_resource_start(pdev, MFD_GPIO_BAR); 226 209 res[INTEL_QUARK_IORES_MEM].end = pci_resource_end(pdev, MFD_GPIO_BAR); 227 210 228 - pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); 229 - if (!pdata) 230 - return -ENOMEM; 211 + res[INTEL_QUARK_IORES_IRQ].start = pci_irq_vector(pdev, 0); 212 + res[INTEL_QUARK_IORES_IRQ].end = pci_irq_vector(pdev, 0); 231 213 232 - /* For intel quark x1000, it has only one port: portA */ 233 - pdata->nports = INTEL_QUARK_GPIO_NPORTS; 234 - pdata->properties = devm_kcalloc(dev, pdata->nports, 235 - sizeof(*pdata->properties), 236 - GFP_KERNEL); 237 - if (!pdata->properties) 238 - return -ENOMEM; 214 + ret = software_node_register_node_group(intel_quark_gpio_node_group); 215 + if (ret) 216 + return ret; 239 217 240 - /* Set the properties for portA */ 241 - pdata->properties->fwnode = NULL; 242 - pdata->properties->idx = 0; 243 - pdata->properties->ngpio = INTEL_QUARK_MFD_NGPIO; 244 - pdata->properties->gpio_base = INTEL_QUARK_MFD_GPIO_BASE; 245 - pdata->properties->irq[0] = pci_irq_vector(pdev, 0); 246 - pdata->properties->irq_shared = true; 247 - 248 - cell->platform_data = pdata; 249 - cell->pdata_size = sizeof(*pdata); 250 - 218 + cell->swnode = &intel_quark_gpio_controller_node; 251 219 return 0; 252 220 } 253 221 ··· 274 274 ARRAY_SIZE(intel_quark_mfd_cells), NULL, 0, 275 275 NULL); 276 276 if (ret) 277 - goto err_free_irq_vectors; 277 + goto err_unregister_gpio_node_group; 278 278 279 279 return 0; 280 280 281 + err_unregister_gpio_node_group: 282 + software_node_unregister_node_group(intel_quark_gpio_node_group); 281 283 err_free_irq_vectors: 282 284 pci_free_irq_vectors(pdev); 283 285 err_unregister_i2c_clk: ··· 290 288 static void intel_quark_mfd_remove(struct pci_dev *pdev) 291 289 { 292 290 mfd_remove_devices(&pdev->dev); 291 + software_node_unregister_node_group(intel_quark_gpio_node_group); 293 292 pci_free_irq_vectors(pdev); 294 293 intel_quark_unregister_i2c_clk(&pdev->dev); 295 294 }
+2 -4
include/linux/gpio/consumer.h
··· 680 680 unsigned int quirks; 681 681 }; 682 682 683 - #if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_ACPI) 684 - 685 683 struct acpi_device; 684 + 685 + #if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_ACPI) 686 686 687 687 int acpi_dev_add_driver_gpios(struct acpi_device *adev, 688 688 const struct acpi_gpio_mapping *gpios); ··· 695 695 struct gpio_desc *acpi_get_and_request_gpiod(char *path, int pin, char *label); 696 696 697 697 #else /* CONFIG_GPIOLIB && CONFIG_ACPI */ 698 - 699 - struct acpi_device; 700 698 701 699 static inline int acpi_dev_add_driver_gpios(struct acpi_device *adev, 702 700 const struct acpi_gpio_mapping *gpios)
-25
include/linux/platform_data/gpio-dwapb.h
··· 1 - /* SPDX-License-Identifier: GPL-2.0-only */ 2 - /* 3 - * Copyright(c) 2014 Intel Corporation. 4 - */ 5 - 6 - #ifndef GPIO_DW_APB_H 7 - #define GPIO_DW_APB_H 8 - 9 - #define DWAPB_MAX_GPIOS 32 10 - 11 - struct dwapb_port_property { 12 - struct fwnode_handle *fwnode; 13 - unsigned int idx; 14 - unsigned int ngpio; 15 - unsigned int gpio_base; 16 - int irq[DWAPB_MAX_GPIOS]; 17 - bool irq_shared; 18 - }; 19 - 20 - struct dwapb_platform_data { 21 - struct dwapb_port_property *properties; 22 - unsigned int nports; 23 - }; 24 - 25 - #endif