perf/x86/intel: Clean up PEBS-via-PT on hybrid

The PEBS-via-PT feature is exposed for the e-core of some hybrid
platforms, e.g., ADL and MTL. But it never works.

$ dmesg | grep PEBS
[ 1.793888] core: cpu_atom PMU driver: PEBS-via-PT

$ perf record -c 1000 -e '{intel_pt/branch=0/,
cpu_atom/cpu-cycles,aux-output/pp}' -C8
Error:
The sys_perf_event_open() syscall returned with 22 (Invalid argument)
for event (cpu_atom/cpu-cycles,aux-output/pp).
"dmesg | grep -i perf" may provide additional information.

The "PEBS-via-PT" is printed if the corresponding bit of per-PMU
capabilities is set. Since the feature is supported by the e-core HW,
perf sets the bit for e-core. However, for Intel PT, if a feature is not
supported on all CPUs, it is not supported at all. The PEBS-via-PT event
cannot be created successfully.

The PEBS-via-PT is no longer enumerated on the latest hybrid platform. It
will be deprecated on future platforms with Arch PEBS. Let's remove it
from the existing hybrid platforms.

Fixes: d9977c43bff8 ("perf/x86: Register hybrid PMUs")
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20250129154820.3755948-2-kan.liang@linux.intel.com

authored by Kan Liang and committed by Peter Zijlstra 0a556150 469c76a8

+9 -11
-10
arch/x86/events/intel/core.c
··· 4941 else 4942 pmu->intel_ctrl &= ~(1ULL << GLOBAL_CTRL_EN_PERF_METRICS); 4943 4944 - if (pmu->intel_cap.pebs_output_pt_available) 4945 - pmu->pmu.capabilities |= PERF_PMU_CAP_AUX_OUTPUT; 4946 - else 4947 - pmu->pmu.capabilities &= ~PERF_PMU_CAP_AUX_OUTPUT; 4948 - 4949 intel_pmu_check_event_constraints(pmu->event_constraints, 4950 pmu->cntr_mask64, 4951 pmu->fixed_cntr_mask64, ··· 5017 return false; 5018 5019 pr_info("%s PMU driver: ", pmu->name); 5020 - 5021 - if (pmu->intel_cap.pebs_output_pt_available) 5022 - pr_cont("PEBS-via-PT "); 5023 5024 pr_cont("\n"); 5025 ··· 6362 pmu->intel_cap.capabilities = x86_pmu.intel_cap.capabilities; 6363 if (pmu->pmu_type & hybrid_small_tiny) { 6364 pmu->intel_cap.perf_metrics = 0; 6365 - pmu->intel_cap.pebs_output_pt_available = 1; 6366 pmu->mid_ack = true; 6367 } else if (pmu->pmu_type & hybrid_big) { 6368 pmu->intel_cap.perf_metrics = 1; 6369 - pmu->intel_cap.pebs_output_pt_available = 0; 6370 pmu->late_ack = true; 6371 } 6372 }
··· 4941 else 4942 pmu->intel_ctrl &= ~(1ULL << GLOBAL_CTRL_EN_PERF_METRICS); 4943 4944 intel_pmu_check_event_constraints(pmu->event_constraints, 4945 pmu->cntr_mask64, 4946 pmu->fixed_cntr_mask64, ··· 5022 return false; 5023 5024 pr_info("%s PMU driver: ", pmu->name); 5025 5026 pr_cont("\n"); 5027 ··· 6370 pmu->intel_cap.capabilities = x86_pmu.intel_cap.capabilities; 6371 if (pmu->pmu_type & hybrid_small_tiny) { 6372 pmu->intel_cap.perf_metrics = 0; 6373 pmu->mid_ack = true; 6374 } else if (pmu->pmu_type & hybrid_big) { 6375 pmu->intel_cap.perf_metrics = 1; 6376 pmu->late_ack = true; 6377 } 6378 }
+9 -1
arch/x86/events/intel/ds.c
··· 2578 } 2579 pr_cont("PEBS fmt4%c%s, ", pebs_type, pebs_qual); 2580 2581 - if (!is_hybrid() && x86_pmu.intel_cap.pebs_output_pt_available) { 2582 pr_cont("PEBS-via-PT, "); 2583 x86_get_pmu(smp_processor_id())->capabilities |= PERF_PMU_CAP_AUX_OUTPUT; 2584 }
··· 2578 } 2579 pr_cont("PEBS fmt4%c%s, ", pebs_type, pebs_qual); 2580 2581 + /* 2582 + * The PEBS-via-PT is not supported on hybrid platforms, 2583 + * because not all CPUs of a hybrid machine support it. 2584 + * The global x86_pmu.intel_cap, which only contains the 2585 + * common capabilities, is used to check the availability 2586 + * of the feature. The per-PMU pebs_output_pt_available 2587 + * in a hybrid machine should be ignored. 2588 + */ 2589 + if (x86_pmu.intel_cap.pebs_output_pt_available) { 2590 pr_cont("PEBS-via-PT, "); 2591 x86_get_pmu(smp_processor_id())->capabilities |= PERF_PMU_CAP_AUX_OUTPUT; 2592 }