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dt-bindings: clock: mediatek: convert SSUSBSYS to the json-schema clock

This helps validating DTS files. Introduced changes:
1. Documented "reg" property
2. Dropped "syscon" as it was incorrectly used
3. Adjusted nodename, "compatible" and "reg" in example

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240214061233.24645-4-zajec5@gmail.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

authored by

Rafał Miłecki and committed by
Stephen Boyd
0a0156fe e77c6359

+45 -25
-25
Documentation/devicetree/bindings/arm/mediatek/mediatek,ssusbsys.txt
··· 1 - MediaTek SSUSBSYS controller 2 - ============================ 3 - 4 - The MediaTek SSUSBSYS controller provides various clocks to the system. 5 - 6 - Required Properties: 7 - 8 - - compatible: Should be: 9 - - "mediatek,mt7622-ssusbsys", "syscon" 10 - - "mediatek,mt7629-ssusbsys", "syscon" 11 - - #clock-cells: Must be 1 12 - - #reset-cells: Must be 1 13 - 14 - The SSUSBSYS controller uses the common clk binding from 15 - Documentation/devicetree/bindings/clock/clock-bindings.txt 16 - The available clocks are defined in dt-bindings/clock/mt*-clk.h. 17 - 18 - Example: 19 - 20 - ssusbsys: ssusbsys@1a000000 { 21 - compatible = "mediatek,mt7622-ssusbsys", "syscon"; 22 - reg = <0 0x1a000000 0 0x1000>; 23 - #clock-cells = <1>; 24 - #reset-cells = <1>; 25 - };
+45
Documentation/devicetree/bindings/clock/mediatek,mt7622-ssusbsys.yaml
··· 1 + # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2 + %YAML 1.2 3 + --- 4 + $id: http://devicetree.org/schemas/clock/mediatek,mt7622-ssusbsys.yaml# 5 + $schema: http://devicetree.org/meta-schemas/core.yaml# 6 + 7 + title: MediaTek SSUSBSYS clock and reset controller 8 + 9 + description: 10 + The MediaTek SSUSBSYS controller provides various clocks to the system. 11 + 12 + maintainers: 13 + - Matthias Brugger <matthias.bgg@gmail.com> 14 + 15 + properties: 16 + compatible: 17 + enum: 18 + - mediatek,mt7622-ssusbsys 19 + - mediatek,mt7629-ssusbsys 20 + 21 + reg: 22 + maxItems: 1 23 + 24 + "#clock-cells": 25 + const: 1 26 + description: The available clocks are defined in dt-bindings/clock/mt*-clk.h 27 + 28 + "#reset-cells": 29 + const: 1 30 + 31 + required: 32 + - reg 33 + - "#clock-cells" 34 + - "#reset-cells" 35 + 36 + additionalProperties: false 37 + 38 + examples: 39 + - | 40 + clock-controller@1a000000 { 41 + compatible = "mediatek,mt7622-ssusbsys"; 42 + reg = <0x1a000000 0x1000>; 43 + #clock-cells = <1>; 44 + #reset-cells = <1>; 45 + };