Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

clk: rockchip: rename rk3228 sclk_macphy_50m to sclk_mac_extclk

The sclk_macphy_50m is confusing, the sclk_mac_extclk describes
a external clock clearly.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>

authored by

Xing Zheng and committed by
Heiko Stuebner
09f68422 a45c072b

+3 -3
+3 -3
drivers/clk/rockchip/clk-rk3228.c
··· 151 151 PNAME(mux_uart1_p) = { "uart1_src", "uart1_frac", "xin24m" }; 152 152 PNAME(mux_uart2_p) = { "uart2_src", "uart2_frac", "xin24m" }; 153 153 154 - PNAME(mux_sclk_macphy_50m_p) = { "ext_gmac", "phy_50m_out" }; 155 - PNAME(mux_sclk_gmac_pre_p) = { "sclk_gmac_src", "sclk_macphy_50m" }; 154 + PNAME(mux_sclk_mac_extclk_p) = { "ext_gmac", "phy_50m_out" }; 155 + PNAME(mux_sclk_gmac_pre_p) = { "sclk_gmac_src", "sclk_mac_extclk" }; 156 156 PNAME(mux_sclk_macphy_p) = { "sclk_gmac_src", "ext_gmac" }; 157 157 158 158 static struct rockchip_pll_clock rk3228_pll_clks[] __initdata = { ··· 502 502 COMPOSITE(0, "sclk_gmac_src", mux_pll_src_2plls_p, 0, 503 503 RK2928_CLKSEL_CON(5), 7, 1, MFLAGS, 0, 5, DFLAGS, 504 504 RK2928_CLKGATE_CON(1), 7, GFLAGS), 505 - MUX(0, "sclk_macphy_50m", mux_sclk_macphy_50m_p, 0, 505 + MUX(0, "sclk_mac_extclk", mux_sclk_mac_extclk_p, 0, 506 506 RK2928_CLKSEL_CON(29), 10, 1, MFLAGS), 507 507 MUX(0, "sclk_gmac_pre", mux_sclk_gmac_pre_p, 0, 508 508 RK2928_CLKSEL_CON(5), 5, 1, MFLAGS),