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ARM: dts: r8a7740: Rename the serial port clock to fck

The clock is really the device functional clock, not the interface
clock. Rename it.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>

authored by

Laurent Pinchart and committed by
Simon Horman 0995b9a8 d4be2f1b

+9 -9
+9 -9
arch/arm/boot/dts/r8a7740.dtsi
··· 214 214 reg = <0xe6c40000 0x100>; 215 215 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; 216 216 clocks = <&mstp2_clks R8A7740_CLK_SCIFA0>; 217 - clock-names = "sci_ick"; 217 + clock-names = "fck"; 218 218 power-domains = <&pd_a3sp>; 219 219 status = "disabled"; 220 220 }; ··· 224 224 reg = <0xe6c50000 0x100>; 225 225 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; 226 226 clocks = <&mstp2_clks R8A7740_CLK_SCIFA1>; 227 - clock-names = "sci_ick"; 227 + clock-names = "fck"; 228 228 power-domains = <&pd_a3sp>; 229 229 status = "disabled"; 230 230 }; ··· 234 234 reg = <0xe6c60000 0x100>; 235 235 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 236 236 clocks = <&mstp2_clks R8A7740_CLK_SCIFA2>; 237 - clock-names = "sci_ick"; 237 + clock-names = "fck"; 238 238 power-domains = <&pd_a3sp>; 239 239 status = "disabled"; 240 240 }; ··· 244 244 reg = <0xe6c70000 0x100>; 245 245 interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; 246 246 clocks = <&mstp2_clks R8A7740_CLK_SCIFA3>; 247 - clock-names = "sci_ick"; 247 + clock-names = "fck"; 248 248 power-domains = <&pd_a3sp>; 249 249 status = "disabled"; 250 250 }; ··· 254 254 reg = <0xe6c80000 0x100>; 255 255 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 256 256 clocks = <&mstp2_clks R8A7740_CLK_SCIFA4>; 257 - clock-names = "sci_ick"; 257 + clock-names = "fck"; 258 258 power-domains = <&pd_a3sp>; 259 259 status = "disabled"; 260 260 }; ··· 264 264 reg = <0xe6cb0000 0x100>; 265 265 interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; 266 266 clocks = <&mstp2_clks R8A7740_CLK_SCIFA5>; 267 - clock-names = "sci_ick"; 267 + clock-names = "fck"; 268 268 power-domains = <&pd_a3sp>; 269 269 status = "disabled"; 270 270 }; ··· 274 274 reg = <0xe6cc0000 0x100>; 275 275 interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; 276 276 clocks = <&mstp2_clks R8A7740_CLK_SCIFA6>; 277 - clock-names = "sci_ick"; 277 + clock-names = "fck"; 278 278 power-domains = <&pd_a3sp>; 279 279 status = "disabled"; 280 280 }; ··· 284 284 reg = <0xe6cd0000 0x100>; 285 285 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 286 286 clocks = <&mstp2_clks R8A7740_CLK_SCIFA7>; 287 - clock-names = "sci_ick"; 287 + clock-names = "fck"; 288 288 power-domains = <&pd_a3sp>; 289 289 status = "disabled"; 290 290 }; ··· 294 294 reg = <0xe6c30000 0x100>; 295 295 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 296 296 clocks = <&mstp2_clks R8A7740_CLK_SCIFB>; 297 - clock-names = "sci_ick"; 297 + clock-names = "fck"; 298 298 power-domains = <&pd_a3sp>; 299 299 status = "disabled"; 300 300 };