Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

Staging: cxt1e1: Fix space prohibited between function name and open parenthesis '('

This patch fixes the following checkpatch.pl warning in functions.c
WARNING: space prohibited between function name and open parenthesis '('

Signed-off-by: Monam Agarwal <monamagarwal123@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Monam Agarwal and committed by
Greg Kroah-Hartman
08e624a0 bc4d6daf

+57 -57
+57 -57
drivers/staging/cxt1e1/functions.c
··· 33 33 34 34 #if _v7_hdlc_ 35 35 #define V7(x) (x ## _v7) 36 - extern int hdlc_netif_rx_v7 (hdlc_device *, struct sk_buff *); 37 - extern int register_hdlc_device_v7 (hdlc_device *); 38 - extern int unregister_hdlc_device_v7 (hdlc_device *); 36 + extern int hdlc_netif_rx_v7(hdlc_device *, struct sk_buff *); 37 + extern int register_hdlc_device_v7(hdlc_device *); 38 + extern int unregister_hdlc_device_v7(hdlc_device *); 39 39 40 40 #else 41 41 #define V7(x) x ··· 53 53 54 54 #if 1 55 55 u_int32_t 56 - pci_read_32 (u_int32_t *p) 56 + pci_read_32(u_int32_t *p) 57 57 { 58 58 #ifdef FLOW_DEBUG 59 59 u_int32_t v; 60 60 61 - FLUSH_PCI_READ (); 62 - v = le32_to_cpu (*p); 61 + FLUSH_PCI_READ(); 62 + v = le32_to_cpu(*p); 63 63 if (cxt1e1_log_level >= LOG_DEBUG) 64 64 pr_info("pci_read : %x = %x\n", (u_int32_t) p, v); 65 65 return v; 66 66 #else 67 - FLUSH_PCI_READ (); /* */ 68 - return le32_to_cpu (*p); 67 + FLUSH_PCI_READ(); /* */ 68 + return le32_to_cpu(*p); 69 69 #endif 70 70 } 71 71 72 72 void 73 - pci_write_32 (u_int32_t *p, u_int32_t v) 73 + pci_write_32(u_int32_t *p, u_int32_t v) 74 74 { 75 75 #ifdef FLOW_DEBUG 76 76 if (cxt1e1_log_level >= LOG_DEBUG) 77 77 pr_info("pci_write: %x = %x\n", (u_int32_t) p, v); 78 78 #endif 79 79 *p = cpu_to_le32 (v); 80 - FLUSH_PCI_WRITE (); /* This routine is called from routines 80 + FLUSH_PCI_WRITE(); /* This routine is called from routines 81 81 * which do multiple register writes 82 82 * which themselves need flushing between 83 83 * writes in order to guarantee write ··· 90 90 91 91 92 92 void 93 - pci_flush_write (ci_t *ci) 93 + pci_flush_write(ci_t *ci) 94 94 { 95 95 volatile u_int32_t v; 96 96 ··· 105 105 106 106 107 107 static void 108 - watchdog_func (unsigned long arg) 108 + watchdog_func(unsigned long arg) 109 109 { 110 110 struct watchdog *wd = (void *) arg; 111 111 ··· 114 114 pr_warning("%s: drvr not available (%x)\n", __func__, drvr_state); 115 115 return; 116 116 } 117 - schedule_work (&wd->work); 118 - mod_timer (&wd->h, jiffies + wd->ticks); 117 + schedule_work(&wd->work); 118 + mod_timer(&wd->h, jiffies + wd->ticks); 119 119 } 120 120 121 121 int OS_init_watchdog(struct watchdog *wdp, void (*f) (void *), void *c, int usec) ··· 124 124 wdp->softc = c; 125 125 wdp->ticks = (HZ) * (usec / 1000) / 1000; 126 126 INIT_WORK(&wdp->work, (void *)f); 127 - init_timer (&wdp->h); 127 + init_timer(&wdp->h); 128 128 { 129 129 ci_t *ci = (ci_t *) c; 130 130 ··· 135 135 } 136 136 137 137 void 138 - OS_uwait (int usec, char *description) 138 + OS_uwait(int usec, char *description) 139 139 { 140 140 int tmp; 141 141 142 142 if (usec >= 1000) { 143 - mdelay (usec / 1000); 143 + mdelay(usec / 1000); 144 144 /* now delay residual */ 145 145 tmp = (usec / 1000) * 1000; /* round */ 146 146 tmp = usec - tmp; /* residual */ 147 147 if (tmp) { /* wait on residual */ 148 - udelay (tmp); 148 + udelay(tmp); 149 149 } 150 150 } else { 151 - udelay (usec); 151 + udelay(usec); 152 152 } 153 153 } 154 154 ··· 157 157 */ 158 158 159 159 void 160 - OS_uwait_dummy (void) 160 + OS_uwait_dummy(void) 161 161 { 162 162 #ifndef USE_MAX_INT_DELAY 163 163 dummy++; 164 164 #else 165 - udelay (1); 165 + udelay(1); 166 166 #endif 167 167 } 168 168 169 169 170 170 void 171 - OS_sem_init (void *sem, int state) 171 + OS_sem_init(void *sem, int state) 172 172 { 173 173 switch (state) { 174 174 case SEM_TAKEN: ··· 179 179 break; 180 180 default: /* otherwise, set sem.count to state's 181 181 * value */ 182 - sema_init (sem, state); 182 + sema_init(sem, state); 183 183 break; 184 184 } 185 185 } 186 186 187 187 188 188 int 189 - sd_line_is_ok (void *user) 189 + sd_line_is_ok(void *user) 190 190 { 191 191 struct net_device *ndev = (struct net_device *) user; 192 192 193 - return netif_carrier_ok (ndev); 193 + return netif_carrier_ok(ndev); 194 194 } 195 195 196 196 void 197 - sd_line_is_up (void *user) 197 + sd_line_is_up(void *user) 198 198 { 199 199 struct net_device *ndev = (struct net_device *) user; 200 200 201 - netif_carrier_on (ndev); 201 + netif_carrier_on(ndev); 202 202 return; 203 203 } 204 204 205 205 void 206 - sd_line_is_down (void *user) 206 + sd_line_is_down(void *user) 207 207 { 208 208 struct net_device *ndev = (struct net_device *) user; 209 209 210 - netif_carrier_off (ndev); 210 + netif_carrier_off(ndev); 211 211 return; 212 212 } 213 213 214 214 void 215 - sd_disable_xmit (void *user) 215 + sd_disable_xmit(void *user) 216 216 { 217 217 struct net_device *dev = (struct net_device *) user; 218 218 219 - netif_stop_queue (dev); 219 + netif_stop_queue(dev); 220 220 return; 221 221 } 222 222 223 223 void 224 - sd_enable_xmit (void *user) 224 + sd_enable_xmit(void *user) 225 225 { 226 226 struct net_device *dev = (struct net_device *) user; 227 227 228 - netif_wake_queue (dev); 228 + netif_wake_queue(dev); 229 229 return; 230 230 } 231 231 232 232 int 233 - sd_queue_stopped (void *user) 233 + sd_queue_stopped(void *user) 234 234 { 235 235 struct net_device *ndev = (struct net_device *) user; 236 236 237 - return netif_queue_stopped (ndev); 237 + return netif_queue_stopped(ndev); 238 238 } 239 239 240 240 void sd_recv_consume(void *token, size_t len, void *user) ··· 243 243 struct sk_buff *skb = token; 244 244 245 245 skb->dev = ndev; 246 - skb_put (skb, len); 246 + skb_put(skb, len); 247 247 skb->protocol = hdlc_type_trans(skb, ndev); 248 248 netif_rx(skb); 249 249 } ··· 258 258 259 259 extern ci_t *CI; /* dummy pointer to board ZERO's data */ 260 260 void 261 - VMETRO_TRIGGER (ci_t *ci, int x) 261 + VMETRO_TRIGGER(ci_t *ci, int x) 262 262 { 263 263 struct s_comet_reg *comet; 264 264 volatile u_int32_t data; ··· 268 268 switch (x) { 269 269 default: 270 270 case 0: 271 - data = pci_read_32 ((u_int32_t *) &comet->__res24); /* 0x90 */ 271 + data = pci_read_32((u_int32_t *) &comet->__res24); /* 0x90 */ 272 272 break; 273 273 case 1: 274 - data = pci_read_32 ((u_int32_t *) &comet->__res25); /* 0x94 */ 274 + data = pci_read_32((u_int32_t *) &comet->__res25); /* 0x94 */ 275 275 break; 276 276 case 2: 277 - data = pci_read_32 ((u_int32_t *) &comet->__res26); /* 0x98 */ 277 + data = pci_read_32((u_int32_t *) &comet->__res26); /* 0x98 */ 278 278 break; 279 279 case 3: 280 - data = pci_read_32 ((u_int32_t *) &comet->__res27); /* 0x9C */ 280 + data = pci_read_32((u_int32_t *) &comet->__res27); /* 0x9C */ 281 281 break; 282 282 case 4: 283 - data = pci_read_32 ((u_int32_t *) &comet->__res88); /* 0x220 */ 283 + data = pci_read_32((u_int32_t *) &comet->__res88); /* 0x220 */ 284 284 break; 285 285 case 5: 286 - data = pci_read_32 ((u_int32_t *) &comet->__res89); /* 0x224 */ 286 + data = pci_read_32((u_int32_t *) &comet->__res89); /* 0x224 */ 287 287 break; 288 288 case 6: 289 - data = pci_read_32 ((u_int32_t *) &comet->__res8A); /* 0x228 */ 289 + data = pci_read_32((u_int32_t *) &comet->__res8A); /* 0x228 */ 290 290 break; 291 291 case 7: 292 - data = pci_read_32 ((u_int32_t *) &comet->__res8B); /* 0x22C */ 292 + data = pci_read_32((u_int32_t *) &comet->__res8B); /* 0x22C */ 293 293 break; 294 294 case 8: 295 - data = pci_read_32 ((u_int32_t *) &comet->__resA0); /* 0x280 */ 295 + data = pci_read_32((u_int32_t *) &comet->__resA0); /* 0x280 */ 296 296 break; 297 297 case 9: 298 - data = pci_read_32 ((u_int32_t *) &comet->__resA1); /* 0x284 */ 298 + data = pci_read_32((u_int32_t *) &comet->__resA1); /* 0x284 */ 299 299 break; 300 300 case 10: 301 - data = pci_read_32 ((u_int32_t *) &comet->__resA2); /* 0x288 */ 301 + data = pci_read_32((u_int32_t *) &comet->__resA2); /* 0x288 */ 302 302 break; 303 303 case 11: 304 - data = pci_read_32 ((u_int32_t *) &comet->__resA3); /* 0x28C */ 304 + data = pci_read_32((u_int32_t *) &comet->__resA3); /* 0x28C */ 305 305 break; 306 306 case 12: 307 - data = pci_read_32 ((u_int32_t *) &comet->__resA4); /* 0x290 */ 307 + data = pci_read_32((u_int32_t *) &comet->__resA4); /* 0x290 */ 308 308 break; 309 309 case 13: 310 - data = pci_read_32 ((u_int32_t *) &comet->__resA5); /* 0x294 */ 310 + data = pci_read_32((u_int32_t *) &comet->__resA5); /* 0x294 */ 311 311 break; 312 312 case 14: 313 - data = pci_read_32 ((u_int32_t *) &comet->__resA6); /* 0x298 */ 313 + data = pci_read_32((u_int32_t *) &comet->__resA6); /* 0x298 */ 314 314 break; 315 315 case 15: 316 - data = pci_read_32 ((u_int32_t *) &comet->__resA7); /* 0x29C */ 316 + data = pci_read_32((u_int32_t *) &comet->__resA7); /* 0x29C */ 317 317 break; 318 318 case 16: 319 - data = pci_read_32 ((u_int32_t *) &comet->__res74); /* 0x1D0 */ 319 + data = pci_read_32((u_int32_t *) &comet->__res74); /* 0x1D0 */ 320 320 break; 321 321 case 17: 322 - data = pci_read_32 ((u_int32_t *) &comet->__res75); /* 0x1D4 */ 322 + data = pci_read_32((u_int32_t *) &comet->__res75); /* 0x1D4 */ 323 323 break; 324 324 case 18: 325 - data = pci_read_32 ((u_int32_t *) &comet->__res76); /* 0x1D8 */ 325 + data = pci_read_32((u_int32_t *) &comet->__res76); /* 0x1D8 */ 326 326 break; 327 327 case 19: 328 - data = pci_read_32 ((u_int32_t *) &comet->__res77); /* 0x1DC */ 328 + data = pci_read_32((u_int32_t *) &comet->__res77); /* 0x1DC */ 329 329 break; 330 330 } 331 331 }