[ARM] 4264/1: ldrex/strex syntax errors with recent compilers

Trying to build some code using atomic_clear_mask() on a ARM v6
processor with a recent compiler (tried with gcc version 4.1.1
(CodeSourcery ARM Sourcery G++ 2006q3-26), but
all gcc > 4.1 might be affected) results in the following:

/tmp/ccWKLJV8.s: Assembler messages:
/tmp/ccWKLJV8.s:581: Error: instruction does not accept this addressing
mode -- `ldrex r0,r3'
/tmp/ccWKLJV8.s:583: Error: instruction does not accept this addressing
mode -- `strex r1,r0,r3'

Older gcc (like gcc version 4.0.0 (DENX ELDK 4.1 4.0.0)) have no problem
with this.

The patch below fixes the compile error. I also verified that gcc-4.0.0 generates identical code using both forms.

Signed-off-by: Stelian Pop <stelian@popies.net>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

authored by Stelian Pop and committed by Russell King 0803c30c 66fb8bd2

+2 -2
+2 -2
include/asm-arm/atomic.h
··· 103 103 unsigned long tmp, tmp2; 104 104 105 105 __asm__ __volatile__("@ atomic_clear_mask\n" 106 - "1: ldrex %0, %2\n" 106 + "1: ldrex %0, [%2]\n" 107 107 " bic %0, %0, %3\n" 108 - " strex %1, %0, %2\n" 108 + " strex %1, %0, [%2]\n" 109 109 " teq %1, #0\n" 110 110 " bne 1b" 111 111 : "=&r" (tmp), "=&r" (tmp2)