Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
tjh.dev
kernel
os
linux
twl-regulator: Add all twl4030 regulators to twlreg_info
Define all twl4030 regulators in the twlreg_info table, along with
appropriate VSEL tables for adjustable regulators
Signed-off-by: Juha Keski-Saari <ext-juha.1.keski-saari@nokia.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
authored by Juha Keski-Saari and committed by Liam Girdwood 07fc493f 735eb93a
+17
-9
drivers/regulator/twl-regulator.c
+17
-9
drivers/regulator/twl-regulator.c
···
294
static const u16 VDAC_VSEL_table[] = {
295
1200, 1300, 1800, 1800,
296
};
297
static const u16 VAUX1_6030_VSEL_table[] = {
298
1000, 1300, 1800, 2500,
299
2800, 2900, 3000, 3000,
···
476
TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4),
477
TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5),
478
TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6),
479
-
/*
480
TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7),
481
-
*/
482
TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8),
483
TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9),
484
TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10),
485
-
/*
486
-
TWL4030_ADJUSTABLE_LDO(VINTANA1, 0x3f, 11),
487
TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12),
488
-
TWL4030_ADJUSTABLE_LDO(VINTDIG, 0x47, 13),
489
-
TWL4030_SMPS(VIO, 0x4b, 14),
490
-
TWL4030_SMPS(VDD1, 0x55, 15),
491
-
TWL4030_SMPS(VDD2, 0x63, 16),
492
-
*/
493
TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17),
494
TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18),
495
TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19),
···
294
static const u16 VDAC_VSEL_table[] = {
295
1200, 1300, 1800, 1800,
296
};
297
+
static const u16 VDD1_VSEL_table[] = {
298
+
800, 1450,
299
+
};
300
+
static const u16 VDD2_VSEL_table[] = {
301
+
800, 1450, 1500,
302
+
};
303
+
static const u16 VIO_VSEL_table[] = {
304
+
1800, 1850,
305
+
};
306
+
static const u16 VINTANA2_VSEL_table[] = {
307
+
2500, 2750,
308
+
};
309
static const u16 VAUX1_6030_VSEL_table[] = {
310
1000, 1300, 1800, 2500,
311
2800, 2900, 3000, 3000,
···
464
TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4),
465
TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5),
466
TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6),
467
TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7),
468
TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8),
469
TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9),
470
TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10),
471
+
TWL4030_FIXED_LDO(VINTANA1, 0x3f, 11),
472
TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12),
473
+
TWL4030_FIXED_LDO(VINTDIG, 0x47, 13),
474
+
TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14),
475
+
TWL4030_ADJUSTABLE_LDO(VDD1, 0x55, 15),
476
+
TWL4030_ADJUSTABLE_LDO(VDD2, 0x63, 16),
477
TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17),
478
TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18),
479
TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19),