Merge branch 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6

* 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6:
[PATCH] forcedeth: fix initialization
[PATCH] sky2: version 1.2
[PATCH] sky2: reset function can be devinit
[PATCH] sky2: use ALIGN() macro
[PATCH] sky2: add fake idle irq timer
[PATCH] sky2: reschedule if irq still pending
[PATCH] bcm43xx: make PIO mode usable
[PATCH] bcm43xx: add to MAINTAINERS
[PATCH] softmac: fix SIOCSIWAP
[PATCH] Fix crash on big-endian systems during scan
e1000: Update truesize with the length of the packet for packet split
[PATCH] Fix locking in gianfar

+354 -147
+8
MAINTAINERS
··· 421 W: http://www.baycom.org/~tom/ham/ham.html 422 S: Maintained 423 424 BEFS FILE SYSTEM 425 P: Sergey S. Kostyliov 426 M: rathamahata@php4.ru
··· 421 W: http://www.baycom.org/~tom/ham/ham.html 422 S: Maintained 423 424 + BCM43XX WIRELESS DRIVER 425 + P: Michael Buesch 426 + M: mb@bu3sch.de 427 + P: Stefano Brivio 428 + M: st3@riseup.net 429 + W: http://bcm43xx.berlios.de/ 430 + S: Maintained 431 + 432 BEFS FILE SYSTEM 433 P: Sergey S. Kostyliov 434 M: rathamahata@php4.ru
+1
drivers/net/e1000/e1000_main.c
··· 3768 ps_page->ps_page[j] = NULL; 3769 skb->len += length; 3770 skb->data_len += length; 3771 } 3772 3773 copydone:
··· 3768 ps_page->ps_page[j] = NULL; 3769 skb->len += length; 3770 skb->data_len += length; 3771 + skb->truesize += length; 3772 } 3773 3774 copydone:
+67 -12
drivers/net/forcedeth.c
··· 105 * 0.50: 20 Jan 2006: Add 8021pq tagging support. 106 * 0.51: 20 Jan 2006: Add 64bit consistent memory allocation for rings. 107 * 0.52: 20 Jan 2006: Add MSI/MSIX support. 108 * 109 * Known bugs: 110 * We suspect that on some hardware no TX done interrupts are generated. ··· 117 * DEV_NEED_TIMERIRQ will not harm you on sane hardware, only generating a few 118 * superfluous timer interrupts from the nic. 119 */ 120 - #define FORCEDETH_VERSION "0.52" 121 #define DRV_NAME "forcedeth" 122 123 #include <linux/module.h> ··· 161 #define DEV_HAS_VLAN 0x0020 /* device supports vlan tagging and striping */ 162 #define DEV_HAS_MSI 0x0040 /* device supports MSI */ 163 #define DEV_HAS_MSI_X 0x0080 /* device supports MSI-X */ 164 165 enum { 166 NvRegIrqStatus = 0x000, ··· 205 #define NVREG_MISC1_HD 0x02 206 #define NVREG_MISC1_FORCE 0x3b0f3c 207 208 NvRegTransmitterControl = 0x084, 209 #define NVREG_XMITCTL_START 0x01 210 NvRegTransmitterStatus = 0x088, ··· 330 NvRegMSIXMap0 = 0x3e0, 331 NvRegMSIXMap1 = 0x3e4, 332 NvRegMSIXIrqStatus = 0x3f0, 333 }; 334 335 /* Big endian: should work, but is untested */ ··· 422 #define NV_RX3_VLAN_TAG_MASK (0x0000FFFF) 423 424 /* Miscelaneous hardware related defines: */ 425 - #define NV_PCI_REGSZ 0x270 426 427 /* various timeout delays: all in usec */ 428 #define NV_TXRX_RESET_DELAY 4 ··· 440 #define NV_MIIBUSY_DELAY 50 441 #define NV_MIIPHY_DELAY 10 442 #define NV_MIIPHY_DELAYMAX 10000 443 444 #define NV_WAKEUPPATTERNS 5 445 #define NV_WAKEUPMASKENTRIES 4 ··· 562 u32 desc_ver; 563 u32 txrxctl_bits; 564 u32 vlanctl_bits; 565 566 void __iomem *base; 567 ··· 927 writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET | np->txrxctl_bits, base + NvRegTxRxControl); 928 pci_push(base); 929 udelay(NV_TXRX_RESET_DELAY); 930 writel(NVREG_TXRXCTL_BIT2 | np->txrxctl_bits, base + NvRegTxRxControl); 931 pci_push(base); 932 } ··· 1361 dev->name, (unsigned long)np->ring_addr, 1362 np->next_tx, np->nic_tx); 1363 printk(KERN_INFO "%s: Dumping tx registers\n", dev->name); 1364 - for (i=0;i<0x400;i+= 32) { 1365 printk(KERN_INFO "%3x: %08x %08x %08x %08x %08x %08x %08x %08x\n", 1366 i, 1367 readl(base + i + 0), readl(base + i + 4), ··· 2518 } 2519 2520 #define FORCEDETH_REGS_VER 1 2521 - #define FORCEDETH_REGS_SIZE 0x400 /* 256 32-bit registers */ 2522 2523 static int nv_get_regs_len(struct net_device *dev) 2524 { 2525 - return FORCEDETH_REGS_SIZE; 2526 } 2527 2528 static void nv_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *buf) ··· 2534 2535 regs->version = FORCEDETH_REGS_VER; 2536 spin_lock_irq(&np->lock); 2537 - for (i=0;i<FORCEDETH_REGS_SIZE/sizeof(u32);i++) 2538 rbuf[i] = readl(base + i*sizeof(u32)); 2539 spin_unlock_irq(&np->lock); 2540 } ··· 2638 dprintk(KERN_DEBUG "nv_open: begin\n"); 2639 2640 /* 1) erase previous misconfiguration */ 2641 /* 4.1-1: stop adapter: ignored, 4.3 seems to be overkill */ 2642 writel(NVREG_MCASTADDRA_FORCE, base + NvRegMulticastAddrA); 2643 writel(0, base + NvRegMulticastAddrB); ··· 2910 unsigned long addr; 2911 u8 __iomem *base; 2912 int err, i; 2913 2914 dev = alloc_etherdev(sizeof(struct fe_priv)); 2915 err = -ENOMEM; ··· 2943 if (err < 0) 2944 goto out_disable; 2945 2946 err = -EINVAL; 2947 addr = 0; 2948 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { ··· 2956 pci_resource_len(pci_dev, i), 2957 pci_resource_flags(pci_dev, i)); 2958 if (pci_resource_flags(pci_dev, i) & IORESOURCE_MEM && 2959 - pci_resource_len(pci_dev, i) >= NV_PCI_REGSZ) { 2960 addr = pci_resource_start(pci_dev, i); 2961 break; 2962 } ··· 2966 pci_name(pci_dev)); 2967 goto out_relreg; 2968 } 2969 2970 /* handle different descriptor versions */ 2971 if (id->driver_data & DEV_HAS_HIGH_DMA) { ··· 3027 } 3028 3029 err = -ENOMEM; 3030 - np->base = ioremap(addr, NV_PCI_REGSZ); 3031 if (!np->base) 3032 goto out_relreg; 3033 dev->base_addr = (unsigned long)np->base; ··· 3102 /* disable WOL */ 3103 writel(0, base + NvRegWakeUpFlags); 3104 np->wolenabled = 0; 3105 3106 if (np->desc_ver == DESC_VER_1) { 3107 np->tx_flags = NV_TX_VALID; ··· 3278 }, 3279 { /* MCP51 Ethernet Controller */ 3280 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_12), 3281 - .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA, 3282 }, 3283 { /* MCP51 Ethernet Controller */ 3284 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_13), 3285 - .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA, 3286 }, 3287 { /* MCP55 Ethernet Controller */ 3288 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_14), 3289 - .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X, 3290 }, 3291 { /* MCP55 Ethernet Controller */ 3292 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_15), 3293 - .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X, 3294 }, 3295 {0,}, 3296 };
··· 105 * 0.50: 20 Jan 2006: Add 8021pq tagging support. 106 * 0.51: 20 Jan 2006: Add 64bit consistent memory allocation for rings. 107 * 0.52: 20 Jan 2006: Add MSI/MSIX support. 108 + * 0.53: 19 Mar 2006: Fix init from low power mode and add hw reset. 109 * 110 * Known bugs: 111 * We suspect that on some hardware no TX done interrupts are generated. ··· 116 * DEV_NEED_TIMERIRQ will not harm you on sane hardware, only generating a few 117 * superfluous timer interrupts from the nic. 118 */ 119 + #define FORCEDETH_VERSION "0.53" 120 #define DRV_NAME "forcedeth" 121 122 #include <linux/module.h> ··· 160 #define DEV_HAS_VLAN 0x0020 /* device supports vlan tagging and striping */ 161 #define DEV_HAS_MSI 0x0040 /* device supports MSI */ 162 #define DEV_HAS_MSI_X 0x0080 /* device supports MSI-X */ 163 + #define DEV_HAS_POWER_CNTRL 0x0100 /* device supports power savings */ 164 165 enum { 166 NvRegIrqStatus = 0x000, ··· 203 #define NVREG_MISC1_HD 0x02 204 #define NVREG_MISC1_FORCE 0x3b0f3c 205 206 + NvRegMacReset = 0x3c, 207 + #define NVREG_MAC_RESET_ASSERT 0x0F3 208 NvRegTransmitterControl = 0x084, 209 #define NVREG_XMITCTL_START 0x01 210 NvRegTransmitterStatus = 0x088, ··· 326 NvRegMSIXMap0 = 0x3e0, 327 NvRegMSIXMap1 = 0x3e4, 328 NvRegMSIXIrqStatus = 0x3f0, 329 + 330 + NvRegPowerState2 = 0x600, 331 + #define NVREG_POWERSTATE2_POWERUP_MASK 0x0F11 332 + #define NVREG_POWERSTATE2_POWERUP_REV_A3 0x0001 333 }; 334 335 /* Big endian: should work, but is untested */ ··· 414 #define NV_RX3_VLAN_TAG_MASK (0x0000FFFF) 415 416 /* Miscelaneous hardware related defines: */ 417 + #define NV_PCI_REGSZ_VER1 0x270 418 + #define NV_PCI_REGSZ_VER2 0x604 419 420 /* various timeout delays: all in usec */ 421 #define NV_TXRX_RESET_DELAY 4 ··· 431 #define NV_MIIBUSY_DELAY 50 432 #define NV_MIIPHY_DELAY 10 433 #define NV_MIIPHY_DELAYMAX 10000 434 + #define NV_MAC_RESET_DELAY 64 435 436 #define NV_WAKEUPPATTERNS 5 437 #define NV_WAKEUPMASKENTRIES 4 ··· 552 u32 desc_ver; 553 u32 txrxctl_bits; 554 u32 vlanctl_bits; 555 + u32 driver_data; 556 + u32 register_size; 557 558 void __iomem *base; 559 ··· 915 writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET | np->txrxctl_bits, base + NvRegTxRxControl); 916 pci_push(base); 917 udelay(NV_TXRX_RESET_DELAY); 918 + writel(NVREG_TXRXCTL_BIT2 | np->txrxctl_bits, base + NvRegTxRxControl); 919 + pci_push(base); 920 + } 921 + 922 + static void nv_mac_reset(struct net_device *dev) 923 + { 924 + struct fe_priv *np = netdev_priv(dev); 925 + u8 __iomem *base = get_hwbase(dev); 926 + 927 + dprintk(KERN_DEBUG "%s: nv_mac_reset\n", dev->name); 928 + writel(NVREG_TXRXCTL_BIT2 | NVREG_TXRXCTL_RESET | np->txrxctl_bits, base + NvRegTxRxControl); 929 + pci_push(base); 930 + writel(NVREG_MAC_RESET_ASSERT, base + NvRegMacReset); 931 + pci_push(base); 932 + udelay(NV_MAC_RESET_DELAY); 933 + writel(0, base + NvRegMacReset); 934 + pci_push(base); 935 + udelay(NV_MAC_RESET_DELAY); 936 writel(NVREG_TXRXCTL_BIT2 | np->txrxctl_bits, base + NvRegTxRxControl); 937 pci_push(base); 938 } ··· 1331 dev->name, (unsigned long)np->ring_addr, 1332 np->next_tx, np->nic_tx); 1333 printk(KERN_INFO "%s: Dumping tx registers\n", dev->name); 1334 + for (i=0;i<=np->register_size;i+= 32) { 1335 printk(KERN_INFO "%3x: %08x %08x %08x %08x %08x %08x %08x %08x\n", 1336 i, 1337 readl(base + i + 0), readl(base + i + 4), ··· 2488 } 2489 2490 #define FORCEDETH_REGS_VER 1 2491 2492 static int nv_get_regs_len(struct net_device *dev) 2493 { 2494 + struct fe_priv *np = netdev_priv(dev); 2495 + return np->register_size; 2496 } 2497 2498 static void nv_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *buf) ··· 2504 2505 regs->version = FORCEDETH_REGS_VER; 2506 spin_lock_irq(&np->lock); 2507 + for (i = 0;i <= np->register_size/sizeof(u32); i++) 2508 rbuf[i] = readl(base + i*sizeof(u32)); 2509 spin_unlock_irq(&np->lock); 2510 } ··· 2608 dprintk(KERN_DEBUG "nv_open: begin\n"); 2609 2610 /* 1) erase previous misconfiguration */ 2611 + if (np->driver_data & DEV_HAS_POWER_CNTRL) 2612 + nv_mac_reset(dev); 2613 /* 4.1-1: stop adapter: ignored, 4.3 seems to be overkill */ 2614 writel(NVREG_MCASTADDRA_FORCE, base + NvRegMulticastAddrA); 2615 writel(0, base + NvRegMulticastAddrB); ··· 2878 unsigned long addr; 2879 u8 __iomem *base; 2880 int err, i; 2881 + u32 powerstate; 2882 2883 dev = alloc_etherdev(sizeof(struct fe_priv)); 2884 err = -ENOMEM; ··· 2910 if (err < 0) 2911 goto out_disable; 2912 2913 + if (id->driver_data & (DEV_HAS_VLAN|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL)) 2914 + np->register_size = NV_PCI_REGSZ_VER2; 2915 + else 2916 + np->register_size = NV_PCI_REGSZ_VER1; 2917 + 2918 err = -EINVAL; 2919 addr = 0; 2920 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { ··· 2918 pci_resource_len(pci_dev, i), 2919 pci_resource_flags(pci_dev, i)); 2920 if (pci_resource_flags(pci_dev, i) & IORESOURCE_MEM && 2921 + pci_resource_len(pci_dev, i) >= np->register_size) { 2922 addr = pci_resource_start(pci_dev, i); 2923 break; 2924 } ··· 2928 pci_name(pci_dev)); 2929 goto out_relreg; 2930 } 2931 + 2932 + /* copy of driver data */ 2933 + np->driver_data = id->driver_data; 2934 2935 /* handle different descriptor versions */ 2936 if (id->driver_data & DEV_HAS_HIGH_DMA) { ··· 2986 } 2987 2988 err = -ENOMEM; 2989 + np->base = ioremap(addr, np->register_size); 2990 if (!np->base) 2991 goto out_relreg; 2992 dev->base_addr = (unsigned long)np->base; ··· 3061 /* disable WOL */ 3062 writel(0, base + NvRegWakeUpFlags); 3063 np->wolenabled = 0; 3064 + 3065 + if (id->driver_data & DEV_HAS_POWER_CNTRL) { 3066 + u8 revision_id; 3067 + pci_read_config_byte(pci_dev, PCI_REVISION_ID, &revision_id); 3068 + 3069 + /* take phy and nic out of low power mode */ 3070 + powerstate = readl(base + NvRegPowerState2); 3071 + powerstate &= ~NVREG_POWERSTATE2_POWERUP_MASK; 3072 + if ((id->device == PCI_DEVICE_ID_NVIDIA_NVENET_12 || 3073 + id->device == PCI_DEVICE_ID_NVIDIA_NVENET_13) && 3074 + revision_id >= 0xA3) 3075 + powerstate |= NVREG_POWERSTATE2_POWERUP_REV_A3; 3076 + writel(powerstate, base + NvRegPowerState2); 3077 + } 3078 3079 if (np->desc_ver == DESC_VER_1) { 3080 np->tx_flags = NV_TX_VALID; ··· 3223 }, 3224 { /* MCP51 Ethernet Controller */ 3225 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_12), 3226 + .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL, 3227 }, 3228 { /* MCP51 Ethernet Controller */ 3229 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_13), 3230 + .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_HIGH_DMA|DEV_HAS_POWER_CNTRL, 3231 }, 3232 { /* MCP55 Ethernet Controller */ 3233 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_14), 3234 + .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL, 3235 }, 3236 { /* MCP55 Ethernet Controller */ 3237 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_NVENET_15), 3238 + .driver_data = DEV_NEED_TIMERIRQ|DEV_NEED_LINKTIMER|DEV_HAS_LARGEDESC|DEV_HAS_CHECKSUM|DEV_HAS_HIGH_DMA|DEV_HAS_VLAN|DEV_HAS_MSI|DEV_HAS_MSI_X|DEV_HAS_POWER_CNTRL, 3239 }, 3240 {0,}, 3241 };
+28 -28
drivers/net/gianfar.c
··· 210 goto regs_fail; 211 } 212 213 - spin_lock_init(&priv->lock); 214 215 platform_set_drvdata(pdev, dev); 216 ··· 516 phy_stop(priv->phydev); 517 518 /* Lock it down */ 519 - spin_lock_irqsave(&priv->lock, flags); 520 521 gfar_halt(dev); 522 523 - spin_unlock_irqrestore(&priv->lock, flags); 524 525 /* Free the IRQs */ 526 if (priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) { ··· 608 tempval |= DMACTRL_INIT_SETTINGS; 609 gfar_write(&priv->regs->dmactrl, tempval); 610 611 - /* Clear THLT, so that the DMA starts polling now */ 612 - gfar_write(&regs->tstat, TSTAT_CLEAR_THALT); 613 - 614 /* Make sure we aren't stopped */ 615 tempval = gfar_read(&priv->regs->dmactrl); 616 tempval &= ~(DMACTRL_GRS | DMACTRL_GTS); 617 gfar_write(&priv->regs->dmactrl, tempval); 618 619 /* Unmask the interrupts we look for */ 620 gfar_write(&regs->imask, IMASK_DEFAULT); ··· 932 struct txfcb *fcb = NULL; 933 struct txbd8 *txbdp; 934 u16 status; 935 936 /* Update transmit stats */ 937 priv->stats.tx_bytes += skb->len; 938 939 /* Lock priv now */ 940 - spin_lock_irq(&priv->lock); 941 942 /* Point at the first free tx descriptor */ 943 txbdp = priv->cur_tx; ··· 1009 gfar_write(&priv->regs->tstat, TSTAT_CLEAR_THALT); 1010 1011 /* Unlock priv */ 1012 - spin_unlock_irq(&priv->lock); 1013 1014 return 0; 1015 } ··· 1054 unsigned long flags; 1055 u32 tempval; 1056 1057 - spin_lock_irqsave(&priv->lock, flags); 1058 1059 priv->vlgrp = grp; 1060 ··· 1081 gfar_write(&priv->regs->rctrl, tempval); 1082 } 1083 1084 - spin_unlock_irqrestore(&priv->lock, flags); 1085 } 1086 1087 ··· 1090 struct gfar_private *priv = netdev_priv(dev); 1091 unsigned long flags; 1092 1093 - spin_lock_irqsave(&priv->lock, flags); 1094 1095 if (priv->vlgrp) 1096 priv->vlgrp->vlan_devices[vid] = NULL; 1097 1098 - spin_unlock_irqrestore(&priv->lock, flags); 1099 } 1100 1101 ··· 1184 gfar_write(&priv->regs->ievent, IEVENT_TX_MASK); 1185 1186 /* Lock priv */ 1187 - spin_lock(&priv->lock); 1188 bdp = priv->dirty_tx; 1189 while ((bdp->status & TXBD_READY) == 0) { 1190 /* If dirty_tx and cur_tx are the same, then either the */ ··· 1229 else 1230 gfar_write(&priv->regs->txic, 0); 1231 1232 - spin_unlock(&priv->lock); 1233 1234 return IRQ_HANDLED; 1235 } ··· 1310 { 1311 struct net_device *dev = (struct net_device *) dev_id; 1312 struct gfar_private *priv = netdev_priv(dev); 1313 - 1314 #ifdef CONFIG_GFAR_NAPI 1315 u32 tempval; 1316 #endif 1317 1318 /* Clear IEVENT, so rx interrupt isn't called again ··· 1336 } 1337 #else 1338 1339 - spin_lock(&priv->lock); 1340 gfar_clean_rx_ring(dev, priv->rx_ring_size); 1341 1342 /* If we are coalescing interrupts, update the timer */ ··· 1347 else 1348 gfar_write(&priv->regs->rxic, 0); 1349 1350 - spin_unlock(&priv->lock); 1351 #endif 1352 1353 return IRQ_HANDLED; ··· 1496 /* Update the current rxbd pointer to be the next one */ 1497 priv->cur_rx = bdp; 1498 1499 - /* If no packets have arrived since the 1500 - * last one we processed, clear the IEVENT RX and 1501 - * BSY bits so that another interrupt won't be 1502 - * generated when we set IMASK */ 1503 - if (bdp->status & RXBD_EMPTY) 1504 - gfar_write(&priv->regs->ievent, IEVENT_RX_MASK); 1505 - 1506 return howmany; 1507 } 1508 ··· 1515 rx_work_limit -= howmany; 1516 *budget -= howmany; 1517 1518 - if (rx_work_limit >= 0) { 1519 netif_rx_complete(dev); 1520 1521 /* Clear the halt bit in RSTAT */ ··· 1532 gfar_write(&priv->regs->rxic, 0); 1533 } 1534 1535 - return (rx_work_limit < 0) ? 1 : 0; 1536 } 1537 #endif 1538 ··· 1629 struct phy_device *phydev = priv->phydev; 1630 int new_state = 0; 1631 1632 - spin_lock_irqsave(&priv->lock, flags); 1633 if (phydev->link) { 1634 u32 tempval = gfar_read(&regs->maccfg2); 1635 u32 ecntrl = gfar_read(&regs->ecntrl); ··· 1694 if (new_state && netif_msg_link(priv)) 1695 phy_print_status(phydev); 1696 1697 - spin_unlock_irqrestore(&priv->lock, flags); 1698 } 1699 1700 /* Update the hash table based on the current list of multicast
··· 210 goto regs_fail; 211 } 212 213 + spin_lock_init(&priv->txlock); 214 + spin_lock_init(&priv->rxlock); 215 216 platform_set_drvdata(pdev, dev); 217 ··· 515 phy_stop(priv->phydev); 516 517 /* Lock it down */ 518 + spin_lock_irqsave(&priv->txlock, flags); 519 + spin_lock(&priv->rxlock); 520 521 gfar_halt(dev); 522 523 + spin_unlock(&priv->rxlock); 524 + spin_unlock_irqrestore(&priv->txlock, flags); 525 526 /* Free the IRQs */ 527 if (priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) { ··· 605 tempval |= DMACTRL_INIT_SETTINGS; 606 gfar_write(&priv->regs->dmactrl, tempval); 607 608 /* Make sure we aren't stopped */ 609 tempval = gfar_read(&priv->regs->dmactrl); 610 tempval &= ~(DMACTRL_GRS | DMACTRL_GTS); 611 gfar_write(&priv->regs->dmactrl, tempval); 612 + 613 + /* Clear THLT/RHLT, so that the DMA starts polling now */ 614 + gfar_write(&regs->tstat, TSTAT_CLEAR_THALT); 615 + gfar_write(&regs->rstat, RSTAT_CLEAR_RHALT); 616 617 /* Unmask the interrupts we look for */ 618 gfar_write(&regs->imask, IMASK_DEFAULT); ··· 928 struct txfcb *fcb = NULL; 929 struct txbd8 *txbdp; 930 u16 status; 931 + unsigned long flags; 932 933 /* Update transmit stats */ 934 priv->stats.tx_bytes += skb->len; 935 936 /* Lock priv now */ 937 + spin_lock_irqsave(&priv->txlock, flags); 938 939 /* Point at the first free tx descriptor */ 940 txbdp = priv->cur_tx; ··· 1004 gfar_write(&priv->regs->tstat, TSTAT_CLEAR_THALT); 1005 1006 /* Unlock priv */ 1007 + spin_unlock_irqrestore(&priv->txlock, flags); 1008 1009 return 0; 1010 } ··· 1049 unsigned long flags; 1050 u32 tempval; 1051 1052 + spin_lock_irqsave(&priv->rxlock, flags); 1053 1054 priv->vlgrp = grp; 1055 ··· 1076 gfar_write(&priv->regs->rctrl, tempval); 1077 } 1078 1079 + spin_unlock_irqrestore(&priv->rxlock, flags); 1080 } 1081 1082 ··· 1085 struct gfar_private *priv = netdev_priv(dev); 1086 unsigned long flags; 1087 1088 + spin_lock_irqsave(&priv->rxlock, flags); 1089 1090 if (priv->vlgrp) 1091 priv->vlgrp->vlan_devices[vid] = NULL; 1092 1093 + spin_unlock_irqrestore(&priv->rxlock, flags); 1094 } 1095 1096 ··· 1179 gfar_write(&priv->regs->ievent, IEVENT_TX_MASK); 1180 1181 /* Lock priv */ 1182 + spin_lock(&priv->txlock); 1183 bdp = priv->dirty_tx; 1184 while ((bdp->status & TXBD_READY) == 0) { 1185 /* If dirty_tx and cur_tx are the same, then either the */ ··· 1224 else 1225 gfar_write(&priv->regs->txic, 0); 1226 1227 + spin_unlock(&priv->txlock); 1228 1229 return IRQ_HANDLED; 1230 } ··· 1305 { 1306 struct net_device *dev = (struct net_device *) dev_id; 1307 struct gfar_private *priv = netdev_priv(dev); 1308 #ifdef CONFIG_GFAR_NAPI 1309 u32 tempval; 1310 + #else 1311 + unsigned long flags; 1312 #endif 1313 1314 /* Clear IEVENT, so rx interrupt isn't called again ··· 1330 } 1331 #else 1332 1333 + spin_lock_irqsave(&priv->rxlock, flags); 1334 gfar_clean_rx_ring(dev, priv->rx_ring_size); 1335 1336 /* If we are coalescing interrupts, update the timer */ ··· 1341 else 1342 gfar_write(&priv->regs->rxic, 0); 1343 1344 + spin_unlock_irqrestore(&priv->rxlock, flags); 1345 #endif 1346 1347 return IRQ_HANDLED; ··· 1490 /* Update the current rxbd pointer to be the next one */ 1491 priv->cur_rx = bdp; 1492 1493 return howmany; 1494 } 1495 ··· 1516 rx_work_limit -= howmany; 1517 *budget -= howmany; 1518 1519 + if (rx_work_limit > 0) { 1520 netif_rx_complete(dev); 1521 1522 /* Clear the halt bit in RSTAT */ ··· 1533 gfar_write(&priv->regs->rxic, 0); 1534 } 1535 1536 + /* Return 1 if there's more work to do */ 1537 + return (rx_work_limit > 0) ? 0 : 1; 1538 } 1539 #endif 1540 ··· 1629 struct phy_device *phydev = priv->phydev; 1630 int new_state = 0; 1631 1632 + spin_lock_irqsave(&priv->txlock, flags); 1633 if (phydev->link) { 1634 u32 tempval = gfar_read(&regs->maccfg2); 1635 u32 ecntrl = gfar_read(&regs->ecntrl); ··· 1694 if (new_state && netif_msg_link(priv)) 1695 phy_print_status(phydev); 1696 1697 + spin_unlock_irqrestore(&priv->txlock, flags); 1698 } 1699 1700 /* Update the hash table based on the current list of multicast
+46 -21
drivers/net/gianfar.h
··· 656 * the buffer descriptor determines the actual condition. 657 */ 658 struct gfar_private { 659 - /* pointers to arrays of skbuffs for tx and rx */ 660 struct sk_buff ** tx_skbuff; 661 - struct sk_buff ** rx_skbuff; 662 663 - /* indices pointing to the next free sbk in skb arrays */ 664 u16 skb_curtx; 665 - u16 skb_currx; 666 667 - /* index of the first skb which hasn't been transmitted 668 - * yet. */ 669 u16 skb_dirtytx; 670 671 /* Configuration info for the coalescing features */ 672 unsigned char txcoalescing; 673 unsigned short txcount; 674 unsigned short txtime; 675 unsigned char rxcoalescing; 676 unsigned short rxcount; 677 unsigned short rxtime; 678 679 - /* GFAR addresses */ 680 - struct rxbd8 *rx_bd_base; /* Base addresses of Rx and Tx Buffers */ 681 - struct txbd8 *tx_bd_base; 682 struct rxbd8 *cur_rx; /* Next free rx ring entry */ 683 - struct txbd8 *cur_tx; /* Next free ring entry */ 684 - struct txbd8 *dirty_tx; /* The Ring entry to be freed. */ 685 - struct gfar __iomem *regs; /* Pointer to the GFAR memory mapped Registers */ 686 - u32 __iomem *hash_regs[16]; 687 - int hash_width; 688 - struct net_device_stats stats; /* linux network statistics */ 689 - struct gfar_extra_stats extra_stats; 690 - spinlock_t lock; 691 unsigned int rx_buffer_size; 692 unsigned int rx_stash_size; 693 unsigned int rx_stash_index; 694 - unsigned int tx_ring_size; 695 - unsigned int rx_ring_size; 696 unsigned int fifo_threshold; 697 unsigned int fifo_starve; 698 unsigned int fifo_starve_off; ··· 721 extended_hash:1, 722 bd_stash_en:1; 723 unsigned short padding; 724 - struct vlan_group *vlgrp; 725 - /* Info structure initialized by board setup code */ 726 unsigned int interruptTransmit; 727 unsigned int interruptReceive; 728 unsigned int interruptError; 729 struct gianfar_platform_data *einfo; 730 731 struct phy_device *phydev; 732 struct mii_bus *mii_bus; 733 int oldspeed; ··· 737 int oldlink; 738 739 uint32_t msg_enable; 740 }; 741 742 static inline u32 gfar_read(volatile unsigned __iomem *addr)
··· 656 * the buffer descriptor determines the actual condition. 657 */ 658 struct gfar_private { 659 + /* Fields controlled by TX lock */ 660 + spinlock_t txlock; 661 + 662 + /* Pointer to the array of skbuffs */ 663 struct sk_buff ** tx_skbuff; 664 665 + /* next free skb in the array */ 666 u16 skb_curtx; 667 668 + /* First skb in line to be transmitted */ 669 u16 skb_dirtytx; 670 671 /* Configuration info for the coalescing features */ 672 unsigned char txcoalescing; 673 unsigned short txcount; 674 unsigned short txtime; 675 + 676 + /* Buffer descriptor pointers */ 677 + struct txbd8 *tx_bd_base; /* First tx buffer descriptor */ 678 + struct txbd8 *cur_tx; /* Next free ring entry */ 679 + struct txbd8 *dirty_tx; /* First buffer in line 680 + to be transmitted */ 681 + unsigned int tx_ring_size; 682 + 683 + /* RX Locked fields */ 684 + spinlock_t rxlock; 685 + 686 + /* skb array and index */ 687 + struct sk_buff ** rx_skbuff; 688 + u16 skb_currx; 689 + 690 + /* RX Coalescing values */ 691 unsigned char rxcoalescing; 692 unsigned short rxcount; 693 unsigned short rxtime; 694 695 + struct rxbd8 *rx_bd_base; /* First Rx buffers */ 696 struct rxbd8 *cur_rx; /* Next free rx ring entry */ 697 + 698 + /* RX parameters */ 699 + unsigned int rx_ring_size; 700 unsigned int rx_buffer_size; 701 unsigned int rx_stash_size; 702 unsigned int rx_stash_index; 703 + 704 + struct vlan_group *vlgrp; 705 + 706 + /* Unprotected fields */ 707 + /* Pointer to the GFAR memory mapped Registers */ 708 + struct gfar __iomem *regs; 709 + 710 + /* Hash registers and their width */ 711 + u32 __iomem *hash_regs[16]; 712 + int hash_width; 713 + 714 + /* global parameters */ 715 unsigned int fifo_threshold; 716 unsigned int fifo_starve; 717 unsigned int fifo_starve_off; ··· 702 extended_hash:1, 703 bd_stash_en:1; 704 unsigned short padding; 705 + 706 unsigned int interruptTransmit; 707 unsigned int interruptReceive; 708 unsigned int interruptError; 709 + 710 + /* info structure initialized by platform code */ 711 struct gianfar_platform_data *einfo; 712 713 + /* PHY stuff */ 714 struct phy_device *phydev; 715 struct mii_bus *mii_bus; 716 int oldspeed; ··· 716 int oldlink; 717 718 uint32_t msg_enable; 719 + 720 + /* Network Statistics */ 721 + struct net_device_stats stats; 722 + struct gfar_extra_stats extra_stats; 723 }; 724 725 static inline u32 gfar_read(volatile unsigned __iomem *addr)
+14 -6
drivers/net/gianfar_ethtool.c
··· 455 456 /* Halt TX and RX, and process the frames which 457 * have already been received */ 458 - spin_lock_irqsave(&priv->lock, flags); 459 gfar_halt(dev); 460 gfar_clean_rx_ring(dev, priv->rx_ring_size); 461 - spin_unlock_irqrestore(&priv->lock, flags); 462 463 /* Now we take down the rings to rebuild them */ 464 stop_gfar(dev); ··· 492 493 /* Halt TX and RX, and process the frames which 494 * have already been received */ 495 - spin_lock_irqsave(&priv->lock, flags); 496 gfar_halt(dev); 497 gfar_clean_rx_ring(dev, priv->rx_ring_size); 498 - spin_unlock_irqrestore(&priv->lock, flags); 499 500 /* Now we take down the rings to rebuild them */ 501 stop_gfar(dev); ··· 531 if (!(priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_CSUM)) 532 return -EOPNOTSUPP; 533 534 - spin_lock_irqsave(&priv->lock, flags); 535 gfar_halt(dev); 536 537 if (data) ··· 540 dev->features &= ~NETIF_F_IP_CSUM; 541 542 gfar_start(dev); 543 - spin_unlock_irqrestore(&priv->lock, flags); 544 545 return 0; 546 }
··· 455 456 /* Halt TX and RX, and process the frames which 457 * have already been received */ 458 + spin_lock_irqsave(&priv->txlock, flags); 459 + spin_lock(&priv->rxlock); 460 + 461 gfar_halt(dev); 462 gfar_clean_rx_ring(dev, priv->rx_ring_size); 463 + 464 + spin_unlock(&priv->rxlock); 465 + spin_unlock_irqrestore(&priv->txlock, flags); 466 467 /* Now we take down the rings to rebuild them */ 468 stop_gfar(dev); ··· 488 489 /* Halt TX and RX, and process the frames which 490 * have already been received */ 491 + spin_lock_irqsave(&priv->txlock, flags); 492 + spin_lock(&priv->rxlock); 493 + 494 gfar_halt(dev); 495 gfar_clean_rx_ring(dev, priv->rx_ring_size); 496 + 497 + spin_unlock(&priv->rxlock); 498 + spin_unlock_irqrestore(&priv->txlock, flags); 499 500 /* Now we take down the rings to rebuild them */ 501 stop_gfar(dev); ··· 523 if (!(priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_CSUM)) 524 return -EOPNOTSUPP; 525 526 + spin_lock_irqsave(&priv->txlock, flags); 527 gfar_halt(dev); 528 529 if (data) ··· 532 dev->features &= ~NETIF_F_IP_CSUM; 533 534 gfar_start(dev); 535 + spin_unlock_irqrestore(&priv->txlock, flags); 536 537 return 0; 538 }
+12 -12
drivers/net/gianfar_sysfs.c
··· 82 else 83 return count; 84 85 - spin_lock_irqsave(&priv->lock, flags); 86 87 /* Set the new stashing value */ 88 priv->bd_stash_en = new_setting; ··· 96 97 gfar_write(&priv->regs->attr, temp); 98 99 - spin_unlock_irqrestore(&priv->lock, flags); 100 101 return count; 102 } ··· 118 u32 temp; 119 unsigned long flags; 120 121 - spin_lock_irqsave(&priv->lock, flags); 122 if (length > priv->rx_buffer_size) 123 return count; 124 ··· 142 143 gfar_write(&priv->regs->attr, temp); 144 145 - spin_unlock_irqrestore(&priv->lock, flags); 146 147 return count; 148 } ··· 166 u32 temp; 167 unsigned long flags; 168 169 - spin_lock_irqsave(&priv->lock, flags); 170 if (index > priv->rx_stash_size) 171 return count; 172 ··· 180 temp |= ATTRELI_EI(index); 181 gfar_write(&priv->regs->attreli, flags); 182 183 - spin_unlock_irqrestore(&priv->lock, flags); 184 185 return count; 186 } ··· 205 if (length > GFAR_MAX_FIFO_THRESHOLD) 206 return count; 207 208 - spin_lock_irqsave(&priv->lock, flags); 209 210 priv->fifo_threshold = length; 211 ··· 214 temp |= length; 215 gfar_write(&priv->regs->fifo_tx_thr, temp); 216 217 - spin_unlock_irqrestore(&priv->lock, flags); 218 219 return count; 220 } ··· 240 if (num > GFAR_MAX_FIFO_STARVE) 241 return count; 242 243 - spin_lock_irqsave(&priv->lock, flags); 244 245 priv->fifo_starve = num; 246 ··· 249 temp |= num; 250 gfar_write(&priv->regs->fifo_tx_starve, temp); 251 252 - spin_unlock_irqrestore(&priv->lock, flags); 253 254 return count; 255 } ··· 274 if (num > GFAR_MAX_FIFO_STARVE_OFF) 275 return count; 276 277 - spin_lock_irqsave(&priv->lock, flags); 278 279 priv->fifo_starve_off = num; 280 ··· 283 temp |= num; 284 gfar_write(&priv->regs->fifo_tx_starve_shutoff, temp); 285 286 - spin_unlock_irqrestore(&priv->lock, flags); 287 288 return count; 289 }
··· 82 else 83 return count; 84 85 + spin_lock_irqsave(&priv->rxlock, flags); 86 87 /* Set the new stashing value */ 88 priv->bd_stash_en = new_setting; ··· 96 97 gfar_write(&priv->regs->attr, temp); 98 99 + spin_unlock_irqrestore(&priv->rxlock, flags); 100 101 return count; 102 } ··· 118 u32 temp; 119 unsigned long flags; 120 121 + spin_lock_irqsave(&priv->rxlock, flags); 122 if (length > priv->rx_buffer_size) 123 return count; 124 ··· 142 143 gfar_write(&priv->regs->attr, temp); 144 145 + spin_unlock_irqrestore(&priv->rxlock, flags); 146 147 return count; 148 } ··· 166 u32 temp; 167 unsigned long flags; 168 169 + spin_lock_irqsave(&priv->rxlock, flags); 170 if (index > priv->rx_stash_size) 171 return count; 172 ··· 180 temp |= ATTRELI_EI(index); 181 gfar_write(&priv->regs->attreli, flags); 182 183 + spin_unlock_irqrestore(&priv->rxlock, flags); 184 185 return count; 186 } ··· 205 if (length > GFAR_MAX_FIFO_THRESHOLD) 206 return count; 207 208 + spin_lock_irqsave(&priv->txlock, flags); 209 210 priv->fifo_threshold = length; 211 ··· 214 temp |= length; 215 gfar_write(&priv->regs->fifo_tx_thr, temp); 216 217 + spin_unlock_irqrestore(&priv->txlock, flags); 218 219 return count; 220 } ··· 240 if (num > GFAR_MAX_FIFO_STARVE) 241 return count; 242 243 + spin_lock_irqsave(&priv->txlock, flags); 244 245 priv->fifo_starve = num; 246 ··· 249 temp |= num; 250 gfar_write(&priv->regs->fifo_tx_starve, temp); 251 252 + spin_unlock_irqrestore(&priv->txlock, flags); 253 254 return count; 255 } ··· 274 if (num > GFAR_MAX_FIFO_STARVE_OFF) 275 return count; 276 277 + spin_lock_irqsave(&priv->txlock, flags); 278 279 priv->fifo_starve_off = num; 280 ··· 283 temp |= num; 284 gfar_write(&priv->regs->fifo_tx_starve_shutoff, temp); 285 286 + spin_unlock_irqrestore(&priv->txlock, flags); 287 288 return count; 289 }
+41 -11
drivers/net/sky2.c
··· 51 #include "sky2.h" 52 53 #define DRV_NAME "sky2" 54 - #define DRV_VERSION "1.1" 55 #define PFX DRV_NAME " " 56 57 /* ··· 925 skb = alloc_skb(size + RX_SKB_ALIGN, gfp_mask); 926 if (likely(skb)) { 927 unsigned long p = (unsigned long) skb->data; 928 - skb_reserve(skb, 929 - ((p + RX_SKB_ALIGN - 1) & ~(RX_SKB_ALIGN - 1)) - p); 930 } 931 932 return skb; ··· 1685 } 1686 1687 1688 - #define roundup(x, y) ((((x)+((y)-1))/(y))*(y)) 1689 /* Want receive buffer size to be multiple of 64 bits 1690 * and incl room for vlan and truncation 1691 */ 1692 static inline unsigned sky2_buf_size(int mtu) 1693 { 1694 - return roundup(mtu + ETH_HLEN + VLAN_HLEN, 8) + 8; 1695 } 1696 1697 static int sky2_change_mtu(struct net_device *dev, int new_mtu) ··· 2084 } 2085 } 2086 2087 static int sky2_poll(struct net_device *dev0, int *budget) 2088 { 2089 struct sky2_hw *hw = ((struct sky2_port *) netdev_priv(dev0))->hw; ··· 2105 int work_done = 0; 2106 u32 status = sky2_read32(hw, B0_Y2_SP_EISR); 2107 2108 if (unlikely(status & ~Y2_IS_STAT_BMU)) { 2109 if (status & Y2_IS_HW_ERR) 2110 sky2_hw_intr(hw); ··· 2136 } 2137 2138 if (status & Y2_IS_STAT_BMU) { 2139 - work_done = sky2_status_intr(hw, work_limit); 2140 *budget -= work_done; 2141 dev0->quota -= work_done; 2142 ··· 2146 sky2_write32(hw, STAT_CTRL, SC_STAT_CLR_IRQ); 2147 } 2148 2149 - netif_rx_complete(dev0); 2150 2151 status = sky2_read32(hw, B0_Y2_SP_LISR); 2152 return 0; 2153 } 2154 ··· 2181 prefetch(&hw->st_le[hw->st_idx]); 2182 if (likely(__netif_rx_schedule_prep(dev0))) 2183 __netif_rx_schedule(dev0); 2184 - else 2185 - printk(KERN_DEBUG PFX "irq race detected\n"); 2186 2187 return IRQ_HANDLED; 2188 } ··· 2219 } 2220 2221 2222 - static int sky2_reset(struct sky2_hw *hw) 2223 { 2224 u16 status; 2225 u8 t8, pmd_type; ··· 3302 3303 sky2_write32(hw, B0_IMSK, Y2_IS_BASE); 3304 3305 pci_set_drvdata(pdev, hw); 3306 3307 return 0; ··· 3339 if (!hw) 3340 return; 3341 3342 dev0 = hw->dev[0]; 3343 dev1 = hw->dev[1]; 3344 if (dev1) 3345 unregister_netdev(dev1); 3346 unregister_netdev(dev0); 3347 3348 - sky2_write32(hw, B0_IMSK, 0); 3349 sky2_set_power_state(hw, PCI_D3hot); 3350 sky2_write16(hw, B0_Y2LED, LED_STAT_OFF); 3351 sky2_write8(hw, B0_CTST, CS_RST_SET);
··· 51 #include "sky2.h" 52 53 #define DRV_NAME "sky2" 54 + #define DRV_VERSION "1.2" 55 #define PFX DRV_NAME " " 56 57 /* ··· 925 skb = alloc_skb(size + RX_SKB_ALIGN, gfp_mask); 926 if (likely(skb)) { 927 unsigned long p = (unsigned long) skb->data; 928 + skb_reserve(skb, ALIGN(p, RX_SKB_ALIGN) - p); 929 } 930 931 return skb; ··· 1686 } 1687 1688 1689 /* Want receive buffer size to be multiple of 64 bits 1690 * and incl room for vlan and truncation 1691 */ 1692 static inline unsigned sky2_buf_size(int mtu) 1693 { 1694 + return ALIGN(mtu + ETH_HLEN + VLAN_HLEN, 8) + 8; 1695 } 1696 1697 static int sky2_change_mtu(struct net_device *dev, int new_mtu) ··· 2086 } 2087 } 2088 2089 + /* If idle then force a fake soft NAPI poll once a second 2090 + * to work around cases where sharing an edge triggered interrupt. 2091 + */ 2092 + static void sky2_idle(unsigned long arg) 2093 + { 2094 + struct net_device *dev = (struct net_device *) arg; 2095 + 2096 + local_irq_disable(); 2097 + if (__netif_rx_schedule_prep(dev)) 2098 + __netif_rx_schedule(dev); 2099 + local_irq_enable(); 2100 + } 2101 + 2102 + 2103 static int sky2_poll(struct net_device *dev0, int *budget) 2104 { 2105 struct sky2_hw *hw = ((struct sky2_port *) netdev_priv(dev0))->hw; ··· 2093 int work_done = 0; 2094 u32 status = sky2_read32(hw, B0_Y2_SP_EISR); 2095 2096 + restart_poll: 2097 if (unlikely(status & ~Y2_IS_STAT_BMU)) { 2098 if (status & Y2_IS_HW_ERR) 2099 sky2_hw_intr(hw); ··· 2123 } 2124 2125 if (status & Y2_IS_STAT_BMU) { 2126 + work_done += sky2_status_intr(hw, work_limit - work_done); 2127 *budget -= work_done; 2128 dev0->quota -= work_done; 2129 ··· 2133 sky2_write32(hw, STAT_CTRL, SC_STAT_CLR_IRQ); 2134 } 2135 2136 + mod_timer(&hw->idle_timer, jiffies + HZ); 2137 + 2138 + local_irq_disable(); 2139 + __netif_rx_complete(dev0); 2140 2141 status = sky2_read32(hw, B0_Y2_SP_LISR); 2142 + 2143 + if (unlikely(status)) { 2144 + /* More work pending, try and keep going */ 2145 + if (__netif_rx_schedule_prep(dev0)) { 2146 + __netif_rx_reschedule(dev0, work_done); 2147 + status = sky2_read32(hw, B0_Y2_SP_EISR); 2148 + local_irq_enable(); 2149 + goto restart_poll; 2150 + } 2151 + } 2152 + 2153 + local_irq_enable(); 2154 return 0; 2155 } 2156 ··· 2153 prefetch(&hw->st_le[hw->st_idx]); 2154 if (likely(__netif_rx_schedule_prep(dev0))) 2155 __netif_rx_schedule(dev0); 2156 2157 return IRQ_HANDLED; 2158 } ··· 2193 } 2194 2195 2196 + static int __devinit sky2_reset(struct sky2_hw *hw) 2197 { 2198 u16 status; 2199 u8 t8, pmd_type; ··· 3276 3277 sky2_write32(hw, B0_IMSK, Y2_IS_BASE); 3278 3279 + setup_timer(&hw->idle_timer, sky2_idle, (unsigned long) dev); 3280 + 3281 pci_set_drvdata(pdev, hw); 3282 3283 return 0; ··· 3311 if (!hw) 3312 return; 3313 3314 + del_timer_sync(&hw->idle_timer); 3315 + 3316 + sky2_write32(hw, B0_IMSK, 0); 3317 dev0 = hw->dev[0]; 3318 dev1 = hw->dev[1]; 3319 if (dev1) 3320 unregister_netdev(dev1); 3321 unregister_netdev(dev0); 3322 3323 sky2_set_power_state(hw, PCI_D3hot); 3324 sky2_write16(hw, B0_Y2LED, LED_STAT_OFF); 3325 sky2_write8(hw, B0_CTST, CS_RST_SET);
+2
drivers/net/sky2.h
··· 1880 struct sky2_status_le *st_le; 1881 u32 st_idx; 1882 dma_addr_t st_dma; 1883 int msi_detected; 1884 wait_queue_head_t msi_wait; 1885 };
··· 1880 struct sky2_status_le *st_le; 1881 u32 st_idx; 1882 dma_addr_t st_dma; 1883 + 1884 + struct timer_list idle_timer; 1885 int msi_detected; 1886 wait_queue_head_t msi_wait; 1887 };
+8
drivers/net/wireless/bcm43xx/bcm43xx_dma.h
··· 213 void bcm43xx_dma_rx(struct bcm43xx_dmaring *ring) 214 { 215 } 216 217 #endif /* CONFIG_BCM43XX_DMA */ 218 #endif /* BCM43xx_DMA_H_ */
··· 213 void bcm43xx_dma_rx(struct bcm43xx_dmaring *ring) 214 { 215 } 216 + static inline 217 + void bcm43xx_dma_tx_suspend(struct bcm43xx_dmaring *ring) 218 + { 219 + } 220 + static inline 221 + void bcm43xx_dma_tx_resume(struct bcm43xx_dmaring *ring) 222 + { 223 + } 224 225 #endif /* CONFIG_BCM43XX_DMA */ 226 #endif /* BCM43xx_DMA_H_ */
+62 -30
drivers/net/wireless/bcm43xx/bcm43xx_pio.c
··· 27 #include "bcm43xx_pio.h" 28 #include "bcm43xx_main.h" 29 #include "bcm43xx_xmit.h" 30 31 #include <linux/delay.h> 32 ··· 45 bcm43xx_pio_write(queue, BCM43xx_PIO_TXDATA, 46 octet); 47 bcm43xx_pio_write(queue, BCM43xx_PIO_TXCTL, 48 - BCM43xx_PIO_TXCTL_WRITEHI); 49 } else { 50 bcm43xx_pio_write(queue, BCM43xx_PIO_TXCTL, 51 - BCM43xx_PIO_TXCTL_WRITEHI); 52 bcm43xx_pio_write(queue, BCM43xx_PIO_TXDATA, 53 octet); 54 } ··· 104 bcm43xx_pio_write(queue, BCM43xx_PIO_TXDATA, 105 skb->data[skb->len - 1]); 106 bcm43xx_pio_write(queue, BCM43xx_PIO_TXCTL, 107 - BCM43xx_PIO_TXCTL_WRITEHI | 108 BCM43xx_PIO_TXCTL_COMPLETE); 109 } else { 110 bcm43xx_pio_write(queue, BCM43xx_PIO_TXCTL, ··· 113 } 114 115 static u16 generate_cookie(struct bcm43xx_pioqueue *queue, 116 - int packetindex) 117 { 118 u16 cookie = 0x0000; 119 120 /* We use the upper 4 bits for the PIO 121 * controller ID and the lower 12 bits ··· 137 default: 138 assert(0); 139 } 140 assert(((u16)packetindex & 0xF000) == 0x0000); 141 cookie |= (u16)packetindex; 142 ··· 187 bcm43xx_generate_txhdr(queue->bcm, 188 &txhdr, skb->data, skb->len, 189 (packet->xmitted_frags == 0), 190 - generate_cookie(queue, pio_txpacket_getindex(packet))); 191 192 tx_start(queue); 193 octets = skb->len + sizeof(txhdr); ··· 244 queue->tx_devq_packets++; 245 queue->tx_devq_used += octets; 246 247 - assert(packet->xmitted_frags <= packet->txb->nr_frags); 248 packet->xmitted_frags++; 249 packet->xmitted_octets += octets; 250 } ··· 260 unsigned long flags; 261 struct bcm43xx_pio_txpacket *packet, *tmp_packet; 262 int err; 263 264 bcm43xx_lock_mmio(bcm, flags); 265 list_for_each_entry_safe(packet, tmp_packet, &queue->txqueue, list) { 266 assert(packet->xmitted_frags < packet->txb->nr_frags); 267 if (packet->xmitted_frags == 0) { ··· 297 next_packet: 298 continue; 299 } 300 bcm43xx_unlock_mmio(bcm, flags); 301 } 302 ··· 340 (unsigned long)queue); 341 342 value = bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD); 343 - value |= BCM43xx_SBF_XFER_REG_BYTESWAP; 344 bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD, value); 345 346 qsize = bcm43xx_read16(bcm, queue->mmio_base + BCM43xx_PIO_TXQBUFSIZE); 347 if (qsize <= BCM43xx_PIO_TXQADJUST) { 348 - printk(KERN_ERR PFX "PIO tx device-queue too small (%u)\n", qsize); 349 goto err_freequeue; 350 } 351 qsize -= BCM43xx_PIO_TXQADJUST; ··· 461 { 462 struct bcm43xx_pioqueue *queue = bcm43xx_current_pio(bcm)->queue1; 463 struct bcm43xx_pio_txpacket *packet; 464 - u16 tmp; 465 466 assert(!queue->tx_suspended); 467 assert(!list_empty(&queue->txfree)); 468 - 469 - tmp = bcm43xx_pio_read(queue, BCM43xx_PIO_TXCTL); 470 - if (tmp & BCM43xx_PIO_TXCTL_SUSPEND) 471 - return -EBUSY; 472 473 packet = list_entry(queue->txfree.next, struct bcm43xx_pio_txpacket, list); 474 packet->txb = txb; ··· 474 assert(queue->nr_txfree < BCM43xx_PIO_MAXTXPACKETS); 475 476 /* Suspend TX, if we are out of packets in the "free" queue. */ 477 - if (unlikely(list_empty(&queue->txfree))) { 478 netif_stop_queue(queue->bcm->net_dev); 479 queue->tx_suspended = 1; 480 } ··· 492 493 queue = parse_cookie(bcm, status->cookie, &packet); 494 assert(queue); 495 - //TODO 496 - if (!queue) 497 - return; 498 free_txpacket(packet, 1); 499 - if (unlikely(queue->tx_suspended)) { 500 queue->tx_suspended = 0; 501 netif_wake_queue(queue->bcm->net_dev); 502 } 503 - /* If there are packets on the txqueue, poke the tasklet. */ 504 if (!list_empty(&queue->txqueue)) 505 tasklet_schedule(&queue->txtask); 506 } ··· 531 int i, preamble_readwords; 532 struct sk_buff *skb; 533 534 - return; 535 tmp = bcm43xx_pio_read(queue, BCM43xx_PIO_RXCTL); 536 - if (!(tmp & BCM43xx_PIO_RXCTL_DATAAVAILABLE)) { 537 - dprintkl(KERN_ERR PFX "PIO RX: No data available\n");//TODO: remove this printk. 538 return; 539 - } 540 bcm43xx_pio_write(queue, BCM43xx_PIO_RXCTL, 541 BCM43xx_PIO_RXCTL_DATAAVAILABLE); 542 ··· 547 return; 548 data_ready: 549 550 - //FIXME: endianess in this function. 551 - len = le16_to_cpu(bcm43xx_pio_read(queue, BCM43xx_PIO_RXDATA)); 552 if (unlikely(len > 0x700)) { 553 pio_rx_error(queue, 0, "len > 0x700"); 554 return; ··· 563 preamble_readwords = 18 / sizeof(u16); 564 for (i = 0; i < preamble_readwords; i++) { 565 tmp = bcm43xx_pio_read(queue, BCM43xx_PIO_RXDATA); 566 - preamble[i + 1] = cpu_to_be16(tmp);//FIXME? 567 } 568 rxhdr = (struct bcm43xx_rxhdr *)preamble; 569 rxflags2 = le16_to_cpu(rxhdr->flags2); ··· 599 } 600 skb_put(skb, len); 601 for (i = 0; i < len - 1; i += 2) { 602 - tmp = cpu_to_be16(bcm43xx_pio_read(queue, BCM43xx_PIO_RXDATA)); 603 - *((u16 *)(skb->data + i)) = tmp; 604 } 605 if (len % 2) { 606 tmp = bcm43xx_pio_read(queue, BCM43xx_PIO_RXDATA); 607 skb->data[len - 1] = (tmp & 0x00FF); 608 if (rxflags2 & BCM43xx_RXHDR_FLAGS2_TYPE2FRAME) 609 - skb->data[0x20] = (tmp & 0xFF00) >> 8; 610 else 611 - skb->data[0x1E] = (tmp & 0xFF00) >> 8; 612 } 613 bcm43xx_rx(queue->bcm, skb, rxhdr); 614 }
··· 27 #include "bcm43xx_pio.h" 28 #include "bcm43xx_main.h" 29 #include "bcm43xx_xmit.h" 30 + #include "bcm43xx_power.h" 31 32 #include <linux/delay.h> 33 ··· 44 bcm43xx_pio_write(queue, BCM43xx_PIO_TXDATA, 45 octet); 46 bcm43xx_pio_write(queue, BCM43xx_PIO_TXCTL, 47 + BCM43xx_PIO_TXCTL_WRITELO); 48 } else { 49 bcm43xx_pio_write(queue, BCM43xx_PIO_TXCTL, 50 + BCM43xx_PIO_TXCTL_WRITELO); 51 bcm43xx_pio_write(queue, BCM43xx_PIO_TXDATA, 52 octet); 53 } ··· 103 bcm43xx_pio_write(queue, BCM43xx_PIO_TXDATA, 104 skb->data[skb->len - 1]); 105 bcm43xx_pio_write(queue, BCM43xx_PIO_TXCTL, 106 + BCM43xx_PIO_TXCTL_WRITELO | 107 BCM43xx_PIO_TXCTL_COMPLETE); 108 } else { 109 bcm43xx_pio_write(queue, BCM43xx_PIO_TXCTL, ··· 112 } 113 114 static u16 generate_cookie(struct bcm43xx_pioqueue *queue, 115 + struct bcm43xx_pio_txpacket *packet) 116 { 117 u16 cookie = 0x0000; 118 + int packetindex; 119 120 /* We use the upper 4 bits for the PIO 121 * controller ID and the lower 12 bits ··· 135 default: 136 assert(0); 137 } 138 + packetindex = pio_txpacket_getindex(packet); 139 assert(((u16)packetindex & 0xF000) == 0x0000); 140 cookie |= (u16)packetindex; 141 ··· 184 bcm43xx_generate_txhdr(queue->bcm, 185 &txhdr, skb->data, skb->len, 186 (packet->xmitted_frags == 0), 187 + generate_cookie(queue, packet)); 188 189 tx_start(queue); 190 octets = skb->len + sizeof(txhdr); ··· 241 queue->tx_devq_packets++; 242 queue->tx_devq_used += octets; 243 244 + assert(packet->xmitted_frags < packet->txb->nr_frags); 245 packet->xmitted_frags++; 246 packet->xmitted_octets += octets; 247 } ··· 257 unsigned long flags; 258 struct bcm43xx_pio_txpacket *packet, *tmp_packet; 259 int err; 260 + u16 txctl; 261 262 bcm43xx_lock_mmio(bcm, flags); 263 + 264 + txctl = bcm43xx_pio_read(queue, BCM43xx_PIO_TXCTL); 265 + if (txctl & BCM43xx_PIO_TXCTL_SUSPEND) 266 + goto out_unlock; 267 + 268 list_for_each_entry_safe(packet, tmp_packet, &queue->txqueue, list) { 269 assert(packet->xmitted_frags < packet->txb->nr_frags); 270 if (packet->xmitted_frags == 0) { ··· 288 next_packet: 289 continue; 290 } 291 + out_unlock: 292 bcm43xx_unlock_mmio(bcm, flags); 293 } 294 ··· 330 (unsigned long)queue); 331 332 value = bcm43xx_read32(bcm, BCM43xx_MMIO_STATUS_BITFIELD); 333 + value &= ~BCM43xx_SBF_XFER_REG_BYTESWAP; 334 bcm43xx_write32(bcm, BCM43xx_MMIO_STATUS_BITFIELD, value); 335 336 qsize = bcm43xx_read16(bcm, queue->mmio_base + BCM43xx_PIO_TXQBUFSIZE); 337 + if (qsize == 0) { 338 + printk(KERN_ERR PFX "ERROR: This card does not support PIO " 339 + "operation mode. Please use DMA mode " 340 + "(module parameter pio=0).\n"); 341 + goto err_freequeue; 342 + } 343 if (qsize <= BCM43xx_PIO_TXQADJUST) { 344 + printk(KERN_ERR PFX "PIO tx device-queue too small (%u)\n", 345 + qsize); 346 goto err_freequeue; 347 } 348 qsize -= BCM43xx_PIO_TXQADJUST; ··· 444 { 445 struct bcm43xx_pioqueue *queue = bcm43xx_current_pio(bcm)->queue1; 446 struct bcm43xx_pio_txpacket *packet; 447 448 assert(!queue->tx_suspended); 449 assert(!list_empty(&queue->txfree)); 450 451 packet = list_entry(queue->txfree.next, struct bcm43xx_pio_txpacket, list); 452 packet->txb = txb; ··· 462 assert(queue->nr_txfree < BCM43xx_PIO_MAXTXPACKETS); 463 464 /* Suspend TX, if we are out of packets in the "free" queue. */ 465 + if (list_empty(&queue->txfree)) { 466 netif_stop_queue(queue->bcm->net_dev); 467 queue->tx_suspended = 1; 468 } ··· 480 481 queue = parse_cookie(bcm, status->cookie, &packet); 482 assert(queue); 483 + 484 free_txpacket(packet, 1); 485 + if (queue->tx_suspended) { 486 queue->tx_suspended = 0; 487 netif_wake_queue(queue->bcm->net_dev); 488 } 489 + /* If there are packets on the txqueue, poke the tasklet 490 + * to transmit them. 491 + */ 492 if (!list_empty(&queue->txqueue)) 493 tasklet_schedule(&queue->txtask); 494 } ··· 519 int i, preamble_readwords; 520 struct sk_buff *skb; 521 522 tmp = bcm43xx_pio_read(queue, BCM43xx_PIO_RXCTL); 523 + if (!(tmp & BCM43xx_PIO_RXCTL_DATAAVAILABLE)) 524 return; 525 bcm43xx_pio_write(queue, BCM43xx_PIO_RXCTL, 526 BCM43xx_PIO_RXCTL_DATAAVAILABLE); 527 ··· 538 return; 539 data_ready: 540 541 + len = bcm43xx_pio_read(queue, BCM43xx_PIO_RXDATA); 542 if (unlikely(len > 0x700)) { 543 pio_rx_error(queue, 0, "len > 0x700"); 544 return; ··· 555 preamble_readwords = 18 / sizeof(u16); 556 for (i = 0; i < preamble_readwords; i++) { 557 tmp = bcm43xx_pio_read(queue, BCM43xx_PIO_RXDATA); 558 + preamble[i + 1] = cpu_to_le16(tmp); 559 } 560 rxhdr = (struct bcm43xx_rxhdr *)preamble; 561 rxflags2 = le16_to_cpu(rxhdr->flags2); ··· 591 } 592 skb_put(skb, len); 593 for (i = 0; i < len - 1; i += 2) { 594 + tmp = bcm43xx_pio_read(queue, BCM43xx_PIO_RXDATA); 595 + *((u16 *)(skb->data + i)) = cpu_to_le16(tmp); 596 } 597 if (len % 2) { 598 tmp = bcm43xx_pio_read(queue, BCM43xx_PIO_RXDATA); 599 skb->data[len - 1] = (tmp & 0x00FF); 600 + /* The specs say the following is required, but 601 + * it is wrong and corrupts the PLCP. If we don't do 602 + * this, the PLCP seems to be correct. So ifdef it out for now. 603 + */ 604 + #if 0 605 if (rxflags2 & BCM43xx_RXHDR_FLAGS2_TYPE2FRAME) 606 + skb->data[2] = (tmp & 0xFF00) >> 8; 607 else 608 + skb->data[0] = (tmp & 0xFF00) >> 8; 609 + #endif 610 } 611 + skb_trim(skb, len - IEEE80211_FCS_LEN); 612 bcm43xx_rx(queue->bcm, skb, rxhdr); 613 + } 614 + 615 + void bcm43xx_pio_tx_suspend(struct bcm43xx_pioqueue *queue) 616 + { 617 + bcm43xx_power_saving_ctl_bits(queue->bcm, -1, 1); 618 + bcm43xx_pio_write(queue, BCM43xx_PIO_TXCTL, 619 + bcm43xx_pio_read(queue, BCM43xx_PIO_TXCTL) 620 + | BCM43xx_PIO_TXCTL_SUSPEND); 621 + } 622 + 623 + void bcm43xx_pio_tx_resume(struct bcm43xx_pioqueue *queue) 624 + { 625 + bcm43xx_pio_write(queue, BCM43xx_PIO_TXCTL, 626 + bcm43xx_pio_read(queue, BCM43xx_PIO_TXCTL) 627 + & ~BCM43xx_PIO_TXCTL_SUSPEND); 628 + bcm43xx_power_saving_ctl_bits(queue->bcm, -1, -1); 629 + tasklet_schedule(&queue->txtask); 630 }
+14 -2
drivers/net/wireless/bcm43xx/bcm43xx_pio.h
··· 14 #define BCM43xx_PIO_RXCTL 0x08 15 #define BCM43xx_PIO_RXDATA 0x0A 16 17 - #define BCM43xx_PIO_TXCTL_WRITEHI (1 << 0) 18 - #define BCM43xx_PIO_TXCTL_WRITELO (1 << 1) 19 #define BCM43xx_PIO_TXCTL_COMPLETE (1 << 2) 20 #define BCM43xx_PIO_TXCTL_INIT (1 << 3) 21 #define BCM43xx_PIO_TXCTL_SUSPEND (1 << 7) ··· 95 u16 offset, u16 value) 96 { 97 bcm43xx_write16(queue->bcm, queue->mmio_base + offset, value); 98 } 99 100 ··· 107 void bcm43xx_pio_handle_xmitstatus(struct bcm43xx_private *bcm, 108 struct bcm43xx_xmitstatus *status); 109 void bcm43xx_pio_rx(struct bcm43xx_pioqueue *queue); 110 111 #else /* CONFIG_BCM43XX_PIO */ 112 ··· 135 } 136 static inline 137 void bcm43xx_pio_rx(struct bcm43xx_pioqueue *queue) 138 { 139 } 140
··· 14 #define BCM43xx_PIO_RXCTL 0x08 15 #define BCM43xx_PIO_RXDATA 0x0A 16 17 + #define BCM43xx_PIO_TXCTL_WRITELO (1 << 0) 18 + #define BCM43xx_PIO_TXCTL_WRITEHI (1 << 1) 19 #define BCM43xx_PIO_TXCTL_COMPLETE (1 << 2) 20 #define BCM43xx_PIO_TXCTL_INIT (1 << 3) 21 #define BCM43xx_PIO_TXCTL_SUSPEND (1 << 7) ··· 95 u16 offset, u16 value) 96 { 97 bcm43xx_write16(queue->bcm, queue->mmio_base + offset, value); 98 + mmiowb(); 99 } 100 101 ··· 106 void bcm43xx_pio_handle_xmitstatus(struct bcm43xx_private *bcm, 107 struct bcm43xx_xmitstatus *status); 108 void bcm43xx_pio_rx(struct bcm43xx_pioqueue *queue); 109 + 110 + void bcm43xx_pio_tx_suspend(struct bcm43xx_pioqueue *queue); 111 + void bcm43xx_pio_tx_resume(struct bcm43xx_pioqueue *queue); 112 113 #else /* CONFIG_BCM43XX_PIO */ 114 ··· 131 } 132 static inline 133 void bcm43xx_pio_rx(struct bcm43xx_pioqueue *queue) 134 + { 135 + } 136 + static inline 137 + void bcm43xx_pio_tx_suspend(struct bcm43xx_pioqueue *queue) 138 + { 139 + } 140 + static inline 141 + void bcm43xx_pio_tx_resume(struct bcm43xx_pioqueue *queue) 142 { 143 } 144
+2 -2
drivers/net/wireless/hostap/hostap_ioctl.c
··· 1860 memset(&iwe, 0, sizeof(iwe)); 1861 iwe.cmd = SIOCGIWFREQ; 1862 if (scan) { 1863 - chan = scan->chid; 1864 } else if (bss) { 1865 chan = bss->chan; 1866 } else { ··· 1868 } 1869 1870 if (chan > 0) { 1871 - iwe.u.freq.m = freq_list[le16_to_cpu(chan - 1)] * 100000; 1872 iwe.u.freq.e = 1; 1873 current_ev = iwe_stream_add_event(current_ev, end_buf, &iwe, 1874 IW_EV_FREQ_LEN);
··· 1860 memset(&iwe, 0, sizeof(iwe)); 1861 iwe.cmd = SIOCGIWFREQ; 1862 if (scan) { 1863 + chan = le16_to_cpu(scan->chid); 1864 } else if (bss) { 1865 chan = bss->chan; 1866 } else { ··· 1868 } 1869 1870 if (chan > 0) { 1871 + iwe.u.freq.m = freq_list[chan - 1] * 100000; 1872 iwe.u.freq.e = 1; 1873 current_ev = iwe_stream_add_event(current_ev, end_buf, &iwe, 1874 IW_EV_FREQ_LEN);
+10 -8
include/linux/netdevice.h
··· 829 __netif_rx_schedule(dev); 830 } 831 832 - /* Try to reschedule poll. Called by dev->poll() after netif_rx_complete(). 833 - * Do not inline this? 834 - */ 835 static inline int netif_rx_reschedule(struct net_device *dev, int undo) 836 { 837 if (netif_rx_schedule_prep(dev)) { 838 unsigned long flags; 839 - 840 - dev->quota += undo; 841 - 842 local_irq_save(flags); 843 - list_add_tail(&dev->poll_list, &__get_cpu_var(softnet_data).poll_list); 844 - __raise_softirq_irqoff(NET_RX_SOFTIRQ); 845 local_irq_restore(flags); 846 return 1; 847 }
··· 829 __netif_rx_schedule(dev); 830 } 831 832 + 833 + static inline void __netif_rx_reschedule(struct net_device *dev, int undo) 834 + { 835 + dev->quota += undo; 836 + list_add_tail(&dev->poll_list, &__get_cpu_var(softnet_data).poll_list); 837 + __raise_softirq_irqoff(NET_RX_SOFTIRQ); 838 + } 839 + 840 + /* Try to reschedule poll. Called by dev->poll() after netif_rx_complete(). */ 841 static inline int netif_rx_reschedule(struct net_device *dev, int undo) 842 { 843 if (netif_rx_schedule_prep(dev)) { 844 unsigned long flags; 845 local_irq_save(flags); 846 + __netif_rx_reschedule(dev, undo); 847 local_irq_restore(flags); 848 return 1; 849 }
+4 -1
include/net/ieee80211softmac.h
··· 96 * 97 * bssvalid is true if we found a matching network 98 * and saved it's BSSID into the bssid above. 99 */ 100 u8 static_essid:1, 101 associating:1, 102 - bssvalid:1; 103 104 /* Scan retries remaining */ 105 int scan_retry;
··· 96 * 97 * bssvalid is true if we found a matching network 98 * and saved it's BSSID into the bssid above. 99 + * 100 + * bssfixed is used for SIOCSIWAP. 101 */ 102 u8 static_essid:1, 103 associating:1, 104 + bssvalid:1, 105 + bssfixed:1; 106 107 /* Scan retries remaining */ 108 int scan_retry;
+16 -4
net/ieee80211/softmac/ieee80211softmac_assoc.c
··· 144 if (!we_support_all_basic_rates(mac, net->rates_ex, net->rates_ex_len)) 145 return 0; 146 147 /* if 'ANY' network requested, take any that doesn't have privacy enabled */ 148 if (mac->associnfo.req_essid.len == 0 149 && !(net->capability & WLAN_CAPABILITY_PRIVACY)) ··· 182 ieee80211softmac_disassoc(mac, WLAN_REASON_DISASSOC_STA_HAS_LEFT); 183 184 /* try to find the requested network in our list, if we found one already */ 185 - if (mac->associnfo.bssvalid) 186 found = ieee80211softmac_get_network_by_bssid(mac, mac->associnfo.bssid); 187 188 /* Search the ieee80211 networks for this network if we didn't find it by bssid, ··· 247 if (ieee80211softmac_start_scan(mac)) 248 dprintk(KERN_INFO PFX "Associate: failed to initiate scan. Is device up?\n"); 249 return; 250 - } 251 - else { 252 spin_lock_irqsave(&mac->lock, flags); 253 mac->associnfo.associating = 0; 254 mac->associated = 0; 255 spin_unlock_irqrestore(&mac->lock, flags); 256 257 dprintk(KERN_INFO PFX "Unable to find matching network after scan!\n"); 258 ieee80211softmac_call_events(mac, IEEE80211SOFTMAC_EVENT_ASSOCIATE_NET_NOT_FOUND, NULL); 259 return; 260 } 261 } 262 - 263 mac->associnfo.bssvalid = 1; 264 memcpy(mac->associnfo.bssid, found->bssid, ETH_ALEN); 265 /* copy the ESSID for displaying it */
··· 144 if (!we_support_all_basic_rates(mac, net->rates_ex, net->rates_ex_len)) 145 return 0; 146 147 + /* assume that users know what they're doing ... 148 + * (note we don't let them select a net we're incompatible with) */ 149 + if (mac->associnfo.bssfixed) { 150 + return !memcmp(mac->associnfo.bssid, net->bssid, ETH_ALEN); 151 + } 152 + 153 /* if 'ANY' network requested, take any that doesn't have privacy enabled */ 154 if (mac->associnfo.req_essid.len == 0 155 && !(net->capability & WLAN_CAPABILITY_PRIVACY)) ··· 176 ieee80211softmac_disassoc(mac, WLAN_REASON_DISASSOC_STA_HAS_LEFT); 177 178 /* try to find the requested network in our list, if we found one already */ 179 + if (mac->associnfo.bssvalid || mac->associnfo.bssfixed) 180 found = ieee80211softmac_get_network_by_bssid(mac, mac->associnfo.bssid); 181 182 /* Search the ieee80211 networks for this network if we didn't find it by bssid, ··· 241 if (ieee80211softmac_start_scan(mac)) 242 dprintk(KERN_INFO PFX "Associate: failed to initiate scan. Is device up?\n"); 243 return; 244 + } else { 245 spin_lock_irqsave(&mac->lock, flags); 246 mac->associnfo.associating = 0; 247 mac->associated = 0; 248 spin_unlock_irqrestore(&mac->lock, flags); 249 250 dprintk(KERN_INFO PFX "Unable to find matching network after scan!\n"); 251 + /* reset the retry counter for the next user request since we 252 + * break out and don't reschedule ourselves after this point. */ 253 + mac->associnfo.scan_retry = IEEE80211SOFTMAC_ASSOC_SCAN_RETRY_LIMIT; 254 ieee80211softmac_call_events(mac, IEEE80211SOFTMAC_EVENT_ASSOCIATE_NET_NOT_FOUND, NULL); 255 return; 256 } 257 } 258 + 259 + /* reset the retry counter for the next user request since we 260 + * now found a net and will try to associate to it, but not 261 + * schedule this function again. */ 262 + mac->associnfo.scan_retry = IEEE80211SOFTMAC_ASSOC_SCAN_RETRY_LIMIT; 263 mac->associnfo.bssvalid = 1; 264 memcpy(mac->associnfo.bssid, found->bssid, ETH_ALEN); 265 /* copy the ESSID for displaying it */
+2
net/ieee80211/softmac/ieee80211softmac_module.c
··· 45 softmac->ieee->handle_disassoc = ieee80211softmac_handle_disassoc; 46 softmac->scaninfo = NULL; 47 48 /* TODO: initialise all the other callbacks in the ieee struct 49 * (once they're written) 50 */
··· 45 softmac->ieee->handle_disassoc = ieee80211softmac_handle_disassoc; 46 softmac->scaninfo = NULL; 47 48 + softmac->associnfo.scan_retry = IEEE80211SOFTMAC_ASSOC_SCAN_RETRY_LIMIT; 49 + 50 /* TODO: initialise all the other callbacks in the ieee struct 51 * (once they're written) 52 */
+17 -10
net/ieee80211/softmac/ieee80211softmac_wx.c
··· 27 #include "ieee80211softmac_priv.h" 28 29 #include <net/iw_handler.h> 30 - 31 32 int 33 ieee80211softmac_wx_trigger_scan(struct net_device *net_dev, ··· 84 sm->associnfo.static_essid = 1; 85 } 86 } 87 - sm->associnfo.scan_retry = IEEE80211SOFTMAC_ASSOC_SCAN_RETRY_LIMIT; 88 89 /* set our requested ESSID length. 90 * If applicable, we have already copied the data in */ ··· 310 char *extra) 311 { 312 struct ieee80211softmac_device *mac = ieee80211_priv(net_dev); 313 - static const unsigned char any[] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; 314 - static const unsigned char off[] = {0x00, 0x00, 0x00, 0x00, 0x00, 0x00}; 315 unsigned long flags; 316 317 /* sanity check */ ··· 318 } 319 320 spin_lock_irqsave(&mac->lock, flags); 321 - if (!memcmp(any, data->ap_addr.sa_data, ETH_ALEN) || 322 - !memcmp(off, data->ap_addr.sa_data, ETH_ALEN)) { 323 - schedule_work(&mac->associnfo.work); 324 - goto out; 325 } else { 326 if (!memcmp(mac->associnfo.bssid, data->ap_addr.sa_data, ETH_ALEN)) { 327 if (mac->associnfo.associating || mac->associated) { ··· 338 } else { 339 /* copy new value in data->ap_addr.sa_data to bssid */ 340 memcpy(mac->associnfo.bssid, data->ap_addr.sa_data, ETH_ALEN); 341 - } 342 /* queue associate if new bssid or (old one again and not associated) */ 343 schedule_work(&mac->associnfo.work); 344 } 345 346 - out: 347 spin_unlock_irqrestore(&mac->lock, flags); 348 return 0; 349 }
··· 27 #include "ieee80211softmac_priv.h" 28 29 #include <net/iw_handler.h> 30 + /* for is_broadcast_ether_addr and is_zero_ether_addr */ 31 + #include <linux/etherdevice.h> 32 33 int 34 ieee80211softmac_wx_trigger_scan(struct net_device *net_dev, ··· 83 sm->associnfo.static_essid = 1; 84 } 85 } 86 87 /* set our requested ESSID length. 88 * If applicable, we have already copied the data in */ ··· 310 char *extra) 311 { 312 struct ieee80211softmac_device *mac = ieee80211_priv(net_dev); 313 unsigned long flags; 314 315 /* sanity check */ ··· 320 } 321 322 spin_lock_irqsave(&mac->lock, flags); 323 + if (is_broadcast_ether_addr(data->ap_addr.sa_data)) { 324 + /* the bssid we have is not to be fixed any longer, 325 + * and we should reassociate to the best AP. */ 326 + mac->associnfo.bssfixed = 0; 327 + /* force reassociation */ 328 + mac->associnfo.bssvalid = 0; 329 + if (mac->associated) 330 + schedule_work(&mac->associnfo.work); 331 + } else if (is_zero_ether_addr(data->ap_addr.sa_data)) { 332 + /* the bssid we have is no longer fixed */ 333 + mac->associnfo.bssfixed = 0; 334 } else { 335 if (!memcmp(mac->associnfo.bssid, data->ap_addr.sa_data, ETH_ALEN)) { 336 if (mac->associnfo.associating || mac->associated) { ··· 333 } else { 334 /* copy new value in data->ap_addr.sa_data to bssid */ 335 memcpy(mac->associnfo.bssid, data->ap_addr.sa_data, ETH_ALEN); 336 + } 337 + /* tell the other code that this bssid should be used no matter what */ 338 + mac->associnfo.bssfixed = 1; 339 /* queue associate if new bssid or (old one again and not associated) */ 340 schedule_work(&mac->associnfo.work); 341 } 342 343 + out: 344 spin_unlock_irqrestore(&mac->lock, flags); 345 return 0; 346 }