Merge tag 'imx-dt-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

+3 -2

arch/arm/boot/dts/Makefile

··· 707 707 imx6ul-geam.dtb \ 708 708 imx6ul-isiot-emmc.dtb \ 709 709 imx6ul-isiot-nand.dtb \ 710 - imx6ul-kontron-n6310-s.dtb \ 711 - imx6ul-kontron-n6310-s-43.dtb \ 710 + imx6ul-kontron-bl.dtb \ 711 + imx6ul-kontron-bl-43.dtb \ 712 712 imx6ul-liteboard.dtb \ 713 713 imx6ul-tqma6ul1-mba6ulx.dtb \ 714 714 imx6ul-tqma6ul2-mba6ulx.dtb \ ··· 737 737 imx6ull-colibri-wifi-iris.dtb \ 738 738 imx6ull-colibri-wifi-iris-v2.dtb \ 739 739 imx6ull-jozacp.dtb \ 740 + imx6ull-kontron-bl.dtb \ 740 741 imx6ull-myir-mys-6ulx-eval.dtb \ 741 742 imx6ull-opos6uldev.dtb \ 742 743 imx6ull-phytec-segin-ff-rdk-nand.dtb \

+3 -3

arch/arm/boot/dts/imx23-xfi3.dts

··· 158 158 default-brightness-level = <6>; 159 159 }; 160 160 161 - gpio_keys { 161 + gpio-keys { 162 162 compatible = "gpio-keys"; 163 163 pinctrl-names = "default"; 164 164 pinctrl-0 = <&key_pins_a>; 165 165 166 - voldown { 166 + key-voldown { 167 167 label = "volume-down"; 168 168 linux,code = <114>; 169 169 gpios = <&gpio2 7 0>; 170 170 debounce-interval = <20>; 171 171 }; 172 172 173 - volup { 173 + key-volup { 174 174 label = "volume-up"; 175 175 linux,code = <115>; 176 176 gpios = <&gpio2 8 0>;

+2 -2

arch/arm/boot/dts/imx25-eukrea-mbimxsd25-baseboard.dts

··· 13 13 model = "Eukrea MBIMXSD25"; 14 14 compatible = "eukrea,mbimxsd25-baseboard", "eukrea,cpuimx25", "fsl,imx25"; 15 15 16 - gpio_keys { 16 + gpio-keys { 17 17 compatible = "gpio-keys"; 18 18 pinctrl-names = "default"; 19 19 pinctrl-0 = <&pinctrl_gpiokeys>; 20 20 21 - bp1 { 21 + button { 22 22 label = "BP1"; 23 23 gpios = <&gpio3 18 GPIO_ACTIVE_LOW>; 24 24 linux,code = <BTN_MISC>;

+1 -1

arch/arm/boot/dts/imx25.dtsi

··· 515 515 #interrupt-cells = <2>; 516 516 }; 517 517 518 - sdma: sdma@53fd4000 { 518 + sdma: dma-controller@53fd4000 { 519 519 compatible = "fsl,imx25-sdma"; 520 520 reg = <0x53fd4000 0x4000>; 521 521 clocks = <&clks 112>, <&clks 68>;

+4 -4

arch/arm/boot/dts/imx28-cfa10049.dts

··· 327 327 }; 328 328 }; 329 329 330 - spi2 { 330 + spi-2 { 331 331 compatible = "spi-gpio"; 332 332 pinctrl-names = "default"; 333 333 pinctrl-0 = <&spi2_pins_cfa10049>; ··· 351 351 }; 352 352 }; 353 353 354 - spi3 { 354 + spi-3 { 355 355 compatible = "spi-gpio"; 356 356 pinctrl-names = "default"; 357 357 pinctrl-0 = <&spi3_pins_cfa10049>; ··· 388 388 }; 389 389 }; 390 390 391 - gpio_keys { 391 + gpio-keys { 392 392 compatible = "gpio-keys"; 393 393 pinctrl-names = "default"; 394 394 pinctrl-0 = <&rotary_btn_pins_cfa10049>; 395 395 396 - rotary_button { 396 + rotary-button { 397 397 label = "rotary_button"; 398 398 gpios = <&gpio3 26 1>; 399 399 debounce-interval = <10>;

+1 -1

arch/arm/boot/dts/imx28-cfa10055.dts

··· 129 129 }; 130 130 }; 131 131 132 - spi2 { 132 + spi-2 { 133 133 compatible = "spi-gpio"; 134 134 pinctrl-names = "default"; 135 135 pinctrl-0 = <&spi2_pins_cfa10055>;

+1 -1

arch/arm/boot/dts/imx28-cfa10056.dts

··· 88 88 }; 89 89 }; 90 90 91 - spi2 { 91 + spi-2 { 92 92 compatible = "spi-gpio"; 93 93 pinctrl-names = "default"; 94 94 pinctrl-0 = <&spi2_pins_cfa10056>;

+1 -1

arch/arm/boot/dts/imx28-duckbill-2-enocean.dts

··· 204 204 pinctrl-names = "default"; 205 205 pinctrl-0 = <&enocean_button>; 206 206 207 - enocean { 207 + key-enocean { 208 208 label = "EnOcean"; 209 209 linux,code = <KEY_NEW>; 210 210 gpios = <&gpio3 3 GPIO_ACTIVE_HIGH>;

+4 -4

arch/arm/boot/dts/imx28-eukrea-mbmx28lc.dtsi

··· 19 19 default-brightness-level = <10>; 20 20 }; 21 21 22 - button-sw3 { 22 + gpio-keys-0 { 23 23 compatible = "gpio-keys"; 24 24 pinctrl-names = "default"; 25 25 pinctrl-0 = <&gpio_button_sw3_pins_mbmx28lc>; 26 26 27 - sw3 { 27 + switch-sw3 { 28 28 label = "SW3"; 29 29 gpios = <&gpio1 21 GPIO_ACTIVE_LOW>; 30 30 linux,code = <BTN_MISC>; ··· 32 32 }; 33 33 }; 34 34 35 - button-sw4 { 35 + gpio-keys-1 { 36 36 compatible = "gpio-keys"; 37 37 pinctrl-names = "default"; 38 38 pinctrl-0 = <&gpio_button_sw4_pins_mbmx28lc>; 39 39 40 - sw4 { 40 + switch-sw4 { 41 41 label = "SW4"; 42 42 gpios = <&gpio1 20 GPIO_ACTIVE_LOW>; 43 43 linux,code = <BTN_MISC>;

+1 -1

arch/arm/boot/dts/imx28-tx28.dts

··· 221 221 linux,no-autorepeat; 222 222 }; 223 223 224 - spi_gpio: spi-gpio { 224 + spi_gpio: spi { 225 225 compatible = "spi-gpio"; 226 226 #address-cells = <1>; 227 227 #size-cells = <0>;

+1 -1

arch/arm/boot/dts/imx31.dtsi

··· 297 297 #interrupt-cells = <2>; 298 298 }; 299 299 300 - sdma: sdma@53fd4000 { 300 + sdma: dma-controller@53fd4000 { 301 301 compatible = "fsl,imx31-sdma"; 302 302 reg = <0x53fd4000 0x4000>; 303 303 interrupts = <34>;

+2 -2

arch/arm/boot/dts/imx35-eukrea-mbimxsd35-baseboard.dts

··· 13 13 model = "Eukrea CPUIMX35"; 14 14 compatible = "eukrea,mbimxsd35-baseboard", "eukrea,cpuimx35", "fsl,imx35"; 15 15 16 - gpio_keys { 16 + gpio-keys { 17 17 compatible = "gpio-keys"; 18 18 pinctrl-names = "default"; 19 19 pinctrl-0 = <&pinctrl_bp1>; 20 20 21 - bp1 { 21 + button { 22 22 label = "BP1"; 23 23 gpios = <&gpio3 25 GPIO_ACTIVE_LOW>; 24 24 linux,code = <BTN_MISC>;

+1 -1

arch/arm/boot/dts/imx35.dtsi

··· 284 284 #interrupt-cells = <2>; 285 285 }; 286 286 287 - sdma: sdma@53fd4000 { 287 + sdma: dma-controller@53fd4000 { 288 288 compatible = "fsl,imx35-sdma"; 289 289 reg = <0x53fd4000 0x4000>; 290 290 clocks = <&clks 9>, <&clks 65>;

+3 -3

arch/arm/boot/dts/imx50-kobo-aura.dts

··· 38 38 pinctrl-names = "default"; 39 39 pinctrl-0 = <&pinctrl_gpiokeys>; 40 40 41 - power { 41 + key-power { 42 42 label = "Power Button"; 43 43 gpios = <&gpio4 10 GPIO_ACTIVE_LOW>; 44 44 linux,code = <KEY_POWER>; 45 45 }; 46 46 47 - hallsensor { 47 + event-hallsensor { 48 48 label = "Hallsensor"; 49 49 gpios = <&gpio5 15 GPIO_ACTIVE_LOW>; 50 50 linux,code = <KEY_RESERVED>; 51 51 linux,input-type = <EV_SW>; 52 52 }; 53 53 54 - frontlight { 54 + event-frontlight { 55 55 label = "Frontlight"; 56 56 gpios = <&gpio4 1 GPIO_ACTIVE_LOW>; 57 57 linux,code = <KEY_DISPLAYTOGGLE>;

+1 -1

arch/arm/boot/dts/imx50.dtsi

··· 421 421 status = "disabled"; 422 422 }; 423 423 424 - sdma: sdma@63fb0000 { 424 + sdma: dma-controller@63fb0000 { 425 425 compatible = "fsl,imx50-sdma", "fsl,imx35-sdma"; 426 426 reg = <0x63fb0000 0x4000>; 427 427 interrupts = <6>;

+1 -1

arch/arm/boot/dts/imx51-apf51dev.dts

··· 63 63 leds { 64 64 compatible = "gpio-leds"; 65 65 66 - user { 66 + led-user { 67 67 label = "Heartbeat"; 68 68 gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; 69 69 linux,default-trigger = "heartbeat";

+1 -1

arch/arm/boot/dts/imx51-babbage.dts

··· 154 154 pinctrl-names = "default"; 155 155 pinctrl-0 = <&pinctrl_gpio_keys>; 156 156 157 - power { 157 + key-power { 158 158 label = "Power Button"; 159 159 gpios = <&gpio2 21 GPIO_ACTIVE_HIGH>; 160 160 linux,code = <KEY_POWER>;

+1 -1

arch/arm/boot/dts/imx51-zii-rdu1.dts

··· 137 137 }; 138 138 }; 139 139 140 - spi_gpio: spi-gpio { 140 + spi_gpio: spi { 141 141 compatible = "spi-gpio"; 142 142 #address-cells = <1>; 143 143 #size-cells = <0>;

+1 -1

arch/arm/boot/dts/imx51.dtsi

··· 504 504 status = "disabled"; 505 505 }; 506 506 507 - sdma: sdma@83fb0000 { 507 + sdma: dma-controller@83fb0000 { 508 508 compatible = "fsl,imx51-sdma", "fsl,imx35-sdma"; 509 509 reg = <0x83fb0000 0x4000>; 510 510 interrupts = <6>;

+5 -5

arch/arm/boot/dts/imx53-ard.dts

··· 61 61 gpio-keys { 62 62 compatible = "gpio-keys"; 63 63 64 - home { 64 + key-home { 65 65 label = "Home"; 66 66 gpios = <&gpio5 10 0>; 67 67 linux,code = <KEY_HOME>; 68 68 wakeup-source; 69 69 }; 70 70 71 - back { 71 + key-back { 72 72 label = "Back"; 73 73 gpios = <&gpio5 11 0>; 74 74 linux,code = <KEY_BACK>; 75 75 wakeup-source; 76 76 }; 77 77 78 - program { 78 + key-program { 79 79 label = "Program"; 80 80 gpios = <&gpio5 12 0>; 81 81 linux,code = <KEY_PROGRAM >; 82 82 wakeup-source; 83 83 }; 84 84 85 - volume-up { 85 + key-volume-up { 86 86 label = "Volume Up"; 87 87 gpios = <&gpio5 13 0>; 88 88 linux,code = <KEY_VOLUMEUP>; 89 89 }; 90 90 91 - volume-down { 91 + key-volume-down { 92 92 label = "Volume Down"; 93 93 gpios = <&gpio4 0 0>; 94 94 linux,code = <KEY_VOLUMEDOWN>;

+4 -4

arch/arm/boot/dts/imx53-qsb-common.dtsi

··· 45 45 gpio-keys { 46 46 compatible = "gpio-keys"; 47 47 48 - power { 48 + key-power { 49 49 label = "Power Button"; 50 50 gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; 51 51 linux,code = <KEY_POWER>; 52 52 }; 53 53 54 - volume-up { 54 + key-volume-up { 55 55 label = "Volume Up"; 56 56 gpios = <&gpio2 14 GPIO_ACTIVE_LOW>; 57 57 linux,code = <KEY_VOLUMEUP>; 58 58 wakeup-source; 59 59 }; 60 60 61 - volume-down { 61 + key-volume-down { 62 62 label = "Volume Down"; 63 63 gpios = <&gpio2 15 GPIO_ACTIVE_LOW>; 64 64 linux,code = <KEY_VOLUMEDOWN>; ··· 71 71 pinctrl-names = "default"; 72 72 pinctrl-0 = <&led_pin_gpio7_7>; 73 73 74 - user { 74 + led-user { 75 75 label = "Heartbeat"; 76 76 gpios = <&gpio7 7 0>; 77 77 linux,default-trigger = "heartbeat";

+2 -2

arch/arm/boot/dts/imx53-smd.dts

··· 19 19 gpio-keys { 20 20 compatible = "gpio-keys"; 21 21 22 - volume-up { 22 + key-volume-up { 23 23 label = "Volume Up"; 24 24 gpios = <&gpio2 14 0>; 25 25 linux,code = <KEY_VOLUMEUP>; 26 26 }; 27 27 28 - volume-down { 28 + key-volume-down { 29 29 label = "Volume Down"; 30 30 gpios = <&gpio2 15 0>; 31 31 linux,code = <KEY_VOLUMEDOWN>;

+1 -1

arch/arm/boot/dts/imx53-tx53.dtsi

··· 81 81 pinctrl-names = "default"; 82 82 pinctrl-0 = <&pinctrl_gpio_key>; 83 83 84 - power { 84 + key-power { 85 85 label = "Power Button"; 86 86 gpios = <&gpio5 2 GPIO_ACTIVE_HIGH>; 87 87 linux,code = <116>; /* KEY_POWER */

+1 -1

arch/arm/boot/dts/imx53.dtsi

··· 710 710 status = "disabled"; 711 711 }; 712 712 713 - sdma: sdma@63fb0000 { 713 + sdma: dma-controller@63fb0000 { 714 714 compatible = "fsl,imx53-sdma", "fsl,imx35-sdma"; 715 715 reg = <0x63fb0000 0x4000>; 716 716 interrupts = <6>;

+4 -4

arch/arm/boot/dts/imx6-logicpd-baseboard.dtsi

··· 6 6 keyboard { 7 7 compatible = "gpio-keys"; 8 8 9 - btn0 { 9 + button-0 { 10 10 gpios = <&pcf8575 0 GPIO_ACTIVE_LOW>; 11 11 label = "btn0"; 12 12 linux,code = <KEY_WAKEUP>; ··· 14 14 wakeup-source; 15 15 }; 16 16 17 - btn1 { 17 + button-1 { 18 18 gpios = <&pcf8575 1 GPIO_ACTIVE_LOW>; 19 19 label = "btn1"; 20 20 linux,code = <KEY_WAKEUP>; ··· 22 22 wakeup-source; 23 23 }; 24 24 25 - btn2 { 25 + button-2 { 26 26 gpios = <&pcf8575 2 GPIO_ACTIVE_LOW>; 27 27 label = "btn2"; 28 28 linux,code = <KEY_WAKEUP>; ··· 30 30 wakeup-source; 31 31 }; 32 32 33 - btn3 { 33 + button-3 { 34 34 gpios = <&pcf8575 3 GPIO_ACTIVE_LOW>; 35 35 label = "btn3"; 36 36 linux,code = <KEY_WAKEUP>;

+1 -1

arch/arm/boot/dts/imx6dl-b1x5pv2.dtsi

··· 188 188 rotary-encoder-key { 189 189 compatible = "gpio-keys"; 190 190 191 - rotary-encoder-press { 191 + rotary-encoder-event { 192 192 label = "rotary-encoder press"; 193 193 gpios = <&tca6424a 0 GPIO_ACTIVE_HIGH>; 194 194 linux,code = <KEY_ENTER>;

+16 -16

arch/arm/boot/dts/imx6dl-prtmvt.dts

··· 51 51 pinctrl-0 = <&pinctrl_gpiokeys>; 52 52 autorepeat; 53 53 54 - power { 54 + key-power { 55 55 label = "Power Button"; 56 56 gpios = <&gpio2 23 GPIO_ACTIVE_LOW>; 57 57 linux,code = <KEY_POWER>; 58 58 wakeup-source; 59 59 }; 60 60 61 - f1 { 61 + key-f1 { 62 62 label = "GPIO Key F1"; 63 63 linux,code = <KEY_F1>; 64 64 gpios = <&gpio_pca 0 GPIO_ACTIVE_LOW>; 65 65 }; 66 66 67 - f2 { 67 + key-f2 { 68 68 label = "GPIO Key F2"; 69 69 linux,code = <KEY_F2>; 70 70 gpios = <&gpio_pca 1 GPIO_ACTIVE_LOW>; 71 71 }; 72 72 73 - f3 { 73 + key-f3 { 74 74 label = "GPIO Key F3"; 75 75 linux,code = <KEY_F3>; 76 76 gpios = <&gpio_pca 2 GPIO_ACTIVE_LOW>; 77 77 }; 78 78 79 - f4 { 79 + key-f4 { 80 80 label = "GPIO Key F4"; 81 81 linux,code = <KEY_F4>; 82 82 gpios = <&gpio_pca 3 GPIO_ACTIVE_LOW>; 83 83 }; 84 84 85 - f5 { 85 + key-f5 { 86 86 label = "GPIO Key F5"; 87 87 linux,code = <KEY_F5>; 88 88 gpios = <&gpio_pca 4 GPIO_ACTIVE_LOW>; 89 89 }; 90 90 91 - cycle { 91 + key-cycle { 92 92 label = "GPIO Key CYCLE"; 93 93 linux,code = <KEY_CYCLEWINDOWS>; 94 94 gpios = <&gpio_pca 5 GPIO_ACTIVE_LOW>; 95 95 }; 96 96 97 - esc { 97 + key-esc { 98 98 label = "GPIO Key ESC"; 99 99 linux,code = <KEY_ESC>; 100 100 gpios = <&gpio_pca 6 GPIO_ACTIVE_LOW>; 101 101 }; 102 102 103 - up { 103 + key-up { 104 104 label = "GPIO Key UP"; 105 105 linux,code = <KEY_UP>; 106 106 gpios = <&gpio_pca 7 GPIO_ACTIVE_LOW>; 107 107 }; 108 108 109 - down { 109 + key-down { 110 110 label = "GPIO Key DOWN"; 111 111 linux,code = <KEY_DOWN>; 112 112 gpios = <&gpio_pca 8 GPIO_ACTIVE_LOW>; 113 113 }; 114 114 115 - ok { 115 + key-ok { 116 116 label = "GPIO Key OK"; 117 117 linux,code = <KEY_OK>; 118 118 gpios = <&gpio_pca 9 GPIO_ACTIVE_LOW>; 119 119 }; 120 120 121 - f6 { 121 + key-f6 { 122 122 label = "GPIO Key F6"; 123 123 linux,code = <KEY_F6>; 124 124 gpios = <&gpio_pca 10 GPIO_ACTIVE_LOW>; 125 125 }; 126 126 127 - f7 { 127 + key-f7 { 128 128 label = "GPIO Key F7"; 129 129 linux,code = <KEY_F7>; 130 130 gpios = <&gpio_pca 11 GPIO_ACTIVE_LOW>; 131 131 }; 132 132 133 - f8 { 133 + key-f8 { 134 134 label = "GPIO Key F8"; 135 135 linux,code = <KEY_F8>; 136 136 gpios = <&gpio_pca 12 GPIO_ACTIVE_LOW>; 137 137 }; 138 138 139 - f9 { 139 + key-f9 { 140 140 label = "GPIO Key F9"; 141 141 linux,code = <KEY_F9>; 142 142 gpios = <&gpio_pca 13 GPIO_ACTIVE_LOW>; 143 143 }; 144 144 145 - f10 { 145 + key-f10 { 146 146 label = "GPIO Key F10"; 147 147 linux,code = <KEY_F10>; 148 148 gpios = <&gpio_pca 14 GPIO_ACTIVE_LOW>;

+15 -15

arch/arm/boot/dts/imx6dl-prtvt7.dts

··· 62 62 compatible = "gpio-keys"; 63 63 autorepeat; 64 64 65 - esc { 65 + key-esc { 66 66 label = "GPIO Key ESC"; 67 67 linux,code = <KEY_ESC>; 68 68 gpios = <&gpio_pca 0 GPIO_ACTIVE_LOW>; 69 69 }; 70 70 71 - up { 71 + key-up { 72 72 label = "GPIO Key UP"; 73 73 linux,code = <KEY_UP>; 74 74 gpios = <&gpio_pca 1 GPIO_ACTIVE_LOW>; 75 75 }; 76 76 77 - down { 77 + key-down { 78 78 label = "GPIO Key DOWN"; 79 79 linux,code = <KEY_DOWN>; 80 80 gpios = <&gpio_pca 4 GPIO_ACTIVE_LOW>; 81 81 }; 82 82 83 - enter { 83 + key-enter { 84 84 label = "GPIO Key Enter"; 85 85 linux,code = <KEY_ENTER>; 86 86 gpios = <&gpio_pca 3 GPIO_ACTIVE_LOW>; 87 87 }; 88 88 89 - cycle { 89 + key-cycle { 90 90 label = "GPIO Key CYCLE"; 91 91 linux,code = <KEY_CYCLEWINDOWS>; 92 92 gpios = <&gpio_pca 2 GPIO_ACTIVE_LOW>; 93 93 }; 94 94 95 - f1 { 95 + key-f1 { 96 96 label = "GPIO Key F1"; 97 97 linux,code = <KEY_F1>; 98 98 gpios = <&gpio_pca 14 GPIO_ACTIVE_LOW>; 99 99 }; 100 100 101 - f2 { 101 + key-f2 { 102 102 label = "GPIO Key F2"; 103 103 linux,code = <KEY_F2>; 104 104 gpios = <&gpio_pca 13 GPIO_ACTIVE_LOW>; 105 105 }; 106 106 107 - f3 { 107 + key-f3 { 108 108 label = "GPIO Key F3"; 109 109 linux,code = <KEY_F3>; 110 110 gpios = <&gpio_pca 12 GPIO_ACTIVE_LOW>; 111 111 }; 112 112 113 - f4 { 113 + key-f4 { 114 114 label = "GPIO Key F4"; 115 115 linux,code = <KEY_F4>; 116 116 gpios = <&gpio_pca 11 GPIO_ACTIVE_LOW>; 117 117 }; 118 118 119 - f5 { 119 + key-f5 { 120 120 label = "GPIO Key F5"; 121 121 linux,code = <KEY_F5>; 122 122 gpios = <&gpio_pca 10 GPIO_ACTIVE_LOW>; 123 123 }; 124 124 125 - f6 { 125 + key-f6 { 126 126 label = "GPIO Key F6"; 127 127 linux,code = <KEY_F6>; 128 128 gpios = <&gpio_pca 5 GPIO_ACTIVE_LOW>; 129 129 }; 130 130 131 - f7 { 131 + key-f7 { 132 132 label = "GPIO Key F7"; 133 133 linux,code = <KEY_F7>; 134 134 gpios = <&gpio_pca 6 GPIO_ACTIVE_LOW>; 135 135 }; 136 136 137 - f8 { 137 + key-f8 { 138 138 label = "GPIO Key F8"; 139 139 linux,code = <KEY_F8>; 140 140 gpios = <&gpio_pca 7 GPIO_ACTIVE_LOW>; 141 141 }; 142 142 143 - f9 { 143 + key-f9 { 144 144 label = "GPIO Key F9"; 145 145 linux,code = <KEY_F9>; 146 146 gpios = <&gpio_pca 8 GPIO_ACTIVE_LOW>; 147 147 }; 148 148 149 - f10 { 149 + key-f10 { 150 150 label = "GPIO Key F10"; 151 151 linux,code = <KEY_F10>; 152 152 gpios = <&gpio_pca 9 GPIO_ACTIVE_LOW>;

+1

arch/arm/boot/dts/imx6dl-riotboard.dts

··· 90 90 pinctrl-0 = <&pinctrl_enet>; 91 91 phy-mode = "rgmii-id"; 92 92 phy-handle = <&rgmii_phy>; 93 + /delete-property/ interrupts; 93 94 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, 94 95 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; 95 96 fsl,err006687-workaround-present;

+2 -2

arch/arm/boot/dts/imx6dl-victgo.dts

··· 18 18 pinctrl-0 = <&pinctrl_gpiokeys>; 19 19 autorepeat; 20 20 21 - power { 21 + key-power { 22 22 label = "Power Button"; 23 23 gpios = <&gpio2 23 GPIO_ACTIVE_LOW>; 24 24 linux,code = <KEY_POWER>; 25 25 wakeup-source; 26 26 }; 27 27 28 - enter { 28 + key-enter { 29 29 label = "Rotary Key"; 30 30 gpios = <&gpio2 05 GPIO_ACTIVE_LOW>; 31 31 linux,code = <KEY_ENTER>;

+1

arch/arm/boot/dts/imx6dl-yapp4-common.dtsi

··· 55 55 panel: panel { 56 56 compatible = "dataimage,scf0700c48ggu18"; 57 57 power-supply = <&sw2_reg>; 58 + backlight = <&backlight>; 58 59 status = "disabled"; 59 60 60 61 port {

+3

arch/arm/boot/dts/imx6dl.dtsi

··· 84 84 ocram: sram@900000 { 85 85 compatible = "mmio-sram"; 86 86 reg = <0x00900000 0x20000>; 87 + ranges = <0 0x00900000 0x20000>; 88 + #address-cells = <1>; 89 + #size-cells = <1>; 87 90 clocks = <&clks IMX6QDL_CLK_OCRAM>; 88 91 }; 89 92

+1

arch/arm/boot/dts/imx6q-arm2.dts

··· 178 178 pinctrl-names = "default"; 179 179 pinctrl-0 = <&pinctrl_enet>; 180 180 phy-mode = "rgmii"; 181 + /delete-property/ interrupts; 181 182 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, 182 183 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; 183 184 fsl,err006687-workaround-present;

+1

arch/arm/boot/dts/imx6q-evi.dts

··· 146 146 pinctrl-0 = <&pinctrl_enet>; 147 147 phy-mode = "rgmii"; 148 148 phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; 149 + /delete-property/ interrupts; 149 150 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, 150 151 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; 151 152 fsl,err006687-workaround-present;

+2

arch/arm/boot/dts/imx6q-mccmon6.dts

··· 100 100 pinctrl-0 = <&pinctrl_enet>; 101 101 phy-mode = "rgmii"; 102 102 phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>; 103 + /delete-property/ interrupts; 103 104 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, 104 105 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; 106 + fsl,err006687-workaround-present; 105 107 status = "okay"; 106 108 }; 107 109

+2 -2

arch/arm/boot/dts/imx6q-novena.dts

··· 86 86 linux,code = <KEY_POWER>; 87 87 }; 88 88 89 - lid { 89 + lid-event { 90 90 label = "Lid"; 91 91 gpios = <&gpio4 12 GPIO_ACTIVE_LOW>; 92 92 linux,input-type = <5>; /* EV_SW */ ··· 99 99 pinctrl-names = "default"; 100 100 pinctrl-0 = <&pinctrl_leds_novena>; 101 101 102 - heartbeat { 102 + led-heartbeat { 103 103 label = "novena:white:panel"; 104 104 gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>; 105 105 linux,default-trigger = "default-on";

+1 -1

arch/arm/boot/dts/imx6q-pistachio.dts

··· 100 100 pinctrl-names = "default"; 101 101 pinctrl-0 = <&pinctrl_gpio_keys>; 102 102 103 - power { 103 + key-power { 104 104 label = "Power Button"; 105 105 gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; 106 106 wakeup-source;

+1 -36

arch/arm/boot/dts/imx6q-sabrelite.dts

··· 1 + // SPDX-License-Identifier: GPL-2.0 OR X11 1 2 /* 2 3 * Copyright 2011 Freescale Semiconductor, Inc. 3 4 * Copyright 2011 Linaro Ltd. 4 5 * 5 - * This file is dual-licensed: you can use it either under the terms 6 - * of the GPL or the X11 license, at your option. Note that this dual 7 - * licensing only applies to this file, and not this project as a 8 - * whole. 9 - * 10 - * a) This file is free software; you can redistribute it and/or 11 - * modify it under the terms of the GNU General Public License 12 - * version 2 as published by the Free Software Foundation. 13 - * 14 - * This file is distributed in the hope that it will be useful, 15 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 - * GNU General Public License for more details. 18 - * 19 - * Or, alternatively, 20 - * 21 - * b) Permission is hereby granted, free of charge, to any person 22 - * obtaining a copy of this software and associated documentation 23 - * files (the "Software"), to deal in the Software without 24 - * restriction, including without limitation the rights to use, 25 - * copy, modify, merge, publish, distribute, sublicense, and/or 26 - * sell copies of the Software, and to permit persons to whom the 27 - * Software is furnished to do so, subject to the following 28 - * conditions: 29 - * 30 - * The above copyright notice and this permission notice shall be 31 - * included in all copies or substantial portions of the Software. 32 - * 33 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40 - * OTHER DEALINGS IN THE SOFTWARE. 41 6 */ 42 7 43 8 /dts-v1/;

+1 -1

arch/arm/boot/dts/imx6q-utilite-pro.dts

··· 89 89 pinctrl-names = "default"; 90 90 pinctrl-0 = <&pinctrl_gpio_keys>; 91 91 92 - power { 92 + key-power { 93 93 label = "Power Button"; 94 94 gpios = <&gpio1 29 GPIO_ACTIVE_LOW>; 95 95 linux,code = <KEY_POWER>;

+3 -3

arch/arm/boot/dts/imx6q-var-dt6customboard.dts

··· 28 28 compatible = "gpio-keys"; 29 29 autorepeat; 30 30 31 - back { 31 + key-back { 32 32 gpios = <&gpio4 26 GPIO_ACTIVE_LOW>; 33 33 linux,code = <KEY_BACK>; 34 34 label = "Key Back"; ··· 37 37 wakeup-source; 38 38 }; 39 39 40 - home { 40 + key-home { 41 41 gpios = <&gpio5 11 GPIO_ACTIVE_LOW>; 42 42 linux,code = <KEY_HOME>; 43 43 label = "Key Home"; ··· 46 46 wakeup-source; 47 47 }; 48 48 49 - menu { 49 + key-menu { 50 50 gpios = <&gpio4 25 GPIO_ACTIVE_LOW>; 51 51 linux,code = <KEY_MENU>; 52 52 label = "Key Menu";

+3

arch/arm/boot/dts/imx6q.dtsi

··· 163 163 ocram: sram@900000 { 164 164 compatible = "mmio-sram"; 165 165 reg = <0x00900000 0x40000>; 166 + ranges = <0 0x00900000 0x40000>; 167 + #address-cells = <1>; 168 + #size-cells = <1>; 166 169 clocks = <&clks IMX6QDL_CLK_OCRAM>; 167 170 }; 168 171

-33

arch/arm/boot/dts/imx6qdl-dhcom-pdk2.dtsi

··· 332 332 MX6QDL_PAD_GPIO_0__GPIO1_IO00 0xb1 /* Int */ 333 333 >; 334 334 }; 335 - 336 - pinctrl_ipu1_lcdif: ipu1-lcdif-grp { 337 - fsl,pins = < 338 - MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x38 339 - MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x38 340 - MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x38 341 - MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x38 342 - MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x38 343 - MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x38 344 - MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x38 345 - MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x38 346 - MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x38 347 - MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x38 348 - MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x38 349 - MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x38 350 - MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x38 351 - MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x38 352 - MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x38 353 - MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x38 354 - MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x38 355 - MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x38 356 - MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x38 357 - MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x38 358 - MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x38 359 - MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x38 360 - MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x38 361 - MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x38 362 - MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x38 363 - MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x38 364 - MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x38 365 - MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x38 366 - >; 367 - }; 368 335 };

+33

arch/arm/boot/dts/imx6qdl-dhcom-som.dtsi

··· 667 667 >; 668 668 }; 669 669 670 + pinctrl_ipu1_lcdif: ipu1-lcdif-grp { 671 + fsl,pins = < 672 + MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x38 673 + MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x38 674 + MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x38 675 + MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x38 676 + MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x38 677 + MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x38 678 + MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x38 679 + MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x38 680 + MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x38 681 + MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x38 682 + MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x38 683 + MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x38 684 + MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x38 685 + MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x38 686 + MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x38 687 + MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x38 688 + MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x38 689 + MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x38 690 + MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x38 691 + MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x38 692 + MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x38 693 + MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x38 694 + MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x38 695 + MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x38 696 + MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x38 697 + MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x38 698 + MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x38 699 + MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x38 700 + >; 701 + }; 702 + 670 703 pinctrl_pcie: pcie-grp { 671 704 fsl,pins = < 672 705 MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x1b0b1 /* Wake */

+17 -1

arch/arm/boot/dts/imx6qdl-gw52xx.dtsi

··· 137 137 regulator-always-on; 138 138 }; 139 139 140 + reg_can1_stby: regulator-can1-stby { 141 + compatible = "regulator-fixed"; 142 + pinctrl-names = "default"; 143 + pinctrl-0 = <&pinctrl_reg_can1>; 144 + regulator-name = "can1_stby"; 145 + gpio = <&gpio1 9 GPIO_ACTIVE_LOW>; 146 + regulator-min-microvolt = <3300000>; 147 + regulator-max-microvolt = <3300000>; 148 + }; 149 + 140 150 reg_usb_otg_vbus: regulator-usb-otg-vbus { 141 151 compatible = "regulator-fixed"; 142 152 regulator-name = "usb_otg_vbus"; ··· 180 170 &can1 { 181 171 pinctrl-names = "default"; 182 172 pinctrl-0 = <&pinctrl_flexcan1>; 173 + xceiver-supply = <&reg_can1_stby>; 183 174 status = "okay"; 184 175 }; 185 176 ··· 623 612 fsl,pins = < 624 613 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1 625 614 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1 626 - MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x4001b0b0 /* CAN_STBY */ 627 615 >; 628 616 }; 629 617 ··· 709 699 pinctrl_pwm4: pwm4grp { 710 700 fsl,pins = < 711 701 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 702 + >; 703 + }; 704 + 705 + pinctrl_reg_can1: regcan1grp { 706 + fsl,pins = < 707 + MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x4001b0b0 /* CAN_STBY */ 712 708 >; 713 709 }; 714 710

+17 -1

arch/arm/boot/dts/imx6qdl-gw53xx.dtsi

··· 129 129 regulator-always-on; 130 130 }; 131 131 132 + reg_can1_stby: regulator-can1-stby { 133 + compatible = "regulator-fixed"; 134 + pinctrl-names = "default"; 135 + pinctrl-0 = <&pinctrl_reg_can1>; 136 + regulator-name = "can1_stby"; 137 + gpio = <&gpio1 2 GPIO_ACTIVE_LOW>; 138 + regulator-min-microvolt = <3300000>; 139 + regulator-max-microvolt = <3300000>; 140 + }; 141 + 132 142 reg_usb_h1_vbus: regulator-usb-h1-vbus { 133 143 compatible = "regulator-fixed"; 134 144 regulator-name = "usb_h1_vbus"; ··· 180 170 &can1 { 181 171 pinctrl-names = "default"; 182 172 pinctrl-0 = <&pinctrl_flexcan1>; 173 + xceiver-supply = <&reg_can1_stby>; 183 174 status = "okay"; 184 175 }; 185 176 ··· 611 600 fsl,pins = < 612 601 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1 613 602 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1 614 - MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 /* CAN_STBY */ 615 603 >; 616 604 }; 617 605 ··· 698 688 pinctrl_pwm4: pwm4grp { 699 689 fsl,pins = < 700 690 MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1 691 + >; 692 + }; 693 + 694 + pinctrl_reg_can1: regcan1grp { 695 + fsl,pins = < 696 + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 /* CAN_STBY */ 701 697 >; 702 698 }; 703 699

+17 -1

arch/arm/boot/dts/imx6qdl-gw54xx.dtsi

··· 137 137 regulator-always-on; 138 138 }; 139 139 140 + reg_can1_stby: regulator-can1-stby { 141 + compatible = "regulator-fixed"; 142 + pinctrl-names = "default"; 143 + pinctrl-0 = <&pinctrl_reg_can1>; 144 + regulator-name = "can1_stby"; 145 + gpio = <&gpio1 2 GPIO_ACTIVE_LOW>; 146 + regulator-min-microvolt = <3300000>; 147 + regulator-max-microvolt = <3300000>; 148 + }; 149 + 140 150 reg_usb_h1_vbus: regulator@2 { 141 151 compatible = "regulator-fixed"; 142 152 reg = <2>; ··· 210 200 &can1 { 211 201 pinctrl-names = "default"; 212 202 pinctrl-0 = <&pinctrl_flexcan1>; 203 + xceiver-supply = <&reg_can1_stby>; 213 204 status = "okay"; 214 205 }; 215 206 ··· 698 687 fsl,pins = < 699 688 MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1 700 689 MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX 0x1b0b1 701 - MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 /* CAN_STBY */ 702 690 >; 703 691 }; 704 692 ··· 793 783 fsl,pins = < 794 784 /* DIO3 J16.4 */ 795 785 MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1 786 + >; 787 + }; 788 + 789 + pinctrl_reg_can1: regcan1grp { 790 + fsl,pins = < 791 + MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x4001b0b0 /* CAN_STBY */ 796 792 >; 797 793 }; 798 794

+18 -2

arch/arm/boot/dts/imx6qdl-kontron-samx6i.dtsi

··· 270 270 pinctrl-names = "default"; 271 271 pinctrl-0 = <&pinctrl_enet>; 272 272 phy-mode = "rgmii"; 273 - phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; 273 + phy-handle = <&ethphy>; 274 + 275 + mdio { 276 + #address-cells = <1>; 277 + #size-cells = <0>; 278 + 279 + ethphy: ethernet-phy@1 { 280 + compatible = "ethernet-phy-ieee802.3-c22"; 281 + reg = <1>; 282 + reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; 283 + reset-assert-us = <1000>; 284 + }; 285 + }; 286 + }; 287 + 288 + &hdmi { 289 + ddc-i2c-bus = <&i2c2>; 274 290 }; 275 291 276 292 &i2c_intern { ··· 413 397 414 398 /* HDMI_CTRL */ 415 399 &i2c2 { 416 - clock-frequency = <375000>; 400 + clock-frequency = <100000>; 417 401 pinctrl-names = "default"; 418 402 pinctrl-0 = <&pinctrl_i2c2>; 419 403 };

-1

arch/arm/boot/dts/imx6qdl-mba6.dtsi

··· 244 244 status = "okay"; 245 245 }; 246 246 247 - 248 247 &uart3 { 249 248 pinctrl-names = "default"; 250 249 pinctrl-0 = <&pinctrl_uart3>;

+1

arch/arm/boot/dts/imx6qdl-nit6xlite.dtsi

··· 192 192 phy-mode = "rgmii"; 193 193 phy-handle = <&ethphy>; 194 194 phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>; 195 + /delete-property/ interrupts; 195 196 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, 196 197 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; 197 198 fsl,err006687-workaround-present;

+1

arch/arm/boot/dts/imx6qdl-nitrogen6_max.dtsi

··· 334 334 phy-mode = "rgmii"; 335 335 phy-handle = <&ethphy>; 336 336 phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>; 337 + /delete-property/ interrupts; 337 338 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, 338 339 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; 339 340 fsl,err006687-workaround-present;

+1

arch/arm/boot/dts/imx6qdl-nitrogen6_som2.dtsi

··· 263 263 pinctrl-names = "default"; 264 264 pinctrl-0 = <&pinctrl_enet>; 265 265 phy-mode = "rgmii"; 266 + /delete-property/ interrupts; 266 267 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, 267 268 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; 268 269 fsl,err006687-workaround-present;

+1

arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi

··· 267 267 phy-mode = "rgmii"; 268 268 phy-handle = <&ethphy>; 269 269 phy-reset-gpios = <&gpio1 27 GPIO_ACTIVE_LOW>; 270 + /delete-property/ interrupts; 270 271 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, 271 272 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; 272 273 fsl,err006687-workaround-present;

+1 -1

arch/arm/boot/dts/imx6qdl-phytec-mira-peb-av-02.dtsi

··· 64 64 interrupt-parent = <&gpio3>; 65 65 interrupts = <2 IRQ_TYPE_NONE>; 66 66 status = "disabled"; 67 - }; 67 + }; 68 68 }; 69 69 70 70 &ipu1_di0_disp0 {

+1

arch/arm/boot/dts/imx6qdl-sabreauto.dtsi

··· 295 295 pinctrl-names = "default"; 296 296 pinctrl-0 = <&pinctrl_enet>; 297 297 phy-mode = "rgmii-id"; 298 + /delete-property/ interrupts; 298 299 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, 299 300 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; 300 301 fsl,err006687-workaround-present;

+1 -36

arch/arm/boot/dts/imx6qdl-sabrelite.dtsi

··· 1 + // SPDX-License-Identifier: GPL-2.0 OR X11 1 2 /* 2 3 * Copyright 2011 Freescale Semiconductor, Inc. 3 4 * Copyright 2011 Linaro Ltd. 4 5 * 5 - * This file is dual-licensed: you can use it either under the terms 6 - * of the GPL or the X11 license, at your option. Note that this dual 7 - * licensing only applies to this file, and not this project as a 8 - * whole. 9 - * 10 - * a) This file is free software; you can redistribute it and/or 11 - * modify it under the terms of the GNU General Public License 12 - * version 2 as published by the Free Software Foundation. 13 - * 14 - * This file is distributed in the hope that it will be useful, 15 - * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 - * GNU General Public License for more details. 18 - * 19 - * Or, alternatively, 20 - * 21 - * b) Permission is hereby granted, free of charge, to any person 22 - * obtaining a copy of this software and associated documentation 23 - * files (the "Software"), to deal in the Software without 24 - * restriction, including without limitation the rights to use, 25 - * copy, modify, merge, publish, distribute, sublicense, and/or 26 - * sell copies of the Software, and to permit persons to whom the 27 - * Software is furnished to do so, subject to the following 28 - * conditions: 29 - * 30 - * The above copyright notice and this permission notice shall be 31 - * included in all copies or substantial portions of the Software. 32 - * 33 - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 34 - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES 35 - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 36 - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT 37 - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, 38 - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 39 - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 40 - * OTHER DEALINGS IN THE SOFTWARE. 41 6 */ 42 7 43 8 #include <dt-bindings/clock/imx6qdl-clock.h>

+45 -20

arch/arm/boot/dts/imx6qdl-skov-cpu-revc.dtsi

··· 2 2 // 3 3 // Copyright (C) 2020 Pengutronix, Ulrich Oelmann <kernel@pengutronix.de> 4 4 5 + / { 6 + touchscreen { 7 + compatible = "resistive-adc-touch"; 8 + io-channels = <&adc_ts 1>, <&adc_ts 3>, <&adc_ts 4>, <&adc_ts 5>; 9 + io-channel-names = "y", "z1", "z2", "x"; 10 + touchscreen-min-pressure = <65000>; 11 + touchscreen-inverted-y; 12 + touchscreen-swapped-x-y; 13 + touchscreen-x-plate-ohms = <300>; 14 + touchscreen-y-plate-ohms = <800>; 15 + }; 16 + }; 17 + 5 18 &ecspi4 { 6 19 pinctrl-names = "default"; 7 20 pinctrl-0 = <&pinctrl_ecspi4>; 8 21 cs-gpios = <&gpio3 20 GPIO_ACTIVE_LOW>; 9 22 status = "okay"; 10 23 11 - touchscreen@0 { 12 - pinctrl-names = "default"; 13 - pinctrl-0 = <&pinctrl_touch>; 14 - compatible = "ti,tsc2046"; 24 + adc_ts: adc@0 { 25 + compatible = "ti,tsc2046e-adc"; 15 26 reg = <0>; 27 + pinctrl-0 = <&pinctrl_touch>; 28 + pinctrl-names ="default"; 16 29 spi-max-frequency = <1000000>; 17 30 interrupts-extended = <&gpio3 19 IRQ_TYPE_LEVEL_LOW>; 18 - vcc-supply = <&reg_3v3>; 19 - pendown-gpio = <&gpio3 19 GPIO_ACTIVE_LOW>; 20 - ti,x-plate-ohms = /bits/ 16 <850>; 21 - ti,y-plate-ohms = /bits/ 16 <295>; 22 - ti,pressure-min = /bits/ 16 <2>; 23 - ti,pressure-max = /bits/ 16 <1500>; 24 - ti,vref-mv = /bits/ 16 <3300>; 25 - ti,settle-delay-usec = /bits/ 16 <15>; 26 - ti,vref-delay-usecs = /bits/ 16 <0>; 27 - ti,penirq-recheck-delay-usecs = /bits/ 16 <100>; 28 - ti,debounce-max = /bits/ 16 <100>; 29 - ti,debounce-tol = /bits/ 16 <(~0)>; 30 - ti,debounce-rep = /bits/ 16 <4>; 31 - touchscreen-swapped-x-y; 32 - touchscreen-inverted-y; 33 - wakeup-source; 31 + #io-channel-cells = <1>; 32 + 33 + #address-cells = <1>; 34 + #size-cells = <0>; 35 + 36 + channel@1 { 37 + reg = <1>; 38 + settling-time-us = <700>; 39 + oversampling-ratio = <5>; 40 + }; 41 + 42 + channel@3 { 43 + reg = <3>; 44 + settling-time-us = <700>; 45 + oversampling-ratio = <5>; 46 + }; 47 + 48 + channel@4 { 49 + reg = <4>; 50 + settling-time-us = <700>; 51 + oversampling-ratio = <5>; 52 + }; 53 + 54 + channel@5 { 55 + reg = <5>; 56 + settling-time-us = <700>; 57 + oversampling-ratio = <5>; 58 + }; 34 59 }; 35 60 }; 36 61

+2

arch/arm/boot/dts/imx6qdl-tqma6a.dtsi

··· 7 7 #include <dt-bindings/gpio/gpio.h> 8 8 9 9 &fec { 10 + /delete-property/ interrupts; 10 11 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, 11 12 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; 12 13 fsl,err006687-workaround-present; ··· 36 35 compatible = "st,24c64", "atmel,24c64"; 37 36 reg = <0x50>; 38 37 pagesize = <32>; 38 + vcc-supply = <&reg_3p3v>; 39 39 }; 40 40 }; 41 41

+1

arch/arm/boot/dts/imx6qdl-tqma6b.dtsi

··· 29 29 compatible = "st,24c64", "atmel,24c64"; 30 30 reg = <0x50>; 31 31 pagesize = <32>; 32 + vcc-supply = <&reg_3p3v>; 32 33 }; 33 34 };

+1

arch/arm/boot/dts/imx6qdl-ts7970.dtsi

··· 192 192 pinctrl-names = "default"; 193 193 pinctrl-0 = <&pinctrl_enet>; 194 194 phy-mode = "rgmii"; 195 + /delete-property/ interrupts; 195 196 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_HIGH>, 196 197 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>; 197 198 fsl,err006687-workaround-present;

+22

arch/arm/boot/dts/imx6qdl-vicut1.dtsi

··· 37 37 power-supply = <&reg_3v3>; 38 38 }; 39 39 40 + /* only for backwards compatibility with old HW */ 41 + backlight_isb: backlight-isb { 42 + compatible = "pwm-backlight"; 43 + pwms = <&pwm2 0 5000000 0>; 44 + brightness-levels = <0 8 48 255>; 45 + num-interpolated-steps = <5>; 46 + default-brightness-level = <0>; 47 + power-supply = <&reg_3v3>; 48 + }; 49 + 40 50 connector { 41 51 compatible = "composite-video-connector"; 42 52 label = "Composite0"; ··· 380 370 status = "okay"; 381 371 }; 382 372 373 + &pwm2 { 374 + pinctrl-names = "default"; 375 + pinctrl-0 = <&pinctrl_pwm2>; 376 + status = "okay"; 377 + }; 378 + 383 379 &pwm3 { 384 380 pinctrl-names = "default"; 385 381 pinctrl-0 = <&pinctrl_pwm3>; ··· 614 598 pinctrl_pwm1: pwm1grp { 615 599 fsl,pins = < 616 600 MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x1b0b0 601 + >; 602 + }; 603 + 604 + pinctrl_pwm2: pwm2grp { 605 + fsl,pins = < 606 + MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x1b0b0 617 607 >; 618 608 }; 619 609

+1 -1

arch/arm/boot/dts/imx6qdl.dtsi

··· 929 929 interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>; 930 930 }; 931 931 932 - sdma: sdma@20ec000 { 932 + sdma: dma-controller@20ec000 { 933 933 compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma"; 934 934 reg = <0x020ec000 0x4000>; 935 935 interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>;

+6

arch/arm/boot/dts/imx6qp.dtsi

··· 9 9 ocram2: sram@940000 { 10 10 compatible = "mmio-sram"; 11 11 reg = <0x00940000 0x20000>; 12 + ranges = <0 0x00940000 0x20000>; 13 + #address-cells = <1>; 14 + #size-cells = <1>; 12 15 clocks = <&clks IMX6QDL_CLK_OCRAM>; 13 16 }; 14 17 15 18 ocram3: sram@960000 { 16 19 compatible = "mmio-sram"; 17 20 reg = <0x00960000 0x20000>; 21 + ranges = <0 0x00960000 0x20000>; 22 + #address-cells = <1>; 23 + #size-cells = <1>; 18 24 clocks = <&clks IMX6QDL_CLK_OCRAM>; 19 25 }; 20 26

+14 -11

arch/arm/boot/dts/imx6sl.dtsi

··· 61 61 <792000 1175000>, 62 62 <396000 975000>; 63 63 fsl,soc-operating-points = 64 - /* ARM kHz SOC-PU uV */ 65 - <996000 1225000>, 66 - <792000 1175000>, 67 - <396000 1175000>; 64 + /* ARM kHz SOC-PU uV */ 65 + <996000 1225000>, 66 + <792000 1175000>, 67 + <396000 1175000>; 68 68 clock-latency = <61036>; /* two CLK32 periods */ 69 69 #cooling-cells = <2>; 70 70 clocks = <&clks IMX6SL_CLK_ARM>, <&clks IMX6SL_CLK_PLL2_PFD2>, ··· 115 115 ocram: sram@900000 { 116 116 compatible = "mmio-sram"; 117 117 reg = <0x00900000 0x20000>; 118 + ranges = <0 0x00900000 0x20000>; 119 + #address-cells = <1>; 120 + #size-cells = <1>; 118 121 clocks = <&clks IMX6SL_CLK_OCRAM>; 119 122 }; 120 123 ··· 225 222 226 223 uart5: serial@2018000 { 227 224 compatible = "fsl,imx6sl-uart", 228 - "fsl,imx6q-uart", "fsl,imx21-uart"; 225 + "fsl,imx6q-uart", "fsl,imx21-uart"; 229 226 reg = <0x02018000 0x4000>; 230 227 interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>; 231 228 clocks = <&clks IMX6SL_CLK_UART>, ··· 238 235 239 236 uart1: serial@2020000 { 240 237 compatible = "fsl,imx6sl-uart", 241 - "fsl,imx6q-uart", "fsl,imx21-uart"; 238 + "fsl,imx6q-uart", "fsl,imx21-uart"; 242 239 reg = <0x02020000 0x4000>; 243 240 interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>; 244 241 clocks = <&clks IMX6SL_CLK_UART>, ··· 251 248 252 249 uart2: serial@2024000 { 253 250 compatible = "fsl,imx6sl-uart", 254 - "fsl,imx6q-uart", "fsl,imx21-uart"; 251 + "fsl,imx6q-uart", "fsl,imx21-uart"; 255 252 reg = <0x02024000 0x4000>; 256 253 interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH>; 257 254 clocks = <&clks IMX6SL_CLK_UART>, ··· 312 309 313 310 uart3: serial@2034000 { 314 311 compatible = "fsl,imx6sl-uart", 315 - "fsl,imx6q-uart", "fsl,imx21-uart"; 312 + "fsl,imx6q-uart", "fsl,imx21-uart"; 316 313 reg = <0x02034000 0x4000>; 317 314 interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>; 318 315 clocks = <&clks IMX6SL_CLK_UART>, ··· 325 322 326 323 uart4: serial@2038000 { 327 324 compatible = "fsl,imx6sl-uart", 328 - "fsl,imx6q-uart", "fsl,imx21-uart"; 325 + "fsl,imx6q-uart", "fsl,imx21-uart"; 329 326 reg = <0x02038000 0x4000>; 330 327 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>; 331 328 clocks = <&clks IMX6SL_CLK_UART>, ··· 714 711 #power-domain-cells = <0>; 715 712 power-supply = <&reg_pu>; 716 713 clocks = <&clks IMX6SL_CLK_GPU2D_OVG>, 717 - <&clks IMX6SL_CLK_GPU2D_PODF>; 714 + <&clks IMX6SL_CLK_GPU2D_PODF>; 718 715 }; 719 716 720 717 pd_disp: power-domain@2 { ··· 750 747 interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>; 751 748 }; 752 749 753 - sdma: sdma@20ec000 { 750 + sdma: dma-controller@20ec000 { 754 751 compatible = "fsl,imx6sl-sdma", "fsl,imx6q-sdma"; 755 752 reg = <0x020ec000 0x4000>; 756 753 interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>;

+3

arch/arm/boot/dts/imx6sll.dtsi

··· 115 115 ocram: sram@900000 { 116 116 compatible = "mmio-sram"; 117 117 reg = <0x00900000 0x20000>; 118 + ranges = <0 0x00900000 0x20000>; 119 + #address-cells = <1>; 120 + #size-cells = <1>; 118 121 }; 119 122 120 123 intc: interrupt-controller@a01000 {

+6 -8

arch/arm/boot/dts/imx6sx-udoo-neo.dtsi

··· 226 226 &iomuxc { 227 227 pinctrl_bt_reg: btreggrp { 228 228 fsl,pins = 229 - <MX6SX_PAD_KEY_ROW2__GPIO2_IO_17 0x15059>; 229 + <MX6SX_PAD_KEY_ROW2__GPIO2_IO_17 0x15059>; 230 230 }; 231 231 232 232 pinctrl_enet1: enet1grp { ··· 306 306 >; 307 307 }; 308 308 309 - 310 309 pinctrl_uart1: uart1grp { 311 310 fsl,pins = 312 311 <MX6SX_PAD_GPIO1_IO04__UART1_DCE_TX 0x1b0b1>, ··· 346 347 347 348 pinctrl_otg1_reg: otg1grp { 348 349 fsl,pins = 349 - <MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9 0x10b0>; 350 + <MX6SX_PAD_GPIO1_IO09__GPIO1_IO_9 0x10b0>; 350 351 }; 351 - 352 352 353 353 pinctrl_otg2_reg: otg2grp { 354 354 fsl,pins = 355 - <MX6SX_PAD_NAND_RE_B__GPIO4_IO_12 0x10b0>; 355 + <MX6SX_PAD_NAND_RE_B__GPIO4_IO_12 0x10b0>; 356 356 }; 357 357 358 358 pinctrl_usb_otg1: usbotg1grp { 359 359 fsl,pins = 360 - <MX6SX_PAD_GPIO1_IO10__ANATOP_OTG1_ID 0x17059>, 361 - <MX6SX_PAD_GPIO1_IO08__USB_OTG1_OC 0x10b0>; 360 + <MX6SX_PAD_GPIO1_IO10__ANATOP_OTG1_ID 0x17059>, 361 + <MX6SX_PAD_GPIO1_IO08__USB_OTG1_OC 0x10b0>; 362 362 }; 363 363 364 364 pinctrl_usb_otg2: usbot2ggrp { 365 365 fsl,pins = 366 - <MX6SX_PAD_QSPI1A_DATA0__USB_OTG2_OC 0x10b0>; 366 + <MX6SX_PAD_QSPI1A_DATA0__USB_OTG2_OC 0x10b0>; 367 367 }; 368 368 369 369 pinctrl_usdhc2: usdhc2grp {

+7 -1

arch/arm/boot/dts/imx6sx.dtsi

··· 164 164 ocram_s: sram@8f8000 { 165 165 compatible = "mmio-sram"; 166 166 reg = <0x008f8000 0x4000>; 167 + ranges = <0 0x008f8000 0x4000>; 168 + #address-cells = <1>; 169 + #size-cells = <1>; 167 170 clocks = <&clks IMX6SX_CLK_OCRAM_S>; 168 171 }; 169 172 170 173 ocram: sram@900000 { 171 174 compatible = "mmio-sram"; 172 175 reg = <0x00900000 0x20000>; 176 + ranges = <0 0x00900000 0x20000>; 177 + #address-cells = <1>; 178 + #size-cells = <1>; 173 179 clocks = <&clks IMX6SX_CLK_OCRAM>; 174 180 }; 175 181 ··· 848 842 reg = <0x020e4000 0x4000>; 849 843 }; 850 844 851 - sdma: sdma@20ec000 { 845 + sdma: dma-controller@20ec000 { 852 846 compatible = "fsl,imx6sx-sdma", "fsl,imx6q-sdma"; 853 847 reg = <0x020ec000 0x4000>; 854 848 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;

+1 -1

arch/arm/boot/dts/imx6ul-14x14-evk.dtsi

··· 82 82 "AMIC", "MICB"; 83 83 }; 84 84 85 - spi4 { 85 + spi-4 { 86 86 compatible = "spi-gpio"; 87 87 pinctrl-names = "default"; 88 88 pinctrl-0 = <&pinctrl_spi4>;

+4 -4

arch/arm/boot/dts/imx6ul-kontron-n6310-s-43.dts arch/arm/boot/dts/imx6ul-kontron-bl-43.dts

··· 5 5 * Copyright (c) 2019 Krzysztof Kozlowski <krzk@kernel.org> 6 6 */ 7 7 8 - #include "imx6ul-kontron-n6310-s.dts" 8 + #include "imx6ul-kontron-bl.dts" 9 9 10 10 / { 11 - model = "Kontron N6310 S 43"; 12 - compatible = "kontron,imx6ul-n6310-s-43", "kontron,imx6ul-n6310-s", 13 - "kontron,imx6ul-n6310-som", "fsl,imx6ul"; 11 + model = "Kontron BL i.MX6UL 43 (N631X S 43)"; 12 + compatible = "kontron,bl-imx6ul-43", "kontron,bl-imx6ul", 13 + "kontron,sl-imx6ul", "fsl,imx6ul"; 14 14 15 15 backlight { 16 16 compatible = "pwm-backlight";

+4 -5

arch/arm/boot/dts/imx6ul-kontron-n6310-s.dts arch/arm/boot/dts/imx6ul-kontron-bl.dts

··· 7 7 8 8 /dts-v1/; 9 9 10 - #include "imx6ul-kontron-n6310-som.dtsi" 11 - #include "imx6ul-kontron-n6x1x-s.dtsi" 10 + #include "imx6ul-kontron-sl.dtsi" 11 + #include "imx6ul-kontron-bl-common.dtsi" 12 12 13 13 / { 14 - model = "Kontron N6310 S"; 15 - compatible = "kontron,imx6ul-n6310-s", "kontron,imx6ul-n6310-som", 16 - "fsl,imx6ul"; 14 + model = "Kontron BL i.MX6UL (N631X S)"; 15 + compatible = "kontron,bl-imx6ul", "kontron,sl-imx6ul", "fsl,imx6ul"; 17 16 };

-41

arch/arm/boot/dts/imx6ul-kontron-n6310-som.dtsi

··· 1 - // SPDX-License-Identifier: GPL-2.0 2 - /* 3 - * Copyright (C) 2017 exceet electronics GmbH 4 - * Copyright (C) 2018 Kontron Electronics GmbH 5 - * Copyright (c) 2019 Krzysztof Kozlowski <krzk@kernel.org> 6 - */ 7 - 8 - #include "imx6ul.dtsi" 9 - #include "imx6ul-kontron-n6x1x-som-common.dtsi" 10 - 11 - / { 12 - model = "Kontron N6310 SOM"; 13 - compatible = "kontron,imx6ul-n6310-som", "fsl,imx6ul"; 14 - 15 - memory@80000000 { 16 - reg = <0x80000000 0x10000000>; 17 - device_type = "memory"; 18 - }; 19 - }; 20 - 21 - &qspi { 22 - flash@0 { 23 - #address-cells = <1>; 24 - #size-cells = <1>; 25 - compatible = "spi-nand"; 26 - spi-max-frequency = <108000000>; 27 - spi-tx-bus-width = <4>; 28 - spi-rx-bus-width = <4>; 29 - reg = <0>; 30 - 31 - partition@0 { 32 - label = "ubi1"; 33 - reg = <0x00000000 0x08000000>; 34 - }; 35 - 36 - partition@8000000 { 37 - label = "ubi2"; 38 - reg = <0x08000000 0x08000000>; 39 - }; 40 - }; 41 - };

-16

arch/arm/boot/dts/imx6ul-kontron-n6311-s.dts

··· 1 - // SPDX-License-Identifier: GPL-2.0 2 - /* 3 - * Copyright (C) 2017 exceet electronics GmbH 4 - * Copyright (C) 2018 Kontron Electronics GmbH 5 - */ 6 - 7 - /dts-v1/; 8 - 9 - #include "imx6ul-kontron-n6311-som.dtsi" 10 - #include "imx6ul-kontron-n6x1x-s.dtsi" 11 - 12 - / { 13 - model = "Kontron N6311 S"; 14 - compatible = "kontron,imx6ul-n6311-s", "kontron,imx6ul-n6311-som", 15 - "fsl,imx6ul"; 16 - };

-40

arch/arm/boot/dts/imx6ul-kontron-n6311-som.dtsi

··· 1 - // SPDX-License-Identifier: GPL-2.0 2 - /* 3 - * Copyright (C) 2017 exceet electronics GmbH 4 - * Copyright (C) 2018 Kontron Electronics GmbH 5 - */ 6 - 7 - #include "imx6ul.dtsi" 8 - #include "imx6ul-kontron-n6x1x-som-common.dtsi" 9 - 10 - / { 11 - model = "Kontron N6311 SOM"; 12 - compatible = "kontron,imx6ul-n6311-som", "fsl,imx6ul"; 13 - 14 - memory@80000000 { 15 - reg = <0x80000000 0x20000000>; 16 - device_type = "memory"; 17 - }; 18 - }; 19 - 20 - &qspi { 21 - flash@0 { 22 - #address-cells = <1>; 23 - #size-cells = <1>; 24 - compatible = "spi-nand"; 25 - spi-max-frequency = <104000000>; 26 - spi-tx-bus-width = <4>; 27 - spi-rx-bus-width = <4>; 28 - reg = <0>; 29 - 30 - partition@0 { 31 - label = "ubi1"; 32 - reg = <0x00000000 0x08000000>; 33 - }; 34 - 35 - partition@8000000 { 36 - label = "ubi2"; 37 - reg = <0x08000000 0x18000000>; 38 - }; 39 - }; 40 - };

arch/arm/boot/dts/imx6ul-kontron-n6x1x-s.dtsi arch/arm/boot/dts/imx6ul-kontron-bl-common.dtsi

+15

arch/arm/boot/dts/imx6ul-kontron-n6x1x-som-common.dtsi arch/arm/boot/dts/imx6ul-kontron-sl-common.dtsi

··· 11 11 chosen { 12 12 stdout-path = &uart4; 13 13 }; 14 + 15 + memory@80000000 { 16 + reg = <0x80000000 0x10000000>; 17 + device_type = "memory"; 18 + }; 14 19 }; 15 20 16 21 &ecspi2 { ··· 60 55 pinctrl-names = "default"; 61 56 pinctrl-0 = <&pinctrl_qspi>; 62 57 status = "okay"; 58 + 59 + spi-flash@0 { 60 + #address-cells = <1>; 61 + #size-cells = <1>; 62 + compatible = "spi-nand"; 63 + spi-max-frequency = <104000000>; 64 + spi-tx-bus-width = <4>; 65 + spi-rx-bus-width = <4>; 66 + reg = <0>; 67 + }; 63 68 }; 64 69 65 70 &wdog1 {

+14

arch/arm/boot/dts/imx6ul-kontron-sl.dtsi

··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + /* 3 + * Copyright (C) 2017 exceet electronics GmbH 4 + * Copyright (C) 2018 Kontron Electronics GmbH 5 + * Copyright (c) 2019 Krzysztof Kozlowski <krzk@kernel.org> 6 + */ 7 + 8 + #include "imx6ul.dtsi" 9 + #include "imx6ul-kontron-sl-common.dtsi" 10 + 11 + / { 12 + model = "Kontron SL i.MX6UL (N631X SOM)"; 13 + compatible = "kontron,sl-imx6ul", "fsl,imx6ul"; 14 + };

+1 -1

arch/arm/boot/dts/imx6ul-tx6ul.dtsi

··· 212 212 enable-active-high; 213 213 }; 214 214 215 - spi_gpio: spi-gpio { 215 + spi_gpio: spi { 216 216 #address-cells = <1>; 217 217 #size-cells = <0>; 218 218 compatible = "spi-gpio";

+1 -1

arch/arm/boot/dts/imx6ul.dtsi

··· 744 744 status = "disabled"; 745 745 }; 746 746 747 - sdma: sdma@20ec000 { 747 + sdma: dma-controller@20ec000 { 748 748 compatible = "fsl,imx6ul-sdma", "fsl,imx6q-sdma", 749 749 "fsl,imx35-sdma"; 750 750 reg = <0x020ec000 0x4000>;

+15

arch/arm/boot/dts/imx6ull-kontron-bl.dts

··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + /* 3 + * Copyright (C) 2017 exceet electronics GmbH 4 + * Copyright (C) 2019 Kontron Electronics GmbH 5 + */ 6 + 7 + /dts-v1/; 8 + 9 + #include "imx6ull-kontron-sl.dtsi" 10 + #include "imx6ul-kontron-bl-common.dtsi" 11 + 12 + / { 13 + model = "Kontron BL i.MX6ULL (N641X S)"; 14 + compatible = "kontron,bl-imx6ull", "kontron,sl-imx6ull", "fsl,imx6ull"; 15 + };

-16

arch/arm/boot/dts/imx6ull-kontron-n6411-s.dts

··· 1 - // SPDX-License-Identifier: GPL-2.0 2 - /* 3 - * Copyright (C) 2017 exceet electronics GmbH 4 - * Copyright (C) 2019 Kontron Electronics GmbH 5 - */ 6 - 7 - /dts-v1/; 8 - 9 - #include "imx6ull-kontron-n6411-som.dtsi" 10 - #include "imx6ul-kontron-n6x1x-s.dtsi" 11 - 12 - / { 13 - model = "Kontron N6411 S"; 14 - compatible = "kontron,imx6ull-n6411-s", "kontron,imx6ull-n6411-som", 15 - "fsl,imx6ull"; 16 - };

-40

arch/arm/boot/dts/imx6ull-kontron-n6411-som.dtsi

··· 1 - // SPDX-License-Identifier: GPL-2.0 2 - /* 3 - * Copyright (C) 2017 exceet electronics GmbH 4 - * Copyright (C) 2018 Kontron Electronics GmbH 5 - */ 6 - 7 - #include "imx6ull.dtsi" 8 - #include "imx6ul-kontron-n6x1x-som-common.dtsi" 9 - 10 - / { 11 - model = "Kontron N6411 SOM"; 12 - compatible = "kontron,imx6ull-n6311-som", "fsl,imx6ull"; 13 - 14 - memory@80000000 { 15 - reg = <0x80000000 0x20000000>; 16 - device_type = "memory"; 17 - }; 18 - }; 19 - 20 - &qspi { 21 - flash@0 { 22 - #address-cells = <1>; 23 - #size-cells = <1>; 24 - compatible = "spi-nand"; 25 - spi-max-frequency = <104000000>; 26 - spi-tx-bus-width = <4>; 27 - spi-rx-bus-width = <4>; 28 - reg = <0>; 29 - 30 - partition@0 { 31 - label = "ubi1"; 32 - reg = <0x00000000 0x08000000>; 33 - }; 34 - 35 - partition@8000000 { 36 - label = "ubi2"; 37 - reg = <0x08000000 0x18000000>; 38 - }; 39 - }; 40 - };

+13

arch/arm/boot/dts/imx6ull-kontron-sl.dtsi

··· 1 + // SPDX-License-Identifier: GPL-2.0 2 + /* 3 + * Copyright (C) 2017 exceet electronics GmbH 4 + * Copyright (C) 2018 Kontron Electronics GmbH 5 + */ 6 + 7 + #include "imx6ull.dtsi" 8 + #include "imx6ul-kontron-sl-common.dtsi" 9 + 10 + / { 11 + model = "Kontron SL i.MX6ULL (N641X SOM)"; 12 + compatible = "kontron,sl-imx6ull", "fsl,imx6ull"; 13 + };

+5 -5

arch/arm/boot/dts/imx7d-pico.dtsi

··· 41 41 regulator-max-microvolt = <3300000>; 42 42 gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>; 43 43 enable-active-high; 44 - }; 44 + }; 45 45 46 46 reg_wlreg_on: regulator-wlreg_on { 47 47 compatible = "regulator-fixed"; ··· 432 432 MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x1 433 433 MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x1 434 434 MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x1 435 - MX7D_PAD_SD3_RESET_B__GPIO6_IO11 0x1 /* Ethernet reset */ 435 + MX7D_PAD_SD3_RESET_B__GPIO6_IO11 0x1 /* Ethernet reset */ 436 436 >; 437 437 }; 438 438 ··· 493 493 494 494 pinctrl_pwm1: pwm1 { 495 495 fsl,pins = < 496 - MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x7f 496 + MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x7f 497 497 >; 498 498 }; 499 499 500 500 pinctrl_pwm2: pwm2 { 501 501 fsl,pins = < 502 - MX7D_PAD_GPIO1_IO09__PWM2_OUT 0x7f 502 + MX7D_PAD_GPIO1_IO09__PWM2_OUT 0x7f 503 503 >; 504 504 }; 505 505 506 506 pinctrl_pwm3: pwm3 { 507 507 fsl,pins = < 508 - MX7D_PAD_GPIO1_IO10__PWM3_OUT 0x7f 508 + MX7D_PAD_GPIO1_IO10__PWM3_OUT 0x7f 509 509 >; 510 510 }; 511 511

+4 -9

arch/arm/boot/dts/imx7d-sdb.dts

··· 24 24 pinctrl-names = "default"; 25 25 pinctrl-0 = <&pinctrl_gpio_keys>; 26 26 27 - volume-up { 27 + key-volume-up { 28 28 label = "Volume Up"; 29 29 gpios = <&gpio5 11 GPIO_ACTIVE_LOW>; 30 30 linux,code = <KEY_VOLUMEUP>; 31 31 wakeup-source; 32 32 }; 33 33 34 - volume-down { 34 + key-volume-down { 35 35 label = "Volume Down"; 36 36 gpios = <&gpio5 10 GPIO_ACTIVE_LOW>; 37 37 linux,code = <KEY_VOLUMEDOWN>; ··· 39 39 }; 40 40 }; 41 41 42 - spi4 { 42 + spi-4 { 43 43 compatible = "spi-gpio"; 44 44 pinctrl-names = "default"; 45 45 pinctrl-0 = <&pinctrl_spi4>; ··· 206 206 interrupt-parent = <&gpio2>; 207 207 interrupts = <29 0>; 208 208 pendown-gpio = <&gpio2 29 GPIO_ACTIVE_HIGH>; 209 - ti,x-min = /bits/ 16 <0>; 210 - ti,x-max = /bits/ 16 <0>; 211 - ti,y-min = /bits/ 16 <0>; 212 - ti,y-max = /bits/ 16 <0>; 213 - ti,pressure-max = /bits/ 16 <0>; 214 - ti,x-plate-ohms = /bits/ 16 <400>; 209 + touchscreen-max-pressure = <255>; 215 210 wakeup-source; 216 211 }; 217 212 };

+1 -1

arch/arm/boot/dts/imx7d-zii-rmu2.dts

··· 24 24 pinctrl-0 = <&pinctrl_leds_debug>; 25 25 pinctrl-names = "default"; 26 26 27 - debug { 27 + led-debug { 28 28 label = "zii:green:debug1"; 29 29 gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; 30 30 linux,default-trigger = "heartbeat";

+1 -1

arch/arm/boot/dts/imx7d-zii-rpu2.dts

··· 36 36 pinctrl-0 = <&pinctrl_leds_debug>; 37 37 pinctrl-names = "default"; 38 38 39 - debug { 39 + led-debug { 40 40 label = "zii:green:debug1"; 41 41 gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>; 42 42 linux,default-trigger = "heartbeat";

+1 -1

arch/arm/boot/dts/imx7s.dtsi

··· 1224 1224 status = "disabled"; 1225 1225 }; 1226 1226 1227 - sdma: sdma@30bd0000 { 1227 + sdma: dma-controller@30bd0000 { 1228 1228 compatible = "fsl,imx7d-sdma", "fsl,imx35-sdma"; 1229 1229 reg = <0x30bd0000 0x10000>; 1230 1230 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;

+6 -4

arch/arm/boot/dts/imx7ulp.dtsi

··· 328 328 compatible = "fsl,imx7ulp-lpi2c"; 329 329 reg = <0x40a40000 0x10000>; 330 330 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; 331 - clocks = <&pcc3 IMX7ULP_CLK_LPI2C6>; 332 - clock-names = "ipg"; 331 + clocks = <&pcc3 IMX7ULP_CLK_LPI2C6>, 332 + <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>; 333 + clock-names = "per", "ipg"; 333 334 assigned-clocks = <&pcc3 IMX7ULP_CLK_LPI2C6>; 334 335 assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC>; 335 336 assigned-clock-rates = <48000000>; ··· 341 340 compatible = "fsl,imx7ulp-lpi2c"; 342 341 reg = <0x40a50000 0x10000>; 343 342 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; 344 - clocks = <&pcc3 IMX7ULP_CLK_LPI2C7>; 345 - clock-names = "ipg"; 343 + clocks = <&pcc3 IMX7ULP_CLK_LPI2C7>, 344 + <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>; 345 + clock-names = "per", "ipg"; 346 346 assigned-clocks = <&pcc3 IMX7ULP_CLK_LPI2C7>; 347 347 assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC>; 348 348 assigned-clock-rates = <48000000>;

+1 -1

arch/arm/boot/dts/ls1021a.dtsi

··· 647 647 status = "disabled"; 648 648 }; 649 649 650 - edma0: edma@2c00000 { 650 + edma0: dma-controller@2c00000 { 651 651 #dma-cells = <2>; 652 652 compatible = "fsl,vf610-edma"; 653 653 reg = <0x0 0x2c00000 0x0 0x10000>,

+1 -1

arch/arm/boot/dts/vf610-bk4.dts

··· 61 61 regulator-max-microvolt = <3300000>; 62 62 }; 63 63 64 - spi-gpio { 64 + spi { 65 65 compatible = "spi-gpio"; 66 66 pinctrl-0 = <&pinctrl_gpio_spi>; 67 67 pinctrl-names = "default";

+51 -1

arch/arm/boot/dts/vf610-pinfunc.h

··· 420 420 #define VF610_PAD_PTD29__FTM3_CH2 0x104 0x000 ALT4 0x0 421 421 #define VF610_PAD_PTD29__DSPI2_SIN 0x104 0x000 ALT5 0x0 422 422 #define VF610_PAD_PTD29__DEBUG_OUT11 0x104 0x000 ALT7 0x0 423 - #define VF610_PAD_PTD28__GPIO_66 0x108 0x000 ALT0 0x0 423 + #define VF610_PAD_PTD28__GPIO_66 0x108 0x000 ALT0 0x0 424 424 #define VF610_PAD_PTD28__FB_AD28 0x108 0x000 ALT1 0x0 425 425 #define VF610_PAD_PTD28__NF_IO12 0x108 0x000 ALT2 0x0 426 426 #define VF610_PAD_PTD28__I2C2_SCL 0x108 0x34C ALT3 0x1 ··· 802 802 #define VF610_PAD_PTE28__EWM_OUT 0x214 0x000 ALT7 0x0 803 803 #define VF610_PAD_PTA7__GPIO_134 0x218 0x000 ALT0 0x0 804 804 #define VF610_PAD_PTA7__VIU_PIX_CLK 0x218 0x3AC ALT1 0x1 805 + #define VF610_PAD_DDR_RESETB 0x21c 0x000 ALT0 0x0 806 + #define VF610_PAD_DDR_A15__DDR_A_15 0x220 0x000 ALT0 0x0 807 + #define VF610_PAD_DDR_A14__DDR_A_14 0x224 0x000 ALT0 0x0 808 + #define VF610_PAD_DDR_A13__DDR_A_13 0x228 0x000 ALT0 0x0 809 + #define VF610_PAD_DDR_A12__DDR_A_12 0x22c 0x000 ALT0 0x0 810 + #define VF610_PAD_DDR_A11__DDR_A_11 0x230 0x000 ALT0 0x0 811 + #define VF610_PAD_DDR_A10__DDR_A_10 0x234 0x000 ALT0 0x0 812 + #define VF610_PAD_DDR_A9__DDR_A_9 0x238 0x000 ALT0 0x0 813 + #define VF610_PAD_DDR_A8__DDR_A_8 0x23c 0x000 ALT0 0x0 814 + #define VF610_PAD_DDR_A7__DDR_A_7 0x240 0x000 ALT0 0x0 815 + #define VF610_PAD_DDR_A6__DDR_A_6 0x244 0x000 ALT0 0x0 816 + #define VF610_PAD_DDR_A5__DDR_A_5 0x248 0x000 ALT0 0x0 817 + #define VF610_PAD_DDR_A4__DDR_A_4 0x24c 0x000 ALT0 0x0 818 + #define VF610_PAD_DDR_A3__DDR_A_3 0x250 0x000 ALT0 0x0 819 + #define VF610_PAD_DDR_A2__DDR_A_2 0x254 0x000 ALT0 0x0 820 + #define VF610_PAD_DDR_A1__DDR_A_1 0x258 0x000 ALT0 0x0 821 + #define VF610_PAD_DDR_A0__DDR_A_0 0x25c 0x000 ALT0 0x0 822 + #define VF610_PAD_DDR_BA2__DDR_BA_2 0x260 0x000 ALT0 0x0 823 + #define VF610_PAD_DDR_BA1__DDR_BA_1 0x264 0x000 ALT0 0x0 824 + #define VF610_PAD_DDR_BA0__DDR_BA_0 0x268 0x000 ALT0 0x0 825 + #define VF610_PAD_DDR_CAS__DDR_CAS_B 0x26c 0x000 ALT0 0x0 826 + #define VF610_PAD_DDR_CKE__DDR_CKE_0 0x270 0x000 ALT0 0x0 827 + #define VF610_PAD_DDR_CLK__DDR_CLK_0 0x274 0x000 ALT0 0x0 828 + #define VF610_PAD_DDR_CS__DDR_CS_B_0 0x278 0x000 ALT0 0x0 829 + #define VF610_PAD_DDR_D15__DDR_D_15 0x27c 0x000 ALT0 0x0 830 + #define VF610_PAD_DDR_D14__DDR_D_14 0x280 0x000 ALT0 0x0 831 + #define VF610_PAD_DDR_D13__DDR_D_13 0x284 0x000 ALT0 0x0 832 + #define VF610_PAD_DDR_D12__DDR_D_12 0x288 0x000 ALT0 0x0 833 + #define VF610_PAD_DDR_D11__DDR_D_11 0x28c 0x000 ALT0 0x0 834 + #define VF610_PAD_DDR_D10__DDR_D_10 0x290 0x000 ALT0 0x0 835 + #define VF610_PAD_DDR_D9__DDR_D_9 0x294 0x000 ALT0 0x0 836 + #define VF610_PAD_DDR_D8__DDR_D_8 0x298 0x000 ALT0 0x0 837 + #define VF610_PAD_DDR_D7__DDR_D_7 0x29c 0x000 ALT0 0x0 838 + #define VF610_PAD_DDR_D6__DDR_D_6 0x2a0 0x000 ALT0 0x0 839 + #define VF610_PAD_DDR_D5__DDR_D_5 0x2a4 0x000 ALT0 0x0 840 + #define VF610_PAD_DDR_D4__DDR_D_4 0x2a8 0x000 ALT0 0x0 841 + #define VF610_PAD_DDR_D3__DDR_D_3 0x2ac 0x000 ALT0 0x0 842 + #define VF610_PAD_DDR_D2__DDR_D_2 0x2b0 0x000 ALT0 0x0 843 + #define VF610_PAD_DDR_D1__DDR_D_1 0x2b4 0x000 ALT0 0x0 844 + #define VF610_PAD_DDR_D0__DDR_D_0 0x2b8 0x000 ALT0 0x0 845 + #define VF610_PAD_DDR_DQM1__DDR_DQM_1 0x2bc 0x000 ALT0 0x0 846 + #define VF610_PAD_DDR_DQM0__DDR_DQM_0 0x2c0 0x000 ALT0 0x0 847 + #define VF610_PAD_DDR_DQS1__DDR_DQS_1 0x2c4 0x000 ALT0 0x0 848 + #define VF610_PAD_DDR_DQS0__DDR_DQS_0 0x2c8 0x000 ALT0 0x0 849 + #define VF610_PAD_DDR_RAS__DDR_RAS_B 0x2cc 0x000 ALT0 0x0 850 + #define VF610_PAD_DDR_WE__DDR_WE_B 0x2d0 0x000 ALT0 0x0 851 + #define VF610_PAD_DDR_ODT1__DDR_ODT_0 0x2d4 0x000 ALT0 0x0 852 + #define VF610_PAD_DDR_ODT0__DDR_ODT_1 0x2d8 0x000 ALT0 0x0 853 + #define VF610_PAD_DDR_DDRBYTE1__DDR_DDRBYTE1 0x2dc 0x000 ALT0 0x0 854 + #define VF610_PAD_DDR_DDRBYTE2__DDR_DDRBYTE2 0x2e0 0x000 ALT0 0x0 805 855 806 856 #endif

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arch/arm/boot/dts/vf610-twr.dts

··· 169 169 VDDA-supply = <&reg_3p3v>; 170 170 VDDIO-supply = <&reg_3p3v>; 171 171 clocks = <&clks VF610_CLK_SAI2>; 172 - }; 172 + }; 173 173 }; 174 174 175 175 &iomuxc {

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arch/arm/boot/dts/vf610-zii-dev-rev-b.dts

··· 288 288 }; 289 289 }; 290 290 291 - spi0 { 291 + spi-0 { 292 292 compatible = "spi-gpio"; 293 293 pinctrl-0 = <&pinctrl_gpio_spi0>; 294 294 pinctrl-names = "default";

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arch/arm/boot/dts/vf610.dtsi