Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux

drm/amd/display: Add HDMI DSC native YCbCr422 support

[WHY && HOW]
For some HDMI OVT timing, YCbCr422 encoding fails at the DSC
bandwidth check. The root cause is our DSC policy for timing
doesn't account for HDMI YCbCr422 native support.

Cc: Mario Limonciello <mario.limonciello@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
Reviewed-by: Chris Park <chris.park@amd.com>
Signed-off-by: Leo Ma <hanghong.ma@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Leo Ma and committed by
Alex Deucher
07bfa9cd e79563bf

+7 -5
+2 -2
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_mst_types.c
··· 1147 1147 params[count].num_slices_v = aconnector->dsc_settings.dsc_num_slices_v; 1148 1148 params[count].bpp_overwrite = aconnector->dsc_settings.dsc_bits_per_pixel; 1149 1149 params[count].compression_possible = stream->sink->dsc_caps.dsc_dec_caps.is_dsc_supported; 1150 - dc_dsc_get_policy_for_timing(params[count].timing, 0, &dsc_policy); 1150 + dc_dsc_get_policy_for_timing(params[count].timing, 0, &dsc_policy, dc_link_get_highest_encoding_format(stream->link)); 1151 1151 if (!dc_dsc_compute_bandwidth_range( 1152 1152 stream->sink->ctx->dc->res_pool->dscs[0], 1153 1153 stream->sink->ctx->dc->debug.dsc_min_slice_height_override, ··· 1681 1681 { 1682 1682 struct dc_dsc_policy dsc_policy = {0}; 1683 1683 1684 - dc_dsc_get_policy_for_timing(&stream->timing, 0, &dsc_policy); 1684 + dc_dsc_get_policy_for_timing(&stream->timing, 0, &dsc_policy, dc_link_get_highest_encoding_format(stream->link)); 1685 1685 dc_dsc_compute_bandwidth_range(stream->sink->ctx->dc->res_pool->dscs[0], 1686 1686 stream->sink->ctx->dc->debug.dsc_min_slice_height_override, 1687 1687 dsc_policy.min_target_bpp * 16,
+2 -1
drivers/gpu/drm/amd/display/dc/dc_dsc.h
··· 101 101 */ 102 102 void dc_dsc_get_policy_for_timing(const struct dc_crtc_timing *timing, 103 103 uint32_t max_target_bpp_limit_override_x16, 104 - struct dc_dsc_policy *policy); 104 + struct dc_dsc_policy *policy, 105 + const enum dc_link_encoding_format link_encoding); 105 106 106 107 void dc_dsc_policy_set_max_target_bpp_limit(uint32_t limit); 107 108
+3 -2
drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c
··· 883 883 884 884 memset(dsc_cfg, 0, sizeof(struct dc_dsc_config)); 885 885 886 - dc_dsc_get_policy_for_timing(timing, options->max_target_bpp_limit_override_x16, &policy); 886 + dc_dsc_get_policy_for_timing(timing, options->max_target_bpp_limit_override_x16, &policy, link_encoding); 887 887 pic_width = timing->h_addressable + timing->h_border_left + timing->h_border_right; 888 888 pic_height = timing->v_addressable + timing->v_border_top + timing->v_border_bottom; 889 889 ··· 1173 1173 1174 1174 void dc_dsc_get_policy_for_timing(const struct dc_crtc_timing *timing, 1175 1175 uint32_t max_target_bpp_limit_override_x16, 1176 - struct dc_dsc_policy *policy) 1176 + struct dc_dsc_policy *policy, 1177 + const enum dc_link_encoding_format link_encoding) 1177 1178 { 1178 1179 uint32_t bpc = 0; 1179 1180