drm/amdgpu: use amdgpu_bo_free_kernel more often

Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git

kernel os linux

Saves us even more loc.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

authored by

Christian König and committed by

Alex Deucher 8 years ago 078af1a3 a4a02777

+15 -163

5 changed files

expand all

drivers

gpu

drm

amd

amdgpu

amdgpu_device.c

gfx_v6_0.c

gfx_v7_0.c

gfx_v8_0.c

gfx_v9_0.c

+1 -12

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

··· 345 345 346 346 static void amdgpu_vram_scratch_fini(struct amdgpu_device *adev) 347 347 { 348 - int r; 349 - 350 - if (adev->vram_scratch.robj == NULL) { 351 - return; 352 - } 353 - r = amdgpu_bo_reserve(adev->vram_scratch.robj, true); 354 - if (likely(r == 0)) { 355 - amdgpu_bo_kunmap(adev->vram_scratch.robj); 356 - amdgpu_bo_unpin(adev->vram_scratch.robj); 357 - amdgpu_bo_unreserve(adev->vram_scratch.robj); 358 - } 359 - amdgpu_bo_unref(&adev->vram_scratch.robj); 348 + amdgpu_bo_free_kernel(&adev->vram_scratch.robj, NULL, NULL); 360 349 } 361 350 362 351 /**

+3 -34

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

··· 2217 2217 2218 2218 static void gfx_v6_0_rlc_fini(struct amdgpu_device *adev) 2219 2219 { 2220 - int r; 2221 - 2222 - if (adev->gfx.rlc.save_restore_obj) { 2223 - r = amdgpu_bo_reserve(adev->gfx.rlc.save_restore_obj, true); 2224 - if (unlikely(r != 0)) 2225 - dev_warn(adev->dev, "(%d) reserve RLC sr bo failed\n", r); 2226 - amdgpu_bo_unpin(adev->gfx.rlc.save_restore_obj); 2227 - amdgpu_bo_unreserve(adev->gfx.rlc.save_restore_obj); 2228 - 2229 - amdgpu_bo_unref(&adev->gfx.rlc.save_restore_obj); 2230 - adev->gfx.rlc.save_restore_obj = NULL; 2231 - } 2232 - 2233 - if (adev->gfx.rlc.clear_state_obj) { 2234 - r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true); 2235 - if (unlikely(r != 0)) 2236 - dev_warn(adev->dev, "(%d) reserve RLC c bo failed\n", r); 2237 - amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj); 2238 - amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj); 2239 - 2240 - amdgpu_bo_unref(&adev->gfx.rlc.clear_state_obj); 2241 - adev->gfx.rlc.clear_state_obj = NULL; 2242 - } 2243 - 2244 - if (adev->gfx.rlc.cp_table_obj) { 2245 - r = amdgpu_bo_reserve(adev->gfx.rlc.cp_table_obj, true); 2246 - if (unlikely(r != 0)) 2247 - dev_warn(adev->dev, "(%d) reserve RLC cp table bo failed\n", r); 2248 - amdgpu_bo_unpin(adev->gfx.rlc.cp_table_obj); 2249 - amdgpu_bo_unreserve(adev->gfx.rlc.cp_table_obj); 2250 - 2251 - amdgpu_bo_unref(&adev->gfx.rlc.cp_table_obj); 2252 - adev->gfx.rlc.cp_table_obj = NULL; 2253 - } 2220 + amdgpu_bo_free_kernel(&adev->gfx.rlc.save_restore_obj, NULL, NULL); 2221 + amdgpu_bo_free_kernel(&adev->gfx.rlc.clear_state_obj, NULL, NULL); 2222 + amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj, NULL, NULL); 2254 2223 } 2255 2224 2256 2225 static int gfx_v6_0_rlc_init(struct amdgpu_device *adev)

+6 -61

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

··· 2774 2774 */ 2775 2775 static void gfx_v7_0_cp_compute_fini(struct amdgpu_device *adev) 2776 2776 { 2777 - int i, r; 2777 + int i; 2778 2778 2779 2779 for (i = 0; i < adev->gfx.num_compute_rings; i++) { 2780 2780 struct amdgpu_ring *ring = &adev->gfx.compute_ring[i]; 2781 2781 2782 - if (ring->mqd_obj) { 2783 - r = amdgpu_bo_reserve(ring->mqd_obj, true); 2784 - if (unlikely(r != 0)) 2785 - dev_warn(adev->dev, "(%d) reserve MQD bo failed\n", r); 2786 - 2787 - amdgpu_bo_unpin(ring->mqd_obj); 2788 - amdgpu_bo_unreserve(ring->mqd_obj); 2789 - 2790 - amdgpu_bo_unref(&ring->mqd_obj); 2791 - ring->mqd_obj = NULL; 2792 - } 2782 + amdgpu_bo_free_kernel(&ring->mqd_obj, NULL, NULL); 2793 2783 } 2794 2784 } 2795 2785 2796 2786 static void gfx_v7_0_mec_fini(struct amdgpu_device *adev) 2797 2787 { 2798 - int r; 2799 - 2800 - if (adev->gfx.mec.hpd_eop_obj) { 2801 - r = amdgpu_bo_reserve(adev->gfx.mec.hpd_eop_obj, true); 2802 - if (unlikely(r != 0)) 2803 - dev_warn(adev->dev, "(%d) reserve HPD EOP bo failed\n", r); 2804 - amdgpu_bo_unpin(adev->gfx.mec.hpd_eop_obj); 2805 - amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj); 2806 - 2807 - amdgpu_bo_unref(&adev->gfx.mec.hpd_eop_obj); 2808 - adev->gfx.mec.hpd_eop_obj = NULL; 2809 - } 2788 + amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); 2810 2789 } 2811 2790 2812 2791 static int gfx_v7_0_mec_init(struct amdgpu_device *adev) ··· 3299 3320 */ 3300 3321 static void gfx_v7_0_rlc_fini(struct amdgpu_device *adev) 3301 3322 { 3302 - int r; 3303 - 3304 - /* save restore block */ 3305 - if (adev->gfx.rlc.save_restore_obj) { 3306 - r = amdgpu_bo_reserve(adev->gfx.rlc.save_restore_obj, true); 3307 - if (unlikely(r != 0)) 3308 - dev_warn(adev->dev, "(%d) reserve RLC sr bo failed\n", r); 3309 - amdgpu_bo_unpin(adev->gfx.rlc.save_restore_obj); 3310 - amdgpu_bo_unreserve(adev->gfx.rlc.save_restore_obj); 3311 - 3312 - amdgpu_bo_unref(&adev->gfx.rlc.save_restore_obj); 3313 - adev->gfx.rlc.save_restore_obj = NULL; 3314 - } 3315 - 3316 - /* clear state block */ 3317 - if (adev->gfx.rlc.clear_state_obj) { 3318 - r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true); 3319 - if (unlikely(r != 0)) 3320 - dev_warn(adev->dev, "(%d) reserve RLC c bo failed\n", r); 3321 - amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj); 3322 - amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj); 3323 - 3324 - amdgpu_bo_unref(&adev->gfx.rlc.clear_state_obj); 3325 - adev->gfx.rlc.clear_state_obj = NULL; 3326 - } 3327 - 3328 - /* clear state block */ 3329 - if (adev->gfx.rlc.cp_table_obj) { 3330 - r = amdgpu_bo_reserve(adev->gfx.rlc.cp_table_obj, true); 3331 - if (unlikely(r != 0)) 3332 - dev_warn(adev->dev, "(%d) reserve RLC cp table bo failed\n", r); 3333 - amdgpu_bo_unpin(adev->gfx.rlc.cp_table_obj); 3334 - amdgpu_bo_unreserve(adev->gfx.rlc.cp_table_obj); 3335 - 3336 - amdgpu_bo_unref(&adev->gfx.rlc.cp_table_obj); 3337 - adev->gfx.rlc.cp_table_obj = NULL; 3338 - } 3323 + amdgpu_bo_free_kernel(&adev->gfx.rlc.save_restore_obj, NULL, NULL); 3324 + amdgpu_bo_free_kernel(&adev->gfx.rlc.clear_state_obj, NULL, NULL); 3325 + amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj, NULL, NULL); 3339 3326 } 3340 3327 3341 3328 static int gfx_v7_0_rlc_init(struct amdgpu_device *adev)

+3 -34

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

··· 1238 1238 1239 1239 static void gfx_v8_0_rlc_fini(struct amdgpu_device *adev) 1240 1240 { 1241 - int r; 1242 - 1243 - /* clear state block */ 1244 - if (adev->gfx.rlc.clear_state_obj) { 1245 - r = amdgpu_bo_reserve(adev->gfx.rlc.clear_state_obj, true); 1246 - if (unlikely(r != 0)) 1247 - dev_warn(adev->dev, "(%d) reserve RLC cbs bo failed\n", r); 1248 - amdgpu_bo_unpin(adev->gfx.rlc.clear_state_obj); 1249 - amdgpu_bo_unreserve(adev->gfx.rlc.clear_state_obj); 1250 - amdgpu_bo_unref(&adev->gfx.rlc.clear_state_obj); 1251 - adev->gfx.rlc.clear_state_obj = NULL; 1252 - } 1253 - 1254 - /* jump table block */ 1255 - if (adev->gfx.rlc.cp_table_obj) { 1256 - r = amdgpu_bo_reserve(adev->gfx.rlc.cp_table_obj, true); 1257 - if (unlikely(r != 0)) 1258 - dev_warn(adev->dev, "(%d) reserve RLC cp table bo failed\n", r); 1259 - amdgpu_bo_unpin(adev->gfx.rlc.cp_table_obj); 1260 - amdgpu_bo_unreserve(adev->gfx.rlc.cp_table_obj); 1261 - amdgpu_bo_unref(&adev->gfx.rlc.cp_table_obj); 1262 - adev->gfx.rlc.cp_table_obj = NULL; 1263 - } 1241 + amdgpu_bo_free_kernel(&adev->gfx.rlc.clear_state_obj, NULL, NULL); 1242 + amdgpu_bo_free_kernel(&adev->gfx.rlc.cp_table_obj, NULL, NULL); 1264 1243 } 1265 1244 1266 1245 static int gfx_v8_0_rlc_init(struct amdgpu_device *adev) ··· 1299 1320 1300 1321 static void gfx_v8_0_mec_fini(struct amdgpu_device *adev) 1301 1322 { 1302 - int r; 1303 - 1304 - if (adev->gfx.mec.hpd_eop_obj) { 1305 - r = amdgpu_bo_reserve(adev->gfx.mec.hpd_eop_obj, true); 1306 - if (unlikely(r != 0)) 1307 - dev_warn(adev->dev, "(%d) reserve HPD EOP bo failed\n", r); 1308 - amdgpu_bo_unpin(adev->gfx.mec.hpd_eop_obj); 1309 - amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj); 1310 - amdgpu_bo_unref(&adev->gfx.mec.hpd_eop_obj); 1311 - adev->gfx.mec.hpd_eop_obj = NULL; 1312 - } 1323 + amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); 1313 1324 } 1314 1325 1315 1326 static int gfx_v8_0_mec_init(struct amdgpu_device *adev)

+2 -22

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

··· 819 819 820 820 static void gfx_v9_0_mec_fini(struct amdgpu_device *adev) 821 821 { 822 - int r; 823 - 824 - if (adev->gfx.mec.hpd_eop_obj) { 825 - r = amdgpu_bo_reserve(adev->gfx.mec.hpd_eop_obj, true); 826 - if (unlikely(r != 0)) 827 - dev_warn(adev->dev, "(%d) reserve HPD EOP bo failed\n", r); 828 - amdgpu_bo_unpin(adev->gfx.mec.hpd_eop_obj); 829 - amdgpu_bo_unreserve(adev->gfx.mec.hpd_eop_obj); 830 - 831 - amdgpu_bo_unref(&adev->gfx.mec.hpd_eop_obj); 832 - adev->gfx.mec.hpd_eop_obj = NULL; 833 - } 834 - if (adev->gfx.mec.mec_fw_obj) { 835 - r = amdgpu_bo_reserve(adev->gfx.mec.mec_fw_obj, true); 836 - if (unlikely(r != 0)) 837 - dev_warn(adev->dev, "(%d) reserve mec firmware bo failed\n", r); 838 - amdgpu_bo_unpin(adev->gfx.mec.mec_fw_obj); 839 - amdgpu_bo_unreserve(adev->gfx.mec.mec_fw_obj); 840 - 841 - amdgpu_bo_unref(&adev->gfx.mec.mec_fw_obj); 842 - adev->gfx.mec.mec_fw_obj = NULL; 843 - } 822 + amdgpu_bo_free_kernel(&adev->gfx.mec.hpd_eop_obj, NULL, NULL); 823 + amdgpu_bo_free_kernel(&adev->gfx.mec.mec_fw_obj, NULL, NULL); 844 824 } 845 825 846 826 static int gfx_v9_0_mec_init(struct amdgpu_device *adev)