tjh.dev
Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
arm64: dts: imx8: correct clock order
Per bindings/mmc/fsl-imx-esdhc.yaml, the clock order is ipg, ahb, per,
otherwise warning: "
mmc@5b020000: clock-names:1: 'ahb' was expected
mmc@5b020000: clock-names:2: 'per' was expected "
Fixes: 16c4ea7501b1 ("arm64: dts: imx8: switch to new lpcg clock binding")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
+9
-9
+9
-9
arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
+9
-9
arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
···
38
38
interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>;
39
39
reg = <0x5b010000 0x10000>;
40
40
clocks = <&sdhc0_lpcg IMX_LPCG_CLK_4>,
41
-
<&sdhc0_lpcg IMX_LPCG_CLK_5>,
42
-
<&sdhc0_lpcg IMX_LPCG_CLK_0>;
43
-
clock-names = "ipg", "per", "ahb";
41
+
<&sdhc0_lpcg IMX_LPCG_CLK_0>,
42
+
<&sdhc0_lpcg IMX_LPCG_CLK_5>;
43
+
clock-names = "ipg", "ahb", "per";
44
44
power-domains = <&pd IMX_SC_R_SDHC_0>;
45
45
status = "disabled";
46
46
};
···
49
49
interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>;
50
50
reg = <0x5b020000 0x10000>;
51
51
clocks = <&sdhc1_lpcg IMX_LPCG_CLK_4>,
52
-
<&sdhc1_lpcg IMX_LPCG_CLK_5>,
53
-
<&sdhc1_lpcg IMX_LPCG_CLK_0>;
54
-
clock-names = "ipg", "per", "ahb";
52
+
<&sdhc1_lpcg IMX_LPCG_CLK_0>,
53
+
<&sdhc1_lpcg IMX_LPCG_CLK_5>;
54
+
clock-names = "ipg", "ahb", "per";
55
55
power-domains = <&pd IMX_SC_R_SDHC_1>;
56
56
fsl,tuning-start-tap = <20>;
57
57
fsl,tuning-step = <2>;
···
62
62
interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
63
63
reg = <0x5b030000 0x10000>;
64
64
clocks = <&sdhc2_lpcg IMX_LPCG_CLK_4>,
65
-
<&sdhc2_lpcg IMX_LPCG_CLK_5>,
66
-
<&sdhc2_lpcg IMX_LPCG_CLK_0>;
67
-
clock-names = "ipg", "per", "ahb";
65
+
<&sdhc2_lpcg IMX_LPCG_CLK_0>,
66
+
<&sdhc2_lpcg IMX_LPCG_CLK_5>;
67
+
clock-names = "ipg", "ahb", "per";
68
68
power-domains = <&pd IMX_SC_R_SDHC_2>;
69
69
status = "disabled";
70
70
};